CN114421445B - Chip capable of preventing reverse connection of power supply - Google Patents
Chip capable of preventing reverse connection of power supply Download PDFInfo
- Publication number
- CN114421445B CN114421445B CN202111041437.6A CN202111041437A CN114421445B CN 114421445 B CN114421445 B CN 114421445B CN 202111041437 A CN202111041437 A CN 202111041437A CN 114421445 B CN114421445 B CN 114421445B
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- China
- Prior art keywords
- chip
- power supply
- direction maintaining
- maintaining circuit
- supply direction
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- 238000002955 isolation Methods 0.000 claims description 2
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 3
- 230000020169 heat generation Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
- H02H11/00—Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result
- H02H11/002—Emergency protective circuit arrangements for preventing the switching-on in case an undesired electric working condition might result in case of inverted polarity or connection; with switching for obtaining correct connection
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/49—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions wire-like arrangements or pins or rods
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Semiconductor Integrated Circuits (AREA)
- Charge And Discharge Circuits For Batteries Or The Like (AREA)
Abstract
The invention discloses a chip for preventing reverse connection of a power supply, which is characterized in that: the chip comprises a first chip pin and a second chip pin, wherein the first chip pin and the second chip pin are interchangeably connected with a power supply positive end and a power supply negative end; the chip also comprises a power supply direction maintaining circuit and other chip circuits; the power supply direction maintaining circuit is used for always ensuring that the power supply of the other chip circuits is kept in a positive connection state. The invention realizes the chip with the function of preventing the power supply from being connected reversely without depending on any circuit outside the chip.
Description
Technical Field
The invention belongs to the field of chips, and particularly relates to a chip capable of preventing reverse connection of power supplies.
Background
In the chip field, when a chip company delivers a chip to a user, the user must distinguish the power supply positive and negative pins of the chip in the process of testing and using the chip so as to avoid the power supply of the chip from being burnt instead.
There is a need in the art for a chip that can implement a self-contained anti-reverse function without relying on any circuitry external to the chip.
Disclosure of Invention
In view of this, the present invention provides a chip for preventing reverse connection of power supply, which is characterized in that:
the chip comprises a first chip pin and a second chip pin, wherein the first chip pin and the second chip pin are interchangeably connected with a power supply positive end and a power supply negative end;
the chip also comprises a power supply direction maintaining circuit and other chip circuits;
the power supply direction maintaining circuit is used for always ensuring that the power supply of the other chip circuits is kept in a positive connection state.
Preferably, the method comprises the steps of,
the power supply direction maintaining circuit includes a bridge circuit.
Preferably, the method comprises the steps of,
the bridge circuit includes four diodes that form a full bridge circuit.
Preferably, the method comprises the steps of,
in the bridge circuit, the cathode of the first diode is connected with the anode of the second diode, and the cathodes of the first diode and the anode of the second diode are both connected to the first chip pin.
Preferably, the method comprises the steps of,
in the bridge circuit, the cathode of the third diode is connected with the anode of the fourth diode, and the cathodes of the third diode and the anode of the fourth diode are both connected to the second chip pin.
Preferably, the method comprises the steps of,
in the bridge circuit, the positive electrode of the first diode is connected with the positive electrode of the third diode, and the positive electrodes of the first diode and the third diode are both connected to the power supply negative terminals of the other chip circuits.
Preferably, the method comprises the steps of,
in the bridge circuit, the cathode of the second diode is connected with the cathode of the fourth diode, and the cathodes of the second diode and the fourth diode are both connected to the power supply positive ends of the other chip circuits.
Preferably, the method comprises the steps of,
the chip is MCU or other chips.
The invention has the following technical effects:
through the scheme, the invention realizes a new chip, and no matter what the chip is connected positively and negatively, the situation that the chip is damaged due to the fact that the chip is powered and connected negatively is avoided.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of the internal structure of a chip in one embodiment of the invention;
FIG. 2 is a schematic diagram of a prior art configuration for preventing reverse connection of power;
fig. 3 is a schematic diagram of the internal structure of a chip in one embodiment of the invention.
Detailed Description
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to fig. 1 to 3 in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. The components of the embodiments of the present invention generally described and illustrated in the figures herein may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the invention, as presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures.
In the description of the present invention, it should be noted that, if the terms "upper", "lower", "inner", "outer", and the like indicate an azimuth or a positional relationship based on the azimuth or the positional relationship shown in the drawings, or the azimuth or the positional relationship in which the inventive product is conventionally put in use, it is merely for convenience of describing the present invention and simplifying the description, and it is not indicated or implied that the apparatus or element referred to must have a specific azimuth, be configured and operated in a specific azimuth, and thus it should not be construed as limiting the present invention.
Furthermore, the terms "first," "second," and the like, if any, are used merely for distinguishing between descriptions and not for indicating or implying a relative importance.
It should be noted that the features of the embodiments of the present invention may be combined with each other without conflict.
Referring to fig. 1, in one embodiment, the present invention discloses a chip for preventing reverse connection of power, which is characterized in that:
the chip comprises a first chip pin V and a second chip pin V a And V b The first chip pin and the second chip pin are interchangeably connected with a power supply positive end and a power supply negative end;
the chip also comprises a power supply direction maintaining circuit and other chip circuits;
the power supply direction maintaining circuit is used for always ensuring that the power supply of the other chip circuits is kept in a positive connection state.
It can be understood that, in this embodiment, the power supply direction maintaining circuit is directly added in the chip, and when the power supply direction maintaining circuit is connected with the other chip circuits, the power supply of the other chip circuits is always ensured to be kept in the normal connection state by the power supply direction maintaining circuit.
In contrast, referring to the prior art shown in fig. 2, in the prior art, for the chip of the MCU, an external diode is used to connect between the MCU and the power supply, and the unidirectional conduction characteristic of the diode is utilized to make the power supply not conduct after reverse connection, so as to protect the MCU. This obviously results in that the MCU cannot work and must re-supply power correctly in the case of reverse connection, not only taking up time but also the user experience is poor. The above-described embodiments of the present invention solve the problems of the prior art.
In a further embodiment of the present invention,
the power supply direction maintaining circuit is located as close to the whole edge of the chip as possible, and meanwhile overlong wiring is prevented.
This is because, for this embodiment, the power supply direction maintaining circuit requires a large withstand voltage capability due to direct connection to the power supply input. Such a voltage withstand capability places demands on chip design. For this reason, it is further recommended to enlarge the area of the power feeding direction maintaining circuit.
In addition, since the wiring inside the power feeding direction maintaining circuit itself is required to have a large withstand voltage capability in the chip, it is necessary to prevent the excessive wiring inside itself and between the power feeding direction maintaining circuit and other internal circuits in the chip in order to balance the area and withstand voltage in consideration of the fact that the wiring inside itself occupies a certain area of the entire power feeding direction maintaining circuit. Therefore, the power feeding direction maintaining circuit is located as close to the edge of the entire chip as possible, because even if the power feeding direction maintaining circuit generates heat during operation, the power feeding direction maintaining circuit has little influence on other areas of the chip because the power feeding direction maintaining circuit is located close to the edge of the entire chip.
In a further embodiment of the present invention,
the chip comprises an isolation layer to reduce the influence of the power supply direction maintaining circuit on other circuits of the chip.
In a further embodiment of the present invention,
the power supply direction maintaining circuit includes a bridge circuit.
Referring to fig. 3, in another embodiment,
the bridge circuit includes four diodes D1 to D4, which constitute a full bridge circuit.
In a further embodiment of the present invention,
in the bridge circuit, the cathode of the first diode is connected with the anode of the second diode, and the cathodes of the first diode and the anode of the second diode are both connected to the first chip pin.
In a further embodiment of the present invention,
the bridge circuit is formed by two or four MOS transistors. Typically, four MOS transistors form a full bridge circuit.
This is because the internal resistance of the MOS transistor is smaller than that of the diode (note, in particular, the NMOS transistor), thereby reducing the withstand voltage requirement and contributing to reduction of heat generation of the bridge circuit. In combination with the foregoing embodiments, the present embodiment helps to further improve the heat generation of the entire chip, and optimize the position of the power supply direction maintaining circuit, which may be closer to other internal circuits of the chip, thereby helping to further reduce the surface area and volume of the entire chip.
In a further embodiment of the present invention,
in the bridge circuit, the cathode of the third diode is connected with the anode of the fourth diode, and the cathodes of the third diode and the anode of the fourth diode are both connected to the second chip pin.
In a further embodiment of the present invention,
in the bridge circuit, the positive electrode of the first diode is connected with the positive electrode of the third diode, and the positive electrodes of the first diode and the third diode are both connected to the power supply negative terminals of the other chip circuits.
In a further embodiment of the present invention,
in the bridge circuit, the cathode of the second diode is connected with the cathode of the fourth diode, and the cathodes of the second diode and the fourth diode are both connected to the power supply positive ends of the other chip circuits.
In a further embodiment of the present invention,
the chip is MCU or other chips.
The foregoing is merely illustrative of the present invention, and the present invention is not limited thereto, and any changes or substitutions easily contemplated by those skilled in the art within the scope of the present invention should be included in the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.
Claims (1)
1. MCU chip of preventing power reverse connection, its characterized in that:
the chip comprises a first chip pin and a second chip pin, wherein the first chip pin and the second chip pin can be mutually exchanged to connect a power supply positive end and a power supply negative end;
the chip also comprises a power supply direction maintaining circuit and other chip circuits;
wherein,
the power supply direction maintaining circuit is used for always ensuring that the power supply of the other chip circuits is kept in a positive connection state;
the power supply direction maintaining circuit comprises a bridge circuit;
the bridge circuit comprises four MOS tubes, and the four MOS tubes form a full-bridge circuit;
the power supply direction maintaining circuit is directly added in the chip, and the power supply of other chip circuits is always ensured to be kept in a positive connection state through the power supply direction maintaining circuit under the condition that the power supply direction maintaining circuit is connected with the other chip circuits;
the power supply direction maintaining circuit is positioned close to the edge of the whole chip and is used for preventing overlong wiring;
in order to balance the area and withstand voltage, the MCU chip needs to prevent the excessive wiring inside itself, and prevent the excessive wiring between the power supply direction maintaining circuit and other internal circuits in the chip,
and, in addition, the processing unit,
the area of the power supply direction maintaining circuit is enlarged;
the MCU chip comprises an isolation layer so as to reduce the influence of a power supply direction maintaining circuit on other circuits of the chip;
wherein,
the internal resistance of the MOS tube is smaller than that of the diode, and the MOS tube is an NMOS tube;
no matter what the chip is connected positively and negatively, the situation that the chip is destroyed due to the fact that the power supply of the chip is connected negatively is avoided; the chip with the function of preventing power connection from being reversed can be realized without depending on any circuit outside the chip.
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CN202111041437.6A CN114421445B (en) | 2021-09-06 | 2021-09-06 | Chip capable of preventing reverse connection of power supply |
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CN202111041437.6A CN114421445B (en) | 2021-09-06 | 2021-09-06 | Chip capable of preventing reverse connection of power supply |
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CN114421445A CN114421445A (en) | 2022-04-29 |
CN114421445B true CN114421445B (en) | 2024-02-23 |
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CN211744117U (en) * | 2020-01-19 | 2020-10-23 | 深圳市北美通科技有限公司 | Charging circuit compatible with quick charging mode and common charging mode |
CN112993964A (en) * | 2021-03-17 | 2021-06-18 | 无锡十顶电子科技有限公司 | Electrostatic protection circuit for buzzer driving chip power supply |
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