CN114420033B - Display driving chip, display device and full-screen electronic device - Google Patents
Display driving chip, display device and full-screen electronic device Download PDFInfo
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- 239000004973 liquid crystal related substance Substances 0.000 description 2
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Classifications
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0264—Details of driving circuits
- G09G2310/027—Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
Abstract
The invention relates to a display driving chip, a display device and a full screen electronic device, wherein the display data bit number of the display driving chip is n, and the full screen electronic device comprises: a gamma circuit connected with a plurality of gray-scale voltage lines between the source electrode driving circuit so as to output gamma voltages; a latch connected with a data line between the source electrode driving circuit so as to output gray-scale data; a source driver circuit comprising: the data selector, the data input end connects correspondent 1+2 m pieces of gray-scale voltage lines, choose the signal input end to connect data link, choose the voltage of two pieces of gray-scale voltage lines corresponding to gray-scale data according to the preset relation, and export these two voltages through an output end separately; the input end of the interpolation circuit is connected with the data line and the two output ends of the data selector, and two voltages input by the input end of the interpolation circuit are interpolated into one of 2 (n-m) voltages according to gray-scale data; where m < n. The invention can reduce the height of the display driving chip.
Description
Technical Field
The present invention relates to a display, and more particularly, to a display driving chip, a display device, and a full-screen electronic device.
Background
The display screen is widely applied to the fields of consumption, industry, aviation and the like, and has great market demands. The display driving chip plays a role in translating display contents into signals required by the panel in the display screen module. At least one driving chip is needed for one panel, so that the display driving chip market is huge and competition is very strong. The cost and area of the chip are related, so how to reduce the area of the chip becomes an important way to reduce the cost and improve the market competitiveness of the product.
In addition, the market such as mobile phones has higher and higher requirements on the screen ratio, namely, the trend of the development of comprehensive screens is toward. The current implementation of full-screen is mainly to reduce the "chin" of the display screen, which is highly relevant for driving the chip. If the height of the display driving chip can be reduced, the product competitiveness can be further improved.
Disclosure of Invention
Based on this, it is necessary to provide a display driving chip having a low height.
A display driver chip having a display data bit number of n bits, comprising: a gamma circuit is connected with a plurality of gray scale voltage lines between the source electrode driving circuit, and outputs gamma voltages to the source electrode driving circuit through each gray scale voltage line; a latch is connected with the source electrode driving circuit, and is used for outputting gray-scale data to the source electrode driving circuit through the data line; and the source driving circuit includes: the data selector, the data input end connects corresponding 1+2 m in every said gray-scale voltage line, the selective signal input end connects the said data link, the said data selector chooses the voltage of two gray-scale voltage lines corresponding to said gray-scale data according to the preset relation, and output these two voltages through an output end separately; the input end of the interpolation circuit is connected with the data line and two output ends in the corresponding data selector, and the interpolation circuit is used for interpolating two voltages input by the input end of the interpolation circuit into one of 2 (n-m) voltages according to the gray-scale data to be used as a voltage output to a corresponding source electrode in the display panel; wherein n and m are both positive integers and m < n.
In the display driving chip, the number of gray voltage lines corresponding to each source voltage is reduced from 2 n to 2 m+1, so that the wiring height can be reduced; compared with the prior art without the interpolation circuit, the interpolation circuit has little additional circuit components and little influence on the whole scale of the source electrode driving circuit, so the height of the whole display driving chip can be reduced.
In one embodiment, the gray-scale data is binary data of n bits, the data selector selects voltages of two corresponding gray-scale voltage lines according to m-bit data in the gray-scale data, and the interpolation circuit interpolates the two voltages into one of 2 (n-m) voltages according to n-m-bit data remaining in the gray-scale data.
In one embodiment, the interpolation circuit is implemented by voltage interpolation to superimpose voltages or by current interpolation to superimpose currents.
In one embodiment, the voltage values of the 1+2 m gamma voltages transferred by the 1+2 m gray scale voltage lines are in an arithmetic progression, and the absolute value of the potential difference between the two voltages output by the data selector is one of 2 m values.
In one embodiment, the interpolation circuit is functionally multiplexed with a portion of the circuits in the source drive circuit.
In one embodiment, the display driver chip is a single gamma architecture or a 3gamma architecture.
In one embodiment, each of the gray scale voltage lines is located between the source driving circuit and the latch.
It is also necessary to provide a display device including a display panel and a display driving chip according to any of the foregoing embodiments.
It is also necessary to provide a full-screen electronic device, which includes a display panel and a display driving chip according to any of the foregoing embodiments.
In one embodiment, the full screen electronic device is a cell phone.
Drawings
For a better description and illustration of embodiments and/or examples of those inventions disclosed herein, reference may be made to one or more of the accompanying drawings. Additional details or examples used to describe the drawings should not be construed as limiting the scope of the disclosed invention, the presently described embodiments and/or examples, and any of the presently understood modes of carrying out the invention.
FIG. 1 is a schematic diagram of an exemplary single gamma wired display driver chip for 8-bit display data;
FIG. 2 is a schematic diagram of an exemplary gamma circuit;
FIG. 3 is a schematic diagram of a single gamma link interpolation architecture display driver chip for 8-bit display data according to an embodiment;
FIG. 4 is a circuit block diagram of a selector of a source driving circuit in an embodiment of a display driving chip for 8-bit display data;
FIG. 5 is a circuit block diagram of interpolation circuitry cooperating with the selector of FIG. 4;
FIG. 6 is a schematic diagram of a 3gamma link interpolation architecture display driver chip for 8-bit display data according to an embodiment;
FIG. 7 is a schematic diagram of a 3gamma wired display driver chip of a comparative example of 8-bit display data;
FIG. 8 is a schematic diagram of a single gamma link interpolation architecture display driver chip for 10-bit display data according to an embodiment;
FIG. 9 is a schematic diagram of a single gamma interconnect structure display driver chip of a comparative example of 10-bit display data;
FIG. 10 is a circuit block diagram of a selector of a source driving circuit in an embodiment of a display driving chip for 10-bit display data;
fig. 11 is a circuit block diagram of interpolation circuitry cooperating with the selector of fig. 10.
Detailed Description
In order that the invention may be readily understood, a more complete description of the invention will be rendered by reference to the appended drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element or layer is referred to as being "on," "adjacent," "connected to," or "coupled to" another element or layer, it can be directly on, adjacent, connected, or coupled to the other element or layer, or intervening elements or layers may be present. In contrast, when an element is referred to as being "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" another element or layer, there are no intervening elements or layers present. It will be understood that, although the terms first, second, third, etc. may be used herein to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present invention.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
An electronic or electrical device and/or any other related device or component (e.g., a display device including a display panel and a display panel driver, wherein the display panel driver further includes a drive controller, a gate driver, a gamma reference voltage generator, a data driver, and an emission driver) in accordance with embodiments of the inventive concepts described herein may be implemented using any suitable hardware, firmware (e.g., application specific integrated circuits), software, or a combination of software, firmware, and hardware. For example, the various components of these devices may be formed on one Integrated Circuit (IC) chip or on separate IC chips. In addition, various components of these devices may be implemented on a flexible printed circuit film, tape Carrier Package (TCP), printed Circuit Board (PCB), or formed on one substrate. Additionally, the various components of these devices may be processes or threads running on one or more processors in one or more computing devices to execute computer program instructions and interact with other system components to perform the various functions described herein. Moreover, those skilled in the art will appreciate that the functionality of the various computing devices may be combined or integrated into a single computing device, or that the functionality of a particular computing device may be distributed over one or more other computing devices without departing from the spirit and scope of exemplary embodiments of the inventive concepts.
FIG. 1 is a schematic diagram of an exemplary single gamma wired display driver chip with 8-bit display data. A source driving circuit (source) of the display driving chip drives corresponding pixel columns in the display panel, and a gamma circuit provides driving voltages required by the source driving circuit. The data from the latch is decoded to select the corresponding gray scale for the source driver circuit output. In the architecture shown in fig. 1, 256 gray scale voltage lines to the power of 2 are set between the gamma circuit and the source driving circuit. As gamma gray-scale voltage lines are more, the influence on the wiring height between the source driving circuit and the latch is larger. The diagonal bars on the traces in fig. 1 represent buses, i.e. more than one; 256 indicates the number of gray voltage lines, 8 indicates that the display data is 8 bits, and the gray voltage lines/data lines are omitted in the ellipsis indicates.
The source electrode driving circuit realization method capable of reducing the height of the display driving chip has important reference significance for realizing the narrow chin of the display screen and reducing the cost. In one embodiment of the present application, a display driver chip includes a source (source) driver circuit, a latch (latch), and a gamma circuit. A data line is connected between the latch and the source driving circuit, and the latch is used for outputting n-bit gray scale data to the source driving circuit. A plurality of gray scale voltage lines are connected between the gamma circuit and the source electrode driving circuit, and gamma voltages are output to the source electrode driving circuit through the gray scale voltage lines. For a single gamma architecture, one source voltage corresponding to a column of pixels of the display panel needs to be correspondingly provided with 1+2 μm gray scale voltage lines; for a 3gamma architecture, a source voltage needs to be set up for 3× (1+2 μm) gray scale voltage lines. Wherein m is a positive integer, and m < n, n is the number of bits of display data of the display driving chip.
The source driving circuit includes data Selectors (MUXs) and interpolation circuits provided in one-to-one correspondence with the data selectors. The data input end of the data selector is connected with the corresponding 1+2 m gray scale voltage lines, and the selection signal input end of the data selector is connected with the data line of the latch. The data selector selects voltages of two gray-scale voltage lines corresponding to the gray-scale data given by the latch according to a preset relation, and outputs the two voltages through one output end respectively. The input end of the interpolation circuit is connected with the two output ends of the corresponding data selector and the data line of the latch, and two voltages input by the input end of the interpolation circuit are interpolated into one of 2 (n-m) voltages according to the gray-scale data given by the latch, and the one voltage is used as the voltage output to the source electrode in the display panel. Specifically, the interpolation circuit determines the interpolated scaling factor based on 2 (n-m) -bit data in the gray-scale data supplied from the latch, the 2 (n-m) -bit data corresponding to the different scaling factors of the 2 (n-m) sets.
In the display driving chip, the number of gray voltage lines (hereinafter simply referred to as a group of gray voltage lines) to be set for one source voltage corresponding to one column of pixels of the display panel is reduced from 2 n to 2 m+1, so that the wiring height can be reduced; compared with the prior art without the interpolation circuit, the interpolation circuit has little additional circuit components and little influence on the whole scale of the source electrode driving circuit, so the height of the whole display driving chip can be reduced.
In one embodiment of the present application, the data selector selects voltages of two corresponding gray-scale voltage lines according to m-bit data in the gray-scale data supplied from the latch, and the interpolation circuit interpolates the two voltages into one of 2 (n-m) voltages according to n-m-bit data remaining in the gray-scale data. For example, for a display driver chip with 8 bits of display data, the data selector selects voltages of two corresponding gray scale voltage lines according to 6 bits of DIG [7:2] of the gray scale data given by the latch, and the interpolation circuit decides which of 4 sets of scaling coefficients is the scaling coefficient to be interpolated according to the remaining two bits of DIG [1:0 ].
In one embodiment of the present application, the voltage values of the 1+2≡m gamma voltages transferred by the 1+2≡m gray scale voltage lines of each group are in an arithmetic progression. Fig. 2 shows a schematic diagram of a gamma circuit. The gamma circuit converts digital signals (gray scale) into analog signals (gamma voltage) through the resistor string. The gamma circuit includes a voltage divider circuit and a Decoder (DEC), the voltage divider circuit divides the voltage of Vop (maximum deflection voltage of liquid crystal) into corresponding parts (1024 parts in the embodiment shown in fig. 2, and 1+2 m for the embodiment of 1+2 m gray scale voltage lines) according to the preset corresponding relation between gray scale and gamma voltage. Then, the DEC of each gamma node selects the gamma voltage (digital signal) of the node according to the gray scale; after the voltage setting is completed, the digital signals of the gamma voltage are converted into analog signals through a digital-to-analog converter DAC and an operational amplifier OP, and the analog signals are output to a source electrode driving circuit. Since the voltage values of the 1+2 m gamma voltages obtained by the voltage division are in an arithmetic progression, the absolute value of the potential difference between the two voltages outputted from the data selector is one of the 2 m values.
The implementation of the interpolation circuit may refer to the conventional technology in the art, and is not described herein. The interpolation circuit may be implemented by voltage interpolation to superimpose voltages or by current interpolation to superimpose currents, and may be specifically designed according to the panel voltage requirement, which is not limited in the embodiments of the present application.
FIG. 3 is a schematic diagram of a single gamma-wired interpolation architecture display driver chip for 8-bit display data according to an embodiment. It can be seen that the same 8-bit (i.e., n=8) display data, the circuit structure shown in fig. 3 has 65 sets of gray-scale voltage lines (m=6), and the circuit structure shown in fig. 1 has 256 sets of gray-scale voltage lines, so that the number of gray-scale voltage lines is greatly reduced, the lateral wiring can be greatly reduced, and the chip height is further reduced.
FIG. 4 is a circuit block diagram of a selector of a source driving circuit in an embodiment of a display driving chip for 8-bit display data. In this embodiment, the gray voltage lines of the corresponding gamma circuit are 65 (i.e. m=6) gray voltage lines from GRY0 to GRY64 as the data input end of the data selector, the 65 gray voltage lines are 64 segments in total, the data selector selects the voltages of two corresponding gray voltage lines according to the 6 bits of data DIG [7:2] in the gray data (the selection signal input end of the input data selector) given by the latch (the 64 values are 64 binary data, each value corresponds to one segment), and the data selector outputs one segment of the two voltages VA and VB according to the one-to-one correspondence between the preset 6 bits of gray data and the 64 segments of voltages. Fig. 5 is a circuit block diagram of interpolation circuitry cooperating with the selector of fig. 4. The interpolation circuit carries out operation according to VA and VB, and selects and obtains VOUT according to two bits of DIG [1:0] data remained in the gray scale data, namely source voltage finally output to the display panel. The VOUT output operation for the embodiment of fig. 5 is shown in table 1, but is not limited to the scale factors in the table, and the embodiments of the present application are not limited in this regard. The specific operation circuit is more, and can be realized through voltage superposition or current superposition, and the design is selected according to the panel voltage requirement, so that the embodiment of the application is not limited.
Table 1: source interpolation operation for 8 bits of display data
| DIG[1:0] | VOUT |
| 00 | (4*VA+0*VB)/4 |
| 01 | (3*VA+1*VB)/4 |
| 10 | (2*VA+2*VB)/4 |
| 11 | (1*VA+3*VB)/4 |
It will be understood that, for the display driving chip of the 8-bit display data, the case that "one set of gray scale voltage lines is 65, and the interpolation circuit selects one set of 4 sets of scale coefficients to perform interpolation operation according to 2-bit gray scale data" shown in fig. 3, 4 and 5 is only one embodiment, in other embodiments, m may be other values, for example, m=5, where the number of gray scale voltage lines is 33, and the interpolation circuit selects one set of 8 sets of scale coefficients to perform interpolation operation according to 3-bit gray scale data.
Fig. 6 is a schematic diagram of a 3gamma interpolation architecture display driving chip for 8-bit display data according to an embodiment, in which a set of gray-scale voltage lines is 3× (1+2≡m) =195 (m=6). Fig. 7 is a schematic diagram of a 3gamma wiring display driving chip of a comparative example of 8-bit display data, in which the number of gray scale voltage lines in a group is 8 times 3, i.e. 256×3=768, and the number of gray scale voltage lines in the display driving chip shown in fig. 6 is greatly reduced compared with that in fig. 7.
The selector of the display driving chip in the embodiment shown in fig. 6 can also employ the circuit configuration shown in fig. 4, but the number of selectors is correspondingly 3 times. Similarly, the interpolation circuit of the display driving chip in the embodiment shown in fig. 6 may employ the circuit configuration shown in fig. 5, the number of interpolation circuits is also 3 times, and the interpolation operation may employ the correspondence relationship shown in table 1.
Fig. 8 is a schematic diagram of a single gamma interpolation architecture display driving chip for 10-bit display data according to an embodiment, and a set of gray scale voltage lines of the circuit structure shown in fig. 8 is 129 (m=7). Fig. 9 is a schematic diagram of a single gamma connection structure display driving chip of a comparative example of 10-bit display data, and in the circuit structure shown in fig. 9, a group of gray scale voltage lines is 1024, so that the number of gray scale voltage lines in the display driving chip shown in fig. 8 is greatly reduced compared with that in the display driving chip shown in fig. 9.
FIG. 10 is a circuit block diagram of a selector of the source driving circuit in an embodiment of the display driving chip for 10-bit display data. In this embodiment, the gray-scale voltage lines of the corresponding gamma circuit are 65 (i.e. m=6) gray-scale voltage lines from GRY0 to GRY64, and the data selector selects the voltages of the two corresponding gray-scale voltage lines according to the 6 bits of DIG [9:4] data in the gray-scale data given by the latch, and outputs one of the 65 gray-scale voltage lines, namely, the two voltages VA and VB. Fig. 11 is a circuit block diagram of interpolation circuitry cooperating with the selector of fig. 10. The interpolation circuit carries out operation according to VA and VB, and selects and obtains VOUT according to the four bits of DIG [3:0] data remained in the gray scale data, namely, the source voltage finally output to the display panel. The VOUT output operation in the embodiment of fig. 11 is shown in table 2, but is not limited to the scale factors in the table, and the embodiments of the present application are not limited thereto.
Table 2: source interpolation operation for 10 bits of display data
| DIG[3:0] | VOUT |
| 0000 | (16*VA+0*VB)/16 |
| 0001 | (15*VA+1*VB)/16 |
| 0010 | (14*VA+2*VB)/16 |
| 0011 | (13*VA+3*VB)/16 |
| 0100 | (12*VA+4*VB)/16 |
| 0101 | (11*VA+5*VB)/16 |
| 0110 | (10*VA+6*VB)/16 |
| 0111 | (9*VA+7*VB)/16 |
| 1000 | (8*VA+8*VB)/16 |
| 1001 | (7*VA+9*VB)/16 |
| 1010 | (6*VA+10*VB)/16 |
| 1011 | (5*VA+11*VB)/16 |
| 1100 | (4*VA+12*VB)/16 |
| 1101 | (3*VA+13*VB)/16 |
| 1110 | (2*VA+14*VB)/16 |
| 1111 | (1*VA+15*VB)/16 |
The application correspondingly provides a display device, which comprises the display driving chip of any embodiment and a display panel. The display device may be a liquid crystal display, an OLED display, a QLED display, a MiniLED display, a micro led display, or the like.
The display driving chip realizes the reduction of the height of the chip by reducing the number of gray voltage lines, so that the chin of the display screen can be reduced, and the realization of the full screen is facilitated, and the display driving chip is particularly suitable for being applied to full screen electronic equipment. The application correspondingly provides a full-screen electronic device, which comprises a display panel and the display driving chip in any embodiment. The full-screen electronic device can be a mobile phone, and also can be any product or component with a display function, such as electronic paper, a tablet personal computer, a television, a display, a notebook computer, a digital photo frame, a navigator, a wearable device, an internet of things device and the like, and the embodiment of the application is not limited to the product or the component.
It should be understood that, although the steps in the flowcharts of this application are shown in order as indicated by the arrows, these steps are not necessarily performed in order as indicated by the arrows. The steps are not strictly limited to the order of execution unless explicitly recited herein, and the steps may be executed in other orders. Moreover, at least a portion of the steps in the flowcharts of this application may include a plurality of steps or stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of the steps or stages is not necessarily sequential, and may be performed in turn or alternately with at least a portion of the steps or stages in other steps or other steps.
In the description of the present specification, reference to the terms "some embodiments," "other embodiments," "desired embodiments," and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.
The technical features of the above embodiments may be arbitrarily combined, and for brevity, all of the possible combinations of the technical features of the above embodiments are not described, however, as long as there is no contradiction between the combinations of the technical features, they should be considered as the scope of the description.
The above examples only represent a few embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the claims. It should be noted that it would be apparent to those skilled in the art that various modifications and improvements could be made without departing from the spirit of the present application, which would be within the scope of the present application. Accordingly, the scope of protection of the present application is to be determined by the claims appended hereto.
Claims (8)
1. A display driving chip having a display data bit number of n bits, comprising:
a gamma circuit is connected with a plurality of gray scale voltage lines between the source electrode driving circuit, and outputs gamma voltages to the source electrode driving circuit through each gray scale voltage line;
a latch is connected with the source electrode driving circuit, and is used for outputting gray-scale data to the source electrode driving circuit through the data line; and
the source driving circuit includes:
the data selector, the data input end connects corresponding 1+2 m in every said gray-scale voltage line, the selective signal input end connects the said data link, the said data selector chooses the voltage of two gray-scale voltage lines corresponding to said gray-scale data according to the preset relation, and output these two voltages through an output end separately; and
the input end of the interpolation circuit is connected with the data line and two output ends in the corresponding data selector, and the interpolation circuit is used for interpolating two voltages input by the input end of the interpolation circuit into one of 2 (n-m) voltages according to the gray-scale data to serve as a voltage output to a corresponding source electrode in the display panel; the data selector selects voltages of two corresponding gray-scale voltage lines according to m-bit data in the gray-scale data, and the interpolation circuit interpolates the two voltages into one of 2 (n-m) voltages according to n-m-bit data remaining in the gray-scale data; the voltage values of the 1+2 m gamma voltages transmitted by the 1+2 m gray scale voltage lines are in an arithmetic sequence, and the absolute value of the potential difference between the two voltages output by the data selector is one of the 2 m values;
wherein n and m are both positive integers and m < n.
2. The display driver chip according to claim 1, wherein the interpolation circuit is realized by superimposing a voltage by voltage interpolation or by superimposing a current by current interpolation.
3. The display driver chip of claim 1, wherein the interpolation circuit is functionally multiplexed with a portion of the circuits in the source driver circuit.
4. The display driver chip of claim 1, wherein the display driver chip is a single gamma architecture or a 3gamma architecture.
5. The display driver chip according to claim 1, wherein a position of each of the gray scale voltage lines is provided between the source driver circuit and the latch.
6. A display device comprising a display panel, further comprising the display driver chip according to any one of claims 1-5.
7. A full-screen electronic device comprising a display panel, further comprising a display driver chip as claimed in any one of claims 1-5.
8. The full screen electronic device of claim 7, wherein the full screen electronic device is a cell phone.
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| KR102552947B1 (en) * | 2018-08-14 | 2023-07-10 | 매그나칩 반도체 유한회사 | Display apparatus and driving method thereof |
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