CN114401379A - Video buffer circuit and video apparatus - Google Patents
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Abstract
The invention discloses a video buffer circuit and video equipment, wherein the circuit comprises: the filtering unit is used for filtering the analog video signal output by the video chip so as to adjust a first characteristic parameter of the analog video signal, wherein the first characteristic parameter comprises amplitude-frequency characteristics; and the at least one stage of radio-following coupling unit is connected with the filtering unit and is used for carrying out isolation coupling on the analog video signal after filtering processing by adjusting the static working point so as to adjust a second characteristic parameter of the analog video signal, wherein the second characteristic parameter comprises at least one of a signal-to-noise ratio, a differential gain and a differential phase error. The circuit removes the noise of the analog video signal through the filtering unit, improves the amplitude-frequency characteristic of the signal, can improve the static working point of the analog video signal to a wider range through the emitter follower coupling unit, ensures that the signal-to-noise ratio index is not deteriorated, and reduces the application cost on the basis of ensuring that the video index is not reduced.
Description
Technical Field
The invention relates to the technical field of communication, in particular to a video buffer circuit and video equipment.
Background
There are two main types of analog video signals output by video equipment: composite Video Broadcast Signal (CVBS) and color difference components (Y, Cb, Cr). The signals are generated by a video decoding chip through a digital-to-analog conversion circuit (DAC), pass through a low-pass filter circuit and then are output to a lotus interface (RCA). The analog video signal needs to meet the network access standard of broadcasting and television equipment of the national broadcast and television central office, and the indexes mainly comprise: white level amplitude, synchronization amplitude, amplitude-frequency characteristics, differential gain and differential phase error, signal-to-noise ratio, etc.
The current video chip generally integrates a DAC (digital-to-analog converter), and outputs through an external video buffer chip (such as FMS6143 and FMS6363), but the proportion of damage of the video buffer chip caused by RCA interface hot plug, cable surge, electrostatic discharge and other factors is very high. The common solution is to add a buffer chip between the chip pin and the peripheral interface terminal, which has the disadvantage of higher cost; the method of firstly amplifying and then dividing the voltage and outputting the signal can also be used by an amplifying circuit, so that although the cost is relatively low, the amplitude of the output signal is different from that of the original signal due to the temperature drift and the difference between the triodes, and the consistency cannot be guaranteed.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, a first objective of the present invention is to provide a video buffer circuit, which removes noise of an analog video signal through a filtering unit, improves the amplitude-frequency characteristics of the signal, and can increase the quiescent point of the analog video signal to a wider range through an emitter follower coupling unit, thereby ensuring that the signal-to-noise ratio index is not deteriorated, and reducing the application cost on the basis of ensuring that the video index is not reduced.
A second object of the invention is to propose a video apparatus.
In order to achieve the above object, a first embodiment of the present invention provides a video buffering circuit, including: the filtering unit is used for filtering the analog video signal output by the video chip so as to adjust a first characteristic parameter of the analog video signal, wherein the first characteristic parameter comprises amplitude-frequency characteristics; and the at least one stage of radio-following coupling unit is connected with the filtering unit and is used for carrying out isolation coupling on the analog video signal after filtering processing by adjusting the static working point so as to adjust a second characteristic parameter of the analog video signal, wherein the second characteristic parameter comprises at least one of a signal-to-noise ratio, a differential gain and a differential phase error.
According to the video buffer circuit provided by the embodiment of the invention, the analog video signal output by the video chip is filtered through the filtering unit so as to adjust the first characteristic parameter of the analog video signal, wherein the first characteristic parameter comprises amplitude-frequency characteristics, at least one stage of radio-follower coupling unit is connected with the filtering unit, and the analog video signal after being filtered is isolated and coupled by adjusting the static working point so as to adjust the second characteristic parameter of the analog video signal, wherein the second characteristic parameter comprises at least one of signal-to-noise ratio, differential gain and differential phase error. The circuit removes the noise of the analog video signal through the filtering unit, improves the amplitude-frequency characteristic of the signal, can improve the static working point of the analog video signal to a wider range through the emitter follower coupling unit, ensures that the signal-to-noise ratio index is not deteriorated, and reduces the application cost on the basis of ensuring that the video index is not reduced.
In addition, the video buffering circuit according to the above embodiment of the present invention may further have the following additional technical features:
according to one embodiment of the present invention, a filtering unit includes: one end of the first capacitor is used as the input end of the filtering unit, and the other end of the first capacitor is grounded; one end of the first inductor is connected with one end of the first capacitor; and one end of the second capacitor is connected with the other end of the first inductor, and the other end of the second capacitor is grounded.
According to one embodiment of the present invention, an emitter follower coupling unit includes: one end of the first resistor is connected with a power supply; the emitter of the first triode is connected with the other end of the first resistor, the collector of the first triode is grounded, and the base of the first triode is connected to the other end of the first inductor; and one end of the second resistor is connected with the base electrode of the first triode, and the other end of the second resistor is grounded.
According to an embodiment of the invention, the emitter follower coupling unit further comprises: and one end of the third resistor is connected to the power supply, and the other end of the third resistor is connected with one end of the second resistor and is provided with a first node.
According to an embodiment of the invention, the emitter follower coupling unit further comprises: and one end of the third capacitor is connected to the other end of the first inductor, and the other end of the third capacitor is connected with the first node.
According to an embodiment of the invention, the emitter follower coupling unit further comprises: and one end of the fourth capacitor is connected with the emitting electrode of the first triode, and the other end of the fourth capacitor is used as the output end of the video buffer circuit.
According to an embodiment of the present invention, the filtering unit further includes: one end of the second inductor is connected with the other end of the first inductor; and one end of the fifth capacitor is connected with the other end of the second inductor, and the other end of the fifth capacitor is grounded.
According to one embodiment of the invention, when the emitter follower coupling unit is multi-stage, the power supply of each stage of emitter follower coupling unit is different.
According to an embodiment of the present invention, the video buffering circuit further includes: and the interface protection unit is arranged corresponding to the output end of the video buffer circuit so as to inhibit interference signals entering the interface in a coupling manner.
According to one embodiment of the present invention, an interface protection unit includes: a first diode, wherein the anode of the first diode is grounded, and the cathode of the first diode is connected to the output end of the video buffer circuit; and the anode of the second diode is connected with the cathode of the first diode, and the cathode of the second diode is connected to the power supply.
In order to achieve the above object, a second embodiment of the present invention provides a video apparatus, which includes the above video buffering circuit.
According to the video equipment provided by the embodiment of the invention, based on the video buffer circuit, the noise of the analog video signal is removed through the filtering unit, the amplitude-frequency characteristic of the signal is improved, the static working point of the analog video signal can be promoted to a wider range through the radio-follower coupling unit, the signal-to-noise ratio index is ensured not to be deteriorated, and the application cost is reduced on the basis of ensuring that the video index is not reduced.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a block diagram of a video buffer circuit according to one embodiment of the present invention;
FIG. 2 is a circuit diagram of a video buffer circuit according to one embodiment of the present invention;
FIG. 3 is a first diagram illustrating simulation results of a video buffering circuit according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating simulation results of a video buffering circuit according to an embodiment of the present invention;
FIG. 5 is a circuit diagram of a video buffer circuit according to an embodiment of the present invention;
FIG. 6 is a block diagram of a video buffer circuit according to another embodiment of the present invention;
FIG. 7 is a diagram illustrating simulation results of a video buffer circuit according to an embodiment of the present invention;
fig. 8 is a block schematic diagram of a video apparatus according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
A video buffer circuit and a video apparatus proposed by an embodiment of the present invention are described below with reference to the drawings.
FIG. 1 is a block diagram of a video buffering circuit according to an embodiment of the present invention.
As shown in fig. 1, a video buffering circuit 100 according to an embodiment of the present invention may include: a filtering unit 20 and at least one stage of a radio-follower coupling unit 30.
The filtering unit 20 is configured to perform filtering processing on the analog video signal output by the video chip 10 to adjust a first characteristic parameter of the analog video signal, where the first characteristic parameter includes an amplitude-frequency characteristic. The at least one stage of the radio-follower coupling unit 30 is connected to the filtering unit 20, and is configured to perform isolated coupling on the filtered analog video signal by adjusting the static operating point, so as to adjust a second characteristic parameter of the analog video signal, where the second characteristic parameter includes at least one of a signal-to-noise ratio, a differential gain, and a differential phase error.
That is, the analog video signal outputted from the video chip 10 through the digital-to-analog conversion circuit is firstly filtered by the filtering unit 20, adjusted in amplitude characteristic, and then enters the random coupling unit 30 to adjust at least one of the signal-to-noise ratio, the differential gain and the differential phase error. The analog video signal output by the video chip 10 has a low static operating voltage, and the static operating point of the analog video signal can be increased to a wide range by the emitter follower coupling unit 30, so that the signal-to-noise ratio index is not deteriorated.
In addition, the number of the emitter-follower coupling units 30 can be set according to the actual situation, when the number of the emitter-follower coupling units 30 is 1, that is, only the emitter-follower circuit 1 is adopted, it is described that the video buffer circuit 100 adopts the 1-stage emitter-follower coupling unit 30, the input end of the emitter-follower circuit 1 is connected with the filter unit 20, and the output end is the output end of the video buffer circuit 100, when the emitter-follower coupling unit 30 adopts the emitter-follower circuits 1 to n, it is described that the video buffer circuit 100 adopts the multi-stage emitter-follower coupling unit 30, each stage of the emitter-follower coupling units 30 is connected in sequence, that is, the input end of the emitter-follower circuit 1 of the first stage is connected with the output end of the filter unit 20, the output end is connected with the input end of the follower circuit 2 of the next stage, and so on, until the output end of the follower circuit n of the last stage is used as the output end of the video buffer circuit 100, the analog video signal after the amplitude characteristic adjustment passes through each stage of the follower circuit in sequence, thereby adjusting the second characteristic parameter.
According to an embodiment of the present invention, as shown in fig. 2, the filtering unit 20 includes: a first capacitor C1, a first inductor L1, and a second capacitor C2. One end of the first capacitor C1 is used as the input end of the filter unit 20, and the other end of the first capacitor C1 is grounded. One end of the first inductor L1 is connected to one end of the first capacitor C1. One end of the second capacitor C2 is connected to the other end of the first inductor L1, and the other end of the second capacitor C2 is grounded.
Specifically, the first capacitor C1 and the second capacitor C2 are respectively connected to two end portions of the first inductor L1, and the other end is grounded, so as to form an pi-type filter circuit, at this time, a connection end of the first capacitor C1 and the first inductor L1 in the filter unit 20 is used as an input end of the filter unit 20, that is, the analog video signal S1_ FROM _ CHIP output by the video CHIP 110 through the digital-to-analog conversion circuit is input to the filter unit 20 of the video buffer circuit 100 through a connection end of the first capacitor C1 and the first inductor L1, and the S1_ FROM _ CHIP outer band signal is filtered by the pi-type filter circuit, so as to effectively improve the signal-to-noise ratio thereof, the other end of the first inductor L1 connected to the first capacitor C2 is used as an output end of the filter unit 20, and the filtered S1_ FROM _ CHIP is input to the emitter coupling unit 30 through the end portion.
With continued reference to fig. 2, the emitter follower coupling unit 30, according to one embodiment of the present invention, includes: the circuit comprises a first resistor R1, a first triode Q1 and a second resistor R2.
One end of the first resistor R1 is connected to a power supply. An emitter E of the first transistor Q1 is connected to the other end of the first resistor R1, a collector C of the first transistor Q1 is grounded, and a base B of the first transistor Q1 is connected to the other end of the first inductor. One end of the second resistor R2 is connected to the base B of the first transistor Q1, and the other end of the second resistor R2 is grounded.
Specifically, the emitter follower coupling unit 30 is provided with an emitter follower circuit therein, that is, for example, by using the first-stage emitter follower coupling unit 30, the signal output by the filtering unit 20 enters the first-stage emitter follower coupling unit 30 through the connection between the second resistor R2 and the base B of the first transistor Q1, and is amplified in the emitter follower coupling unit 30, and the amplified video signal S1_ TO _ Interface is output TO the Interface through the connection between the first resistor R1 and the emitter E.
It should be noted that the second resistor R2 is used for matching the S1_ FROM _ CHIP signal outputted by the filter, so as to effectively reduce reflection, and meanwhile, the first resistor R1 and the second resistor R2 cooperate to provide a static operating point for the first transistor Q1, thereby ensuring that the first transistor Q1 can be always in a conducting state.
Further, the emitter follower circuit 30 adjusts the quiescent operating point to the quiescent operating point of the buffered video signal through the second resistor R2, thereby saving a coupling capacitor and two resistors for adjusting the quiescent operating point and achieving the optimal design of cost. For example, the first transistor Q1, the first resistor R1 and the second resistor R2 form an emitter follower circuit, and the first resistor R1 and the second resistor R2 divide the voltage to obtain a static operating point: VB (VCC-Vbe) × R2/(R1+ R2). The VCC is a power supply voltage, generally 5V, the Vbe is the voltage at two ends of a base electrode B and an emitter electrode E in the first triode Q1, generally 0.7V, and the VB can be adjusted to a half of the action of the VCC by adjusting the resistance value of the second resistor R2, so that the waveform distortion degree is reduced, the effective working interval can be increased by increasing the voltage of the VCC by the distortion degree, and the waveform distortion degree is reduced.
According to an embodiment of the present invention, the emitter follower coupling unit 30 further includes: one end of a fourth capacitor C4, the fourth capacitor C4 is connected to the emitter E of the first transistor Q1, and the other end of the fourth capacitor C4 is used as the output end of the video buffer circuit 100.
Specifically, the video signal output by the emitter E is output through the fourth capacitor C4, and the output end of the fourth capacitor C4 is externally connected TO a lotus head (RCA) Interface, so that the analog video signal S1_ FROM _ CHIP output by the video CHIP 10 is signal-processed through the video buffer circuit 100, and the final signal S1_ TO _ Interface obtained through processing is output through the lotus head Interface connected TO one end of the fourth capacitor C4.
Further, in the emitter-follower coupling unit 30, the first resistor R1 and the fourth capacitor C4 provide communication, the fourth capacitor C4 serves as a coupling capacitor, and the first resistor R1 is pulled up to the power source VCC, so that the driving capability of the output is effectively improved. The first resistor R1 provides impedance matching for the output signal, which ensures effective output of the signal. In addition, the resistance of the first resistor R1 is generally less than 100 ohms, providing a low resistance path from the interface to the power source VCC, thereby effectively improving the EMC (Electro Magnetic Compatibility) performance and reliability of the snubber circuit 100. For example, when an ac interference signal enters the S1_ TO _ Interface at the Interface, the ac interference signal may be coupled TO the power VCC through the fourth capacitor C4 and the first resistor R1, and in addition, a multi-stage coupling capacitor is generally provided between the power VCC and the GND, and the interference signal is easier TO flow back TO the GND, so as TO reduce the interference of the ac interference signal TO the video chip 10 and improve the tolerance of the EMC, thereby achieving the purpose of improving the EMC performance and the anti-interference performance by designing a multi-stage low-resistance channel TO the GND and the power VCC.
It should be noted that the video buffer circuit 100 can also improve the low frequency characteristic by increasing the capacitance of the fourth capacitor C4. In the following, taking fig. 2 as an example, the transmission characteristics of the analog video signals S1_ FROM _ CHIP TO S1_ TO _ Interface are analyzed FROM the performance aspect, wherein the effective bandwidth of the CVBS is 6.5Mhz, when the fourth capacitor C4 is equal TO 10uf, the simulation result shown in fig. 3 is obtained by testing the analog video signal S1_ FROM _ CHIP in the range FROM 1Hz TO 100Mhz, and when the fourth capacitor C4 is equal TO 470uf, the simulation result shown in fig. 4 is obtained by testing the range FROM 1Hz TO 100 Mhz. The simulation results in fig. 3 show that when the frequency is lower than 225Hz, the signal amplitude is attenuated more, and the low-frequency component is attenuated more, while in fig. 4, the obvious attenuation only occurs when the frequency is lower than 5Hz, that is, when the capacitance value of the fourth capacitor C4 is changed from 225Hz to 5Hz after the capacitance value is changed from 10uF to 470uF, the frequency at the amplitude of-3 db can meet the requirement of the index.
It should be further noted that, when the impedance requirement of the analog video signal output is 75 ohms, to match the output impedance, 75 ohms may be selected as the first resistor R1, and in order to ensure the power heat dissipation requirement and reduce the parasitic inductance, the package size becomes larger, and usually the first resistor R1 may adopt a 0805 package size.
As shown in fig. 5, according to another embodiment of the present invention, the emitter follower coupling unit 30 further includes: and a third resistor R3, one end of the third resistor R3 being connected to the power supply, and the other end of the third resistor R3 being connected to one end of the second resistor R2 and having a first node a.
Specifically, the third resistor R3 and one end of the first resistor R1 are connected to the power source VCC at the same time, the other end of the third resistor R3 is connected to the second resistor and the base B of the first transistor Q1 to form a first node a, and the static operating point of the first transistor Q1 is adjusted through the third resistor R3 and the second resistor R2 to adjust the differential gain and the differential phase error.
That is, in addition to the above manner of obtaining the quiescent operating point, a method of setting a suitable quiescent operating point for the first transistor Q1 by using a divided voltage generated at the first node a by the third resistor R3 and the second resistor R2 connected to the power source VCC as an input base B may be adopted. In the application process, the voltage at the base B is raised in advance by the voltage output by the first node a of the first triode Q1, so that the first triode Q1 is in a conducting state, the first triode Q1 is also in an amplifying state under the condition of no signal input, and at this time, even if the input signal is a weak small signal, all the input signal flows into the first triode Q1, and the normal undistorted signal amplifying operation is completed. The resistance values of R3 and R2 can be set according to actual conditions.
With continued reference to fig. 5, the emitter follower coupling unit 30, according to one embodiment of the present invention, further includes: and a third capacitor C3, one terminal of the third capacitor C3 being connected to the other terminal of the first inductor L1, and the other terminal of the third capacitor C3 being connected to the first node a.
In fig. 5, NET1 is used as the output signal of the video chip 10, and NET5 is used as the output signal of the video buffer circuit 100. The signal NET1 is coupled by a voltage signal NET2 output by the filter unit 20, NET2 is coupled by a third capacitor C3 of the emitter-follower coupling unit 30, the third capacitor C3 couples an alternating current signal in NET2, and the coupled NET3 is input into the first triode Q1 through the first node a.
According to an embodiment of the present invention, the filtering unit 20 further includes: a second inductor L2 and a fifth capacitor C5. One end of the second inductor L2 is connected to the other end of the first inductor L1, one end of the fifth capacitor C5 is connected to the other end of the second inductor L2, and the other end of the fifth capacitor C5 is grounded.
That is to say, the filter unit 20 includes a first capacitor C1, a second capacitor C2, a fifth capacitor C5, a first inductor L1 and a second inductor L2, at this time, NET1 enters the filter unit 20 through an input end formed by the first capacitor C1 and the connection end of the first inductor L1, the other end of the first inductor L1 is connected to one end of the second capacitor C2 and one end of the second inductor L2, the other end of the second inductor L2 is connected to the fifth capacitor C5 and serves as an output end of the filter unit 20, NET2 is output to the radio-follower coupling unit 30 through the input end, and the other ends of the first capacitor C1, the second capacitor C2 and the fifth capacitor C5 are all grounded, so that the NET1 removes noise and improves amplitude-frequency characteristics through the filter unit 20 to obtain NET 2.
Further, according to an embodiment of the present invention, when the emitter follower coupling unit 30 has a plurality of stages, the power supply of each stage of the emitter follower coupling unit 30 is different.
As shown in fig. 6, the emitter follower coupling unit 30 includes an emitter follower circuit 1 and an emitter follower circuit n, and the emitter follower circuit 1 and the emitter follower circuit n are illustrated as the circuit diagram shown in fig. 5. At this time, the emitter E of the emitter follower circuit 1 is connected to the power source VCC1 through the first resistor R1, and a corresponding static operating point can be selectively set by adjusting the resistance value of the third resistor R3, while the emitter E of the emitter follower circuit n is connected to the power source VCCn through the first resistor R1, and a corresponding static operating point can be set by adjusting the third resistor R3. The input end of the emitter follower circuit 1 is connected with the output end of the filter unit 20, the output end is connected with the input end of the emitter follower circuit n, and the output end of the emitter follower circuit n is the output end of the emitter follower coupling unit 30.
In the application process, a voltage signal NET1 output by the video chip 10 is input into an II-type filter circuit output signal NET2, NET2 is input into the following circuit 1, and the following circuit 1 outputs NET4 through an emitter E1，NET41As input to the emitter follower circuit n, and outputs a signal NET4 processed by the emitter follower circuit n through its emitter E.
It should be noted that the emitter follower circuit may also adopt the circuit diagram shown in fig. 2, and at this time, the static operating point may also be adjusted by the resistance of the second resistor R2, which is not described herein again.
According to an embodiment of the present invention, the video buffering circuit 100 further includes: and the interface protection unit 40, wherein the interface protection unit 40 is arranged corresponding to the output end of the video buffer circuit 100 to suppress the interference signal coupled into the interface.
According to an embodiment of the present invention, the interface protection unit 40 includes: a first diode D1 and a second diode D2.
Wherein the anode of the first diode D1 is grounded, and the cathode of the first diode D1 is connected to the output terminal of the video buffer circuit 100. An anode of the second diode D2 is connected to a cathode of the first diode D1, and a cathode of the second diode D2 is connected to the power source VCC.
Specifically, referring to fig. 5, the voltage of NET2 is Vdiode, the power supply voltage of the emitter-follower coupling unit 30 is VCC, the output voltage value of NET5 should be between [ -Vdiode, VCC + Vdiode ], when the signal coupled in by NET5 is a dc signal, the dc signal cannot enter the emitter-follower coupling unit 30 under the action of the fourth capacitor C4, if the dc component coupled in by NET5 is greater than VCC + Vdiode, the branch where the second diode D2 is located is turned on, the dc component flows to the power supply VCC through the second diode D2, and at this time, the second diode D2 provides a bleeding channel to the power supply VCC. When the dc component coupled by NET5 is smaller than-Vdiode, the branch where the first diode D1 in the interface protection unit 40 is located is turned on to form a bleed channel of the GND-lotus head interface, and at this time, the current flows to the lotus head interface from GND to the output NET 5. If the DC component is within [ -Vdiode, VCC + Vdiode ], then no signal bleeding is required. Therefore, the interface protection unit 40 provides two bleeding channels to the power VCC and the GND respectively for the coupled over-high and over-low dc interference signals, and prevents the dc interference signals coupled in by the interface from being transmitted back to the video chip 10.
Further, when NET5 couples in an ac signal, the ac signal enters the emitter-follower coupling unit 30 through the fourth capacitor C4, and the emitter-follower coupling unit 30 provides three bleeding paths, one is a bleeding path provided by the first resistor R1 to VCC, one is a bleeding path provided by the first transistor Q1 to GND, and one is a bleeding path provided by the second resistor R2 to GND. Specifically, when the voltage of the ac signal is greater than VCC, the ac signal is discharged through the first resistor R1, and when the voltage of the ac signal is less than VCC, the ac signal is directly discharged through the collector C of the first transistor Q1 if the first transistor Q1 is turned on, and is discharged through the base B and the second resistor R2 if the Q1 is in an off state.
It should be noted that, when the emitter follower coupling unit 30 is provided in multiple stages, each stage of the emitter follower coupling unit is connected to a different power source VCC, so that when an ac signal coupled in by an interference signal through NET5 is respectively discharged to the planes of the power sources VCC, thereby reducing the interference of the interference signal to the video chip 10.
Further, in the simulation test conducted by taking fig. 5 as an example, the bandwidth of the composite synchronous video (CVBS) in the analog video signal is less than 6.5Mhz, the bandwidth of the color difference component (Y, Cb, Cr) is generally less than 30Mhz, and the simulation result of NET1 to NET5 in the frequency range from 1Hz to 100Mhz is shown in fig. 7, that is, when the frequency is lower than 25Hz, the obvious attenuation occurs.
In summary, according to the video buffer circuit in the embodiment of the invention, the filtering unit performs filtering processing on the analog video signal output by the video chip to adjust the first characteristic parameter of the analog video signal, and the static operating point of the at least one stage of the emitter follower coupling unit is adjusted to perform isolated coupling on the filtered analog video signal to adjust the second characteristic parameter of the analog video signal. The circuit removes the noise of the analog video signal through the filtering unit, improves the amplitude-frequency characteristic of the signal, can improve the static working point of the analog video signal to a wider range through the emitter follower coupling unit, ensures that the signal-to-noise ratio index is not deteriorated, and reduces the cost on the basis of ensuring that the video index is not reduced.
Corresponding to the above embodiment, the invention further provides a video device.
As shown in fig. 8, a video apparatus 200 according to an embodiment of the present invention includes the video buffering circuit 100.
According to the video equipment provided by the embodiment of the invention, based on the video buffer circuit, the noise of the analog video signal is removed through the filtering unit, the amplitude-frequency characteristic of the signal is improved, the static working point of the analog video signal can be promoted to a wider range through the radio-follower coupling unit, the signal-to-noise ratio index is ensured not to be deteriorated, and the application cost is reduced on the basis of ensuring that the video index is not reduced.
It should be noted that the logic and/or steps represented in the flowcharts or otherwise described herein, such as an ordered listing of executable instructions that can be considered to implement logical functions, can be embodied in any computer-readable medium for use by or in connection with an instruction execution system, apparatus, or device, such as a computer-based system, processor-containing system, or other system that can fetch the instructions from the instruction execution system, apparatus, or device and execute the instructions. For the purposes of this description, a "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transport the program for use by or in connection with the instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of the computer-readable medium would include the following: an electrical connection (electronic device) having one or more wires, a portable computer diskette (magnetic device), a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disc read-only memory (CDROM). Additionally, the computer-readable medium could even be paper or another suitable medium upon which the program is printed, as the program can be electronically captured, via for instance optical scanning of the paper or other medium, then compiled, interpreted or otherwise processed in a suitable manner if necessary, and then stored in a computer memory.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (11)
1. A video buffering circuit, comprising:
the video signal processing device comprises a filtering unit, a processing unit and a processing unit, wherein the filtering unit is used for filtering an analog video signal output by a video chip so as to adjust a first characteristic parameter of the analog video signal, and the first characteristic parameter comprises amplitude-frequency characteristics;
and the at least one stage of radio-follower coupling unit is connected with the filtering unit and is used for carrying out isolation coupling on the analog video signal after filtering processing by adjusting a static working point so as to adjust a second characteristic parameter of the analog video signal, wherein the second characteristic parameter comprises at least one of a signal-to-noise ratio, a differential gain and a differential phase error.
2. The video buffering circuit of claim 1, wherein the filtering unit comprises:
one end of the first capacitor is used as the input end of the filtering unit, and the other end of the first capacitor is grounded;
one end of the first inductor is connected with one end of the first capacitor;
and one end of the second capacitor is connected with the other end of the first inductor, and the other end of the second capacitor is grounded.
3. The video buffering circuit of claim 2, wherein the emitter follower coupling unit comprises:
one end of the first resistor is connected with a power supply;
the emitter of the first triode is connected with the other end of the first resistor, the collector of the first triode is grounded, and the base of the first triode is connected to the other end of the first inductor;
and one end of the second resistor is connected with the base electrode of the first triode, and the other end of the second resistor is grounded.
4. The video buffering circuit of claim 3, wherein the emitter follower coupling unit further comprises:
and one end of the third resistor is connected to the power supply, and the other end of the third resistor is connected with one end of the second resistor and is provided with a first node.
5. The video buffering circuit of claim 4, wherein the emitter follower coupling unit further comprises:
and one end of the third capacitor is connected to the other end of the first inductor, and the other end of the third capacitor is connected with the first node.
6. The video buffering circuit of claim 3, wherein the emitter follower coupling unit further comprises:
and one end of the fourth capacitor is connected with the emitting electrode of the first triode, and the other end of the fourth capacitor is used as the output end of the video buffer circuit.
7. The video buffering circuit of claim 2, wherein the filtering unit further comprises:
one end of the second inductor is connected with the other end of the first inductor;
and one end of the fifth capacitor is connected with the other end of the second inductor, and the other end of the fifth capacitor is grounded.
8. The video buffering circuit of any of claims 1-7, wherein when the emitter follower coupling unit is multi-stage, the power supply of the emitter follower coupling unit is different for each stage.
9. The video buffering circuit according to any of claims 1-7, further comprising:
and the interface protection unit is arranged corresponding to the output end of the video buffer circuit so as to inhibit interference signals entering the interface coupling.
10. The video buffering circuit of claim 9, wherein the interface protection unit comprises:
a first diode, an anode of the first diode being grounded, a cathode of the first diode being connected to an output terminal of the video buffer circuit;
and the anode of the second diode is connected with the cathode of the first diode, and the cathode of the second diode is connected to a power supply.
11. A video apparatus comprising a video buffering circuit according to any one of claims 1 to 10.
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