CN114400252A - Negative differential resistance MOSFET based on cold metal - Google Patents
Negative differential resistance MOSFET based on cold metal Download PDFInfo
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- CN114400252A CN114400252A CN202111671050.9A CN202111671050A CN114400252A CN 114400252 A CN114400252 A CN 114400252A CN 202111671050 A CN202111671050 A CN 202111671050A CN 114400252 A CN114400252 A CN 114400252A
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- 239000002184 metal Substances 0.000 title claims abstract description 42
- 229910052751 metal Inorganic materials 0.000 title claims abstract description 41
- 239000004065 semiconductor Substances 0.000 claims abstract description 23
- 239000010410 layer Substances 0.000 claims description 16
- 239000000463 material Substances 0.000 claims description 13
- 229910052961 molybdenite Inorganic materials 0.000 claims description 5
- 229910052982 molybdenum disulfide Inorganic materials 0.000 claims description 5
- CWQXQMHSOZUFJS-UHFFFAOYSA-N molybdenum disulfide Chemical compound S=[Mo]=S CWQXQMHSOZUFJS-UHFFFAOYSA-N 0.000 claims description 4
- 239000002356 single layer Substances 0.000 claims description 4
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 2
- 229910004214 TaSe2 Inorganic materials 0.000 claims description 2
- 229910052681 coesite Inorganic materials 0.000 claims description 2
- 229910052802 copper Inorganic materials 0.000 claims description 2
- 239000010949 copper Substances 0.000 claims description 2
- 229910052906 cristobalite Inorganic materials 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 2
- 229910052682 stishovite Inorganic materials 0.000 claims description 2
- 239000000758 substrate Substances 0.000 claims description 2
- 229910052905 tridymite Inorganic materials 0.000 claims description 2
- 230000005669 field effect Effects 0.000 abstract description 2
- 239000008186 active pharmaceutical agent Substances 0.000 description 7
- 230000005540 biological transmission Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 230000001105 regulatory effect Effects 0.000 description 3
- 230000010355 oscillation Effects 0.000 description 2
- 239000004576 sand Substances 0.000 description 2
- 229910020039 NbSe2 Inorganic materials 0.000 description 1
- 238000007792 addition Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005525 hole transport Effects 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 230000005641 tunneling Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Thin Film Transistor (AREA)
Abstract
The invention relates to a negative differential resistance MOSFET (metal-oxide-semiconductor field effect transistor) based on cold metal, which comprises an upper gate dielectric layer, a lower gate dielectric layer, an upper grid electrode and a lower grid electrode, wherein the upper grid electrode and the lower grid electrode are arranged on the gate dielectric layer, a source electrode, a drain electrode and a channel are arranged between the upper grid dielectric layer and the lower grid dielectric layer, and the source electrode is made of cold metal. Therefore, the invention has the following advantages: 1. the invention uses 'cold' metal as the source of MOSFET, and the unique band gap structure of the 'cold' metal source enables the MOSFET to realize excellent NDR performance. While the high mobility semiconductor ensures that it can generate a large peak current. In addition, the gate voltage of the MOSFET can be adjusted to effectively regulate the peak current and the current peak-to-valley ratio of the MOSFET. 2. The invention can improve the noise margin of the device and the output power of the NDR device, thereby improving the stability of the negative resistance oscillator.
Description
Technical Field
The invention relates to a negative differential resistance MOSFET (metal oxide semiconductor field effect transistor), in particular to a negative differential resistance MOSFET based on cold metal.
Background
The conventional NDR devices, such as tunnel diodes and resonant tunnel diodes, are turned on based on electron tunneling effect, so the peak current is small. When it is applied to an oscillation circuit, it is difficult to maintain the stability of the oscillation circuit. In addition, the small peak current and current peak-to-valley ratio also limit the noise margin of the NDR device, which can be difficult to maintain its negative resistance characteristics when the noise is large.
Disclosure of Invention
The invention mainly solves the technical problems existing in the prior art; an NDR effect is achieved by using a "cold" metal having a bandgap around the Fermi level as the source of the MOSFET. The unique bandgap structure of the "cold" metal source enables it to achieve excellent NDR performance. While the high mobility of the semiconductor material also ensures that the MOSFET can generate a very large peak current. In addition, by adjusting the gate voltage V of the MOSFETGSThe peak current and the current peak-to-valley ratio of the MOSFET can be effectively regulated.
Aiming at the defects of small peak current and small output power of the tunnel diode, the invention adopts the MOSFET with the cold metal source electrode to realize the NDR effect. The unique bandgap structure of the "cold" metal source enables it to achieve excellent NDR performance. While the high mobility semiconductors ensure that the MOSFET can generate extremely large peak currents. In a negative resistance oscillator, a larger peak current enables the MOSFET to provide a larger output power, ensuring that the oscillating circuit starts oscillating and continues oscillating. In addition, in the presence of noise in the circuit, the larger peak current and current peak-to-valley ratio also have a higher noise margin, thereby maintaining the negative resistance characteristics of the device.
The technical problem of the invention is mainly solved by the following technical scheme:
a negative differential resistance MOSFET based on cold metal is characterized by comprising an upper gate dielectric layer, a lower gate dielectric layer, an upper grid electrode and a lower grid electrode, wherein the upper grid electrode and the lower grid electrode are arranged on the gate dielectric layer, a source electrode, a drain electrode and a channel are arranged between the upper grid dielectric layer and the lower grid dielectric layer, and the source electrode is made of cold metal.
In the above-mentioned cold metal-based negative differential resistance MOSFET, the channel is made of intrinsic semiconductor material, and the drain is made of p-type doped semiconductor material.
Based on cold metal as described aboveThe drain electrode of the negative differential resistance MOSFET is a p-type heavily doped single-layer MoS2。
In the above negative differential resistance MOSFET based on cold metal, the channel is a single-layer MoS2。
In the above-mentioned negative differential resistance MOSFET based on cold metal, the drain is a simple substance material and adopts NbSe2Or TaSe2Any one of them.
In the above negative differential resistance MOSFET based on cold metal, the upper layer gate electrode and the lower layer gate electrode are both copper electrodes.
In the above negative differential resistance MOSFET based on cold metal, the upper gate dielectric layer and the lower gate dielectric layer are both SiO2A material substrate.
Therefore, the invention has the following advantages: (1) the invention is different from the existing NDR device based on semiconductor materials, and adopts 'cold' metal as the source electrode of the MOSFET, and the unique band gap structure of the 'cold' metal source electrode enables the metal to realize excellent NDR performance. While the high mobility semiconductor ensures that it can generate a large peak current. In addition, the gate voltage V of the MOSFET is adjustedGSThe peak current and the current peak-to-valley ratio of the MOSFET can be effectively regulated.
(2) The 'cold' metal source MOSFET can generate extremely large current peak-to-valley ratio and peak current at the same time. On one hand, the noise margin of the device can be improved by the larger current peak-to-valley ratio and the peak current, and on the other hand, the output power of the NDR device is improved by the higher peak current, so that the stability of the negative resistance oscillator is improved.
Drawings
FIG. 1 is a schematic diagram of the present invention;
fig. 2a is a current-voltage graph of a typical negative differential resistance device.
FIG. 2b shows the bias voltage Vb＝V0The bands of time are aligned.
FIG. 2c shows the bias voltage Vb＝V1The bands of time are aligned.
FIG. 2d shows the bias voltage Vb＝V2The bands of time are aligned.
FIG. 2e shows the bias voltage Vb＝V3The bands of time are aligned.
Wherein VDSCorresponding V0To V3As shown in (a). Dotted line and corresponding epsilonSAnd εDRepresenting the fermi levels of the source and drain, respectively. The white areas in (b-e) correspond to the "cold" metal and MoS2The band gap of the material, the size of the black arrows indicates the current size at this bias voltage, and the gray area under the dotted line indicates that the energy levels below the fermi level are completely filled with electrons. Where solid spheres represent electrons and open spheres represent holes. The number of carriers indicates the change in carrier concentration at different bias voltages.
Detailed Description
The technical scheme of the invention is further specifically described by the following embodiments and the accompanying drawings.
Example (b):
the "cold" metal used in the present invention is different from ordinary metallic materials possessing a density of continuous states. The presence of a conduction band gap (E) above the Fermi level for "cold" metalsCG) Or a band gap (E) of the valence band below the Fermi levelVG). Thus, the present invention achieves a type iii band aligned heterojunction NDR device through a heterojunction of "cold" metal and high mobility semiconductor.
In FIG. 1 to have EVGFor example, the NDR mechanism of a "cold" metal and semiconductor-constructed heterojunction is analyzed. The source in FIG. 1 is a source having EVGThe channel and drain are intrinsic and p-type doped semiconductor materials, respectively. Through VGSThe modulation shifts the bandgap of the semiconductor above the fermi level. I-IV represent various bias voltages (V)DS) Lower band alignment chart. Different from the traditional III-type energy band alignment semiconductor heterojunction, the cold metal heterojunction MOSFET has a wider carrier transmission path in a channel, and is beneficial to realizing larger peak current and current peak-to-valley ratio. When bias voltage VDS＝V1Fermi level (epsilon) of the drain electrodeD) And the carrier transmission width between the semiconductor valence band top (VBM) reaches a maximum value, and the current reaches a peak value. When bias voltage VDS＝V2When the carrier transport is hindered by the band gap overlap of the "cold" metal and the semiconductor, the current decreases and reaches the valley point. When bias voltage VDS＝V3At this time, a hole transport path appears below VBM of the semiconductor, and the current starts to rise again. The results show thatDThe width of the carrier transmission path with the VBM is a key factor in determining the magnitude of the peak current. Due to VGSInversely proportional to the width of the transmission path, and therefore the peak current and VGSIn inverse proportion. For the current peak-to-valley ratio, with VGSA larger V is requiredDSThe bandgap of the semiconductor is shifted to overlap the bandgap of the source. This results in an epsilon at the current valley pointDVBM closer to the source makes the transport efficiency of holes through the semiconductor VBM higher and the valley current and current peak-to-valley ratio become larger. Thus, the current peak-to-valley ratio and VGSIs in direct proportion.
FIG. 1. different bias voltages (V)DS) Lower band alignment chart. EpsilonSAnd εDThe fermi levels of the source and drain, respectively. The width of the red arrow indicates the magnitude of the current. The pink portion of the figure is the bandgap of the "cold" metal and semiconductor materials.
The invention is different from the existing heavily doped tunnel diode or the III-type energy band-aligned semiconductor heterojunction, and adopts the cold metal with the band gap near the Fermi level to construct the MOSFET with the cold metal source. The "cold" metal source achieves excellent NDR performance due to its unique bandgap structure. While the high mobility semiconductor ensures that it can generate a large peak current. Further, V of the MOSFET is adjustedGSThe peak current and the current peak-to-valley ratio of the MOSFET can be effectively regulated.
The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.
Claims (7)
1. A negative differential resistance MOSFET based on cold metal is characterized by comprising an upper gate dielectric layer, a lower gate dielectric layer, an upper grid electrode and a lower grid electrode, wherein the upper grid electrode and the lower grid electrode are arranged on the gate dielectric layer, a source electrode, a drain electrode and a channel are arranged between the upper grid dielectric layer and the lower grid dielectric layer, and the source electrode is made of cold metal.
2. The cold metal based negative differential resistance MOSFET of claim 1 wherein the channel is intrinsic semiconductor material and the drain is p-type doped semiconductor material.
3. The cold metal based negative differential resistance MOSFET of claim 1, wherein the drain is a heavily p-doped single layer MoS2。
4. The cold metal based NDR MOSFET of claim 1, wherein said trench is a single layer MoS2。
5. The cold metal-based NDR MOSFET of claim 1, wherein the drain is made of elemental material (NbSe)2Or TaSe2Any one of them.
6. The cold metal-based negative differential resistance MOSFET of claim 1, wherein the upper and lower gate electrodes are copper electrodes.
7. The cold metal-based negative differential resistance MOSFET of claim 1, wherein the upper gate dielectric layer and the lower gate dielectric layer are both SiO2A material substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111671050.9A CN114400252A (en) | 2021-12-31 | 2021-12-31 | Negative differential resistance MOSFET based on cold metal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111671050.9A CN114400252A (en) | 2021-12-31 | 2021-12-31 | Negative differential resistance MOSFET based on cold metal |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114400252A true CN114400252A (en) | 2022-04-26 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111671050.9A Pending CN114400252A (en) | 2021-12-31 | 2021-12-31 | Negative differential resistance MOSFET based on cold metal |
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| Country | Link |
|---|---|
| CN (1) | CN114400252A (en) |
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2021
- 2021-12-31 CN CN202111671050.9A patent/CN114400252A/en active Pending
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