CN114371563B - Display panel and preparation method thereof - Google Patents
Display panel and preparation method thereof Download PDFInfo
- Publication number
- CN114371563B CN114371563B CN202111592751.3A CN202111592751A CN114371563B CN 114371563 B CN114371563 B CN 114371563B CN 202111592751 A CN202111592751 A CN 202111592751A CN 114371563 B CN114371563 B CN 114371563B
- Authority
- CN
- China
- Prior art keywords
- layer
- retaining wall
- array substrate
- color film
- bottom plate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 238000002360 preparation method Methods 0.000 title claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 139
- 239000011159 matrix material Substances 0.000 claims description 46
- 238000000034 method Methods 0.000 claims description 17
- 239000012528 membrane Substances 0.000 claims description 13
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000003475 lamination Methods 0.000 claims description 3
- 230000000694 effects Effects 0.000 abstract description 5
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 210000002858 crystal cell Anatomy 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 230000003014 reinforcing effect Effects 0.000 description 2
- 238000006748 scratching Methods 0.000 description 2
- 230000002393 scratching effect Effects 0.000 description 2
- UMVBXBACMIOFDO-UHFFFAOYSA-N [N].[Si] Chemical compound [N].[Si] UMVBXBACMIOFDO-UHFFFAOYSA-N 0.000 description 1
- OBNDGIHQAIXEAO-UHFFFAOYSA-N [O].[Si] Chemical compound [O].[Si] OBNDGIHQAIXEAO-UHFFFAOYSA-N 0.000 description 1
- 230000002411 adverse Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 230000013011 mating Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1303—Apparatus specially adapted to the manufacture of LCDs
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133514—Colour filters
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
- G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
Landscapes
- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Geometry (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Devices For Indicating Variable Information By Combining Individual Elements (AREA)
Abstract
The application discloses a display panel and a preparation method of the display panel, wherein the display panel comprises an array substrate and a color film substrate, the color film substrate comprises a first bottom plate and a transparent electrode layer arranged on the surface of the first bottom plate facing one side of the array substrate, the array substrate comprises a second bottom plate, a circuit layer laid on the surface of the second bottom plate facing one side of the color film substrate and a retaining wall arranged on the surface of the circuit layer facing one side of the color film substrate, a connecting part is formed at the position of the color film substrate corresponding to the retaining wall, and one end of the retaining wall far away from the circuit layer is abutted against the color film substrate and is connected with the connecting part in a matched manner. Through the mode, the anti-slip capacity of the retaining wall can be enhanced, so that the display effect of the product is ensured.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a preparation method of the display panel.
Background
The existing display panel technology places the retaining wall on the side glass of the color film substrate, so that after the array substrate and the color film substrate are assembled, the retaining wall is easy to slip, and for a large-size display panel, a user often has Touch-DNU (slapping-black uneven) test, and for the existing retaining wall structural design, the retaining wall is easy to slip in the pressing process, and finally uneven display of a product is caused, and the problem of uneven display of dark spots or uneven brightness is caused.
Disclosure of Invention
The application mainly solves the technical problem of providing a display panel and a preparation method of the display panel so as to enhance the anti-slip capability of a retaining wall and ensure the display effect of a product.
In order to solve the technical problems, a first technical scheme adopted by the application is to provide a display panel, which comprises an array substrate and a color film substrate, wherein the color film substrate comprises a first bottom plate and a transparent electrode layer arranged on the surface of the first bottom plate facing one side of the array substrate, the array substrate comprises a second bottom plate, a circuit layer laid on the surface of the second bottom plate facing one side of the color film substrate and a retaining wall arranged on the surface of the circuit layer facing one side of the color film substrate, a connecting part is formed at the position of the color film substrate corresponding to the retaining wall, and one end of the retaining wall, far away from the circuit layer, is abutted against the color film substrate and is connected with the connecting part in a matched manner.
The connecting portion is a groove, and one end of the retaining wall, which is far away from the circuit layer, is located in the groove.
The end part of the retaining wall, which is positioned at one end in the groove, is in a sucker shape and is adsorbed at the bottom of the groove; or, wherein the inner wall of the groove is arranged in a step shape, and one end of the retaining wall in the groove is arranged in a step shape matched with the inner wall of the groove.
The color film substrate further comprises a black matrix, wherein the black matrix extends from the first bottom plate towards one side of the array substrate and protrudes out of the transparent electrode layer to form the connecting part; and one end of the retaining wall, which is far away from the circuit layer, is connected with the connecting part in a matched manner.
The surface of the black matrix facing one side of the array substrate is provided with at least one first boss and at least one first recess, one end of the retaining wall, which is far away from the circuit layer, is provided with at least one second boss and at least one second recess, the first boss is connected with the second recess in a matched mode, and the second boss is connected with the first recess in a matched mode.
And the retaining wall is arranged adjacent to the through hole.
The circuit layer comprises a first insulating layer, a second insulating layer, a color resistance layer and a flat layer which are sequentially stacked on the second bottom plate, wherein a grid electrode and a public electrode are arranged in the first insulating layer at intervals, and an active layer and a source electrode and a drain electrode which are respectively connected with the active layer are arranged in the second insulating layer; the via hole penetrates through the flat layer and the color resistance layer, a conductive layer is arranged on the flat layer, the conductive layer covers the inner wall of the via hole and is connected with the drain electrode, and the retaining wall is arranged on the flat layer.
In order to solve the technical problem, a second technical scheme adopted by the application is to provide a preparation method of a display panel, wherein the preparation method of the display panel comprises the following steps: obtaining a color film substrate, wherein a connecting part is arranged on one side of the color film substrate; obtaining an array substrate, wherein a retaining wall is arranged on one side of the array substrate; and carrying out group-matching lamination on the color film substrate and the array substrate, so that one end, far away from the array substrate, of the retaining wall is abutted against the color film substrate and is matched and connected with the connecting part.
Wherein, obtain various membrane base plate, include: providing a first bottom plate; forming a black matrix on the surface of one side of the first bottom plate; forming a transparent electrode layer on a side of the first base plate adjacent to the black matrix; the connection portion is formed at the black matrix or at a position of the transparent electrode layer corresponding to the black matrix.
Wherein, acquire array substrate, include: providing a second base plate; sequentially forming a first insulating layer, a second insulating layer, a color resistance layer and a flat layer on the second bottom plate, wherein a grid electrode and a public electrode are arranged in the first insulating layer at intervals, and an active layer and a source electrode and a drain electrode which are respectively connected with the active layer are arranged in the second insulating layer; forming a via hole on the flat layer, wherein the via hole penetrates through the flat layer and the color resistance layer and exposes the drain electrode; forming a conductive layer on the flat layer, wherein the conductive layer covers the inner wall of the via hole and is connected with the drain electrode; and forming the retaining wall at a position of the flat layer corresponding to the connecting part.
The beneficial effects of the application are as follows: compared with the prior art, the application provides a display panel and a preparation method of the display panel, the display panel comprises an array substrate and a color film substrate, the color film substrate comprises a first bottom plate and a transparent electrode layer arranged on the surface of one side of the first bottom plate facing the array substrate, the array substrate comprises a second bottom plate, a circuit layer laid on the surface of one side of the second bottom plate facing the color film substrate and a retaining wall arranged on the surface of one side of the circuit layer facing the color film substrate, a connecting part is formed at the position of the color film substrate corresponding to the retaining wall, one end of the retaining wall, which is far away from the circuit layer, is abutted against the color film substrate and is connected with the connecting part in a matched manner, so that the sliding area of the retaining wall can be limited, the external force and slip resistance of the retaining wall can be enhanced, and the display effect of a product can be ensured.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic cross-sectional view of a first embodiment of a display panel of the present application;
FIG. 2 is a schematic view of an embodiment of the retaining wall of FIG. 1;
FIG. 3 is a schematic cross-sectional view of a second embodiment of the display panel of the present application;
FIG. 4 is a schematic cross-sectional view of a third embodiment of a display panel according to the present application;
FIG. 5 is a schematic flow chart of a first embodiment of a method for manufacturing a display panel according to the present application;
FIG. 6 is a flowchart of the step S41 of FIG. 5;
fig. 7 is a flowchart of an embodiment of step S42 in fig. 4.
10, a display panel; 101. an array substrate; 1010. a second base plate; 1011. a circuit layer; 10110. a via hole; 10111. a first insulating layer; 10112. a second insulating layer; 10113. a color resist layer; 10114. a flat layer; 10115. a gate; 10116. a common electrode; 10117. an active layer; 10118. a source electrode; 10119. a drain electrode; 10120. a conductive layer; 1012. a retaining wall; 10120. a second boss; 10121. a second recess; 102. a color film substrate; 1020. a first base plate; 1021. a transparent electrode layer; 1022. a connection part; 1023. a black matrix; 10230. a first boss; 10231. a first recess.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the present application without making any inventive effort, are intended to fall within the scope of the present application.
The terminology used in the embodiments of the application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in this application and the appended claims, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plurality" generally includes at least two, but does not exclude the case of at least one.
It should be understood that the term "and/or" as used herein is merely one relationship describing the association of the associated objects, meaning that there may be three relationships, e.g., a and/or B, may represent: a exists alone, A and B exist together, and B exists alone. In addition, the character "/" herein generally indicates that the front and rear associated objects are an "or" relationship.
It should be understood that the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other like elements in a process, method, article or apparatus that comprises the element.
Referring to fig. 1, fig. 1 is a schematic cross-sectional structure of a first embodiment of a display panel according to the present application. In this embodiment, the display panel 10 includes an array substrate 101 and a color film substrate 102, the color film substrate 102 includes a first bottom plate 1020 and a transparent electrode layer 1021 disposed on a surface of the first bottom plate 1020 facing a side of the array substrate 101, the array substrate 101 includes a second bottom plate 1010, a circuit layer 1011 disposed on a surface of the second bottom plate 1010 facing a side of the color film substrate 102, and a retaining wall 1012 disposed on a surface of the circuit layer 1011 facing a side of the color film substrate 102, a connecting portion 1022 is formed at a position of the color film substrate 102 corresponding to the retaining wall 1012, and one end of the retaining wall 1012 away from the circuit layer 1011 abuts against the color film substrate 102 and is connected with the connecting portion 1022 in a matching manner.
In this way, by forming the connection portion 1022 at the position of the color film substrate 102 corresponding to the retaining wall 1012, one end of the retaining wall 1012 away from the circuit layer 1011 abuts against the color film substrate 102 and is located in the connection portion 1022, the sliding area of the retaining wall 1012 can be limited, the external force and slip resistance of the retaining wall 1012 is enhanced, and the problem that the retaining wall 1012 slips to generate dark spots or uneven brightness due to external force or Touch-DNU (clapping-black uneven) test of the display panel 10 is avoided, so that the display effect of the product is ensured.
In one embodiment, the connection portion 1022 is a groove, and an end of the retaining wall 1012 away from the circuit layer 1011 is located in the groove. By providing the groove on the color film substrate 102, the end of the retaining wall 1012 away from the circuit layer 1011 is located in the groove, so that the sliding of the retaining wall 1012 can be effectively limited.
Further, the thickness of the transparent electrode layer 1021 may be set larger so that the grooves have a larger depth to better limit the sliding of the retaining wall 1012, for example, the thickness of the transparent electrode layer 1021 may be 1000 to 5000 a, and the specific thickness may be set according to the actual product function.
In one embodiment, the via 10110 is formed on the circuit layer 1011, and the retaining wall 1012 is disposed adjacent to the via 10110. The VIA 10110 (VIA hole) may be a signal VIA, a power/ground VIA, or a heat sink VIA; it can be understood that in the prior art, after the array substrate 101 and the color film substrate 102 are assembled, if the retaining wall 1012 is adjacent to the via hole 10110, the retaining wall 1012 is easy to fall into the via hole 10110, resulting in uneven thickness of the liquid crystal cell, and finally uneven display of the product, and poor display problems such as dark spots or uneven brightness, etc., are caused, and when a user performs Touch-DNU test on a large-sized display panel 10, the retaining wall 1012 is easy to slide into the via hole 10110 in the pressing process, and is not easy to recover, resulting in blue spots, etc.; in the embodiment of the application, the retaining wall 1012 is disposed on the array substrate 101, and the corresponding connection portion 1022 is disposed on the color film substrate 102, so as to prevent the retaining wall 1012 from falling into the via hole 10110, and prevent the retaining wall 1012 from falling into the via hole 10110 to cause thickness variation of the liquid crystal cell and formation of Mura (uneven brightness), so that the uniformity of the thickness of the liquid crystal cell can be improved, and in the Touch-DNU test, the retaining wall 1012 is not easy to slip out due to limited sliding area, and the problems of blue spots and the like can be avoided.
Further, the circuit layer 1011 includes a first insulating layer 10111, a second insulating layer 10112, a color resist layer 10113, and a flat layer 10114 sequentially stacked on the second substrate 1010, a gate electrode 10115 and a common electrode 10116 are disposed in the first insulating layer 10111 at intervals, and an active layer 10117 and a source electrode 10118 and a drain electrode 10119 respectively connected to the active layer 10117 are disposed in the second insulating layer 10112; the via hole 10110 penetrates through the flat layer 10114 and the color resistance layer 10113, the conductive layer 10120 is arranged on the flat layer 10114, the conductive layer 10120 covers the inner wall of the via hole 10110 and is connected with the drain electrode 10119, and the retaining wall 1012 is arranged on the flat layer 10114. In the embodiment of the application, the retaining wall 1012 extends from the flat layer 10114 to one side of the color film substrate 102 and is connected with the connection portion 1022 on the color film substrate 102 in a matching manner, so that the retaining wall 1012 can support the color film substrate 102, and the connection portion 1022 limits the retaining wall 1012 from sliding, so that the overall structure of the display panel 10 is stable.
In an embodiment, the color film substrate 102 further includes a black matrix 1023, the black matrix 1023 is disposed on the first bottom plate 1020 in a predetermined pattern, the bottom of the connection portion 1022 is a surface of the black matrix 1023, and the retaining wall 1012 is connected to the black matrix 1023. It can be understood that the black matrix 1023 is disposed on the color film substrate 102, and the retaining wall 1012 and the connection portion 1022 are disposed in the area where the black matrix 1023 is disposed, so that the arrangement of the retaining wall 1012 and the connection portion 1022 will not affect the display of the display panel 10. In addition, in the case where the black matrix 1023 satisfies shielding of the gate 10115 or the like, since the sliding range of the retaining wall 1012 is limited, the width of the black matrix 1023 can be appropriately reduced, and the aperture ratio of the display panel 10 can be increased.
Referring to fig. 2, fig. 2 is a schematic structural diagram of an embodiment of the retaining wall in fig. 1. As shown in fig. 2, the left side of fig. 2 is a schematic sectional view of the retaining wall 1012, the right side of fig. 2 is a schematic plan view of the retaining wall 1012, and when the connecting portion 1022 is a groove, the end portion of the retaining wall 1012 at one end in the groove is in a suction cup shape and is adsorbed to the groove. It can be understood that the retaining wall 1012 is abutted to the end of one end of the color film substrate 102 to form a suction disc, after the array substrate 101 and the color film substrate 102 are aligned, the retaining wall 1012 can be well fixed at a target position, and combined with the external atmospheric pressure, the sliding area of the retaining wall 1012 under the action of external force can be further limited, so that the problem of poor display caused by sliding of the retaining wall 1012 under the action of external force of the display panel 10 is greatly improved, and the adverse problems of light leakage, blue spots and the like caused by scratching the conductive layer 10120 of the array substrate 101 due to sliding of the retaining wall 1012 in the transportation or moving process can be avoided.
Referring to fig. 3, fig. 3 is a schematic cross-sectional structure of a second embodiment of the display panel of the present application. The connection portion 1022 of the present embodiment is a groove, and the difference between the present embodiment and the previous embodiment is that in the present embodiment, the inner wall of the connection portion 1022 is configured to be stepped, and one end of the retaining wall 1012 located in the groove is configured to be stepped matching with the inner wall of the groove. It can be understood that, the inner wall of the groove and one end of the retaining wall 1012 inserted into the groove are both provided with mutually matched step structures, when the array substrate 101 and the color film substrate 102 are aligned, the retaining wall 1012 and the connecting portion 1022 can be used as references for alignment, and the matched step structures enable the retaining wall 1012 and the connecting portion 1022 to be tightly attached, so that the sliding area of the retaining wall 1012 is further limited, and the external force and slip resistance of the retaining wall 1012 is enhanced.
Referring to fig. 4, fig. 4 is a schematic cross-sectional structure of a third embodiment of the display panel of the present application. The difference between the present embodiment and the first and second embodiments is that in the present embodiment, the connection portion 1022 is a protrusion, and one end of the retaining wall 1012 away from the circuit layer 1011 is connected with the protrusion in a matching manner. In one embodiment, when the connection portion 1022 is a protrusion, the protrusion is formed by protruding the black matrix 1023 out of the transparent electrode layer 1021, and the bottom of the connection portion 1022, i.e., the surface of the protrusion facing the side of the array substrate, is the surface of the black matrix 1023.
In one embodiment, the surface of the connection portion 1022 facing the array substrate 101 is a plane, and the end of the retaining wall 1012 away from the end of the circuit layer 1011 is in a suction cup shape, and is attached to the surface of the connection portion 1022 facing the array substrate 101.
Above-mentioned scheme, through setting up connecting portion 1022 as the arch, the one end and the protruding cooperation of circuit layer 1011 are kept away from to the barricade 1012 are connected, when array substrate 101 and various membrane base plate 102 are to the box, barricade 1012 and connecting portion 1022 can be regarded as to the box benchmark to assorted connection structure makes barricade 1012 and connecting portion 1022 laminate closely, has further restricted the slip region of barricade 1012, strengthens the anti external force anti-slip ability of barricade 1012.
With reference to fig. 4, in an embodiment, the display panel 10 includes an array substrate 101 and a color film substrate 102, the color film substrate 102 includes a first bottom plate 1020 and a transparent electrode layer 1021 disposed on a surface of the first bottom plate 1020 facing to one side of the array substrate 101, the array substrate 101 includes a second bottom plate 1010, a circuit layer 1011 disposed on a surface of the second bottom plate 1010 facing to one side of the color film substrate 102, and a retaining wall 1012 disposed on a surface of the circuit layer 1011 facing to one side of the color film substrate 102, a connection portion 1022 is formed at a position of the color film substrate 102 corresponding to the retaining wall 1012, and one end of the retaining wall 1012 away from the circuit layer 1011 abuts against the color film substrate 102 and is connected with the connection portion 1022 in a matching manner. The color film substrate 102 further includes a black matrix 1023, where the black matrix 1023 extends from the first bottom plate 1020 toward one side of the array substrate 101 and protrudes outside the transparent electrode layer 1021 to form a connection portion 1022; one end of the retaining wall 1012 away from the circuit layer 1011 is connected with the connection part 1022 in a matching way. In this embodiment, the retaining wall 1012 extends to the side of the color film substrate 102, the black matrix 1023 protrudes from the color film substrate 102 to the outside of the transparent electrode layer 1021 to form the connection portion 1022, so that the retaining wall 1012 is cooperatively connected with the black matrix 1023 to support the display panel after the box is formed, and the connection portion 1022 limits the sliding of the retaining wall 1012, so that the overall structure of the display panel 10 is stable.
In an embodiment, the black matrix 1023 protrudes from the color film substrate 102 to the outside of the transparent electrode layer 1021 to form the connection portion 1022, and the connection portion 1022 extends directly onto the array substrate 101, so that no additional retaining wall 1012 is required to be formed on the array substrate 101 at this time, the black matrix 1023 can function as the retaining wall 1012, and the manufacturing process of the display panel 10 is simplified. In another embodiment, the retaining wall 1023 extends from the array substrate 101 toward the color film substrate 102 to the color film substrate 102, and at this time, the black matrix 1023 is not required to be formed on the color film substrate 102, and the retaining wall 1012 can play a role of the black matrix 1023, so that the manufacturing process of the display panel 10 is simplified.
In an embodiment, the surface of the black matrix 1023 facing the side of the array substrate 101 is provided with at least one first boss 10230 and at least one first recess 10231, one end of the retaining wall 1012 away from the circuit layer 1011 is provided with at least one second boss 10120 and at least one second recess 10121, the first boss 10230 is connected with the second recess 10121 in a matching manner, and the second boss 10120 is connected with the first recess 10231 in a matching manner. The second boss 10120 is mated with the first recess 10231 by the mating connection of the first boss 10230 with the second recess 10121. Through the matching connection of the first boss, the first recess and the second boss, in an embodiment, the first boss 10230 and the second boss 10120 are step-shaped bosses, the first recess 10231 and the second recess 10121 are trepanning grooves matched with the first boss and the second boss, and the diameters of the trepanning grooves, namely the grooves of all levels, are different, so that the trepanning grooves are tightly matched with the step-shaped bosses; through the tight fit of first boss and first sunken and second boss and second sunken to firm black matrix and the connection of barricade, and then make black matrix and barricade steady support between color film base plate and array substrate, play better supporting role to display panel. In the embodiment of the present application, the step may be a step-like structure that is gradually raised or gradually lowered as shown in fig. 3, or may be a wavy structure that is alternately raised and lowered as shown in fig. 4.
Above-mentioned scheme, when array substrate 101 and various membrane base plate 102 are to the box, barricade 1012 and black matrix 1023 can be regarded as to the box benchmark to assorted boss and concave structure make barricade 1012 and black matrix 1023 laminate closely, have further restricted the slip region of barricade 1012, strengthen the anti external force anti-slip ability of barricade 1012.
The application also provides a preparation method of the display panel, which is used for preparing the display panel 10. Referring to fig. 5, fig. 5 is a schematic flow chart of a first embodiment of a method for manufacturing a display panel according to the present application. The preparation method of the display panel of the embodiment comprises the following steps:
step S41: and obtaining a color film substrate, wherein a connecting part is arranged on one side of the color film substrate.
Step S42: and obtaining an array substrate, wherein a retaining wall is arranged on one side of the array substrate.
Step S43: and carrying out group-matching lamination on the color film substrate and the array substrate, so that one end, far away from the array substrate, of the retaining wall is abutted against the color film substrate and is matched and connected with the connecting part.
Specifically, be provided with the barricade to the box face at array substrate, be provided with the connecting portion that corresponds with the barricade to the box face at various membrane base plate, then, when laminating to the group with various membrane base plate and array substrate, can be with the barricade on the array substrate and the connecting portion cooperation connection on the various membrane base plate, realize barricade and connecting portion mutual block, can restrict the slip region of barricade, the anti external force anti-slip ability of reinforcing barricade, avoid display panel to lead to the barricade slippage and appear dark spot or luminance inequality and show bad problem under external force or Touch-DNU test, thereby ensure the display effect of product.
In other embodiments, the order of step S41 and step S42 may be reversed or performed simultaneously.
Referring to fig. 6, fig. 6 is a flowchart of an embodiment of step S41 in fig. 5. In an embodiment, the step S41 specifically includes:
step S411: a first base plate is provided.
Step S412: and forming a black matrix on the surface of one side of the first bottom plate.
Step S413: a transparent electrode layer is formed on a side of the first base plate adjacent to the black matrix.
Step S414: and forming the connection part at a position of the black matrix or the transparent electrode layer corresponding to the black matrix.
In an embodiment, the connecting portion is a groove, specifically, a first bottom plate is provided, the first bottom plate is a glass substrate, then a black matrix is formed on the first bottom plate, then a transparent electrode layer is formed on one side, close to the black matrix, of the first bottom plate, the transparent electrode layer covers the black matrix, then a groove opposite to a retaining wall of the array substrate is formed on the transparent electrode layer through a mask exposure process, the size of the groove can be slightly larger than that of the top of the retaining wall, and therefore when the array substrate and the color film substrate are paired, the retaining wall is easy to insert into the groove, and the sliding area of the retaining wall can be limited. In an embodiment, the thickness of the transparent electrode layer may be set larger, so that the groove has a larger depth to better limit the sliding of the retaining wall, for example, the thickness of the transparent electrode layer may be 1000 to 5000 a, and the specific thickness may be set according to the actual product function.
In an embodiment, the connection portion is a protrusion, specifically, the first bottom plate is provided first, the first bottom plate is a glass substrate, then a black matrix is formed on the first bottom plate, a structural shape matched with the retaining wall is directly formed on the surface of one side of the black matrix far away from the first bottom plate, then a transparent electrode layer is formed on one side of the first bottom plate near the black matrix, the transparent electrode layer does not cover the black matrix, at this time, mask exposure is not needed to be performed on the transparent electrode layer, and a portion of the black matrix protruding out of the transparent electrode layer is the connection portion.
Referring to fig. 7, fig. 7 is a flowchart of an embodiment of step S42 in fig. 5. In an embodiment, the step S42 specifically includes:
step S421: a second floor is provided.
Step S422: and a first insulating layer, a second insulating layer, a color resistance layer and a flat layer are sequentially formed on the second bottom plate, a grid electrode and a public electrode are arranged in the first insulating layer at intervals, and an active layer and a source electrode and a drain electrode which are respectively connected with the active layer are arranged in the second insulating layer.
Step S423: and forming a via hole on the flat layer, wherein the via hole penetrates through the flat layer and the color resistance layer, and the drain electrode is exposed.
Step S424: and forming a conductive layer on the flat layer, wherein the conductive layer covers the inner wall of the via hole and is connected with the drain electrode.
Step S425: and forming the retaining wall at a position of the flat layer corresponding to the connecting part.
Specifically, a second bottom plate is provided first, the second bottom plate is a glass substrate, then a grid electrode and a common electrode are formed on the second bottom plate by using high-conductivity materials such as copper, aluminum and the like, and a first insulating layer is formed to cover the grid electrode and the common electrode, wherein the first insulating layer can be a GI insulating film, and is generally nitrogen silicon or oxygen silicon compound; then forming an active layer, typically a semiconductor layer of amorphous silicon (a-Si) or the like, on the first insulating layer, wherein the active layer includes an MSI (ohmic contact layer), and forming a source electrode and a drain electrode on the active layer using a high conductivity material of copper, aluminum or the like; then forming a second insulating layer to cover the active layer, the source electrode and the drain electrode, wherein the second insulating layer is an organic insulating layer; a Color resist layer (RGB layer) and a planarization layer (PFA layer) are then sequentially formed on the second insulating layer, wherein the Color resist layer includes, but is not limited to, one made using a COA (Color-filter on Array) process. In order to charge the pixel, a via hole penetrating the planarization layer and the color resistance layer needs to be manufactured, so that a conductive layer formed on the planarization layer covers the inner wall of the via hole and is connected with the drain electrode; and forming a retaining wall on the flat layer at a position corresponding to the connecting part. Therefore, when the array substrate and the color film substrate are paired, the retaining wall is matched and connected with the connecting part, so that the retaining wall is prevented from falling into the through hole, the thickness variation of the liquid crystal box and the formation of Mura (uneven brightness) caused by the falling of the retaining wall into the through hole are avoided, the thickness uniformity of the liquid crystal box can be improved, and in the Touch-DNU test, the retaining wall is not easy to slide out due to limited sliding area, and the problems of blue spots and the like can be avoided.
In an embodiment, the connection portion may be a groove, and an end of the retaining wall away from the circuit layer is located in the groove. In another embodiment, the connection portion is a protrusion, and an end of the retaining wall away from the circuit layer is connected with the protrusion in a matching manner.
In an embodiment, when the surface of the connecting portion facing the side of the retaining wall is a plane, an end portion of the retaining wall facing one end of the color film substrate is in a sucker shape. Specifically, after forming the retaining wall, an etching process can be performed on the retaining wall, a sucker-shaped structure is formed at the end part of one end of the retaining wall, which is abutted against the color film substrate, and when the array substrate and the color film substrate are subjected to box alignment, the sucker-shaped structure of the retaining wall is adsorbed on the surface of the connecting part, which faces one side of the retaining wall. Therefore, the retaining wall can be well fixed at the target position, and the sliding area of the retaining wall under the action of external force can be limited by combining with the external atmospheric pressure, so that the problem of poor display caused by sliding of the retaining wall under the action of external force of the display panel is greatly improved, and the problems of light leakage, blue spots and the like caused by scratching the conductive layer of the array substrate due to sliding of the retaining wall in the transportation or moving process can be avoided.
In another embodiment, the surface of the connecting portion facing the side of the array substrate is in a step shape, and one end of the retaining wall facing the color film substrate is in a step shape matched with the connecting portion. Specifically, can set up the position that connecting portion and barricade are connected into the step-like structure of mutually supporting, when array substrate and various membrane base plate are to the box, barricade and connecting portion can be regarded as to the box benchmark to assorted step-like structure makes barricade and connecting portion laminating inseparable, has further restricted the slip region of barricade, reinforcing barricade's anti external force anti-slip ability.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application or directly or indirectly applied to other related technical fields are included in the scope of the present application.
Claims (5)
1. The utility model provides a display panel, includes array substrate and various membrane base plate, various membrane base plate includes first bottom plate and set up in first bottom plate towards transparent electrode layer on the surface of array substrate one side, its characterized in that, array substrate includes the second bottom plate, lays in the second bottom plate towards the circuit layer on the surface of various membrane base plate one side and set up in the circuit layer towards the barricade on the surface of various membrane base plate one side, transparent electrode layer corresponds the position of barricade is formed with connecting portion, the barricade is kept away from the one end butt of circuit layer various membrane base plate, and with connecting portion cooperation connection;
the connecting part is a groove, and one end of the retaining wall, which is far away from the circuit layer, is positioned in the groove;
the inner wall of the groove is arranged to be in a step shape, and one end of the retaining wall, which is positioned in the groove, is arranged to be in a step shape matched with the inner wall of the groove.
2. The display panel of claim 1, wherein a via is formed in the circuit layer, and the retaining wall is disposed adjacent to the via.
3. The display panel according to claim 2, wherein the circuit layer includes a first insulating layer, a second insulating layer, a color resist layer, and a flat layer sequentially stacked on the second substrate, the first insulating layer having a gate electrode and a common electrode provided therein at an interval, the second insulating layer having an active layer and a source electrode and a drain electrode respectively connected to the active layer;
the via hole penetrates through the flat layer and the color resistance layer, a conductive layer is arranged on the flat layer, the conductive layer covers the inner wall of the via hole and is connected with the drain electrode, and the retaining wall is arranged on the flat layer.
4. The preparation method of the display panel is characterized by comprising the following steps of:
obtaining a color film substrate, wherein a connecting part is arranged on one side of the color film substrate;
obtaining an array substrate, wherein a retaining wall is arranged on one side of the array substrate;
the color film substrate and the array substrate are subjected to group-by-group lamination, so that one end of the retaining wall, which is far away from the array substrate, is abutted against the color film substrate and is connected with the connecting part in a matched manner;
wherein, obtain various membrane base plate, include:
providing a first bottom plate;
forming a black matrix on the surface of one side of the first bottom plate;
forming a transparent electrode layer on a side of the first base plate adjacent to the black matrix;
forming the connection part at a position of the transparent electrode layer corresponding to the black matrix;
the connecting part is a groove, and the inner wall of the groove is arranged to be step-shaped.
5. The method for manufacturing a display panel according to claim 4, wherein the obtaining the array substrate comprises:
providing a second base plate;
sequentially forming a first insulating layer, a second insulating layer, a color resistance layer and a flat layer on the second bottom plate, wherein a grid electrode and a public electrode are arranged in the first insulating layer at intervals, and an active layer and a source electrode and a drain electrode which are respectively connected with the active layer are arranged in the second insulating layer;
forming a via hole on the flat layer, wherein the via hole penetrates through the flat layer and the color resistance layer and exposes the drain electrode;
forming a conductive layer on the flat layer, wherein the conductive layer covers the inner wall of the via hole and is connected with the drain electrode;
forming the retaining wall at a position of the flat layer corresponding to the connecting part; one end of the retaining wall, which is positioned in the groove, is arranged in a step shape matched with the inner wall of the groove.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111592751.3A CN114371563B (en) | 2021-12-23 | 2021-12-23 | Display panel and preparation method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111592751.3A CN114371563B (en) | 2021-12-23 | 2021-12-23 | Display panel and preparation method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114371563A CN114371563A (en) | 2022-04-19 |
| CN114371563B true CN114371563B (en) | 2023-10-27 |
Family
ID=81142804
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111592751.3A Active CN114371563B (en) | 2021-12-23 | 2021-12-23 | Display panel and preparation method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114371563B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN115308952B (en) * | 2022-08-31 | 2023-05-26 | 惠科股份有限公司 | Display panel and display device |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102981315A (en) * | 2011-09-06 | 2013-03-20 | 株式会社日本显示器东 | Liquid crystal display device |
| CN103676356A (en) * | 2013-12-10 | 2014-03-26 | 京东方科技集团股份有限公司 | Display device |
| CN104122710A (en) * | 2013-04-27 | 2014-10-29 | 北京京东方光电科技有限公司 | Display panel and manufacturing method thereof |
| CN104834137A (en) * | 2015-05-07 | 2015-08-12 | 合肥京东方光电科技有限公司 | Array substrate, color film substrate, display panel and display device |
| CN110426879A (en) * | 2019-07-17 | 2019-11-08 | 深圳市华星光电半导体显示技术有限公司 | A kind of substrate and liquid crystal display panel |
-
2021
- 2021-12-23 CN CN202111592751.3A patent/CN114371563B/en active Active
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102981315A (en) * | 2011-09-06 | 2013-03-20 | 株式会社日本显示器东 | Liquid crystal display device |
| CN104122710A (en) * | 2013-04-27 | 2014-10-29 | 北京京东方光电科技有限公司 | Display panel and manufacturing method thereof |
| CN103676356A (en) * | 2013-12-10 | 2014-03-26 | 京东方科技集团股份有限公司 | Display device |
| CN104834137A (en) * | 2015-05-07 | 2015-08-12 | 合肥京东方光电科技有限公司 | Array substrate, color film substrate, display panel and display device |
| CN110426879A (en) * | 2019-07-17 | 2019-11-08 | 深圳市华星光电半导体显示技术有限公司 | A kind of substrate and liquid crystal display panel |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114371563A (en) | 2022-04-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US20180342563A1 (en) | Oled display substrate and manufacturing method thereof, display panel and display apparatus | |
| CN110021654B (en) | Display substrate, manufacturing method thereof and display device | |
| WO2020207255A1 (en) | Array substrate and manufacturing method therefor, liquid crystal display panel, and liquid crystal display device | |
| CN1989443B (en) | Color filter substrate and liquid crystal display panel equipped with same | |
| CN104090434B (en) | Array base palte and display device | |
| US11985844B2 (en) | Display substrate panel and preparation method thereof, and display panel | |
| TWI553386B (en) | Display panels | |
| CN114371563B (en) | Display panel and preparation method thereof | |
| US10515987B2 (en) | Thin-film transistor array substrate and manufacturing method thereof | |
| CN110582850B (en) | Organic light emitting diode display panel, method of manufacturing the same, and organic light emitting diode counter substrate | |
| CN110429126B (en) | Display panel and display device | |
| CN108573998B (en) | Display panel, manufacturing method and display device | |
| CN110416281A (en) | Display panel and display device | |
| WO2014206029A1 (en) | Substrate structure, liquid crystal panel and display device | |
| CN110337723A (en) | Display base plate, display equipment and the method for manufacturing display base plate | |
| JP2004205549A (en) | Liquid crystal display cell and liquid crystal display | |
| US7852438B2 (en) | Transflective type liquid crystal display device and method for fabricating the same | |
| US7675585B2 (en) | Liquid crystal display with organic EL backlight comprising cap member with protrusions | |
| CN112563427A (en) | Display panel, preparation method thereof and display device | |
| US11482583B2 (en) | Display apparatus, counter substrate of display apparatus, method of fabricating display apparatus | |
| CN109659313B (en) | Array substrate, manufacturing method of array substrate and display panel | |
| CN116490038A (en) | Display panel, preparation method and display device | |
| US20240016004A1 (en) | Display panel and display device | |
| CN113066943B (en) | Display substrate, display panel and electronic equipment | |
| WO2019174121A1 (en) | Display panel, display panel fabricating method, and electronic device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |