CN114371563A - Display panel and preparation method thereof - Google Patents
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- CN114371563A CN114371563A CN202111592751.3A CN202111592751A CN114371563A CN 114371563 A CN114371563 A CN 114371563A CN 202111592751 A CN202111592751 A CN 202111592751A CN 114371563 A CN114371563 A CN 114371563A
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- 238000002360 preparation method Methods 0.000 title claims description 6
- 239000000758 substrate Substances 0.000 claims abstract description 147
- 238000004519 manufacturing process Methods 0.000 claims abstract description 12
- 239000011159 matrix material Substances 0.000 claims description 50
- 238000000034 method Methods 0.000 claims description 22
- 239000012528 membrane Substances 0.000 claims description 12
- 230000000694 effects Effects 0.000 abstract description 5
- 238000012360 testing method Methods 0.000 description 6
- 239000004973 liquid crystal related substance Substances 0.000 description 5
- 239000011521 glass Substances 0.000 description 4
- 210000002858 crystal cell Anatomy 0.000 description 3
- 230000007547 defect Effects 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- 229910021417 amorphous silicon Inorganic materials 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 239000010949 copper Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000003825 pressing Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000000903 blocking effect Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
- -1 silicon oxide compound Chemical class 0.000 description 1
- 230000008093 supporting effect Effects 0.000 description 1
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/1303—Apparatus specially adapted to the manufacture of LCDs
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
- G02F1/133509—Filters, e.g. light shielding masks
- G02F1/133514—Colour filters
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1339—Gaskets; Spacers; Sealing of cells
- G02F1/13394—Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/1333—Constructional arrangements; Manufacturing methods
- G02F1/1343—Electrodes
- G02F1/134309—Electrodes characterised by their geometrical arrangement
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
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Abstract
The application discloses display panel and a manufacturing method of display panel, wherein the display panel comprises an array substrate and a color film substrate, the color film substrate comprises a first bottom plate and a transparent electrode layer arranged on the surface of one side of the array substrate, the array substrate comprises a second bottom plate, a circuit layer arranged on the surface of one side of the color film substrate and a retaining wall arranged on the surface of one side of the color film substrate and facing the circuit layer, the position of the retaining wall corresponding to the color film substrate is provided with a connecting part, and one end of the retaining wall far away from the circuit layer is abutted to the color film substrate and is connected with the connecting part in a matched mode. Through the mode, the anti slippage ability of barricade can be strengthened to this application to the display effect of guarantee product.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel and a preparation method of the display panel.
Background
In the prior art, the retaining wall is arranged on the color film substrate side glass, so that the retaining wall is easy to slip after the array substrate and the color film substrate are combined, and users often have Touch-DNU (tap-black state unevenness) tests aiming at large-size display panels, which easily causes the retaining wall to slip in the pressing process for the existing retaining wall structure design, and finally causes the problems of uneven product display, dark spots or uneven brightness and other poor display.
Disclosure of Invention
The technical problem that this application mainly solved provides a display panel and display panel's preparation method to strengthen the anti slippage ability of barricade, ensure the display effect of product.
In order to solve the technical problem, a first technical scheme adopted in the present application is to provide a display panel, including array substrate and various membrane base plate, various membrane base plate include first bottom plate and set up in first bottom plate orientation the transparent electrode layer on the surface of array substrate one side, array substrate includes the second bottom plate, lays in the second bottom plate orientation the circuit layer on the surface of various membrane base plate one side and set up in the circuit layer orientation the retaining wall on the surface of various membrane base plate one side, various membrane base plate corresponds the position of retaining wall is formed with connecting portion, the retaining wall is kept away from the one end butt of circuit layer various membrane base plate, and with the connecting portion cooperation is connected.
The connecting part is a groove, and one end of the retaining wall, which is far away from the circuit layer, is located in the groove.
The end part of one end of the retaining wall, which is positioned in the groove, is in a sucker shape and is adsorbed at the bottom of the groove; or, wherein, the inner wall of recess sets up to the step form, the barricade is located one end setting in the recess sets up to with the step form of the inner wall assorted of recess.
The color film substrate further comprises a black matrix, the black matrix extends from the first base plate to one side of the array substrate and protrudes out of the transparent electrode layer to form the connecting part; one end of the retaining wall, far away from the circuit layer, is connected with the connecting part in a matching manner.
The black matrix faces the surface of one side of the array substrate and is provided with at least one first boss and at least one first recess, one end, far away from the circuit layer, of the retaining wall is provided with at least one second boss and at least one second recess, the first boss is connected with the second recess in a matched mode, and the second boss is connected with the first recess in a matched mode.
Wherein, be formed with the via hole on the circuit layer, the barricade with the via hole is adjacent to be set up.
The circuit layer comprises a first insulating layer, a second insulating layer, a color resistance layer and a flat layer which are sequentially stacked on the second bottom plate, a grid electrode and a common electrode are arranged in the first insulating layer at intervals, and an active layer, a source electrode and a drain electrode are arranged in the second insulating layer and are respectively connected with the active layer; the via hole runs through the planarization layer with the color resistance layer, be provided with the conducting layer on the planarization layer, the conducting layer covers the inner wall of via hole, and with the drain electrode is connected, the barricade set up in on the planarization layer.
In order to solve the above technical problem, a second technical solution adopted by the present application is to provide a method for manufacturing a display panel, where the method for manufacturing a display panel includes: obtaining a color film substrate, wherein a connecting part is arranged on one side of the color film substrate; obtaining an array substrate, wherein a retaining wall is arranged on one side of the array substrate; and the color film substrate and the array substrate are laminated in a group, so that one end of the retaining wall, far away from the array substrate, is abutted against the color film substrate and is connected with the connecting part in a matching way.
The method for obtaining the color film substrate comprises the following steps: providing a first base plate; forming a black matrix on the surface of one side of the first base plate; forming a transparent electrode layer on one side of the first base plate close to the black matrix; and forming the connecting part at the position of the black matrix or the transparent electrode layer corresponding to the black matrix.
Wherein, acquire the array substrate, include: providing a second bottom plate; sequentially forming a first insulating layer, a second insulating layer, a color resistance layer and a flat layer on the second bottom plate, wherein grid electrodes and common electrodes are arranged in the first insulating layer at intervals, and an active layer, a source electrode and a drain electrode which are respectively connected with the active layer are arranged in the second insulating layer; forming a through hole in the flat layer, wherein the through hole penetrates through the flat layer and the color resistance layer and exposes the drain electrode; forming a conducting layer on the flat layer, wherein the conducting layer covers the inner wall of the through hole and is connected with the drain electrode; and forming the retaining wall at the position of the flat layer corresponding to the connecting part.
The beneficial effect of this application is: different from the prior art, the application provides a display panel and a manufacturing method of the display panel, the display panel comprises an array substrate and a color film substrate, the color film substrate comprises a first bottom plate and a transparent electrode layer arranged on the surface of one side, facing the array substrate, of the first bottom plate, the array substrate comprises a second bottom plate, a circuit layer laid on the surface of one side, facing the color film substrate, of the second bottom plate and a retaining wall arranged on the surface of one side, facing the color film substrate, of the circuit layer, a connecting part is formed at the position, corresponding to the retaining wall, of the color film substrate, one end, far away from the circuit layer, of the retaining wall is abutted to the color film substrate and is connected with the connecting part in a matched mode, the sliding area of the retaining wall can be limited, the external force resistance and anti-slipping performance of the retaining wall are enhanced, and therefore the display effect of products is guaranteed.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic cross-sectional view of a display panel according to a first embodiment of the present application;
FIG. 2 is a schematic structural view of an embodiment of the retaining wall of FIG. 1;
FIG. 3 is a schematic cross-sectional view of a display panel according to a second embodiment of the present application;
FIG. 4 is a schematic cross-sectional view of a display panel according to a third embodiment of the present application;
FIG. 5 is a schematic flow chart of a first embodiment of a method for manufacturing a display panel according to the present application;
FIG. 6 is a schematic flow chart illustrating one embodiment of step S41 in FIG. 5;
FIG. 7 is a flowchart illustrating an embodiment of step S42 in FIG. 4.
10, a display panel; 101. an array substrate; 1010. a second base plate; 1011. a circuit layer; 10110. a via hole; 10111. a first insulating layer; 10112. a second insulating layer; 10113. a color resist layer; 10114. a planarization layer; 10115. a gate electrode; 10116. a common electrode; 10117. an active layer; 10118. a source electrode; 10119. a drain electrode; 10120. a conductive layer; 1012. retaining walls; 10120. a second boss; 10121. a second recess; 102. a color film substrate; 1020. a first base plate; 1021. a transparent electrode layer; 1022. a connecting portion; 1023. a black matrix; 10230. a first boss; 10231. a first recess.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
The terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise, the "plural" includes at least two in general, but does not exclude the presence of at least one.
It should be understood that the term "and/or" as used herein is merely one type of association that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
It should be understood that the terms "comprises," "comprising," or any other variation thereof, as used herein, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
Referring to fig. 1, fig. 1 is a schematic cross-sectional structure diagram of a display panel according to a first embodiment of the present application. In this embodiment, the display panel 10 includes an array substrate 101 and a color filter substrate 102, the color filter substrate 102 includes a first base plate 1020 and a transparent electrode layer 1021 arranged on a surface of the first base plate 1020 facing the array substrate 101, the array substrate 101 includes a second base plate 1010, a circuit layer 1011 laid on a surface of the second base plate 1010 facing the color filter substrate 102, and a retaining wall 1012 arranged on a surface of the circuit layer 1011 facing the color filter substrate 102, a connecting portion 1022 is formed at a position of the color filter substrate 102 corresponding to the retaining wall 1012, and an end of the retaining wall 1012 away from the circuit layer 1011 abuts against the color filter substrate 102 and is connected to the connecting portion 1022 in a matching manner.
In this way, the connecting portion 1022 is formed at the position of the color film substrate 102 corresponding to the retaining wall 1012, one end of the retaining wall 1012, which is far away from the circuit layer 1011, abuts against the color film substrate 102 and is located in the connecting portion 1022, so that the sliding area of the retaining wall 1012 can be limited, the external force resistance and the anti-slipping capability of the retaining wall 1012 can be enhanced, and the display defect problems of dark spots, uneven brightness and the like caused by the slipping of the retaining wall 1012 under the external force action or Touch-DNU (uneven black state) test of the display panel 10 can be avoided, thereby ensuring the display effect of the product.
In one embodiment, the connecting portion 1022 is a groove, and an end of the retaining wall 1012 away from the circuit layer 1011 is located in the groove. By forming the groove in the color film substrate 102, the end of the retaining wall 1012 away from the circuit layer 1011 is located in the groove, so that the sliding of the retaining wall 1012 can be effectively limited.
Further, the thickness of the transparent electrode layer 1021 can be set to be larger, so that the groove has a larger depth to better limit the sliding of the retaining wall 1012, for example, the thickness of the transparent electrode layer 1021 can be 1000 to 5000 angstroms, and the specific thickness can be set according to the actual product function.
In one embodiment, a via 10110 is formed on the circuit layer 1011, and the retaining wall 1012 is disposed adjacent to the via 10110. VIA 10110(VIA hole) may be a signal VIA, a power/ground VIA, or a thermal dissipating VIA; it can be understood that, in the existing scheme, after the array substrate 101 and the color film substrate 102 are paired, if the retaining wall 1012 is disposed adjacent to the via hole 10110, the retaining wall 1012 is likely to fall into the via hole 10110, which causes uneven thickness of the liquid crystal cell, and finally causes uneven display of the product, and poor display problems such as dark spots or uneven brightness, etc. occur, and for a large-size display panel 10, when a user performs a Touch-DNU test, the retaining wall 1012 is likely to slide into the via hole 10110 in the pressing process, and is not likely to recover, which causes problems such as blue spots, etc.; in the embodiment of the present invention, the retaining wall 1012 is disposed on the array substrate 101, and the corresponding connecting portion 1022 is disposed on the color film substrate 102, so as to prevent the retaining wall 1012 from falling into the via hole 10110, thereby preventing the retaining wall 1012 from falling into the via hole 10110 to cause the thickness variation of the liquid crystal cell and form Mura (uneven brightness), improving the uniformity of the thickness of the liquid crystal cell, and when conducting Touch-DNU test, since the sliding region of the retaining wall 1012 is limited, the retaining wall is not easy to slide out, and the problem of occurrence of blue spots and the like can be avoided.
Further, the circuit layer 1011 includes a first insulating layer 10111, a second insulating layer 10112, a color resistance layer 10113 and a flat layer 10114 sequentially stacked on the second base plate 1010, wherein the gate electrode 10115 and the common electrode 10116 are disposed at intervals in the first insulating layer 10111, and an active layer 10117 and a source electrode 10118 and a drain electrode 10119 respectively connected to the active layer 10117 are disposed in the second insulating layer 10112; the via 10110 penetrates through the planarization layer 10114 and the color resistance layer 10113, a conductive layer 10120 is disposed on the planarization layer 10114, the conductive layer 10120 covers an inner wall of the via 10110 and is connected to the drain 10119, and the retaining wall 1012 is disposed on the planarization layer 10114. In this embodiment, the retaining wall 1012 extends from the planarization layer 10114 to one side of the color film substrate 102 and is connected to the connection portion 1022 on the color film substrate 102 in a matching manner, so that the retaining wall 1012 can support the color film substrate 102, and the connection portion 1022 limits the sliding of the retaining wall 1012, so that the overall structure of the display panel 10 is stable.
In an embodiment, the color filter substrate 102 further includes a black matrix 1023, the black matrix 1023 is disposed on the first base 1020 in a predetermined pattern, the bottom of the connecting portion 1022 is the surface of the black matrix 1023, and the retaining wall 1012 is connected with the black matrix 1023. It can be understood that the black matrix 1023 is disposed on the color filter substrate 102, and the retaining wall 1012 and the connecting portion 1022 are disposed in the area where the black matrix 1023 is located, so that the display of the display panel 10 is not affected by the disposition of the retaining wall 1012 and the connecting portion 1022. In addition, in the case where the black matrix 1023 satisfies the shielding of the gate electrode 10115 and the like, since the sliding range of the blocking wall 1012 is limited, the width of the black matrix 1023 can be appropriately reduced, so that the aperture ratio of the display panel 10 can be increased.
Referring to fig. 2, fig. 2 is a schematic structural view of an embodiment of the retaining wall in fig. 1. As shown in fig. 2, the left side of fig. 2 is a schematic sectional view of the retaining wall 1012, the right side of fig. 2 is a schematic top view of the retaining wall 1012, and when the connecting portion 1022 is a groove, the end of the retaining wall 1012 at one end in the groove is in a suction cup shape and is adsorbed in the groove. It can be understood that the end of the retaining wall 1012 abutting against the color filter substrate 102 forms an absorbing plate shape, after the array substrate 101 and the color filter substrate 102 are aligned, the retaining wall 1012 can be better fixed at a target position, and the sliding region of the retaining wall 1012 under the action of an external force can be further limited by combining with the external atmospheric pressure, so that the display problem caused by the sliding of the retaining wall 1012 under the action of the external force of the display panel 10 is greatly improved, and the problems of light leakage, blue spots and the like caused by the fact that the retaining wall 1012 slides to scratch the conductive layer 10120 of the array substrate 101 in the transportation or moving process can be avoided.
Referring to fig. 3, fig. 3 is a schematic cross-sectional structure diagram of a display panel according to a second embodiment of the present application. The connecting portion 1022 of this embodiment is a recess, and the difference between this embodiment and the previous embodiment is that in this embodiment, the inner wall of the connecting portion 1022 is set to be step-shaped, and one end of the retaining wall 1012 located in the recess is set to be step-shaped matching with the inner wall of the recess. It can be understood that the inner wall of the groove and one end of the retaining wall 1012 inserted into the groove are both provided with a mutually matched step-like structure, when the array substrate 101 and the color film substrate 102 are aligned, the retaining wall 1012 and the connecting part 1022 can serve as alignment reference, and the matching step-like structure enables the retaining wall 1012 and the connecting part 1022 to be tightly attached, so that the sliding area of the retaining wall 1012 is further limited, and the external force resistance and the anti-slipping capability of the retaining wall 1012 are enhanced.
Referring to fig. 4, fig. 4 is a schematic cross-sectional structure diagram of a display panel according to a third embodiment of the present application. The difference between this embodiment and the above-mentioned first and second embodiments is that in this embodiment, the connecting portion 1022 is a protrusion, and one end of the retaining wall 1012 away from the circuit layer 1011 is connected to the protrusion in a matching manner. In one embodiment, when the connection portion 1022 is a protrusion, the protrusion is formed by protruding the black matrix 1023 outside the transparent electrode layer 1021, and a bottom of the connection portion 1022, i.e., a surface of the protrusion facing the array substrate, is a surface of the black matrix 1023.
In one embodiment, the surface of the connection part 1022 facing the array substrate 101 is a flat surface, and the end of the retaining wall 1012 away from the circuit layer 1011 is suction cup-shaped and is adsorbed on the surface of the connection part 1022 facing the array substrate 101.
According to the scheme, the connecting part 1022 is arranged to be the protrusion, one end of the retaining wall 1012, which is far away from the circuit layer 1011, is connected with the protrusion in a matched manner, when the array substrate 101 and the color film substrate 102 are aligned, the retaining wall 1012 and the connecting part 1022 can serve as alignment reference, and the matched connecting structure enables the retaining wall 1012 and the connecting part 1022 to be attached tightly, so that the sliding area of the retaining wall 1012 is further limited, and the external force resistance and the anti-slipping capacity of the retaining wall 1012 are enhanced.
Referring to fig. 4, in an embodiment, the display panel 10 includes an array substrate 101 and a color filter substrate 102, the color filter substrate 102 includes a first base plate 1020 and a transparent electrode layer 1021 arranged on a surface of the first base plate 1020 facing the array substrate 101, the array substrate 101 includes a second base plate 1010, a circuit layer 1011 arranged on a surface of the second base plate 1010 facing the color filter substrate 102, and a retaining wall 1012 arranged on a surface of the circuit layer 1011 facing the color filter substrate 102, a connecting portion 1022 is formed at a position of the color filter substrate 102 corresponding to the retaining wall 1012, and an end of the retaining wall 1012 away from the circuit layer 1011 abuts against the color filter substrate 102 and is connected to the connecting portion 1022 in a matching manner. The color filter substrate 102 further includes a black matrix 1023, wherein the black matrix 1023 extends from the first base plate 1020 to one side of the array substrate 101 and protrudes out of the transparent electrode layer 1021 to form a connecting portion 1022; one end of the retaining wall 1012 away from the circuit layer 1011 is connected to the connecting portion 1022 in a matching manner. In this embodiment, the retaining wall 1012 extends toward one side of the color filter substrate 102, and the black matrix 1023 protrudes from the color filter substrate 102 to the outside of the transparent electrode layer 1021 to form a connection part 1022, so that the retaining wall 1012 is connected with the black matrix 1023 in a matching manner to support the display panel after being formed into a box, and the connection part 1022 restricts the sliding of the retaining wall 1012, so that the overall structure of the display panel 10 is stable.
In one embodiment, the black matrix 1023 protrudes from the color filter substrate 102 to the outside of the transparent electrode layer 1021 to form a connection part 1022, and the connection part 1022 directly extends to the array substrate 101, so that no additional retaining wall 1012 needs to be formed on the array substrate 101, and the black matrix 1023 can function as the retaining wall 1012, thereby simplifying the manufacturing process of the display panel 10. In another embodiment, the retaining wall 1023 extends from the array substrate 101 to the color filter substrate 102 toward the color filter substrate 102, and at this time, the black matrix 1023 does not need to be formed on the color filter substrate 102, and the retaining wall 1012 can function as the black matrix 1023, thereby simplifying the manufacturing process of the display panel 10.
In an embodiment, the surface of the black matrix 1023 facing the array substrate 101 is provided with at least one first boss 10230 and at least one first recess 10231, one end of the retaining wall 1012 away from the circuit layer 1011 is provided with at least one second boss 10120 and at least one second recess 10121, the first boss 10230 is connected with the second recess 10121 in a matching way, and the second boss 10120 is connected with the first recess 10231 in a matching way. The first boss 10230 is matched and connected with the second recess 10121, and the second boss 10120 is matched and connected with the first recess 10231. Through the matching connection of the first boss and the first recess and the second boss and the second recess, in an embodiment, the first boss 10230 and the second boss 10120 are step-shaped bosses, the first recess 10231 and the second recess 10121 are trepanning grooves matched with the first boss and the second boss, and the trepanning grooves, namely the grooves at all levels, have different diameters, so that the trepanning grooves are tightly matched with the step-shaped bosses; through the close fit of the first boss and the first recess as well as the second boss and the second recess, the connection between the black matrix and the retaining wall is stabilized, and the black matrix and the retaining wall are stably supported between the color film substrate and the array substrate, so that a better supporting effect is achieved for the display panel. In the embodiment of the present application, the step-like structure may be a step-like structure that ascends step by step or descends step by step as shown in fig. 3, or may be an undulated structure that ascends and descends alternately as shown in fig. 4.
According to the scheme, when the array substrate 101 and the color film substrate 102 are aligned, the retaining wall 1012 and the black matrix 1023 can be used as alignment reference, and the retaining wall 1012 and the black matrix 1023 are tightly attached by the matched boss and the matched recess structure, so that the sliding area of the retaining wall 1012 is further limited, and the external force resistance and the anti-slipping capability of the retaining wall 1012 are enhanced.
The present application further provides a method for manufacturing a display panel, which is used for manufacturing the display panel 10. Referring to fig. 5, fig. 5 is a schematic flow chart of a first embodiment of a method for manufacturing a display panel according to the present application. The preparation method of the display panel of the embodiment includes the following steps:
step S41: and acquiring a color film substrate, wherein a connecting part is arranged on one side of the color film substrate.
Step S42: and obtaining the array substrate, wherein a retaining wall is arranged on one side of the array substrate.
Step S43: and the color film substrate and the array substrate are laminated in a group, so that one end of the retaining wall, far away from the array substrate, is abutted against the color film substrate and is connected with the connecting part in a matching way.
Specifically, the retaining wall is arranged on the opposite box surface of the array substrate, and the connecting portion corresponding to the retaining wall is arranged on the opposite box surface of the color film substrate, so that when the color film substrate and the array substrate are combined and attached, the retaining wall on the array substrate can be matched and connected with the connecting portion on the color film substrate, the retaining wall and the connecting portion are clamped with each other, the sliding area of the retaining wall can be limited, the external force resistance and anti-slipping capacity of the retaining wall are enhanced, the poor display problems of dark spots or uneven brightness and the like caused by the slipping of the retaining wall under the external force action or Touch-DNU test of the display panel are avoided, and the display effect of the product is guaranteed.
In other embodiments, the order of step S41 and step S42 may be reversed, or performed simultaneously.
Referring to fig. 6, fig. 6 is a flowchart illustrating an embodiment of step S41 in fig. 5. In one embodiment, the step S41 specifically includes:
step S411: a first backplane is provided.
Step S412: and forming a black matrix on the surface of one side of the first base plate.
Step S413: and forming a transparent electrode layer on one side of the first base plate close to the black matrix.
Step S414: and forming the connecting part at the position of the black matrix or the transparent electrode layer corresponding to the black matrix.
In an embodiment, the connection portion is a groove, specifically, a first bottom plate is provided first, the first bottom plate is a glass substrate, a black matrix is formed on the first bottom plate, a transparent electrode layer is formed on one side of the first bottom plate close to the black matrix, the black matrix is covered by the transparent electrode layer, then a mask exposure process is performed, a groove facing the retaining wall of the array substrate is formed in the transparent electrode layer, the size of the groove may be slightly larger than the size of the top of the retaining wall, so that when the array substrate and the color film substrate are aligned, the retaining wall is easily inserted into the groove, and the sliding region of the retaining wall can be limited. In an embodiment, the thickness of the transparent electrode layer may be set to be larger so that the groove has a larger depth to better limit the sliding of the retaining wall, for example, the thickness of the transparent electrode layer may be 1000 to 5000 angstroms, and the specific thickness may be set according to the actual product function.
In an embodiment, the connection portion is a protrusion, specifically, a first base plate is provided first, the first base plate is a glass substrate, a black matrix is formed on the first base plate, a surface of a side of the black matrix far away from the first base plate directly forms a structural shape matched with the retaining wall, a transparent electrode layer is formed on a side of the first base plate near the black matrix, the transparent electrode layer does not cover the black matrix, a mask exposure is not required to be performed on the transparent electrode layer, and a portion of the black matrix protruding out of the transparent electrode layer is the connection portion.
Referring to fig. 7, fig. 7 is a flowchart illustrating an embodiment of step S42 in fig. 5. In one embodiment, the step S42 specifically includes:
step S421: a second backplane is provided.
Step S422: and sequentially forming a first insulating layer, a second insulating layer, a color resistance layer and a flat layer on the second base plate, wherein grid electrodes and common electrodes are arranged in the first insulating layer at intervals, and an active layer, a source electrode and a drain electrode which are respectively connected with the active layer are arranged in the second insulating layer.
Step S423: and forming a through hole on the flat layer, wherein the through hole penetrates through the flat layer and the color resistance layer and exposes the drain electrode.
Step S424: and forming a conductive layer on the flat layer, wherein the conductive layer covers the inner wall of the through hole and is connected with the drain electrode.
Step S425: and forming the retaining wall at the position of the flat layer corresponding to the connecting part.
Specifically, a second substrate is provided, the second substrate is a glass substrate, a gate electrode and a common electrode are formed on the second substrate by using a high-conductivity material such as copper, aluminum, and the like, and a first insulating layer is formed to cover the gate electrode and the common electrode, and the first insulating layer may be a GI insulating film, generally, silicon nitride or a silicon oxide compound; then, forming an active layer, which is typically a semiconductor layer such as amorphous silicon (a-Si), on the first insulating layer, wherein the active layer includes MSI (ohmic contact layer), and forming a source electrode and a drain electrode on the active layer using a high-conductivity material such as copper, aluminum, etc.; then forming a second insulating layer to cover the active layer and the source and drain electrodes, wherein the second insulating layer is an organic insulating layer; then, a Color resist layer (RGB layer) and a planarization layer (PFA layer) are sequentially formed on the second insulating layer, wherein the Color resist layer includes, but is not limited to, a Color-filter on Array (COA) process. In order to charge the pixel, a via hole penetrating through the flat layer and the color resistance layer needs to be manufactured, so that a conductive layer formed on the flat layer covers the inner wall of the via hole and is connected with the drain electrode; and then forming retaining walls on the flat layer at positions corresponding to the connecting parts. Therefore, when the array substrate and the color film substrate are aligned, the retaining wall is connected with the connecting part in a matched mode to prevent the retaining wall from falling into the via hole, the phenomenon that the retaining wall falls into the via hole to cause thickness variation of a liquid crystal box and Mura (uneven brightness) is avoided, the uniformity of the thickness of the liquid crystal box can be improved, and when Touch-DNU testing is carried out, the retaining wall is limited in sliding area and is not prone to sliding out, and the problems of blue spots and the like can be avoided.
In one embodiment, the connecting portion may be a groove, and one end of the retaining wall away from the circuit layer is located in the groove. In another embodiment, the connecting portion is a protrusion, and one end of the retaining wall away from the circuit layer is connected with the protrusion in a matching manner.
In one embodiment, when the surface of the connecting portion facing the retaining wall is a plane, the end of the retaining wall facing the color filter substrate is in a shape of a suction cup. Specifically, after the retaining wall is formed, an etching process can be performed on the retaining wall, a sucker-shaped structure is formed at the end of one end, abutted to the color film substrate, of the retaining wall, and when the array substrate and the color film substrate are subjected to box alignment, the sucker-shaped structure of the retaining wall is adsorbed on the surface, facing one side of the retaining wall, of the connecting portion. Therefore, the retaining wall can be well fixed at the target position, and the sliding area of the retaining wall under the action of external force can be limited by combining with the external atmospheric pressure, so that the display defect caused by the sliding of the retaining wall under the action of external force of the display panel is greatly improved, and the defects of light leakage, blue spots and the like caused by the fact that the conducting layer of the array substrate is scratched by the sliding of the retaining wall in the transportation or moving process can be avoided.
In another embodiment, the surface of the connecting portion facing the array substrate is stepped, and one end of the retaining wall facing the color filter substrate is stepped to match with the connecting portion. Specifically, the positions where the connecting portions are connected with the retaining wall can be set to be mutually matched step-shaped structures, when the array substrate and the color film substrate are aligned, the retaining wall and the connecting portions can serve as alignment reference, the retaining wall and the connecting portions are tightly attached due to the matched step-shaped structures, the sliding area of the retaining wall is further limited, and the external force resistance and anti-slipping capacity of the retaining wall are enhanced.
The above description is only for the purpose of illustrating embodiments of the present application and is not intended to limit the scope of the present application, and all modifications of equivalent structures and equivalent processes, which are made by the contents of the specification and the drawings of the present application or are directly or indirectly applied to other related technical fields, are also included in the scope of the present application.
Claims (10)
1. The utility model provides a display panel, includes array substrate and various membrane base plate, various membrane base plate include first bottom plate and set up in first bottom plate orientation the transparent electrode layer on the surface of array substrate one side, a serial communication port, array substrate includes the second bottom plate, lays in the second bottom plate orientation the circuit layer on the surface of various membrane base plate one side and set up in the circuit layer orientation the retaining wall on the surface of various membrane base plate one side, various membrane base plate corresponds the position of retaining wall is formed with connecting portion, the retaining wall is kept away from the one end butt of circuit layer various membrane base plate, and with connecting portion cooperation is connected.
2. The display panel according to claim 1, wherein the connecting portion is a groove, and an end of the retaining wall away from the circuit layer is located in the groove.
3. The display panel according to claim 2,
the end part of one end of the retaining wall, which is positioned in the groove, is in a sucker shape and is adsorbed at the bottom of the groove;
or, the inner wall of the groove is set to be step-shaped, and one end of the retaining wall, which is positioned in the groove, is set to be step-shaped matched with the inner wall of the groove.
4. The display panel according to claim 1, wherein the color film substrate further comprises a black matrix, the black matrix extends from the first base plate to one side of the array substrate and protrudes out of the transparent electrode layer to form the connecting portion; one end of the retaining wall, far away from the circuit layer, is connected with the connecting part in a matching manner.
5. The display panel according to claim 4, wherein a surface of the black matrix facing the array substrate is provided with at least one first protrusion and at least one first recess, an end of the retaining wall away from the circuit layer is provided with at least one second protrusion and at least one second recess, the first protrusion is connected to the second recess in a matching manner, and the second protrusion is connected to the first recess in a matching manner.
6. The display panel of claim 1, wherein a via hole is formed on the circuit layer, and the dam is disposed adjacent to the via hole.
7. The display panel according to claim 6, wherein the circuit layer comprises a first insulating layer, a second insulating layer, a color resistance layer and a flat layer sequentially stacked on the second substrate, wherein a gate electrode and a common electrode are disposed at intervals in the first insulating layer, and an active layer and a source electrode and a drain electrode respectively connected to the active layer are disposed in the second insulating layer;
the via hole runs through the planarization layer with the color resistance layer, be provided with the conducting layer on the planarization layer, the conducting layer covers the inner wall of via hole, and with the drain electrode is connected, the barricade set up in on the planarization layer.
8. A preparation method of a display panel is characterized by comprising the following steps:
obtaining a color film substrate, wherein a connecting part is arranged on one side of the color film substrate;
obtaining an array substrate, wherein a retaining wall is arranged on one side of the array substrate;
and the color film substrate and the array substrate are laminated in a group, so that one end of the retaining wall, far away from the array substrate, is abutted against the color film substrate and is connected with the connecting part in a matching way.
9. The method for manufacturing a display panel according to claim 8, wherein the obtaining a color film substrate includes:
providing a first base plate;
forming a black matrix on the surface of one side of the first base plate;
forming a transparent electrode layer on one side of the first base plate close to the black matrix;
and forming the connecting part at the position of the black matrix or the transparent electrode layer corresponding to the black matrix.
10. The method for manufacturing a display panel according to claim 8, wherein the obtaining of the array substrate includes:
providing a second bottom plate;
sequentially forming a first insulating layer, a second insulating layer, a color resistance layer and a flat layer on the second bottom plate, wherein grid electrodes and common electrodes are arranged in the first insulating layer at intervals, and an active layer, a source electrode and a drain electrode which are respectively connected with the active layer are arranged in the second insulating layer;
forming a through hole in the flat layer, wherein the through hole penetrates through the flat layer and the color resistance layer and exposes the drain electrode;
forming a conducting layer on the flat layer, wherein the conducting layer covers the inner wall of the through hole and is connected with the drain electrode;
and forming the retaining wall at the position of the flat layer corresponding to the connecting part.
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| CN115308952A (en) * | 2022-08-31 | 2022-11-08 | 惠科股份有限公司 | Display panel and display device |
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