CN112563427A - Display panel, preparation method thereof and display device - Google Patents
Display panel, preparation method thereof and display device Download PDFInfo
- Publication number
- CN112563427A CN112563427A CN202011218357.9A CN202011218357A CN112563427A CN 112563427 A CN112563427 A CN 112563427A CN 202011218357 A CN202011218357 A CN 202011218357A CN 112563427 A CN112563427 A CN 112563427A
- Authority
- CN
- China
- Prior art keywords
- layer
- substrate
- metal layer
- patterned metal
- display panel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/17—Carrier injection layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/14—Carrier transporting layers
- H10K50/15—Hole transporting layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K50/00—Organic light-emitting devices
- H10K50/10—OLEDs or polymer light-emitting diodes [PLED]
- H10K50/18—Carrier blocking layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/122—Pixel-defining structures or layers, e.g. banks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K71/00—Manufacture or treatment specially adapted for the organic devices covered by this subclass
Landscapes
- Physics & Mathematics (AREA)
- Optics & Photonics (AREA)
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Electroluminescent Light Sources (AREA)
Abstract
The application discloses a display panel, a preparation method of the display panel and a display device. The display panel includes a substrate; the pixel definition layer is positioned on one side of the substrate and comprises a plurality of pixel openings distributed in an array mode and a body portion surrounding the pixel openings; the current carrier layer is positioned on one side, back to the substrate, of the pixel defining layer; the carrier layer is in contact with the metal, a trap for inhibiting the transverse conduction capability of the carrier layer is formed in the carrier layer, and the orthographic projection of the trap on the substrate is overlapped with the orthographic projection of the body part on the substrate. According to the embodiment of the application, the transverse leakage flow can be reduced.
Description
Technical Field
The application relates to the technical field of display, in particular to a display panel, a preparation method of the display panel and a display device.
Background
An Organic Light Emitting Diode (OLED) Display panel is used as a flat Display panel, and has the advantages of high image quality, power saving, thin body, and wide application range, so that it is widely applied to various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, notebook computers, and desktop computers, and becomes the mainstream of Display panels.
The OLED display panel is provided with a plurality of common layers, and the common layers have good conductivity, so that when a certain light-emitting pixel is controlled to emit light, transverse leakage current can be generated, and other light-emitting pixels are caused to be stolen to be bright.
Therefore, how to reduce the lateral leakage flow becomes a technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
The embodiment of the application provides a display panel, a preparation method of the display panel and a display device, which can reduce transverse leakage current.
In a first aspect, an embodiment of the present application provides a display panel, including: a substrate; the pixel definition layer is positioned on one side of the substrate and comprises a plurality of pixel openings distributed in an array mode and a body portion surrounding the pixel openings; the current carrier layer is positioned on one side, back to the substrate, of the pixel defining layer; the carrier layer is in contact with the metal layer, a trap for inhibiting the transverse conduction capability of the carrier layer is formed in the carrier layer, and the orthographic projection of the trap on the substrate is overlapped with the orthographic projection of the body part on the substrate.
In a possible embodiment of the first aspect, the charge carrier layer comprises a transport-type material;
preferably, the charge carrier layer comprises a hole injection layer, a hole transport layer and an electron blocking layer which are arranged in a stacked manner, the hole injection layer is positioned on one side of the hole transport layer facing the substrate, the electron blocking layer is positioned on one side of the hole transport layer opposite to the substrate, at least one of the hole injection layer, the hole transport layer and the electron blocking layer is in contact with metal, and a trap is formed in at least one of the hole injection layer, the hole transport layer and the electron blocking layer;
preferably, the hole injection layer is in contact with the metal layer, forming traps within the hole injection layer.
In a possible embodiment of the first aspect, the material of the metal layer comprises at least one of silver, magnesium, aluminum;
preferably, the orthographic projection of the metal layer on the substrate is in the shape of a strip or a grid.
Preferably, the shape of the orthographic projection of the plurality of traps on the substrate is a strip or a grid.
Preferably, the display panel further includes:
a first electrode located between the carrier layer and the substrate, the first electrode being exposed to the pixel opening;
the light-emitting layer is positioned in the pixel opening and is partially positioned on one side of the carrier layer back to the first electrode, the light-emitting layer comprises a plurality of light-emitting units with different light-emitting colors, and each light-emitting unit corresponds to the pixel opening one by one;
and the second electrode layer is positioned on one side of the light-emitting layer, which is back to the substrate, and is of a continuous structure.
In a second aspect, an embodiment of the present application provides a method for manufacturing a display panel, including:
forming a pixel definition layer on a substrate, wherein the pixel definition layer comprises a plurality of pixel openings distributed in an array and a body part surrounding the pixel openings;
forming a current carrier layer on the surface of the pixel defining layer opposite to the substrate;
and forming a patterned metal layer in contact with the carrier layer, wherein the orthographic projection of the patterned metal layer on the substrate is overlapped with the orthographic projection of the main body part on the substrate, so that the patterned metal layer reacts with the carrier layer to generate a trap for inhibiting the transverse conduction capability of the carrier layer.
In one possible embodiment of the second aspect, the charge carrier layer comprises a hole injection layer, a hole transport layer and an electron blocking layer;
forming a charge carrier layer on a surface of the pixel defining layer facing away from the substrate includes:
forming a hole injection layer, a hole transmission layer and an electron blocking layer on the surface of the pixel defining layer, which is opposite to the substrate;
forming a patterned metal layer in contact with the charge carrier layer, comprising:
forming a patterned metal layer in contact with at least one of the hole injection layer, the hole transport layer, and the electron blocking layer;
preferably, a patterned metal layer is formed in contact with the hole injection layer;
preferably, the patterned metal layer is formed on the side of the hole injection layer facing away from the substrate.
In one possible embodiment of the second aspect, forming a patterned metal layer in contact with the charge carrier layer, an orthogonal projection of the patterned metal layer on the substrate overlapping an orthogonal projection of the body portion on the substrate, includes:
and forming a patterned metal layer in contact with the carrier layer, wherein an orthographic projection of the patterned metal layer on the substrate is overlapped with an orthographic projection of the body part on the substrate, and the orthographic projection of the patterned metal layer on the substrate is not overlapped with an orthographic projection of the side wall of the body part on the substrate.
In one possible embodiment of the second aspect, the orthographic projection of the patterned metal layer on the substrate is in the shape of a strip or a grid.
In one possible embodiment of the second aspect, the patterned metal layer has a thickness of 10nm to 50 nm.
In one possible embodiment of the second aspect, the material of the patterned metal layer includes at least one of silver, magnesium, and aluminum.
In a third aspect, an embodiment of the present application provides a display device, including the display panel according to any one of the embodiments of the first aspect, or including a display panel prepared by using the preparation method of the display panel according to any one of the embodiments of the second aspect.
According to the display panel, the preparation method thereof and the display device provided by the embodiment of the application, the carrier layer is internally provided with the trap for inhibiting the lateral conduction capability of the carrier layer, and the positive projection of the trap on the substrate is positioned between the positive projections of the bottom surfaces of the adjacent pixel openings on the substrate, so that when a certain sub-pixel of the display panel is controlled to emit light, the carriers in the carrier layer cannot be transmitted to the adjacent sub-pixel, the possibility that the adjacent sub-pixel is stolen to be bright is reduced, namely, the lateral leakage current of the display panel is reduced. In addition, the trap is generated by the contact of the metal layer and the carrier layer, so that the trap with the capability of inhibiting the transverse conduction of the carrier layer can be formed only by preparing one metal layer in contact with the carrier layer in the preparation process of the display panel, and the trap is relatively easy to realize in process.
Drawings
Other features, objects, and advantages of the present application will become apparent from the following detailed description of non-limiting embodiments thereof, when read in conjunction with the accompanying drawings, in which like reference characters designate the same or similar parts throughout the figures thereof, and which are not to scale.
Fig. 1 is a schematic cross-sectional view illustrating a display panel according to an embodiment of the present application;
FIG. 2 is a schematic cross-sectional view of a display panel according to another embodiment of the present application;
FIG. 3 is a schematic cross-sectional view of a display panel according to yet another embodiment of the present application;
FIG. 4 is a schematic top view of a display panel according to an embodiment of the present application;
FIG. 5 is a schematic top view of a display panel according to another embodiment of the present application;
fig. 6 is a schematic flow chart illustrating a method for manufacturing a display panel according to an embodiment of the present disclosure;
fig. 7 is a schematic flow chart illustrating a method for manufacturing a display panel according to another embodiment of the present disclosure;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present application.
Detailed Description
Features and exemplary embodiments of various aspects of the present application will be described in detail below, and in order to make objects, technical solutions and advantages of the present application more apparent, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are merely configured to explain the present application and are not configured to limit the present application. It will be apparent to one skilled in the art that the present application may be practiced without some of these specific details. The following description of the embodiments is merely intended to provide a better understanding of the present application by illustrating examples thereof.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
It will be understood that when an element is referred to as being "on" or "over" another layer, region or layer in describing its structure, it can be directly on the other layer, region or layer or intervening layers or regions may also be present. Also, if the component is turned over, one layer or region may be "under" or "beneath" another layer or region.
The light-emitting layers in the OLED display panel include light-emitting layers of different color sub-pixels, and the hole transport layer, the hole injection layer, the electron blocking layer, the electron injection layer, the electron transport layer, and the hole blocking layer corresponding to the light-emitting layers of the different color sub-pixels are usually formed in an Open Mask manner (i.e., these layers are common layers). This results in the problem that during the use process, the carriers may be laterally transmitted to the adjacent sub-pixels, and the common layer leaks electricity to generate crosstalk, which causes the adjacent sub-pixels to be slightly bright and the color display to be inaccurate.
In order to solve the above problems, embodiments of a display panel, a method for manufacturing the display panel, and a display device are provided, and the following description will be made with reference to the accompanying drawings.
The embodiment of the application provides a display panel, which can be an organic light emitting diode display panel.
As shown in fig. 1, the display panel 100 includes a substrate 10, a pixel defining layer 20, and a carrier layer 30. The pixel defining layer 20 is disposed on one side of the substrate 10, and the pixel defining layer 20 includes a plurality of pixel openings 21 distributed in an array and a body portion 22 surrounding the pixel openings. The charge carrier layer 30 is located on a side of the pixel defining layer facing away from the substrate 10. Illustratively, the pixel openings 21 may correspond to the sub-pixels of the display panel 100 one to one.
The carrier layer 30 is in contact with a metal layer (not shown in fig. 1), and traps (not shown in the drawings) for suppressing the lateral conduction capability of the carrier layer 30 are formed in the carrier layer 30, and an orthographic projection of the traps on the substrate 10 overlaps with an orthographic projection of the body portion 22 of the pixel defining layer 20 on the substrate 10. Illustratively, the charge carrier layer 30 includes a first region S1 and a second region S2, and the second region S1 is located between adjacent first regions S1, an orthographic projection of the second region S2 on the substrate 10 coincides with an orthographic projection of the body portion 22 on the substrate 10, and the trap is located in the second region S2 of the charge carrier layer 30. The pixel openings 21 of the pixel defining layer 20 are generally used to define sub-pixels, that is, in the embodiment of the present application, at least traps for suppressing the lateral conduction capability of the charge carrier layer 30 are formed in the charge carrier layer 30 between adjacent sub-pixels.
According to the embodiment of the present application, since the carrier layer 30 has a trap therein for suppressing the lateral conduction capability of the carrier layer, and the orthographic projection of the trap on the substrate 10 overlaps with the orthographic projection of the body portion 22 of the pixel defining layer 20 on the substrate 10, when a certain sub-pixel of the display panel is controlled to emit light, the carrier in the carrier layer 30 cannot be transmitted to the adjacent sub-pixel due to the trap, so that the possibility of the adjacent sub-pixel being stolen, that is, the lateral leakage current of the display panel can be reduced. In addition, the trap is generated by the contact of the metal layer and the carrier layer 30, so that the trap with the capability of inhibiting the transverse conduction of the carrier layer 30 can be formed only by preparing one metal layer in contact with the carrier layer 30 in the preparation process of the display panel, and the trap is relatively easy to realize in process.
For example, charge carrier layer 30 may be a single layer film layer or may include multiple layers of stacked films, and each of the multiple layers of stacked films may include a hole transport material.
In some alternative embodiments, referring to fig. 2, the charge carrier layer 30 may include a hole injection layer 31, a hole transport layer 32, and an electron blocking layer 33, which are stacked, the hole injection layer 31 is located on a side of the hole transport layer 32 facing the substrate, and the electron blocking layer 33 is located on a side of the hole transport layer 32 facing away from the substrate 10. At least one of the hole injection layer 31, the hole transport layer 32, and the electron blocking layer 33 may be in contact with the metal layer, trapping a trap within at least one of the hole injection layer 31, the hole transport layer 32, and the electron blocking layer 33.
The nature of the hole injection layer 31, the hole transport layer 32 and the electron blocking layer 33 all comprise hole transport type materials. Illustratively, at least one patterned metal layer may be formed, and the patterned metal layer is in contact with at least one of the hole injection layer 31, the hole transport layer 32 and the electron blocking layer 33, so that at least one of the hole injection layer 31, the hole transport layer 32 and the electron blocking layer 33 can generate a trap, thereby destroying the lateral conductivity of at least one of the hole injection layer 31, the hole transport layer 32 and the electron blocking layer 33 to reduce lateral leakage.
In some alternative embodiments, it may be that the hole injection layer 31 is in contact with a metal layer, forming traps within the hole injection layer 31.
In some alternative embodiments, the material of the metal layer may include at least one of silver, magnesium, and aluminum. Silver, magnesium, and aluminum are relatively reactive metals, and the inventors of the present application have found that, for example, silver atoms penetrate carrier layer 30 during evaporation of silver, creating traps in carrier layer 30. Magnesium and aluminum have the same principle.
In some alternative embodiments, a patterned metal layer may be formed on carrier layer 30 to create traps during the fabrication of display panel 100. It is understood that if the patterned metal layer reacts with charge carrier layer 30 more completely, the patterned metal layer is no longer present in the formed display panel, and if the patterned metal layer does not react with charge carrier layer 30 completely, as shown in fig. 3, the patterned metal layer is still present in the formed display panel.
In some alternative embodiments, as shown in fig. 4, the orthographic projection of the patterned metal layer 40 on the substrate 10 may be a stripe shape, and since the traps are generated by the contact of the patterned metal layer 40 and the carrier layer 30, the orthographic projection of the plurality of traps on the substrate 10 is also substantially a stripe shape.
In other alternative embodiments, as shown in fig. 5, the orthographic projection of the patterned metal layer 40 on the substrate 10 may be in a grid shape, and since the traps are generated by the contact between the patterned metal layer 40 and the carrier layer 30, the orthographic projection of the plurality of traps on the substrate 10 is in a substantially grid shape.
In the above embodiment, since the trap is generated by the metal layer contacting the carrier layer 30, the orthogonal projection of the patterned metal layer 40 on the substrate 10 is also located between the orthogonal projections of the bottom surfaces OP1 of the adjacent pixel openings 21 on the substrate 10.
In some optional embodiments, with continued reference to fig. 2 or fig. 3, the display panel 100 may further include a hole blocking layer 34, an electron transport layer 35, an electron injection layer 36, a first electrode 37, a second electrode layer 38, and a light emitting layer. The hole blocking layer 34 is located on the side of the light-emitting layer facing away from the substrate 10, the electron transport layer 35 is located on the side of the hole blocking layer 24 facing away from the light-emitting layer, and the electron injection layer 36 is located on the side of the electron transport layer 35 facing away from the hole blocking layer 34. The first electrode 37 is located between the carrier layer 30 and the substrate 10, the light-emitting layer is located in the pixel opening 21 and on a side of the carrier layer 30 opposite to the first electrode 37, the light-emitting layer includes a plurality of light-emitting units with different light-emitting colors, and the light-emitting units correspond to the pixel openings 21 one to one.
The second electrode layer 38 is located on a side of the electron injection layer 36 opposite to the electron transport layer 35, and the second electrode layer 38 may be a continuous structure. Illustratively, the first electrode 37 may be an anode and the second electrode layer 38 may be a cathode.
In some alternative embodiments, the light emitting units include at least a first light emitting unit 511, a second light emitting unit 512, and a third light emitting unit 513 having different emission colors from each other. Specifically, as shown in fig. 2, the first light emitting unit 511 may be a red light emitting unit, the second light emitting unit 512 may be a green light emitting unit, and the third light emitting unit 513 may be a blue light emitting unit, and the three primary colors realize full color display of the OLED display panel. Of course, in other embodiments, other light emitting colors, such as white, magenta, yellow, cyan, etc., may be provided as appropriate according to the actual application. In other embodiments, the display panel may further include four or more light emitting units 220 with different emission colors.
In some alternative embodiments, the substrate 10 may be a flexible substrate or a rigid substrate, and may be configured as needed. Specifically, the flexible substrate may be made of Polyimide (PI), and the flexible substrate made of a polyester-imide material is a polyester-imide substrate; of course, in other embodiments, other flexible materials in the prior art can be used, such as a PET substrate made of plastic, and the arrangement is reasonable as required.
In some alternative embodiments, the substrate 10 may be a single layer substrate; the substrate may be a laminated substrate composed of two or more layers. When the substrate 10 is formed by multiple layers, an insulating material may be filled between two adjacent layers, and the insulating material may be an inorganic insulating material such as silicon oxide or silicon nitride.
For example, the substrate 10 may include a pixel circuit (not shown), the pixel circuit may be electrically connected to the first electrode 37, and an electrical signal may be applied to the first electrode 37 and the second electrode layer 38 through the pixel circuit to implement a light emitting display of the light emitting unit.
The embodiment of the application also provides a preparation method of the display panel. Fig. 6 is a schematic flow chart illustrating a manufacturing method of a display panel according to an embodiment of the present disclosure. As shown in fig. 6, the method for manufacturing a display panel provided in the embodiment of the present application may include steps 501 to 504.
As described above, the substrate 10 may be a flexible substrate or a rigid substrate. The substrate 10 may include a pixel circuit, which will not be described in detail herein. Illustratively, one side of the substrate 10 has a first electrode 37. The pixel opening 21 of the pixel defining layer 20 is formed to expose the first electrode 37.
In step 502, a carrier layer 30 is formed on a surface of the pixel defining layer 20 opposite to the substrate 10.
As described above, if patterned metal layer 40 and carrier layer 30 react relatively completely, patterned metal layer 40 is no longer present in the formed display panel, and if patterned metal layer 40 and carrier layer 30 do not react completely, patterned metal layer 40 is still present in the formed display panel as shown in fig. 3.
In some alternative embodiments, patterned metal layer 40 may be formed on a side of charge carrier layer 30 facing away from substrate 10. In other alternative embodiments, patterned metal layer 40 may be formed on the side of charge carrier layer 30 facing substrate 10. That is, the order of forming the carrier layer 30 and the patterned metal layer 40 is not limited in the embodiments of the present application.
Illustratively, the patterned metal layer 40 is formed on the side of the carrier layer 30 facing the substrate 10, and a recess may be formed on the side of the body portion 22 of the pixel defining layer 20 facing away from the substrate 10, and then the patterned metal layer 40 is formed in the recess, and then the carrier layer 30 in contact with the patterned metal layer 40 is formed.
According to the method for manufacturing the display panel provided by the embodiment of the application, the patterned metal layer 40 is disposed in contact with the carrier layer 30, so that traps for inhibiting the lateral conduction capability of the carrier layer are formed in the carrier layer 30, and an orthographic projection of the traps on the substrate 10 overlaps with an orthographic projection of the body portion 22 of the pixel defining layer 20 on the substrate 10, therefore, when a certain sub-pixel is controlled to emit light, carriers in the carrier layer 30 cannot be transmitted to adjacent sub-pixels, so that the probability of sneaking of the adjacent sub-pixels is reduced, that is, the lateral leakage current of the display panel can be reduced. In addition, the trap is generated by contacting metal with the carrier layer 30, so that in the preparation process of the display panel, the trap with the capability of inhibiting the transverse conduction of the carrier layer 30 can be formed only by preparing a metal layer in contact with the carrier layer 30, and the process is relatively easy to realize.
Fig. 7 is a schematic flow chart illustrating a method for manufacturing a display panel according to another embodiment of the present disclosure. Referring to fig. 2 and 7, the carrier layer 30 may include a hole injection layer 31, a hole transport layer 32, and an electron blocking layer 33.
Step 502 may specifically include: a hole injection layer 31, a hole transport layer 32, and an electron blocking layer 33 are formed on the surface of the pixel defining layer 20 facing away from the substrate 10.
Illustratively, the hole injection layer 31, the hole transport layer 32, and the electron blocking layer 33 may be formed using an Open Mask (Open Mask).
In step 503, forming the patterned metal layer 40 in contact with the charge carrier layer 30 may specifically include: a patterned metal layer 40 is formed on at least one of the hole injection layer 31, the hole transport layer 32, and the electron blocking layer 22.
For example, only one patterned metal layer 40 may be formed, and the one patterned metal layer 40 may be formed before or after any one of the hole injection layer 31, the hole transport layer 32, and the electron blocking layer 33 is formed. For another example, a plurality of patterned metal layers 40 may be formed, one patterned metal layer 40 may be formed after the hole injection layer 31 is formed, one patterned metal layer 40 may be formed after the hole transport layer 32 is formed, and one patterned metal layer 40 may be formed after the electron blocking layer 33 is formed. Illustratively, the patterned Metal layer 40 may be formed using a Fine Metal Mask (FMM).
In some alternative embodiments, only one patterned metal layer 40 may be formed, and the patterned metal layer 40 is in contact with the hole injection layer 31. Illustratively, the patterned metal layer 40 may be formed on a side of the hole injection layer 31 facing away from the substrate 10.
Illustratively, the thickness of the hole injection layer 31 may be 5nm to 20 nm. The thickness of the hole transport layer 32 may be 1000nm to 2000 nm. The thickness of the electron blocking layer 33 may be 10nm to 100 nm.
In some optional embodiments, in step 503, forming a patterned metal layer 40 in contact with the charge carrier layer 30, where an orthographic projection of the patterned metal layer 40 on the substrate 10 overlaps with an orthographic projection of the body portion 22 on the substrate 10, which may specifically include: a patterned metal layer 40 is formed in contact with the carrier layer 30, an orthogonal projection of the patterned metal layer 40 on the substrate 10 overlaps with an orthogonal projection of the body portion 22 of the pixel defining layer 20 on the substrate 10, and an orthogonal projection of the patterned metal layer 40 on the substrate 10 does not overlap with an orthogonal projection of a sidewall of the body portion 22 of the pixel defining layer 20 on the substrate 10. That is, the patterned metal layer 40 is formed only on the top surface of the body 22, wherein the top surface of the body 22 is the surface of the body 22 away from the substrate 10, so as to avoid affecting the longitudinal conduction capability of the carrier layer 30, and the longitudinal direction is a direction perpendicular to the light emitting surface of the display panel.
In some alternative embodiments, as shown in fig. 4, the orthographic projection of the patterned metal layer 40 on the substrate 10 may be in the form of a stripe. The patterned metal layer 40 in a stripe shape is positioned between the adjacent pixel openings 21. As shown in fig. 5, an orthographic projection of the patterned metal layer 40 on the substrate 10 may be in a grid shape. The pixel opening 21 may be surrounded by a grid.
In some alternative embodiments, the thickness of the patterned metal layer 40 may be 10nm to 50 nm. Therefore, the effect of reducing the transverse leakage current of the display panel can be better achieved, and the thickness of the patterned metal layer 40 is prevented from being thicker.
In some alternative embodiments, the material of the patterned metal layer 40 may include at least one of silver, magnesium, and aluminum. As mentioned above, silver, magnesium, and aluminum are relatively active metals, for example, silver atoms may penetrate through the carrier layer 30 during evaporation, and create traps in the carrier layer 30. Magnesium and aluminum have the same principle.
In some optional embodiments, after step 501 and before step 502, as shown in fig. 2, the method for manufacturing a display panel provided in the embodiment of the present application may further include: a first electrode 37 is formed on the substrate 10. The first electrodes 37 may correspond one-to-one to the pixel openings 21. The first electrode 37 may be an anode.
In some optional embodiments, after step 503, as shown in fig. 2, the method for manufacturing a display panel provided in the embodiment of the present application may further include: forming a light-emitting layer in the pixel opening 21 and on a side of the carrier layer 30 facing away from the first electrode 37, the light-emitting layer including a plurality of light-emitting units having different emission colors, each light-emitting unit corresponding to the pixel opening 21 one to one; a hole blocking layer 34 is formed on the side of the light emitting layer facing away from the substrate 10, an electron transporting layer 35 is formed on the side of the hole blocking layer 34 facing away from the light emitting layer, an electron injecting layer 36 is formed on the side of the electron transporting layer 35 facing away from the hole blocking layer 34, and a second electrode 38 is formed on the side of the electron injecting layer 36 facing away from the electron transporting layer 35. The second electrode 38 may be a full-face structure. The second electrode 38 may be a cathode.
The application also provides a display device which comprises the display panel provided by the application. Referring to fig. 8, fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present disclosure. The display device 1000 provided in fig. 8 includes the display panel 100 provided in any one of the embodiments described above in the present application, or includes a display panel manufactured by using the manufacturing method of the display panel described in any one of the embodiments described above. The display device 1000 is described in the embodiment of fig. 8 by taking a mobile phone as an example, but it should be understood that the display device provided in the embodiment of the present application may be other display devices with a display function, such as a computer, a television, and a vehicle-mounted display device, and the present application is not limited thereto. The display device provided in the embodiment of the present application has the beneficial effects of the display panel provided in the embodiment of the present application, and specific reference may be specifically made to the specific description of the display panel in each of the above embodiments, which is not repeated herein.
In accordance with the embodiments of the present application as described above, these embodiments are not exhaustive and do not limit the application to the specific embodiments described. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the application and its practical application, to thereby enable others skilled in the art to best utilize the application and its various modifications as are suited to the particular use contemplated. The application is limited only by the claims and their full scope and equivalents.
Claims (10)
1. A display panel, comprising:
a substrate;
the pixel definition layer is positioned on one side of the substrate and comprises a plurality of pixel openings distributed in an array mode and a body portion positioned between the pixel openings;
the current carrier layer is positioned on one side, opposite to the substrate, of the pixel defining layer;
wherein the charge carrier layer is in contact with the metal layer, a trap for inhibiting the lateral conduction capability of the charge carrier layer is formed in the charge carrier layer, and the orthographic projection of the trap on the substrate is overlapped with the orthographic projection of the body part on the substrate.
2. The display panel of claim 1, wherein the charge carrier layer comprises a transmissive material;
preferably, the charge carrier layer includes a hole injection layer, a hole transport layer and an electron blocking layer, which are stacked, the hole injection layer is located on a side of the hole transport layer facing the substrate, the electron blocking layer is located on a side of the hole transport layer facing away from the substrate, at least one of the hole injection layer, the hole transport layer and the electron blocking layer is in contact with the metal layer, and the trap is formed in at least one of the hole injection layer, the hole transport layer and the electron blocking layer;
preferably, the hole injection layer is in contact with the metal layer, forming the traps within the hole injection layer.
3. The display panel according to claim 1, wherein a material of the metal layer comprises at least one of silver, magnesium, and aluminum;
preferably, the orthographic projection of the metal layer on the substrate is in a strip shape or a grid shape;
preferably, the orthographic projection of the traps on the substrate is in a strip shape or a grid shape;
preferably, the display panel further includes:
a first electrode between the charge carrier layer and the substrate, the first electrode being exposed to the pixel opening;
the light-emitting layer is positioned in the pixel opening and on one side of the carrier layer, which is opposite to the first electrode, and comprises a plurality of light-emitting units with different light-emitting colors, and each light-emitting unit corresponds to the pixel opening one by one;
and the second electrode layer is positioned on one side of the light-emitting layer, which is opposite to the substrate, and is of a continuous structure.
4. A method for manufacturing a display panel, comprising:
forming a pixel definition layer on the substrate, wherein the pixel definition layer comprises a plurality of pixel openings distributed in an array and a body part positioned between the pixel openings;
forming a current carrier layer on the surface of the pixel defining layer, which faces away from the substrate;
and forming a patterned metal layer in contact with the carrier layer, wherein an orthographic projection of the patterned metal layer on the substrate is overlapped with an orthographic projection of the body part on the substrate, so that the patterned metal layer reacts with the carrier layer to generate a trap inhibiting the transverse conduction capability of the carrier layer.
5. The method for manufacturing a display panel according to claim 4, wherein the carrier layer includes a hole injection layer, a hole transport layer, and an electron blocking layer;
the forming of the charge carrier layer on the surface of the pixel defining layer opposite to the substrate includes:
forming the hole injection layer, the hole transport layer and the electron blocking layer on the surface of the pixel defining layer opposite to the substrate;
the forming a patterned metal layer in contact with the charge carrier layer includes:
forming the patterned metal layer in contact with at least one of the hole injection layer, the hole transport layer, and the electron blocking layer;
preferably, the patterned metal layer is formed in contact with the hole injection layer;
preferably, the patterned metal layer is formed on a side of the hole injection layer facing away from the substrate.
6. The method according to claim 4, wherein the forming a patterned metal layer in contact with the charge carrier layer, an orthogonal projection of the patterned metal layer on the substrate overlapping an orthogonal projection of the body portion on the substrate, comprises:
forming a patterned metal layer in contact with the charge carrier layer, wherein an orthographic projection of the patterned metal layer on the substrate is overlapped with an orthographic projection of the body part on the substrate, and the orthographic projection of the patterned metal layer on the substrate is not overlapped with an orthographic projection of the side wall of the body part on the substrate.
7. The method of claim 4, wherein an orthographic projection of the patterned metal layer on the substrate is in a stripe or grid shape.
8. The method of claim 4, wherein the patterned metal layer has a thickness of 10nm to 50 nm.
9. The method of claim 4, wherein the material of the patterned metal layer comprises at least one of silver, magnesium, and aluminum.
10. A display device comprising the display panel according to any one of claims 1 to 4, or comprising a display panel produced by the production method for a display panel according to any one of claims 5 to 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011218357.9A CN112563427A (en) | 2020-11-04 | 2020-11-04 | Display panel, preparation method thereof and display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011218357.9A CN112563427A (en) | 2020-11-04 | 2020-11-04 | Display panel, preparation method thereof and display device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN112563427A true CN112563427A (en) | 2021-03-26 |
Family
ID=75041468
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202011218357.9A Pending CN112563427A (en) | 2020-11-04 | 2020-11-04 | Display panel, preparation method thereof and display device |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN112563427A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113471377A (en) * | 2021-06-30 | 2021-10-01 | 厦门天马微电子有限公司 | Display panel, preparation method thereof and display device |
| CN114256432A (en) * | 2021-12-16 | 2022-03-29 | 武汉天马微电子有限公司 | Display panel and display device |
-
2020
- 2020-11-04 CN CN202011218357.9A patent/CN112563427A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113471377A (en) * | 2021-06-30 | 2021-10-01 | 厦门天马微电子有限公司 | Display panel, preparation method thereof and display device |
| CN113471377B (en) * | 2021-06-30 | 2023-12-19 | 厦门天马微电子有限公司 | Display panel, preparation method thereof and display device |
| CN114256432A (en) * | 2021-12-16 | 2022-03-29 | 武汉天马微电子有限公司 | Display panel and display device |
| CN114256432B (en) * | 2021-12-16 | 2024-02-23 | 武汉天马微电子有限公司 | Display panel and display device |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US11844239B2 (en) | Display substrate and preparation method thereof, and display apparatus | |
| US11296160B2 (en) | Display substrate, display apparatus, and method of fabricating the display substrate | |
| US9397148B2 (en) | Organic electroluminescence display device | |
| US20180342563A1 (en) | Oled display substrate and manufacturing method thereof, display panel and display apparatus | |
| US9231035B2 (en) | Organic light emitting diode display device having improved effective emitting area | |
| CN108172600B (en) | Color film substrate for WOLED display and WOLED display | |
| WO2018201828A1 (en) | Display substrate and display apparatus | |
| KR101361861B1 (en) | Organic light emitting diodes and method of manufacturing the same | |
| CN110993806A (en) | OLED display panel and preparation method thereof | |
| KR20190029837A (en) | Display device and method of manufacturing the same | |
| JP2017151313A (en) | Method for manufacturing display device | |
| CN108573998B (en) | Display panel, manufacturing method and display device | |
| CN108695370A (en) | Oled substrate and production method, display device | |
| CN108831914B (en) | Organic light-emitting display panel, manufacturing method thereof and display device | |
| US11075353B2 (en) | Organic light-emitting diode display panel and manufacturing method thereof and display device | |
| US11758786B2 (en) | Array substrate, fabricating method therefor and display panel | |
| CN112563427A (en) | Display panel, preparation method thereof and display device | |
| CN112968135A (en) | Display substrate and related device | |
| CN111276526B (en) | Electroluminescent display panel and electroluminescent display device | |
| US11233115B2 (en) | Display panel and manufacturing method thereof, and display device | |
| US20230165098A1 (en) | Display substrate, manufacturing method thereof and three-dimensional display apparatus | |
| CN116600612B (en) | Display panel, display device and preparation method of display panel | |
| CN112864207A (en) | Display panel and display device | |
| CN111710792A (en) | Display panel and preparation method thereof | |
| US20220367834A1 (en) | Display device |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |