CN114371551A - Micro-mirror structure and preparation method thereof - Google Patents
Micro-mirror structure and preparation method thereof Download PDFInfo
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- CN114371551A CN114371551A CN202011096018.8A CN202011096018A CN114371551A CN 114371551 A CN114371551 A CN 114371551A CN 202011096018 A CN202011096018 A CN 202011096018A CN 114371551 A CN114371551 A CN 114371551A
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Abstract
The invention relates to the technical field of micro-nano processing, in particular to a micro-mirror structure and a preparation method thereof. The substrate wafer comprises a first surface and a second surface which are opposite, and the driving electrode layer is arranged on the first surface; through holes are formed in the substrate wafer and the driving electrode layer; the first insulating layer is arranged on the surface of the driving electrode layer and the inner wall of the through hole; the first end of the support beam penetrates through the through hole to be connected with the fixed layer, and a first preset gap is formed between the support beam and the through hole; the fixing layer is arranged on the second surface; a first driving electrode, a second driving electrode and a shielding electrode are arranged in the driving electrode layer; the micromirror is disposed on the second end of the support beam, and a second predetermined gap exists between the micromirror and the first insulating layer. The micro-mirror structure of the embodiment of the application can reduce the size of the unit and simultaneously ensure that the in-plane transverse displacement of the micro-mirror is comparable to the wavelength of incident light.
Description
Technical Field
The invention relates to the technical field of micro-nano processing, in particular to a micro-mirror structure and a preparation method thereof.
Background
The integrated micro-mirror modulates the laser beam through the micro-mirror motion, so that the laser beam realizes space scanning, and the integrated micro-mirror is a core device of systems such as laser radar and the like.
The integrated Micro mirror is a movable Micro mirror fabricated on a wafer such as a silicon wafer by Micro Electro-Mechanical System (MEMS). Its motion can be roughly divided into two types. One type is the movement of the micromirror out of its own plane, such as the Digital Micromirror Device (DMD), by texas instruments, which deflects the Mirror about a support axis parallel to the wafer surface. Another type of micromirror is a micromirror that moves parallel to the wafer surface in its own plane, such as the MEMS optical phased array (Youmin Wang, Guingya Zhou, Xiaosing Zhang, Kyungmok Kwon, Pierre-A.Blanche, Nichols Triesult, Kyoung-Sik Yu, and Ming C.Wu,2D broadband and grating with MEMS optical phase array, Optica, Vol.6, No.5,2019, pp.557-562) that uses an in-plane moving surface to create a grating of the micromirror array to modulate the laser beam.
Electrostatic actuation is a common actuation method for MEMS micro-mirror arrays. The design and manufacturing difficulties of electrostatically actuated in-plane motion micromirror arrays mainly stem from the contradiction of maintaining sufficient lateral actuation displacement while reducing the size of the micromirror cell.
In order to improve the effect of modulation, it is necessary to reduce the size of the micromirror unit and increase the number of micromirror units. On the other hand, optical applications such as lidar require that the maximum displacement of each micromirror element must be at least more than half the wavelength of the incident light to achieve phase adjustment of ± pi (Youmin Wang, Guangya Zhou, Xiaosheng Zhang, Kyungmok Kwon, pierce-a. blanche, Nicholas trisesult, Kyoung-Sik Yu, and Ming c. wu,2D broadband reinforced with large-scale MEMS optical phase array, optical, vol.6, No.5,2019, pp.557-562). Since the wavelength of infrared rays exceeds 700nm, the lateral displacement of the micromirror must exceed ± 350 nm. On the other hand, in order to increase the number of pixels, the side length of each micromirror unit must be reduced to the order of several tens of micrometers. In order to realize displacements exceeding + -350 nm for structures with side lengths of only tens of micrometers, the design of the support beam and the driving structure poses a great challenge.
When the in-plane double-end fixed support beam is used as the micromirror support structure, at least two double-end support beams are needed to ensure the micromirror to move horizontally in the plane, and the stiffness coefficient is
Where E is Young's modulus and h, b, and L are the thickness, width, and length of the beam, respectively. The stiffness coefficient obtained from the above formula is inversely proportional to the third power of the length of the support beam, while the length of the MEMS support beam conventionally fabricated in the plane is proportional to the side length of the micromirror unit, and reducing the size of the micromirror unit means reducing the length L of the support beam. To avoid a rapid increase in the spring constant with decreasing L, the beam width b must be decreased. Youmin Wang et al uses a support beam with a width of only 300nm to ensure that the displacement of the micromirror can meet the application requirements (Youmin Wang, Guangya Zhou, Xiaoosheng Zhang, Kyungmok Kwon, Pierre-A.Blanche, Nichols Triesult, Kyoung-Sik Yu, and Ming C.Wu,2D broadband bending with large-scale MEMS optical phase array, Optica, Vol.6, No.5,2019, pp.557-562). The 300nm wide beam not only increases the difficulty of the processes such as photoetching, etching and the like, but also increases the nonlinear effect of displacement because the displacement is larger than the width of the beam, thereby increasing the complexity of a control system.
In order to realize the driving displacement larger than the half wavelength of the incident infrared ray, the stiffness coefficient of the supporting beam is required to be small, and the electrostatic driving force is required to be large enough. Because the electrostatic force is rapidly reduced along with the increase of the polar plate gap, and the normal driving mode has a pull-in effect, the polar plate gap of the normal driving mode needs to be more than 3 times of the displacement, and the enough electrostatic force is difficult to obtain under the lower voltage. The micromirror generally needs to be driven in a lateral direction with an electrostatic force of
Where ε and ε 0 are the relative permittivity and vacuum permittivity, respectively, V is the drive voltage, d0 is the plate gap, and n is the number of electrode pairs. To obtain sufficient electrostatic force at lower voltages, it is necessary to increase the number of electrode pairs n and decrease d 0. The number of electrode pairs n is obviously also limited by the micromirror cell size. Youmin Wang et al used a plate gap of only 300nm in width and increased the number of electrode pairs by narrow electrodes (Youmin Wang, Guingya Zhou, Xiaoosheng Zhang, Kyungmok Kwon, Pierre-A.Blanche, Nichols Triesult, Kyoung-Sik Yu, and Ming C.Wu,2D broadband bending with large-scale MEMS optical phase array, Optica, Vol.6, No.5,2019, pp.557-562). The narrow gap not only puts high requirements on the photoetching and etching processes, but also requires that the roughness of the side wall formed by corrosion must be obviously smaller than the size of the gap.
Disclosure of Invention
The present application provides a micromirror structure with a beam perpendicular to the surface of a silicon wafer, the side view of the micromirror structure is shown in fig. 1 and described as follows:
the front side of the substrate wafer 101 is a first surface and the back side is a second surface. The micromirrors 104 are supported by supporting beams 103 perpendicular to the silicon wafer surface, the supporting beams 103 are embedded inside holes opened on the substrate wafer 101 and anchored on the substrate wafer 101 by the fixed layer 102 on the second surface. The micromirrors 104, the supporting beams 103 and the fixed layer 102 on the second surface are made of polysilicon. Micro-mirrors 104 are parallel to the surface of substrate wafer 101. The surface of the micro-mirrors 104 can be fabricated with optical structures 107, and the optical structures 107 can be gratings, nano-optical structures, etc. The specific materials and construction of the optical structure 107 are not of significant concern in this application and will not be described in detail herein. The present application only requires that the optical structure 107 be able to withstand the etching process of the release structure. With or without a second insulating layer 1066 between the fixed layer 102 on the second surface and the substrate wafer 101. When the second insulating layer 1066 is absent, the fixed layer 102 on the second surface is connected to the same potential as the substrate wafer 101.
The first driving electrode 121, the second driving electrode 122 and the shielding electrode 123 are fabricated on a first surface side of the substrate wafer 101, and the first driving electrode 121, the second driving electrode 122 and the shielding electrode 123 are made of the same layer of material, and may be a single crystal silicon or a polycrystalline silicon material. The undulation of the upper surfaces of the first driving electrode 121, the second driving electrode 122 and the shielding electrode 123 is less than 10 nm. The doping types of the first driving electrode 121, the second driving electrode 122, the micro mirror 104, the supporting beam 103 and the fixed layer 102 on the second surface are the same, and are denoted as a first doping type, which can be arbitrarily selected, i.e. can be P-type or N-type. The doping type of the shielding electrode 123 is opposite to the first doping type, and is denoted as a second doping type, that is, the second doping type is an N type when the first doping type is a P type, and the second doping type is a P type when the first doping type is an N type. A PN junction exists between the shielding electrode 123 and the first driving electrode 121 and between the shielding electrode 123 and the second driving electrode 122, and the PN junction is always in a reverse bias state during operation, i.e., the voltage of the N region is higher than the voltage of the P region. The first insulating layer 105 covers the upper surfaces of the first driving electrode 121, the second driving electrode 122 and the shielding electrode 123, and the second insulating layer 106 may be formed on the lower surface of the first driving electrode, the second driving electrode 122 and the shielding electrode 106, or the second insulating layer 106 may not be formed. When the second insulating layer 106 is disposed between the first driving electrode 121, the second driving electrode 122, the shielding electrode 123 and the substrate wafer 101, the doping type of the substrate wafer 101 is not limited. When the second insulating layer 106 is not present between the first driving electrode 121, the second driving electrode 122, the shielding electrode 123 and the substrate wafer 101, the doping type of the substrate wafer 101 is the second doping type, a PN junction is present between the substrate wafer 101 and the first driving electrode 121, the second driving electrode 122, and the PN junction is always in a reverse bias state during operation.
There is a second predetermined gap 112 between the micromirror 104 and the first insulating layer 105, and there is a first predetermined gap 111 between the supporting beam 103 and the substrate wafer 101, so that the micromirror 104 can move in one or two dimensions in a plane parallel to the surface of the substrate wafer 101. The thickness of the second predetermined gap 112 is in the range of 10nm to 3 micrometers. The width of the first predetermined gap 111 is greater than the operating wavelength and is less than or equal to 3 μm. The area near the connection point of micro mirror 104 and supporting beam 103 is the first area, and in order to avoid the influence of the unevenness near the connection point of supporting beam 103 and micro mirror 104 on the lateral movement of micro mirror, a third predetermined gap 113 is formed in the gap between micro mirror 104 and first insulating layer 105 in the first area, and the thickness of third predetermined gap 113 is equal to the width of first predetermined gap 111.
Preferably, in order to increase the electrostatic force, the micro mirror 104 and the first and second driving electrodes 121 and 122 can be designed as shown in FIG. 3. Micro-mirrors 104 employ a comb-like structure. That is, two sides of micromirror 104 are respectively provided with one or more notches, and the notches on the two sides are symmetrical in position to form a comb structure similar to the comb structure with teeth on the two sides. The first drive electrodes 121 are located on one side of the comb teeth and connected together, and the second drive electrodes 122 are located on the other side of the comb teeth and connected together. The optical structure 107 is not shown in fig. 3. To increase the fill factor of the optical structure, the optical structure 107 can be made rectangular, as shown in FIG. 4 in a top view, and only the optical structure 107, the micro mirrors 104 and the support beams 103 are shown in a cross-sectional view, as shown in FIG. 5.
In order to realize the structure, the following process flow is provided:
a second insulating layer 106 and a first polysilicon layer are formed on the substrate wafer 101, and the first polysilicon layer is doped, where the doping type is a second doping type and the doping concentration is lower than the doping concentrations of the first driving electrode 121 and the second driving electrode 122. The first polysilicon layer is used to form the driving electrode layer 120. The second insulating layer 106 and the driving electrode layer 120 need to be able to withstand a subsequent sacrificial layer etching process. This process may be omitted, and the substrate wafer 101 may be a silicon wafer of the second doping type.
A first insulating layer 105 is deposited and completed and the cross-section is shown in figure 7. The first insulating layer 105 needs to be able to withstand the subsequent sacrificial layer etching process.
Etching is performed from the second surface of the substrate wafer 101 to expose the bottom of the first insulating layer 105 in the blind via 108 to a depth approximately equal to the thickness of the substrate wafer 101 minus the depth of the blind via 108, and the finished cross-section is shown in fig. 8.
Dry etching is performed from the second surface of the substrate wafer 101 to remove the insulating layer at the bottom of the blind via 108, and the finished cross section is shown in fig. 9.
The first sacrificial layer 131 is uniformly deposited, the front and back surfaces of the substrate wafer 101 and the inner walls of the through holes are uniformly covered by the first sacrificial layer 131, the thickness of the first sacrificial layer 131 is equal to the width of the first predetermined gap 111 minus the thickness of the second predetermined gap 112, and the finished cross section is as shown in fig. 10.
Photoetching and corroding the first sacrificial layer 131 on the first surface side of the substrate wafer 101, corroding the sacrificial layer outside the third preset gap 113 on the first surface side, then uniformly depositing a second sacrificial layer 132, wherein the second sacrificial layer 132 uniformly covers the first surface and the second surface on the two sides of the substrate wafer 101 and the inner wall of the through hole, the thickness of the second sacrificial layer 132 is equal to that of the second preset gap 112, and the finished cross section is shown in fig. 11.
The first sacrificial layer 131 and the second sacrificial layer 132 on the second surface of the substrate wafer 101 are removed by dry etching, a second polysilicon layer is uniformly deposited to form the fixed layer 102, the supporting beam 103 and the micromirrors 104, the second polysilicon layer fills the space in the through holes to form the supporting beam 103, in order to ensure complete filling, a Low Pressure Chemical Vapor Deposition (LPCVD) process is used, and the polysilicon layer must be doped to the first doping type (in-situ doping) at the same time as Deposition. The finished cross-section is shown in fig. 12.
The second polysilicon layer on the first surface side is etched by photolithography to form the micromirror 104, and the exposed second sacrificial layer 132 is removed by etching, and the cross section is shown in fig. 13.
First driving electrode 121 and second driving electrode 122 are formed by photolithography, ion implantation and thermal diffusion, and since the thickness of micro mirror 104 is much larger than the depth of ion implantation, first driving electrode 121, second driving electrode 122 and micro mirror 104 are self-aligned. The finished cross-section is shown in fig. 14.
And manufacturing the optical structure 107 and the metal lead, and corroding and removing the first sacrificial layer 131 and the second sacrificial layer 132 to release the structure, so as to manufacture the structure shown in fig. 1, thereby completing the manufacturing.
This application has following advantage:
the micromirror 104 is supported by a supporting beam 103 perpendicular to the surface of the silicon wafer, and the stiffness coefficient of the supporting beam 103 in the vertical direction is much larger than that in the in-plane direction, so that the micromirror has strong resistance to the electrostatic attraction effect (Pull-in effect) in the vertical direction. And shield electrode 123 remains at an equal potential with micromirror 104 at all times, reducing the electrostatic force in the vertical direction. Therefore, the second predetermined gap 112 can be reduced to a nanometer level to increase the lateral electrostatic driving force, thereby reducing the cell size while ensuring the lateral displacement.
Because the first driving electrode 121, the second driving electrode 122 and the shielding electrode 123 are made of the same layer of material, a flat upper surface can be realized, and the fluctuation of the upper surface is less than 10 nm. This feature allows the gap 11 to be reduced to nanoscale to increase the lateral electrostatic driving force, thereby reducing the cell size while ensuring lateral displacement.
By adopting the process, the supporting beam 103 which is embedded in the wafer and is perpendicular to the surface of the wafer can be realized, the length of the beam is not limited by the side length of the unit in the plane any more, and the stiffness coefficient of the supporting beam 103 in the horizontal plane can be reduced by increasing the length of the beam, so that the transverse displacement is ensured to meet the application requirement.
The self-alignment process of the driver electrodes with the micromirrors 104 reduces process errors and increases the number of electrode pairs.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the description of the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.
FIG. 1 is a schematic view of a micromirror structure according to an embodiment of the present application;
FIG. 2 is a top view of a micromirror structure according to one embodiment of the present application;
FIG. 3 is a schematic view of a structure of a driving electrode layer according to an embodiment of the present application;
FIG. 4 is a perspective view of a micromirror structure in accordance with one embodiment of the present application;
FIG. 5 is a schematic view of a micromirror structure according to an embodiment of the present application;
FIG. 6 is a schematic structural diagram illustrating a completed blind via in accordance with an embodiment of the present application;
FIG. 7 is a schematic diagram illustrating a structure of a first insulating layer after the first insulating layer is formed according to an embodiment of the present application;
FIG. 8 is a schematic view of a second surface after etching is completed according to one embodiment of the present application;
FIG. 9 is a schematic structural diagram illustrating a completed via in accordance with one embodiment of the present application;
FIG. 10 is a schematic structural diagram illustrating a completed deposition of a first sacrificial layer in accordance with one embodiment of the present application;
FIG. 11 is a schematic structural view of the second sacrificial layer after deposition according to one embodiment of the present application;
FIG. 12 is a schematic diagram illustrating a structure of a polysilicon layer after deposition according to an embodiment of the present application;
FIG. 13 is a schematic diagram illustrating a completed micromirror structure according to one embodiment of the present application;
FIG. 14 is a schematic view of a completed micro mirror structure according to one embodiment of the present application;
FIG. 15 is a schematic diagram illustrating a completed micromirror structure according to one embodiment of the present application;
FIG. 16 is a schematic structural diagram of a completed driving electrode according to an embodiment of the present application;
FIG. 17 is a schematic view of a completed micro mirror structure according to one embodiment of the present application;
the following is a supplementary description of the drawings:
101-a substrate wafer; 102-a fixed layer; 103-a support beam; 104-micro-mirror; 105-a first insulating layer; 106-a second insulating layer; 107-optical structures; 108-blind hole; 111-a first preset gap; 112-a second preset gap; 113-a third preset gap; 120-a drive electrode layer; 121-a first drive electrode; 122-a second drive electrode; 123-shield electrodes; 131-a first sacrificial layer; 132-second sacrificial layer.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic may be included in at least one implementation of the present application. In the description of the present application, it is to be understood that the terms "upper", "lower", "top", "bottom", and the like, indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, are only for convenience in describing the present application and simplifying the description, and do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus, should not be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. Moreover, the terms "first," "second," and the like are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are capable of operation in sequences other than those illustrated or described herein.
The first embodiment is as follows:
a P-type monocrystalline silicon wafer is used as a substrate wafer 101, and the following manufacturing process is adopted:
step S1: a second insulating layer 106 and a first polysilicon layer are formed on the P-type single crystal silicon wafer by LPCVD, and the driving electrode layer 120 is doped P-type, and the first polysilicon layer is used to form the driving electrode layer 120. The second insulating layer 106 is made of low stress silicon nitride by LPCVD.
Step S2: and (3) manufacturing a blind hole 108 by adopting deep reactive ion etching, wherein the blind hole penetrates through the second insulating layer 106 and the driving electrode layer 120 and is stopped in a silicon wafer, and the aspect ratio is controlled to be 25: within 1.
Step S3: the first insulating layer 105 is formed by LPCVD deposition, and the first insulating layer 105 is formed of low-stress silicon nitride by LPCVD.
Step S4: etching is performed from the second surface of the silicon wafer to expose the bottom of the first insulating layer 105 within the blind holes 108 to a depth approximately equal to the thickness of the silicon wafer minus the depth of the blind holes 108.
Step S5: and performing dry etching on the second surface of the silicon wafer to remove the silicon nitride insulating layer at the bottom of the blind hole 108.
Step S6: the first sacrificial layer 131 is uniformly deposited, the thickness of the first sacrificial layer 131 is equal to the width of the first predetermined gap 111 minus the thickness of the second predetermined gap 112, and the first sacrificial layer 131 is a TEOS oxide layer deposited by LPCVD.
Step S7: and photoetching and corroding the first sacrificial layer 131 on the first surface side of the substrate wafer 101, corroding and removing the sacrificial layer outside the third preset gap 113 on the first surface side, and then uniformly depositing a second sacrificial layer 132, wherein the thickness of the second sacrificial layer 132 is equal to that of the second preset gap 112, and the second sacrificial layer 132 adopts phosphorus silicon glass PSG deposited by LPCVD.
Step S8: and removing the first sacrificial layer 131 and the second sacrificial layer 132 on the second surface of the substrate wafer 101 by dry etching, depositing a second polysilicon layer by LPCVD (low pressure chemical vapor deposition), wherein the second polysilicon layer is a composite layer of a layer of heavily-doped low-stress polysilicon of phosphorus and a layer of common low-stress polysilicon, and uniform phosphorus doping can be realized in the polysilicon layer after thermal annealing.
Step S9: the second polysilicon layer on the first surface side is etched by photolithography to form the micromirror 104, and the etching is continued to remove the exposed second sacrificial layer 132.
Step S10: photolithography, phosphorus ion implantation and thermal diffusion are performed to form the first driving electrode 121 and the second driving electrode 122 doped with N-type, and since the thickness of the micromirror 104 is much larger than the depth of the ion implantation, the first driving electrode 121, the second driving electrode 122 and the micromirror 104 are self-aligned. The phosphorus ion implantation dose ensures that the first driving electrode 121 and the second driving electrode 122 are inversely doped to form N-type doping, and the shielding electrode 123 is still P-type doped.
Step S11: and manufacturing the optical structure 107 and the metal lead, and removing the release structures of the first sacrificial layer 131 and the second sacrificial layer 132 by adopting hydrofluoric acid vapor etching to manufacture the structure shown in fig. 1, thereby completing the manufacture.
When the micro mirror works, the N-type doped micro mirror, the P-type doped silicon substrate and the shielding electrode are connected to the ground potential, negative driving voltage is applied to the P-type driving electrode, and PN junction reverse bias between the driving electrode and the shielding electrode is guaranteed while the micro mirror is driven transversely.
Example two:
the difference between the second embodiment and the first embodiment is that the second insulating layer 106 and the first polysilicon layer are not formed. The P-type monocrystalline silicon wafer is used, the manufacturing process is to omit the step S1 in the first embodiment, and the other steps are the same, and the differences in the process are only that: step S10 is modified by photolithography, phosphorus ion implantation and thermal diffusion to form N-doped first and second drive electrodes 121 and 122 in the P-type single crystal silicon substrate. FIG. 15 shows a cross-sectional view after completion of step S9, FIG. 16 shows a cross-sectional view after completion of step S10, and FIG. 17 shows a cross-sectional view of the resulting structure.
When the micro mirror works, the P-type silicon substrate under the micro mirror is directly used as a shielding electrode, the N-type doped micro mirror and the P-type doped silicon substrate are grounded, and a negative driving voltage is applied to the P-type driving electrode, so that the transverse driving of the micro mirror is realized, and the reverse bias of a PN junction between the driving electrode and the silicon substrate is ensured.
The above description is only exemplary of the present application and should not be taken as limiting the present application, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.
Claims (13)
1. A micro mirror structure, comprising: a substrate wafer (101), a driving electrode layer (120), a first insulating layer (105), a support beam (103), a fixed layer (102), and a micromirror (104);
the substrate wafer (101) comprises a first surface and a second surface which are opposite, and the driving electrode layer (120) is arranged on the first surface;
through holes are formed in the substrate wafer (101) and the driving electrode layer (120), and sequentially penetrate through the driving electrode layer (120), the first surface and the second surface;
the first insulating layer (105) is arranged on the surface of the driving electrode layer (120) far away from the substrate wafer (101) and the inner wall of the through hole;
the support beam (103) comprises a first end and a second end, the first end penetrates through the through hole to be connected with the fixing layer (102), and a first preset gap (111) exists between the support beam (103) and the through hole;
the fixing layer (102) is arranged on the second surface, and the fixing layer (102) is used for fixing the support beam (103);
a first driving electrode (121), a second driving electrode (122) and a shielding electrode (123) are arranged in the driving electrode layer (120), and the shielding electrode (123) is arranged between the first driving electrode (121) and the second driving electrode (122);
the micro-mirror (104) is arranged on the second end, a second preset gap (112) exists between the micro-mirror (104) and the first insulating layer (105), and the surface of the micro-mirror (104) close to the substrate wafer (101) is parallel to the surface of the first insulating layer (105) far away from the substrate wafer (101).
2. The micro-mirror structure of claim 1, wherein the driving electrode layer (120) has a lowest point relative to the surface of the micro-mirror, and the distance from the highest point on the surface of the driving electrode layer (120) to the reference surface is 0-10nm, taking the plane of the lowest point as the reference surface.
3. The micro mirror structure of claim 2, wherein the doping type of the first driving electrode (121) and the second driving electrode (122) is a first doping type, the doping type of the shielding electrode (123) is a second doping type, the first doping type being opposite to the second doping type; a PN junction exists between the first driving electrode (121) and the shielding electrode (123), and a PN junction exists between the second driving electrode (122) and the shielding electrode (123).
4. The micro-mirror structure of claim 3, wherein the micro-mirrors (104), the support beams (103) and the fixed layer (102) are made of polysilicon; and/or the presence of a gas in the gas,
the first driving electrode (121), the second driving electrode (122) and the shielding electrode (123) are made of the same material, and the first driving electrode (121), the second driving electrode (122) and the shielding electrode (123) are made of monocrystalline silicon or polycrystalline silicon.
5. The micromirror structure of claim 4, wherein the micromirror (104) comprises a first side and a second side opposite to each other, the first side is provided with at least one notch, the second side is provided with at least one notch, the notch on the first side is opposite to the notch on the second side, the driving electrode layer (120) corresponding to the notch on the first side is provided with a first driving electrode (121), and the driving electrode layer (120) corresponding to the notch on the first side is provided with a second driving electrode (122).
6. The micro-mirror structure of claim 5, wherein the first predetermined gap (111) has a dimension greater than an operating wavelength of the micro-mirror structure and less than 3 μm; and/or the presence of a gas in the gas,
the size of the second preset gap (112) is 10-3000 nm.
7. The micro-mirror structure of claim 1, wherein a second insulating layer (106) is further disposed between the drive electrode layer (120) and the substrate wafer (101); and/or the presence of a gas in the gas,
and a third insulating layer is arranged between the fixed layer (102) and the second surface.
8. The micro-mirror structure of claim 1, further comprising an optical structure (107), the optical structure (107) being arranged on a surface of the micro-mirror (104) remote from the substrate wafer (101), the optical structure being a grating or a nano-optical structure.
9. A micro mirror structure, comprising: a substrate wafer (101), a first insulating layer (105), a support beam (103), a fixed layer (102), and a micromirror (104);
the substrate wafer (101) comprises a first surface and a second surface which are opposite;
through holes are formed in the substrate wafer (101), and the through holes sequentially penetrate through the first surface and the second surface;
the first insulating layer (105) is disposed on the first surface and an inner wall of the through-hole;
the support beam (103) comprises a first end and a second end, the first end penetrates through the through hole to be connected with the fixing layer (102), and a first preset gap (111) exists between the support beam (103) and the through hole;
the fixing layer (102) is arranged on the second surface, and the fixing layer (102) is used for fixing the support beam (103);
the micro-mirror (104) is arranged on the second end, a second preset gap (112) exists between the micro-mirror (104) and the first insulating layer (105), and the surface of the micro-mirror (104) close to the substrate wafer (101) is parallel to the surface of the first insulating layer (105) far away from the substrate wafer (101);
a shielding electrode (123) is arranged in a region, corresponding to the micro mirror (104), on the substrate wafer (101), a first driving electrode (121) and a second driving electrode (122) are further arranged between the substrate wafer (101) and the first insulating layer (105), and the shielding electrode (123) is arranged between the first driving electrode (121) and the second driving electrode (122);
the doping types of the micro mirror (104), the support beam (103) and the fixed layer (102) are a first doping type;
the doping type of the substrate wafer (101) is a second doping type, a PN junction exists between the substrate wafer (101) and the first driving electrode (121), and a PN junction exists between the substrate wafer (101) and the second driving electrode (122).
10. A method for fabricating a micro mirror structure, the method being used for fabricating a micro mirror structure according to any one of claims 1 to 8, the method comprising:
fabricating a second insulating layer (106) on a substrate wafer (101), the substrate wafer (101) comprising opposing first and second surfaces, the second insulating layer (106) fabricated on the first surface;
manufacturing a driving electrode layer (120) on the second insulating layer (106);
doping the driving electrode layer (120), wherein the doping type is a second doping type;
manufacturing a blind hole (108) with a preset depth on a substrate wafer (101), wherein the blind hole (108) penetrates through the driving electrode layer (120), the second insulating layer (106) and the first surface in sequence;
manufacturing a first insulating layer (105) on the driving electrode layer (120) and the inner wall of the blind hole (108);
-treating the first insulating layer (105) on the second surface and at the bottom of the blind hole (108) such that the blind hole (108) forms a through hole;
depositing a sacrificial layer on the first insulating layer (105) and on the inner walls of the through-holes;
respectively manufacturing a fixed layer (102), a support beam (103) and a micro-mirror layer on the second surface, the through hole and the sacrificial layer;
etching the micromirror layer to form a micromirror (104);
performing ion implantation on the driving electrode layer (120), and forming a first driving electrode (121) and a second driving electrode (122) on the driving electrode layer (120); the ion implantation area is at least a partial area of the driving electrode layer (120) except the area corresponding to the micro mirror (104), and the ion implantation depth is smaller than the thickness of the micro mirror (104);
-making an optical structure (107) on the micromirror layer;
and removing the sacrificial layer to obtain the micro-mirror structure.
11. The method for preparing according to claim 10, wherein the fabricating a fixing layer (102), a supporting beam (103) and a micro-mirror layer on the second surface, the through hole and the sacrificial layer respectively comprises:
removing the sacrificial layer on the second surface by dry etching;
uniformly depositing a polysilicon layer on the second surface, in the through hole and on the first insulating layer (105) by using low-pressure chemical vapor deposition, and doping the polysilicon layer into a first doping type; wherein the polysilicon layer on the second surface forms the fixed layer (102), the polysilicon layer within the via forms the support beam (103), and the polysilicon layer on the first insulating layer (105) forms the micromirror layer.
12. The method of manufacturing according to claim 11, wherein the processing of the first insulating layer (105) on the second surface and at the bottom of the blind hole (108) to form the blind hole (108) into a through hole comprises:
etching the second surface to expose a bottom of the first insulating layer (105) within the blind hole (108);
and removing the first insulating layer (105) at the bottom of the blind hole (108) to form a through hole.
13. A method for fabricating a micro mirror structure, the method being used for fabricating the micro mirror structure of claim 9, the method comprising:
manufacturing a blind hole (108) with a preset depth on a substrate wafer (101), wherein the doping type of the substrate wafer (101) is a second doping type, the substrate wafer (101) comprises a first surface and a second surface which are opposite, and the blind hole (108) is manufactured on the first surface;
-making a first insulating layer (105) on said first surface and on the inner walls of said blind holes (108);
-treating the first insulating layer (105) on the second surface and at the bottom of the blind hole (108) such that the blind hole (108) forms a through hole;
depositing a sacrificial layer on the first insulating layer (105) and on the inner walls of the through-holes;
respectively manufacturing a fixed layer (102), a support beam (103) and a micro-mirror layer on the second surface, the through hole and the sacrificial layer;
etching the micromirror layer to form a micromirror (104);
performing ion implantation on the substrate wafer (101), and forming a first driving electrode (121) and a second driving electrode (122) on the substrate wafer (101); the ion implantation area is at least a partial area of the first surface except the area corresponding to the micro mirror (104), and the ion implantation depth is smaller than the thickness of the micro mirror (104);
-making an optical structure (107) on the micromirror layer;
and removing the sacrificial layer to obtain the micro-mirror structure.
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| JP2005316043A (en) * | 2004-04-28 | 2005-11-10 | Yokohama Tlo Co Ltd | Micromirror element and method of manufacturing the same |
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| JP2005316043A (en) * | 2004-04-28 | 2005-11-10 | Yokohama Tlo Co Ltd | Micromirror element and method of manufacturing the same |
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