CN114370814A - Angle extraction circuit, method and chip - Google Patents
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Abstract
The invention belongs to the technical field of sensing signal processing, and particularly discloses an angle extraction circuit, method and chip. The angle extraction circuit includes: the analog-to-digital converter is used for receiving the voltage signal and performing analog-to-digital conversion on the voltage signal, wherein the voltage signal comprises angle information output by the angle sensor; a signal generator for generating a modulation signal and a reference signal, wherein the modulation signal is used for modulating a voltage signal to obtain a modulated signal; a filter to which the first modulated signal and the second modulated signal are added and inputted to extract angle information; and the phase comparison unit is used for receiving the reference signal output by the signal generator and the output signal of the filter and comparing the reference signal with the output signal so as to acquire the phase difference of the output signal relative to the reference signal. The invention has simple calculation process and greatly reduces the hardware resources required by the calculation process.
Description
Technical Field
The invention belongs to the technical field of sensing signal processing, and particularly relates to an angle extraction circuit, method and chip.
Technical Field
In the hall angle sensor manufactured by using the hall principle, the hall element starts to rotate from a reference position under the action of an electric field force, and the rotated angle theta is the content required to be output by the hall angle sensor. In the prior art, the value of the angle is usually calculated by using CORDIC (Coordinate Rotation Digital Computer) algorithm. The method is based on the presetting that the tangent (tan) value of the angle theta is equal to the n power of 1/2 in a certain interval (namely the formula tan alpha)i＝2-i) And obtaining the value of the rotating angle theta of the Hall angle sensor by a step-by-step accumulation method by using a series of fixed angle values. Finally, the CORDIC algorithm also performs a filtering operation in order to remove part of the noise.
However, the calculation process of this method is relatively complex, a large amount of memory is required to record the table data for the table lookup instruction, and the corresponding digital system is also complex and consumes a lot of resources. The more resources consumed for chip manufacturing means that miniaturization of the chip is more difficult. In order to reduce the difficulty of angle calculation, an angle calculation method which saves more resources and can maintain the calculation accuracy at the existing level is urgently needed.
Disclosure of Invention
In order to solve the above-mentioned drawbacks, the present invention provides an angle extraction circuit for extracting an angle value output by an angle sensor, including: .
The first analog-to-digital converter is used for receiving a first voltage signal and performing analog-to-digital conversion on the first voltage signal, wherein the first voltage signal comprises angle information output by the angle sensor;
the second analog-to-digital converter is used for receiving a second voltage signal and performing analog-to-digital conversion on the second voltage signal, wherein the second voltage signal comprises angle information output by the angle sensor;
a signal generator for generating a modulation signal and a reference signal, wherein the first modulation signal is used for modulating the first voltage signal to obtain a first modulated signal, and the second modulation signal is used for modulating the second voltage signal to obtain a second modulated signal;
a filter to which the first modulated signal and the second modulated signal are added and inputted to extract the angle information;
and the phase comparison unit is used for receiving the reference signal output by the signal generator and the output signal of the filter, and comparing the reference signal with the output signal to acquire the phase difference of the output signal relative to the reference signal.
In the above circuit, the filter comprises at least a 2-stage low-pass filter.
In the above circuit, the filter is a four-stage IIR (Infinite Impulse Response) filter.
In the above circuit, the characteristic function of the filter is:
REGn＝k×REGn-1+(1-k)×new，
wherein, REGnIs the value of the current output of the filter, REGn-1Is the last output value of the filter, new is the input value of the filter, and k is the control coefficient.
In the above circuit, the modulation signal is a square wave.
In the above circuit, the phase comparison unit is a phase shift counter, and the phase shift counter starts counting from a rising/falling edge of the reference signal to an end of counting from a rising/falling edge of the output signal of the filter.
The invention also provides an angle extraction method for extracting the angle value output by the angle sensor, which comprises the following steps:
an analog-to-digital conversion step of converting a first voltage signal and a second voltage signal from the angle sensor into digital signals, wherein the first voltage signal and the second voltage signal contain angle information output by the angle sensor;
a modulation step of modulating the first voltage signal and the second voltage signal with a first modulation signal and a second modulation signal, respectively, to obtain a first modulated signal and a second modulated signal;
a filtering step of adding the first modulated signal and the second modulated signal and then filtering the added signals to extract the angle information;
and a phase comparison step of receiving a reference signal and comparing the reference signal with the output signal obtained in the filtering step to obtain the phase difference of the output signal relative to the reference signal.
In the method, the filtering step uses a multi-stage IIR filter for filtering.
In the above method, the characteristic function of each stage of the multi-stage recursive filter is:
REGn＝k×REGn-1+(1-k)×new，
wherein, REGnIs the value of the current output of the filter, REGn-1Is the output value of the filter in the last time, new is the input value of the filter, and k is the control coefficient.
In the above method, the first modulation signal and the second modulation signal are square waves.
Correspondingly, the invention also provides a chip, which comprises an angle sensing unit and a signal processing unit, wherein the signal processing unit receives the angle information output by the angle sensing unit and extracts the angle value from the angle information according to the method.
Compared with the prior art, the invention provides the modulation signal and the reference signal with the same frequency through the signal generator, wherein the modulation signal adopts square wave, and the reference signal adopts sine wave or cosine wave. The modulation signal is used for modulating the angle information output by the angle sensing unit to output a signal waveform containing the angle information, and the waveform is generally a step wave. And after high-frequency components carried in the square waves are removed through multi-stage IIR filtering, a standard sin (t + theta) waveform is obtained, a reference signal sin t (or cos t) is used for being compared with the filtered sin (t + theta) waveform, and the delay (namely the phase difference theta) of sin (t + theta) relative to sin t is obtained through a counting mode, so that the angle information output by the angle induction unit is obtained. The algorithm is simple, only shifting and adding operations are needed in the filter part, and only a simple counter is needed in the comparison waveform part. In addition, the modulation signals sin t and cos t are simplified into square waves with the same frequency, the multiplication process is omitted in the modulation part, and only an adder is needed. Therefore, the invention has simple calculation process and greatly reduces the hardware resources required by the calculation process.
In addition, the multi-stage filter is used in the angle calculation process, the noise filtering effect is achieved, the filter is not required to be additionally used for filtering the noise after the calculation is finished, and one step is saved compared with the prior art.
Drawings
FIG. 1 is a hardware block diagram of some embodiments of the invention;
FIG. 2 is a schematic diagram of the sensing unit of FIG. 1;
FIG. 3a is a schematic block diagram of an angle extraction circuit according to some embodiments of the present invention;
FIG. 3b is a schematic block diagram of the circuit shown in FIG. 3a in which sine/cosine signals are replaced by common-frequency square waves;
FIG. 4 is a comparison of the waveforms at the five positions A, B, C, D, E shown in FIG. 3 b;
FIG. 5 is a plot of a square wave versus a standard sine wave;
6-10 are graphs comparing the output waveform of the four-stage filter shown in FIG. 3b with the waveform of the reference waveform Ref after being filtered by the four-stage filter;
fig. 11 is a circuit diagram illustrating the acquisition of the angle θ by counting according to the present invention.
DETAILED DESCRIPTION OF EMBODIMENT (S) OF INVENTION
In order to make the objects and features of the present invention more comprehensible, embodiments of the present invention are described in detail below with reference to the accompanying drawings. Other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. While the invention will be described in conjunction with the preferred embodiments, it is not intended that features of the invention be limited to these embodiments. On the contrary, the invention is described in connection with the embodiments for the purpose of covering alternatives or modifications that may be extended based on the claims of the present invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. The invention may be practiced without these particulars. Moreover, some of the specific details have been left out of the description in order to avoid obscuring or obscuring the focus of the present invention. Also, the embodiments and features of the embodiments in the present invention are allowed to be combined with or substituted for each other without conflict.
It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention. Also, in the present specification, like reference numerals and letters denote like items in the following drawings, and thus, once an item is defined in one drawing, it is not necessary to further define and explain it in the following drawings.
It should also be noted that the numbering of the steps in the present invention is for ease of reference and not for limitation of the order of the steps. Specific language will be used herein to describe the particular sequence of steps which is required.
In describing embodiments of the present invention in conjunction with the drawings, the terms "upper," "lower," "inner," "bottom," and the like are used in the orientation or positional relationship indicated in the drawings or as they are conventionally placed in use of the products of the present invention, merely to facilitate the description of the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are therefore not to be considered limiting of the present invention.
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
FIG. 1 is a hardware block diagram illustrating some embodiments of the invention. The angle extraction circuit provided by the invention comprises: a sensing unit 101, an analog-to-digital conversion unit 102, a signal processing unit 103, and a digital-to-analog conversion unit 104.
The sensing unit 101 includes an angle sensor for sensing the direction of a magnetic field, and outputs a voltage or a current containing information of the direction of the magnetic field. The present embodiment takes the output voltage as an example for explanation. In some embodiments, the angle sensor may be a Hall (Hall) element, an Anisotropic Magnetoresistive (AMR) element, a Giant Magnetoresistive (GMR) element, and a Tunnel Magnetoresistive (TMR) element. In particular, see fig. 2. Fig. 2 is a schematic diagram of the sensing unit 101 in fig. 1. In the figure, hall elements HD1 to HD2 are provided on the X axis and the Y axis of the planar coordinate system, respectively. When current is applied to each of the hall elements HD1 to HD2, and a magnetic field B is present in a direction parallel to the XY-axis plane as shown in the figure, induced voltages having different magnitudes are generated in each of the hall elements HD1 to HD 2. Since the magnitude of the induced voltage is correlated with the components of the magnetic field B in the X-axis and Y-axis directions, the direction of the magnetic field B can be estimated from the difference in the induced voltages of the hall elements HD1 to HD 2. With the direction of the X axis as the direction of the angle of 0 degree, the voltage value of each Hall element HD 1-HD 2 is analyzed, and the included angle theta between the direction of the applied magnetic field B and the X axis can be determined.
Returning to fig. 1, the sensing unit 1 outputs hall voltages containing information of the angle θ generated in the hall elements HD1 to HD 2.
To facilitate subsequent digital filtering, the analog-to-digital conversion unit 102 is used to perform analog-to-digital conversion on the induced voltage. The Analog-to-Digital conversion unit 102 may include, for example, an 8-bit, 16-bit ADC (Analog Digital Converter). The greater the number of bits of the ADC, the greater the accuracy of the subsequently calculated value of the angle theta.
After receiving the digital hall voltage output by the analog-to-digital conversion unit 102, the signal processing unit 103 modulates and digitally filters the hall voltage, and after multi-stage low-pass filtering, the filtering effect is stable, and the phase shift of the output sin (t + θ) curve (including the phase shift) relative to the standard sin t curve (i.e., the curve with the phase shift of 0) is stable, so that the phase shift is the angle θ between the direction of the externally applied magnetic field B and the X axis. Specifically, the signal processing unit 103 may include a signal generator 26, a modulation and filtering unit 1032, and a phase comparison unit 211. In one embodiment, sensing unit 101 outputs a set of voltage signals, e.g., sin θ and cos θ. The signal generator 26 may correspondingly output the standard (not including phase shift) cos t and sin t signals as modulation signals to modulate the signal sin θ and the signal cos θ respectively, and then add the two modulated signals to obtain the modulated signal sin t × cos θ + cos t × sin θ (i.e., the signal at the position of E point in fig. 3 a). The phase comparison unit 211 may compare the modulated signal sin (t + θ) with the standard signal cos t or sin t output by the signal generator 26, so as to obtain the actual value (generally, a digital signal) of the included angle θ. If the standard signal cos t or sin t is further replaced by the square wave with the same frequency, a multiplier can be omitted in the process of designing the filter, and the use of resources in a chip is saved. The square wave with the same frequency refers to the fact that the frequency of the square wave is the same as that of the standard signal, and the position of a zero crossing point is also coincident with that of the standard signal. For example, referring to the comparison graph of the square wave and the standard sine wave shown in fig. 5, the three zero crossings of the square wave of the substitute standard sine wave are the same as the sine wave, and the positive and negative of the amplitude of the square wave are also the same as the sine wave. Like a square wave is an envelope of a sine wave. If the standard signal is a standard cosine wave, the square wave is adjusted correspondingly. Specifically, an amplifier with a gain that can be regarded as infinite can be added to the output of the signal generator 26, and the amplitudes of the standard signals cos t and sin t are clamped at a fixed value, thereby forming a square wave. For example, the standard signal sin t shown by a dotted line in fig. 5 is amplified to obtain a square wave shown by a solid line.
Returning to fig. 1, the digital-to-analog conversion unit 104 is an optional unit. When an analog value of the angle θ needs to be output, the digital value of the angle θ output by the phase comparison unit 211 is converted into an analog value by the digital-to-analog conversion unit 104.
This is explained below in conjunction with fig. 3a and 3 b. Fig. 3a is a schematic block diagram of an angle extraction circuit according to some embodiments of the invention. Fig. 3b is a schematic block diagram of the circuit shown in fig. 3a in which sine/cosine signals are replaced by common-frequency square waves.
In fig. 3a and 3b, the first analog-to-digital converter 21 receives one path of voltage signal (first voltage signal) and outputs a digital signal cos θ after digital-to-analog conversion, and the second analog-to-digital converter 22 receives the other path of voltage signal (second voltage signal) and outputs a digital signal sin θ after digital-to-analog conversion. Specifically, the number of bits of the first analog-to-digital converter 21 and the second analog-to-digital converter 22 may be 8 bits, 10 bits, 12 bits, and the like, and the more the number of bits is, the more accurate the value of the included angle θ output subsequently is. In the embodiment shown in FIG. 3a, the signal generator 26 may be a digital signal generator, with direct outputThe modulation signals sin t and cos t in digital form are used to modulate the signals cos θ and sin θ. However, for the chip manufacturing industry, the use of hardware to realize the multiplier requires more hardware resources, and easily causes waste of resources. In order to save hardware resources and facilitate the process of implementing modulation (i.e. multiplication) inside the chip, the embodiment shown in fig. 3b uses a common-frequency square wave (refer to the description of the square wave and fig. 5 in the foregoing) instead of the modulation signals sin t and cos t, and after the addition, the modulated signal obtained at point E in fig. 3b is simplified from (sin t × cos θ + cos t × sin θ) to (sin t × cos θ)
That is, the part that originally needs to use the multiplier can be replaced by only performing addition and subtraction (i.e., only using the adder). That is, in fig. 3b, the part for multiplying cos θ by square wave 1 and sin θ by square wave 2 is not present in a hardware unit of one multiplier, but several judgers and adder hardware are needed. Therefore, the embodiment reduces the use of a plurality of logic gates on the hardware level, and reduces the utilization rate of system resources. However, as will be appreciated by those of ordinary skill in the art, the simplified modulated signal
With respect to the modulated signal sin t × cos θ + cos t × sin θ, a high frequency component is introduced into the simplified modulated signal. Therefore, in order to prevent the modulated signal from being distorted, the present embodiment further provides a multi-stage filter for filtering out the additional high frequency components. Specifically, in this embodiment, a four-stage IIR filter is used: a first filter 27, a second filter 28, a third filter 29, and a fourth filter 30. Wherein each filter occupies one register, namely a first register, a second register, a third register and a fourth register. The value of the register of the previous filter and the value of the register of the current filter are weighted and then stored in the register of the current filter. With reference to fig. 3a and 3b, the characteristic function of the first-stage filter 27 is:
REG1n＝k×REG1n-1+(1-k)×new，
wherein, REG1nIs the current value of the first register, REG1, of the first stage filter 27n-1Is the value of the first register of the first stage filter 27 at the previous time (i.e., the result of the previous recursion), new is the input value of the first stage filter 27 (i.e., the signal value at point E in fig. 3a and 3 b), k is the control coefficient according to which REG1n-1And new are weighted as k and (1-k), respectively.
The characteristic function of the second order filter 28 is:
REG2n＝k×REG2n-1+(1-k)×REG1n-1，
wherein, REG2nIs the current value of the second register, REG2, of the two-stage filter 28n-1The value of the second register of the two-stage filter 28 at the previous time (i.e., the result of the previous recursion), REG1n-1Is the input value of the two-stage filter 28 (i.e., the signal value at point A in FIGS. 3a and 3 b), k is the control coefficient from which REG2n-1And REG1n-1The weights of (a) and (b) are k and (1-k), respectively.
The characteristic function of the three-stage filter 29 is:
REG3n＝k×REG3n-1+(1-k)×REG2n-1，
wherein, REG3nIs the current value of the third register of the three-stage filter 29, REG3n-1Is the value of the third register at the previous time (i.e., the result of the previous recursion), REG2n-1Is an input value of the three-stage filter 29 (i.e., a signal value at a point B in fig. 3a and 3B), k is a control coefficient according to which REG3n-1And REG2n-1The weights of (a) and (b) are k and (1-k), respectively.
The feature function of the four-stage filter 210 is:
REG4n＝k×REG4n-1+(1-k)×REG3n-1，
wherein, REG4nIs the current value of the fourth register, REG4, of the four-stage filter 210n-1Is the value of the fourth register at the previous time (i.e., the previous time)Recursive result), REG3n-1Is the input value of the four-stage filter 210 (i.e., the signal value at point C in FIGS. 3a and 3 b), k is the control coefficient according to which REG4n-1And REG3n-1The weights of (a) and (b) are k and (1-k), respectively.
Through experiments, the signal curve after the four-stage filtering can basically and completely filter out more high-frequency components added by using square waves to replace sine waves (cosine waves) before, so that the signal output by the four-stage filter 210 is the relatively complete modulated signal sin (t + theta), and the signal is subsequently compared with a standard signal sin t (or cos t), so that the value of the included angle theta can be obtained. Of course, if the requirement for the precision of the included angle θ is higher, several stages of filters may be added according to the above characteristic function to filter more high-frequency signals.
Further, in the above filter, the value of the control coefficient k is set to be
Wherein, x is a positive integer less than 256, the above filter can also be realized only by using an adder and a shift register, which greatly reduces the use of hardware resources, and for the chip manufacturing industry, the chip miniaturization can be realized or resources can be used to realize other circuits.
The phase comparison unit 211 receives the normal signal sin t (or cos t) output from the signal generator 26 and the modulated signal sin (t + θ) output from the four-stage filter 210. Sin t (or cos t) as a reference signal can also be simplified into a square wave with the same frequency. This will be more clearly explained in conjunction with fig. 11.
Fig. 11 is a circuit diagram for obtaining the value of the angle θ by counting in the present invention. The modulated signal sin (t + θ) is input to the zero crossing detector 110, a rising edge (or a falling edge) thereof is extracted and input to the counter 111, and the counter 111 counts at the rising edge (or the falling edge) of sin t and sin (t + θ), so that the phase shift amount (i.e., the value of the included angle θ) of the modulated signal sin (t + θ) can be calculated. Alternatively, in further embodiments, phase detection may also be accomplished using a phase detector.
In the above embodiment, it can be said that the functions of the multiplier and the adder are realized only by the adder and the shift register, which greatly simplifies the angle extraction process (calculation process), and accordingly, the hardware resources required in the above embodiment are also greatly reduced, which simplifies the complexity of the circuit.
In addition, because a multi-stage filter is used in the calculation process, the noise filtering function is achieved while additional high-frequency signals are filtered. Compared with the prior art, the invention also saves an independent noise filtering process for the scheme that noise filtering is carried out after the value of the included angle theta is obtained.
Fig. 4 is a comparison of the waveforms at the five points A, B, C, D, E shown in fig. 3 b. This graph was obtained by simulating the calculation process of the four-level IIR filter described above in the mathematical calculation software matlab. Wherein the control coefficient k in the characteristic function takes the value of
The modulated signal at point E is shown as a step wave in fig. 4, i.e. the input signal to the first filter 27. The signal at the point a is a waveform of an approximate triangular wave in fig. 4, which is a signal after being filtered by the first-stage filter 27. The signal at point B is approximately sinusoidal in fig. 4, but has a significantly distorted waveform, which is the signal after filtering by the second-order filter 28. The signals at points C and D are already very close to a sine wave, which is the signal after filtering by the three-stage filter 29 and the four-stage filter 210 in turn.
Fig. 6-10 show graphs comparing the filtering effect of the reference signal Ref and the modulated signal in a single period, in order to show the filtering effect of the four-stage filter more clearly.
In fig. 6, the reference signal Ref is a fixed frequency square wave (corresponding to the reference signal Ref input to the phase matching unit 211 in fig. 3 b), and the modulated signal is simplified by using the same frequency square wave instead of the modulated signals sin t and cos t (simplified modulated signal)
The waveform is a step wave.
Fig. 7 shows that the reference signal Ref in the form of a square wave is transformed into an approximately triangular wave after being filtered by the first-stage filter 27, and the modulated signal sin (t + θ) in the form of a step wave becomes an irregular polygonal line waveform.
Fig. 8 shows that the reference signal Ref is shaped to approximate a sine wave and the modulated signal sin (t + θ) is also shaped to approximate a sine wave after being filtered by the two-stage filter 28. But both waveforms are significantly distorted from the standard sine wave.
Fig. 9 shows that the reference signal Ref is transformed into an approximate sine wave and the modulated signal sin (t + θ) is also transformed into an approximate sine wave after being filtered by the three-stage filter 29. Both waveforms are not significantly distorted relative to a standard sine wave.
Fig. 10 shows that the reference signal Ref is transformed into an approximate cosine wave after being filtered by the four-stage filter 210, and the modulated signal sin (t + θ) is also transformed into an approximate cosine wave. Both waveforms are not significantly distorted relative to a standard sine wave.
Through laboratory simulation, even if the waveform of the reference signal Ref and the modulated signal sin (t + θ) is not changed significantly any more through the fifth and sixth filters, that is, the recursion can be ended, and phase comparison can be performed on the basis of the waveform shown in fig. 10 to obtain the value of the included angle θ.
While the invention has been shown and described with reference to certain embodiments thereof, it will be understood by those skilled in the art that the foregoing is a more detailed description of the invention, taken in conjunction with the specific embodiments thereof, and that no limitation of the invention is intended thereby. Various changes and modifications in form and detail, including simple deductions or substitutions, may be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.
Claims (11)
1. An angle extraction circuit for extracting an angle value output from an angle sensor, comprising:
the first analog-to-digital converter is used for receiving a first voltage signal and performing analog-to-digital conversion on the first voltage signal, wherein the first voltage signal comprises angle information output by the angle sensor;
the second analog-to-digital converter is used for receiving a second voltage signal and performing analog-to-digital conversion on the second voltage signal, wherein the second voltage signal comprises angle information output by the angle sensor;
a signal generator for generating a modulation signal and a reference signal, wherein the first modulation signal is used for modulating the first voltage signal to obtain a first modulated signal, and the second modulation signal is used for modulating the second voltage signal to obtain a second modulated signal;
a filter to which the first modulated signal and the second modulated signal are added and inputted to extract the angle information;
and the phase comparison unit is used for receiving the reference signal output by the signal generator and the output signal of the filter, and comparing the reference signal with the output signal to acquire the phase difference of the output signal relative to the reference signal.
2. The circuit of claim 1, wherein the filter comprises at least a 2-stage low pass filter.
3. The circuit of claim 1 or 2, wherein the filter is a four-stage IIR (Infinite Impulse Response) filter.
4. The circuit of claim 3, wherein the filter characteristic function is:
REGn＝k×REGn-1+(1-k)×new，
wherein, REGnIs the value of the current output of the filter, REGn-1Is the last output value of said filter, new isThe input value of the filter, k, is a control coefficient.
5. The circuit of claim 1, wherein the modulated signal is a square wave.
6. The circuit of claim 5, wherein the phase comparison unit is a phase shift counter that counts from a rising/falling edge of the reference signal to an end of a rising/falling edge of the output signal of the filter.
7. An angle extraction method is used for extracting an angle value output by an angle sensor, and is characterized by comprising the following steps:
an analog-to-digital conversion step of converting a first voltage signal and a second voltage signal from the angle sensor into digital signals, wherein the first voltage signal and the second voltage signal contain angle information output by the angle sensor;
a modulation step of modulating the first voltage signal and the second voltage signal with a first modulation signal and a second modulation signal, respectively, to obtain a first modulated signal and a second modulated signal;
a filtering step of adding the first modulated signal and the second modulated signal and then filtering the added signals to extract the angle information;
and a phase comparison step of receiving a reference signal and comparing the reference signal with the output signal obtained in the filtering step to obtain the phase difference of the output signal relative to the reference signal.
8. The method of claim 7, wherein in the filtering step, the filtering is performed using a multi-stage IIR filter.
9. The method of claim 8, wherein each stage of the multi-stage recursive filter has a characteristic function of:
REGn＝k×REGn-1+(1-k)×new，
wherein, REGnIs the value of the current output of the filter, REGn-1Is the output value of the filter in the last time, new is the input value of the filter, and k is the control coefficient.
10. The method of claim 7, wherein the first modulation signal and the second modulation signal are square waves.
11. A chip comprising an angle sensing unit, characterized by further comprising a signal processing unit, wherein the signal processing unit receives the angle information output by the angle sensing unit and extracts an angle value from the angle information according to the method of any one of claims 7 to 10.
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