CN114338567A - SDIO interface data transmission method and device and SDIO interface equipment - Google Patents
SDIO interface data transmission method and device and SDIO interface equipment Download PDFInfo
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Abstract
A SDIO interface data transmission method and device and SDIO interface equipment are provided, the method comprises: receiving an event request from a device; analyzing a service port sending the request and the event type; if the event type is uploading data, the service port is informed to write the data to be transmitted into a data linked list; when the length of the DATA link list reaches a set threshold and no DATA is transmitted on the DATA line, a transmit DATA interrupt is generated using the GPIO instead of the SDIO standard DATA1 pin to notify the host to read the DATA. Correspondingly, the host receives the transmission data interrupt generated by the slave device through the GPIO; determining a cache of read data; and reading the data to be transmitted of the slave equipment from the SDIO interface, and putting the read data into a buffer. The scheme of the application can improve the data transmission performance of the SDIO interface.
Description
Technical Field
The application relates to the technical field of communication, in particular to a SDIO interface data transmission method and device and SDIO interface equipment.
Background
The SDIO (Secure Digital Input and Output) protocol is developed from the SD (Secure Digital Card) protocol, one end of the SDIO bus is the HOST (HOST) end, the other end is the DEVICE (DEVICE) end, and all communications are started by the HOST end issuing a command. The device side can communicate with the host as long as it can analyze the command of the host, and the host of the SDIO bus can be connected with a plurality of devices.
In order to enable a WCN (Wireless Communication Network) chip to adapt to various application scenarios, the WCN chip generally has an SDIO interface, a PCIe (Peripheral Component Interconnect express) interface, a USB interface, a SIPC (simple Interactive Personal Computer) interface, and the like. Wherein, SDIO is mainly used in WCN chip: (1) downloading firmware of the WCN product; (2) data transmission of WIFI, BT (bit stream), FM (Frequency Modulation). The WCN chip is used as a slave device, and the host is an SDIO controller of each AP (Application Processor) platform. The radio frequency chip in the structure uses SDIO as a data bus to transmit data and has the following defects:
1) the SDIO protocol specifies that Data1 mode interrupts require that after the transfer of the last Data block is completed, the Data1 Data line is pulled low, informing the SDIO host to receive the Data, so that the Data transfer is affected by the interrupt period control of SDIO.
2) In the data RX (receiving) direction, the host can determine whether there is data to be read in a polling manner, which also affects the data transmission efficiency.
Disclosure of Invention
An aspect of the present application provides a method and an apparatus for transmitting data of an SDIO interface, so as to improve data transmission performance of the SDIO interface.
Another aspect of the embodiments of the present application provides an SDIO interface device to improve device data transmission efficiency.
In one aspect, an embodiment of the present application provides a method for transmitting SDIO interface data, where the method includes:
receiving an event request from a device;
analyzing the service port and the event type which send the request;
if the event type is uploading data, the service port is informed to write the data to be transmitted into a data linked list;
and when the length of the DATA link list reaches a set threshold and no DATA is transmitted on the DATA line, generating a sending DATA interrupt by using GPIO (general purpose input/output) instead of an SDIO standard DATA1 pin so as to inform a host to read DATA.
Optionally, the data linked list is stored in a local storage area of the slave device.
Optionally, the data linked list is stored in a shared storage area of the slave device and the host.
Optionally, the method further comprises: and writing the length of the data sent this time at the tail part of each transmitted data or data packet.
On the other hand, an embodiment of the present application further provides a method for transmitting SDIO interface data, where the method includes:
the host receives the transmission data interrupt generated by the slave device through the GPIO;
determining a cache of read data;
and reading the data to be transmitted of the slave equipment from the SDIO interface, and putting the read data into the cache.
Optionally, the reading, from the SDIO interface, data to be transmitted of the slave device includes: and reading the data to be transmitted of the slave equipment from a data linked list of a local storage area of the slave equipment by adopting an SDMA mode.
Optionally, the reading, from the SDIO interface, data to be transmitted of the slave device includes: and reading the data to be transmitted of the slave equipment from the data chain table of the shared storage area of the slave equipment and the host by adopting an ADMA mode.
Optionally, the method further comprises: after the host acquires the data or the data packet transmitted by the slave equipment, the host determines the residual data volume of the current transmission according to the length of the current sending data contained in the data or the data packet. Optionally, the method further comprises: and the host analyzes the data in the cache and distributes the data to the corresponding port linked list.
On the other hand, the embodiment of the present application further provides an SDIO interface data transmission apparatus, the apparatus includes:
the event receiving module is used for receiving an event request;
the analysis module is used for analyzing the service port and the event type which send the request, and informing the service port to write the data to be transmitted into a data linked list when the event type is the uploaded data;
and the interrupt triggering module is used for generating a DATA sending interrupt by using a GPIO (general purpose input/output) to replace a SDIO standard DATA1 pin when the length of the DATA link list reaches a set threshold and no DATA is transmitted on a DATA line so as to inform a host of reading DATA.
On the other hand, the embodiment of the present application further provides an SDIO interface data transmission apparatus, the apparatus includes:
the interrupt receiving module is used for receiving the transmission data interrupt generated by the slave equipment through the GPIO;
the cache setting module is used for determining the cache of the read data;
and the data reading module is used for reading the data to be transmitted of the slave equipment from the SDIO interface and putting the read data into the cache.
Optionally, the data reading module is specifically configured to read the data to be transmitted of the slave device from a data linked list of a local storage area of the slave device in an SDMA manner.
Optionally, the data reading module is specifically configured to read the data to be transmitted of the slave device from the data linked lists of the shared storage areas of the slave device and the host by using an ADMA method.
Optionally, the apparatus further comprises: and the data analysis module is used for determining the residual data volume of the transmission according to the length of the data to be sent contained in the data or the data packet acquired by the data reading module.
Optionally, the apparatus further comprises: and the data distribution module is used for analyzing the data in the cache and distributing the data to the corresponding port linked list.
On the other hand, the embodiment of the present application further provides an SDIO interface slave device, where the SDIO interface slave device includes the SDIO interface data transmission apparatus described above.
In another aspect, the present invention also provides a computer-readable storage medium, which is a non-volatile storage medium or a non-transitory storage medium, and has a computer program stored thereon, where the computer program is executed by a processor, and the computer program causes the foregoing method to be performed.
On the other hand, an SDIO interface data transmission apparatus is further provided in an embodiment of the present application, which includes a memory and a processor, where the memory stores a computer program executable on the processor, and the processor executes the computer program to cause the foregoing method to be performed.
According to the SDIO interface DATA transmission method and device provided by the embodiment of the application, when the slave device has DATA to be uploaded to the host, the GPIO replaces the SDIO standard DATA1 pin to generate DATA transmission interruption so as to inform the host to read the DATA, and therefore the influence of an SDIO interruption period is avoided.
Furthermore, according to different hardware configurations, an SDMA (Serial Direct Memory Access) mode or an ADMA (Advanced Direct Memory Access) mode can be flexibly selected for data transmission, and compared with the SDMA mode, the ADMA mode has no data copy, so that the data transmission efficiency and performance can be greatly improved.
Further, in order to avoid the influence on efficiency caused by the polling generated by the host and too frequent interruption, the slave device writes the length of the data sent this time at the tail of each data or data packet transmitted. Correspondingly, the host determines the residual data volume of the transmission according to the length of the data to be sent in the read data or data packet, so that the interruption caused by too frequent interruption is avoided.
Drawings
Fig. 1 is a flowchart of a data transmission method of an SDIO interface according to an embodiment of the present application;
fig. 2 is another flowchart of a data transmission method of an SDIO interface according to an embodiment of the present application;
fig. 3 is a schematic diagram of a process for transmitting data based on an SDMA mechanism from a device and a host in an embodiment of the present application;
FIG. 4 is a schematic diagram of a process for transferring data between a slave device and a host based on an ADMA mechanism in an embodiment of the present application;
fig. 5 is a schematic structural diagram of an SDIO interface data transmission apparatus according to an embodiment of the present application;
fig. 6 is another schematic structural diagram of an SDIO interface data transmission apparatus according to an embodiment of the present application.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings.
The SDIO bus includes a CLK clock line, four DATA bidirectional DATA lines, a bidirectional command line CMD, power and ground signal lines. Wherein:
CLK line: the clock signal is generated by the host computer, the host computer carries out synchronous transmission with the data and the instruction line of the slave computer through one clock cycle of the clock line, and the clock takes the rising edge as the validity;
CMD line: the host sends a command to the SD card through the CMD line, and after the SD card receives the command, if the host requires the SD card to provide a response, the SD card returns a response message through the CMD line.
DATA0-3 line through which the host reads/writes DATA to/from the SD card, the SD card may pull DATA0 low to indicate that the SD card is busy at this time.
The data sending and receiving process of the SDIO host is as follows:
when the host needs to send data, a write instruction is sent through the instruction unit, the data is put into the FIFO memory after the data is sent, then the FIFO memory carries the data to the shift register, then the shift register sends the data bit by bit, each data bit is sent through CRC, the host is in a write state at the moment, and after the data is sent, the host checks the state flag bit to determine whether the data is sent completely.
And receiving, namely sending a read instruction through an instruction unit when the host needs to receive DATA, sending the DATA to the host from the slave through an SDIO _ DATA0-3 line after the instruction is sent, putting the DATA into a shift register after the host receives the DATA, sending the DATA to an FIFO memory through the shift register bit by bit, and reading the DATA through the FIFO memory by the host.
Aiming at the problem that the DATA transmission efficiency is low in some application scenes due to a DATA transmission mode specified by the existing SDIO protocol, the embodiment of the application provides a method and a device for transmitting SDIO interface DATA.
Fig. 1 is a flowchart of a method for transmitting SDIO interface data according to an embodiment of the present application.
The SDIO interface data transmission method of the embodiment comprises the following steps:
The event request may be an event request sent by different service ports, for example, for the WCN chip, there may be an FM service port, a BT service port, a WIFI service port, and the like.
And 102, analyzing the service port and the event type which send the request.
The event request may be parsed according to a protocol standard adopted by the port, which is not limited in this embodiment of the present application. The event types can be various, such as WIFI data receiving, BT data receiving and the like.
And 103, if the event type is uploading data, informing the service port to write the data to be transmitted into a data linked list.
And step 104, when the length of the DATA link table reaches a set threshold and no DATA is transmitted on the DATA line, generating a DATA transmission interrupt by using the GPIO instead of the SDIO standard DATA1 pin so as to inform a host to read DATA.
It should be noted that, in a specific application, the data linked list may be stored in a local storage area of the slave device according to different hardware configurations; or in a shared storage area of the slave and the host.
Accordingly, the host may employ different data reading modes according to different storage areas of the data linked list, which will be described in detail later.
Fig. 2 is another flowchart of a data transmission method of an SDIO interface according to an embodiment of the present application.
The SDIO interface data transmission method of the embodiment comprises the following steps:
in step 201, the host receives a transmission data interrupt generated by the slave device through the GPIO.
At step 202, the cache of the read data is determined.
And step 203, reading data to be transmitted of the slave device from the SDIO interface, and putting the read data into the cache.
Further, the host can also analyze the data in the cache and distribute the data to the corresponding port linked list.
As mentioned above, the slave device stores the data to be transmitted into the data linked list, and the data linked list may be stored in the local storage area of the slave device or stored in the shared storage areas of the slave device and the host according to different hardware configurations.
Correspondingly, for the different storage modes, the host may read the data to be transmitted of the slave device from the data linked list of the local storage area of the slave device in an SDMA mode, or read the data to be transmitted of the slave device from the data linked lists of the shared storage areas of the slave device and the host in an ADMA mode.
When the SDMA mode is adopted to read data, a host needs to prepare a larger buffer for cyclic use. And the host reads the data in the data link list from the SDIO interface and places the data in the buffer. Since the data in the data link list may contain data of a plurality of different service ports, the host may use fragment mechanism to distribute the data in the cache to different services.
The process of reading DATA by adopting the SDMA mode is the same as that of the prior art, namely, a host sends a reading instruction through an instruction unit, after the instruction is sent, a slave device sends DATA to the host through an SDIO _ DATA0-3 line, and after the host receives the DATA, the DATA is put into a shift register and then is sent to a FIFO buffer memory bit by bit through the shift register.
The process of reading data by the ADMA method is as follows: the host reads the data linked list directly from the shared storage unit. Specifically, after the GPIO is interrupted, the host receives an interrupt signal, sends a CMD53 command, and the host acquires data or a data packet transmitted by the slave device, and analyzes the length of the data to be transmitted included in the tail of the data or the data packet, and according to the length, the host can determine the remaining data amount of the transmission, that is, the host can know how much data to be acquired, and finishes the transmission after reading the data in sequence, thereby avoiding the data transmission efficiency from being affected by training and frequent initiation of interruption.
In the ADMA system, the address of each child chain table needs to be previously allocated, and this address is usually relatively fixed.
The interaction between the slave device and the host when data transfer is required is described in further detail below in conjunction with fig. 3 and 4.
Referring to fig. 3, fig. 3 is a schematic diagram of a process for transmitting data based on an SDMA mechanism by a slave device and a host in an embodiment of the present application.
And each service port of the slave device writes the data required to be transmitted to the host into the data link table of the local storage area of the slave device. And after monitoring that the data link table reaches the set length, the slave device generates data transmission interruption through the GPIO to inform the host that data is uploaded. And after receiving the command, the slave device transmits the data in the data link list to the host through the data line of the SDIO interface. After the host receives the data, the data can be copied to the memory space of the host, and the data copy exists.
Referring to fig. 4, fig. 4 is a schematic diagram of a process of transferring data between a slave device and a host based on an ADMA mechanism in an embodiment of the present application.
And each service port of the slave device writes the data to be transmitted to the host into the data linked list of the shared storage area. And after monitoring that the data link table reaches the set length, the slave device generates data transmission interruption through the GPIO to inform the host that data is uploaded. The data linked list is stored in the shared storage area of the host and the slave device, so the host can directly read the data linked list from the shared storage area, and no data copy exists in DMA (direct memory access) transportation. Compared with an SMDA mechanism, the data transmission performance can be improved.
Correspondingly, an embodiment of the present application further provides an SDIO interface data transmission device, and fig. 5 is a schematic structural diagram of the SDIO interface data transmission device according to the embodiment of the present application.
The SDIO interface data transmission apparatus 500 of this embodiment includes:
an event receiving module 501, configured to receive an event request;
the analysis module 502 is configured to analyze the service port and the event type that send the request, and when the event type is upload data, notify the service port to write data to be transmitted into a data linked list;
and an interrupt triggering module 503, configured to generate a DATA sending interrupt by using a GPIO instead of the SDIO standard DATA1 pin when the length of the DATA link list reaches a set threshold and no DATA is transmitted on the DATA line, so as to notify a host to read DATA.
Correspondingly, an embodiment of the present application further provides an SDIO interface slave device, which includes the SDIO interface data transmission apparatus shown in fig. 5.
Fig. 6 is a schematic diagram of another structure of the SDIO interface data transmission apparatus according to the embodiment of the present application.
The SDIO interface data transmission apparatus 600 of this embodiment includes the following modules:
an interrupt receiving module 601, configured to receive a transmission data interrupt generated by a slave device through a GPIO;
a cache setting module 602, configured to determine a cache of the read data;
and a data reading module 603, configured to read data to be transmitted of the slave device from the SDIO interface, and place the read data in the buffer.
In a non-limiting embodiment, the data reading module 603 may read the data to be transmitted from the slave device from the data linked list of the local storage area of the slave device in an SDMA manner.
In another non-limiting embodiment, the data reading module 603 may read the data to be transmitted from the slave device from the data linked list of the shared storage area of the slave device and the host in the ADMA manner.
In the embodiment shown in fig. 6, the SDIO interface data transmission apparatus 600 may further include: and a data analysis module (not shown) configured to determine the remaining data amount of the current transmission according to the length of the data or the data packet acquired by the data reading module 603, where the data or the data packet includes the data to be sent this time.
Further, the SDIO interface data transmission apparatus shown in fig. 6 may further include: and a data distribution module (not shown) for analyzing the data in the cache and distributing the data to the corresponding port linked list.
Correspondingly, the present application further provides an SDIO interface master device including the SDIO interface data transmission apparatus shown in fig. 6.
The host in the embodiment of the present application may be various forms of network devices or terminal devices with SDIO interfaces, such as user equipment, access terminals, subscriber units, subscriber stations, Mobile Stations (MSs), remote stations, remote terminals, Mobile devices, user terminals, wireless communication devices, user agents, or user equipment. The terminal device may also be a cellular phone, a cordless phone, a Session Initiation Protocol (SIP) phone, a Wireless Local Loop (WLL) station, a Personal Digital Assistant (PDA), a handheld device with Wireless communication function, a computing device or other processing device connected to a Wireless modem, a vehicle-mounted device, a wearable device, a terminal device in a future 5G Network or a terminal device in a future evolved Public Land Mobile Network (PLMN), and the like, which are not limited in this embodiment.
The slave device in the embodiment of the present application may be various modules or chips with SDIO interfaces, such as: a WIFI module, a camera CMOS (Complementary Metal Oxide Semiconductor) sensor module, a GPS (Global Positioning System) module, a GSM (Global System for Mobile Communications)/GPRS (General packet radio service) module, a bluetooth module, and a voice/video module.
In a specific implementation, the SDIO interface data transmission apparatus may correspond to a Chip with a corresponding function in a network device and/or a terminal device, such as a System-On-a-Chip (SOC), a baseband Chip, a Chip module, and the like.
In a specific implementation, each module/unit included in each apparatus and product described in the foregoing embodiments may be a software module/unit, may also be a hardware module/unit, or may also be a part of a software module/unit and a part of a hardware module/unit.
For example, for each device or product applied to or integrated into a chip, each module/unit included in the device or product may be implemented by hardware such as a circuit, or at least a part of the module/unit may be implemented by a software program running on a processor integrated within the chip, and the rest (if any) part of the module/unit may be implemented by hardware such as a circuit; for each device or product applied to or integrated with the chip module, each module/unit included in the device or product may be implemented by using hardware such as a circuit, and different modules/units may be located in the same component (e.g., a chip, a circuit module, etc.) or different components of the chip module, or at least some of the modules/units may be implemented by using a software program running on a processor integrated within the chip module, and the rest (if any) of the modules/units may be implemented by using hardware such as a circuit; for each device and product applied to or integrated in the terminal, each module/unit included in the device and product may be implemented by using hardware such as a circuit, and different modules/units may be located in the same component (e.g., a chip, a circuit module, etc.) or different components in the terminal, or at least part of the modules/units may be implemented by using a software program running on a processor integrated in the terminal, and the rest (if any) part of the modules/units may be implemented by using hardware such as a circuit.
The present application further provides a computer-readable storage medium, which is a non-volatile storage medium or a non-transitory storage medium, and has a computer program stored thereon, where the computer program is executed by a processor to perform the steps in the above-mentioned method embodiments.
The embodiment of the application also provides a device for transmitting the SDIO interface data, which comprises a memory and a processor, wherein the memory is stored with a computer program capable of running on the processor, and the processor executes the steps in the above method embodiments when running the computer program.
It should be understood that the term "and/or" herein is merely one type of association relationship that describes an associated object, meaning that three relationships may exist, e.g., a and/or B may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" in this document indicates that the former and latter related objects are in an "or" relationship.
The "plurality" appearing in the embodiments of the present application means two or more.
The descriptions of the first, second, etc. appearing in the embodiments of the present application are only for illustrating and differentiating the objects, and do not represent the order or the particular limitation of the number of the devices in the embodiments of the present application, and do not constitute any limitation to the embodiments of the present application.
Embodiments provided herein may be implemented, in whole or in part, by software, hardware, firmware, or any combination thereof. When implemented in software, the above-described embodiments may be implemented in whole or in part in the form of a computer program product. The computer program product comprises one or more computer instructions or computer programs. The procedures or functions according to the embodiments of the present application are wholly or partially generated when the computer instructions or the computer program are loaded or executed on a computer. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another computer readable storage medium, for example, the computer instructions may be transmitted from one website, computer, server, or data center to another website, computer, server, or data center by wire or wirelessly. It should be understood that, in the various embodiments of the present application, the sequence numbers of the above-mentioned processes do not mean the execution sequence, and the execution sequence of each process should be determined by its function and inherent logic, and should not constitute any limitation to the implementation process of the embodiments of the present application.
In the several embodiments provided in the present application, it should be understood that the disclosed method, apparatus and system may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative; for example, the division of the unit is only a logic function division, and there may be another division manner in actual implementation; for example, various elements or components may be combined or may be integrated into another system, or some features may be omitted, or not implemented. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may be physically arranged separately, or two or more units may be integrated into one unit. The integrated unit can be realized in a form of hardware, or in a form of hardware plus a software functional unit.
Although the present application is disclosed above, the present application is not limited thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present disclosure, and it is intended that the scope of the present disclosure be defined by the appended claims.
Claims (19)
1. A SDIO interface data transmission method is characterized by comprising the following steps:
receiving an event request from a device;
analyzing the service port and the event type which send the request;
if the event type is uploading data, the service port is informed to write the data to be transmitted into a data linked list;
and when the length of the DATA link list reaches a set threshold and no DATA is transmitted on the DATA line, generating a sending DATA interrupt by using GPIO (general purpose input/output) instead of an SDIO standard DATA1 pin so as to inform a host to read DATA.
2. The method of claim 1, wherein the linked list of data is stored in a local storage area of the slave device.
3. The method of claim 1, wherein the linked list of data is stored in a shared storage area of the slave device and the host.
4. The method according to any one of claims 1 to 3, further comprising: and writing the length of the data sent this time at the tail part of each transmitted data or data packet.
5. A SDIO interface data transmission method is characterized by comprising the following steps:
the host receives the transmission data interrupt generated by the slave device through the GPIO;
determining a cache of read data;
and reading the data to be transmitted of the slave equipment from the SDIO interface, and putting the read data into the cache.
6. The method of claim 5, wherein reading the data to be transmitted of the slave device from the SDIO interface comprises:
and reading the data to be transmitted of the slave equipment from a data linked list of a local storage area of the slave equipment by adopting an SDMA mode.
7. The method of claim 5, wherein reading the data to be transmitted of the slave device from the SDIO interface comprises:
and reading the data to be transmitted of the slave equipment from the data chain table of the shared storage area of the slave equipment and the host by adopting an ADMA mode.
8. The method of claim 7, further comprising:
after the host acquires the data or the data packet transmitted by the slave equipment, the host determines the residual data volume of the current transmission according to the length of the current sending data contained in the data or the data packet.
9. The method according to any one of claims 5 to 8, further comprising:
and the host analyzes the data in the cache and distributes the data to the corresponding port linked list.
10. An SDIO interface data transmission apparatus, the apparatus comprising:
the event receiving module is used for receiving an event request;
the analysis module is used for analyzing the service port and the event type which send the request, and informing the service port to write the data to be transmitted into a data linked list when the event type is the uploaded data;
and the interrupt triggering module is used for generating a DATA sending interrupt by using a GPIO (general purpose input/output) to replace a SDIO standard DATA1 pin when the length of the DATA link list reaches a set threshold and no DATA is transmitted on a DATA line so as to inform a host of reading DATA.
11. An SDIO interface data transmission apparatus, the apparatus comprising:
the interrupt receiving module is used for receiving the transmission data interrupt generated by the slave equipment through the GPIO;
the cache setting module is used for determining the cache of the read data;
and the data reading module is used for reading the data to be transmitted of the slave equipment from the SDIO interface and putting the read data into the cache.
12. The apparatus according to claim 11, wherein the data reading module is specifically configured to read the data to be transmitted of the slave device from the data linked list of the local storage area of the slave device in an SDMA manner.
13. The apparatus of claim 11,
the data reading module is specifically configured to read the data to be transmitted of the slave device from the data linked lists of the shared storage areas of the slave device and the host in an ADMA manner.
14. The apparatus of claim 13, further comprising:
and the data analysis module is used for determining the residual data volume of the transmission according to the length of the data to be sent contained in the data or the data packet acquired by the data reading module.
15. The apparatus of any one of claims 11 to 14, further comprising:
and the data distribution module is used for analyzing the data in the cache and distributing the data to the corresponding port linked list.
16. An SDIO interface slave device comprising the SDIO interface data transfer apparatus of claim 11.
17. An SDIO interface master device comprising the SDIO interface data transfer apparatus of any one of claims 12 to 15.
18. A computer-readable storage medium, being a non-volatile storage medium or a non-transitory storage medium, having a computer program stored thereon, which, when executed by a processor, causes the method of any of claims 1 to 6 to be performed, or causes the method of any of claims 5 to 9 to be performed.
19. An SDIO interface data transmission apparatus comprising a memory and a processor, the memory having stored thereon a computer program operable on the processor, wherein the processor, when executing the computer program, causes the method of any one of claims 1 to 4 to be performed or causes the method of any one of claims 5 to 9 to be performed.
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Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101030183A (en) * | 2007-04-03 | 2007-09-05 | 北京中星微电子有限公司 | Direct memory access controller and method for realizing memory batch processing |
| CN101154097A (en) * | 2006-09-26 | 2008-04-02 | 深圳长城开发科技股份有限公司 | Electrostatic real-time monitoring system and its data collection and analyzing method |
| CN101383674A (en) * | 2008-10-07 | 2009-03-11 | 北京创毅视讯科技有限公司 | Method for realizing mobile multimedia broadcast receiving, receiving card and mobile device |
| CN101668005A (en) * | 2009-09-25 | 2010-03-10 | 东南大学 | Data transmission accelerating engine method based on multiple access passages of transmitting end |
| CN101764695A (en) * | 2009-12-07 | 2010-06-30 | 中兴通讯股份有限公司 | Data card and data transmission method thereof |
| CN102323914A (en) * | 2011-04-27 | 2012-01-18 | 杭州晟元芯片技术有限公司 | Controller interface capable of automatically detecting WGIN input and control method |
| CN103020169A (en) * | 2012-11-27 | 2013-04-03 | 山东黄金矿业（莱州）有限公司 | Effectiveness and uniqueness processing method for electric data |
| CN105988955A (en) * | 2015-02-06 | 2016-10-05 | 苏州澜起微电子科技有限公司 | SDIO (Secure Digital Input and Output) equipment and electronic device applied by SDIO equipment and data transmission method |
| US20160371203A1 (en) * | 2015-06-22 | 2016-12-22 | Qualcomm Technologies International, Ltd. | Multiple Access Single SDIO Interface with Multiple SDIO Units |
| CN107153620A (en) * | 2016-03-03 | 2017-09-12 | 青岛海信电器股份有限公司 | A kind of data processing method and device |
| US20170272378A1 (en) * | 2016-03-16 | 2017-09-21 | Realtek Semiconductor Corp. | Network Communication Apparatus and Electronic Apparatus |
| CN109800194A (en) * | 2019-01-24 | 2019-05-24 | 湖南国科微电子股份有限公司 | SDIO interface data transmission method and device based on linux system |
| CN112506827A (en) * | 2020-11-12 | 2021-03-16 | 山东云海国创云计算装备产业创新中心有限公司 | Data transmission method, device and equipment based on ADMA controller |
| CN113259395A (en) * | 2021-07-05 | 2021-08-13 | 成都菁蓉联创科技有限公司 | Data communication device and method in embedded environment |
| CN113342721A (en) * | 2021-07-06 | 2021-09-03 | 无锡众星微系统技术有限公司 | DMA design method for memory controller |
-
2021
- 2021-12-27 CN CN202111617695.4A patent/CN114338567B/en active Active
Patent Citations (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101154097A (en) * | 2006-09-26 | 2008-04-02 | 深圳长城开发科技股份有限公司 | Electrostatic real-time monitoring system and its data collection and analyzing method |
| CN101030183A (en) * | 2007-04-03 | 2007-09-05 | 北京中星微电子有限公司 | Direct memory access controller and method for realizing memory batch processing |
| CN101383674A (en) * | 2008-10-07 | 2009-03-11 | 北京创毅视讯科技有限公司 | Method for realizing mobile multimedia broadcast receiving, receiving card and mobile device |
| CN101668005A (en) * | 2009-09-25 | 2010-03-10 | 东南大学 | Data transmission accelerating engine method based on multiple access passages of transmitting end |
| CN101764695A (en) * | 2009-12-07 | 2010-06-30 | 中兴通讯股份有限公司 | Data card and data transmission method thereof |
| CN102323914A (en) * | 2011-04-27 | 2012-01-18 | 杭州晟元芯片技术有限公司 | Controller interface capable of automatically detecting WGIN input and control method |
| CN103020169A (en) * | 2012-11-27 | 2013-04-03 | 山东黄金矿业（莱州）有限公司 | Effectiveness and uniqueness processing method for electric data |
| CN105988955A (en) * | 2015-02-06 | 2016-10-05 | 苏州澜起微电子科技有限公司 | SDIO (Secure Digital Input and Output) equipment and electronic device applied by SDIO equipment and data transmission method |
| US20160371203A1 (en) * | 2015-06-22 | 2016-12-22 | Qualcomm Technologies International, Ltd. | Multiple Access Single SDIO Interface with Multiple SDIO Units |
| CN107153620A (en) * | 2016-03-03 | 2017-09-12 | 青岛海信电器股份有限公司 | A kind of data processing method and device |
| US20170272378A1 (en) * | 2016-03-16 | 2017-09-21 | Realtek Semiconductor Corp. | Network Communication Apparatus and Electronic Apparatus |
| CN109800194A (en) * | 2019-01-24 | 2019-05-24 | 湖南国科微电子股份有限公司 | SDIO interface data transmission method and device based on linux system |
| CN112506827A (en) * | 2020-11-12 | 2021-03-16 | 山东云海国创云计算装备产业创新中心有限公司 | Data transmission method, device and equipment based on ADMA controller |
| CN113259395A (en) * | 2021-07-05 | 2021-08-13 | 成都菁蓉联创科技有限公司 | Data communication device and method in embedded environment |
| CN113342721A (en) * | 2021-07-06 | 2021-09-03 | 无锡众星微系统技术有限公司 | DMA design method for memory controller |
Non-Patent Citations (3)
| Title |
|---|
| JIANFEI CHEN; CAISHENG WANG; JIAN LI: ""A Single-Phase Step-Up Seven-Level Inverter With a Simple Implementation Method for Level-Shifted Modulation Schemes"", 《IEEE ACCESS》 * |
| 李胜蓝;姜宏旭;符炜剑;陈姣;: "基于PCIe的多路传输系统的DMA控制器设计", 计算机应用, no. 03 * |
| 车向勇;薛念;潘;严晓浪;: "基于CK-Core的处理器SDIO接口主控制器设计", 机电工程, no. 10 * |
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