CN114334676A - Packaging method of power supply chip and corresponding packaging structure - Google Patents
Packaging method of power supply chip and corresponding packaging structure Download PDFInfo
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- CN114334676A CN114334676A CN202111584935.5A CN202111584935A CN114334676A CN 114334676 A CN114334676 A CN 114334676A CN 202111584935 A CN202111584935 A CN 202111584935A CN 114334676 A CN114334676 A CN 114334676A
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Abstract
The invention provides a packaging method of a power supply chip and a corresponding packaging structure, wherein the packaging method comprises the following steps: providing an embedded substrate, wherein at least a power chip is embedded in the embedded substrate, and the power chip is electrically connected to the embedded substrate; the top of the embedded substrate is provided with a plurality of first pins; providing at least one coil; placing the at least one coil on top of the buried substrate, and soldering both ends of each coil to corresponding first pins, one end of each coil being electrically connected to the power supply core/chip through the corresponding first pins; and forming a magnetic packaging body above the embedded substrate, wherein the magnetic packaging body covers the top of the embedded substrate and covers the coil and the first pins.
Description
Technical Field
The invention relates to the technical field of semiconductor packaging, in particular to a packaging method of a power supply chip and a corresponding packaging structure.
Background
The power supply chip belongs to one of power supply management chips, is widely applied to electronic equipment and systems in various industries such as communication, industry, medical treatment, electric power, rail transit and the like, and has important functions of providing electric energy for electronic systems and realizing voltage conversion.
With the development of society and the progress of science and technology, relevant technologies such as smart cities, smart factories, smart power grids, automatic driving, artificial intelligence and the like emerge, the functions of corresponding electronic systems become more and more complex, the system power is improved, but the system volume gradually tends to miniaturization and intellectualization, and the power density of a power management chip for supplying power to the system is also required to be improved continuously.
In addition, the plastic package material used in the traditional power chip has large thermal resistance and poor heat dissipation performance, and thus becomes one of the factors that the efficiency of the power chip is not high.
Therefore, how to increase the power density of the power chip in a limited space has become an urgent technical problem to be solved in the industry.
Disclosure of Invention
The invention provides a packaging method and a packaging structure of a power supply chip, which are used for improving the power density of the power supply chip and solving the problem of low efficiency of the power supply chip.
According to a first aspect of the present invention, there is provided a packaging method of a power supply chip, the method including the steps of:
providing an embedded substrate, wherein at least a power chip is embedded in the embedded substrate, and the power chip is electrically connected to the embedded substrate; the top of the embedded substrate is provided with a plurality of first pins;
providing at least one coil;
placing the at least one coil on the top of the buried substrate, and soldering two ends of each coil to corresponding first pins, wherein one end of each coil is electrically connected with the power supply chip through the corresponding first pins; and forming a magnetic packaging body above the embedded substrate, wherein the magnetic packaging body covers the top of the embedded substrate and covers the coil and the first pins.
Optionally, the forming the magnetic package above the embedded substrate specifically includes:
placing the embedded substrate welded with the coil in a cavity mold to form a specific space between the upper part of the embedded substrate and the cavity mold, and injecting a liquid magnetic conductive material into the specific space and then curing to form a magnetic packaging body;
and taking out the cavity die.
Optionally, after the cavity mold is taken out, the method further includes:
and heating the embedded substrate after the magnetic packaging body is formed, and performing secondary cooling solidification.
Optionally, the method further includes cutting the embedded substrate according to a preset size to form a single finished product.
According to a second aspect of the present invention, there is provided a power chip package structure, which is prepared by the above power chip packaging method, and includes:
the embedded type chip structure comprises an embedded type chip structure and a magnetic assembly arranged above the embedded type chip structure; wherein:
the embedded chip structure includes: the embedded type substrate and the power chip arranged in the embedded type substrate are arranged in the embedded type substrate; the power chip is electrically connected to the embedded substrate;
the magnetic assembly includes: a magnetic package and at least one coil; the top of the embedded substrate is provided with a plurality of first pins, and two ends of each coil are respectively and electrically connected to the corresponding first pins; the coils and the first pins are all wrapped in the magnetic packaging body, and one end of each coil is electrically connected with the power supply chip through the corresponding first pin.
Optionally, the magnetic package is formed by injecting a liquid magnetic conductive material into a specific space above the embedded substrate and then curing the liquid magnetic conductive material.
Optionally, the embedded chip structure further includes an electronic component, the electronic component is disposed in the embedded substrate, and the electronic component is electrically connected to the embedded substrate.
Optionally, a plurality of second pins are disposed at the bottom of the embedded substrate, and the power chip is electrically connected to the embedded substrate through the corresponding second pins.
Optionally, the electronic component includes a component pin, and the component pin is electrically connected to the corresponding second pin.
Optionally, the electronic component is a resistor or a capacitor.
Optionally, the number of the power chips is at least one, and each power chip corresponds to at least one coil.
According to the packaging method of the power chip, the traditional discrete inductor device of the inductor is changed into the method that the coil is directly prepared on the top of the embedded substrate, the magnetic packaging body is formed above the embedded substrate, and the magnetic packaging body covers the coil and the first pin which is arranged on the top of the embedded substrate and used for being connected with the coil, so that the on-chip inductor is formed; therefore, the effective utilization space inside the power supply chip is greatly improved, the power density, the system efficiency and the heat dissipation performance of the power supply chip are comprehensively improved, and the whole power supply system works more stably and reliably.
In the alternative scheme of the invention, the coil is directly packaged by using the magnetic packaging body, and the magnetic packaging body directly covers the embedded substrate, so that the partial thermal resistance from the coil shell to the plastic packaging shell in the plastic packaging body of the traditional discrete inductor is eliminated, the heat dissipation thermal resistance of a magnetic device is reduced, the direct heat dissipation surface area of the coil is increased, and the overall heat dissipation effect is effectively improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic view of a prior art structure;
FIG. 2 is a flow chart illustrating a power chip packaging method according to the present invention;
FIG. 3 is a flow chart illustrating the formation of a magnetic package according to an embodiment of the present invention;
FIG. 4 is a top view of a single coil configuration in an embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view taken along A-A of FIG. 4;
FIG. 6 is a bottom view of the single coil configuration of FIG. 4;
FIG. 7 is a schematic diagram of a dual coil structure according to an embodiment of the present invention;
FIG. 8 is a schematic cross-sectional view taken along B-B of FIG. 7;
description of reference numerals:
110-a plastic package;
111-inductance;
112-pin;
1-embedded chip structure;
11-a buried substrate;
12-a power supply chip;
13-a second pin;
131-power chip pin;
132-electronic component pins;
14-electronic components;
2-a magnetic component;
21-a coil;
22-a magnetic package;
23-a first pin;
A-A: cutting a line;
B-B: and (6) cutting lines.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
The terms "first," "second," "third," "fourth," and the like in the description and in the claims, as well as in the drawings, if any, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
The technical solution of the present invention will be described in detail below with specific examples. The following several specific embodiments may be combined with each other, and details of the same or similar concepts or processes may not be repeated in some embodiments.
Referring to fig. 1, fig. 1 is a conventional power chip package structure, as shown in fig. 1, the conventional power chip package structure includes:
the power supply module comprises a substrate, wherein a power supply chip is arranged in the substrate;
the inductor 111 is an independently packaged device, and specifically comprises an inductor winding, a magnetic material for coating the inductor winding, and a packaging shell, wherein the inductor winding and the magnetic material are packaged in the packaging shell; pins 112 of the inductor are led out from two ends of the packaging shell; the pins 112 of the inductor are used for being electrically connected with the substrate;
and a plastic package body 110 for packaging the inductor 111 on the substrate.
The applicant has found that, through analysis and research on the existing power chip packaging structure, the periphery of the inductor winding of the existing power chip is covered with a magnetic material, and a packaging shell is used as a primary element for packaging, and a packaging body is used for secondary packaging after the inductor is electrically connected to the substrate, so that the inductor and the substrate form a whole. Because the space proportion occupied by the inductor in the whole structure is large, the method causes great space waste. Therefore, how to save the space occupied by the inductor is very important for improving the space utilization rate of the packaging structure of the whole power supply chip.
The power chip mentioned in the present application is also referred to as a power die (die).
The applicant has made a series of designs on how to reduce the occupied space of the inductor, and has obtained the technical solution of the present application.
Referring to fig. 2 in combination with fig. 4 to 8, an embodiment of the invention provides a method for packaging a power chip, including the following steps:
s11: an embedded substrate 11 is provided.
As shown in fig. 4 to 6, a plurality of first leads 23 are disposed on the top of the embedded substrate 11; at least a power chip 12 is embedded in the embedded substrate 11, and the power chip 12 is electrically connected to the embedded substrate 11.
In addition, as a specific embodiment, the bottom of the embedded substrate 11 is provided with a plurality of second leads 13, and the power chip 12 is electrically connected to the corresponding second leads 13. In practical operation, the power chip 12 has the power chip pins 132, and the power chip 12 is electrically connected to the embedded substrate 11 by electrically connecting the power chip pins 132 to the corresponding second pins 13.
As a further preferred embodiment, the second pin 13 may be a copper pin, for example, and the power chip pin 132 may be plated with copper and then electrically connected to the copper pin. Of course, it should be understood that the invention is not limited thereto, and other forms of electrical connection are within the scope of the invention as long as the electrical connection does not depart from the spirit of the invention.
In addition, as an alternative embodiment, other electronic components 14 may be selectively embedded in the embedded substrate 11 in addition to the embedded power chip 12, and as a specific embodiment, the electronic components 14 may be, for example, resistors or capacitors. The electronic component 14 is also electrically connected to the embedded substrate 11, for example, the electronic component 14 has electronic component pins 132, and the electronic component pins 132 are connected to the corresponding second pins 13, so as to electrically connect the electronic component 14 to the embedded substrate 11.
The number of the electronic components 14 may be one or other values.
The pins disposed on the bottom of the embedded substrate 11 and used for connecting with the power chip 12 and the electronic component 14 are collectively referred to as first pins 13. The power chip 12 and the electronic component 14 are electrically connected through the corresponding second pin 13, for example, if one pin of the electronic component 14 is connected to one second pin 13, the second pin 23 is simultaneously connected to one pin of the power chip 12, so as to achieve electrical connection.
S12: at least one coil 21 is provided.
The coil 21 may be a cylindrical winding type, a planar winding type, or a coil made by other winding or processing modes. It should be understood, of course, that the invention is not so limited and that any form of coil is within the scope of the invention as long as it does not depart from the spirit of the invention.
S13: the coils 21 are placed on top of the buried substrate 11, and both ends of each coil 21 are soldered to the corresponding first leads 23 and electrically connected to the corresponding first leads 23, and one end of each coil 21 is electrically connected to the corresponding power chip 12 through the corresponding first leads 23, respectively.
Wherein the number of power chips 12 may be one or two or other numbers, for example. The number of coils 13 may likewise be one or two or another number.
In one embodiment, the number of the power chips 12 is one, and the number of the coils 21 is one, as shown in fig. 4 and 5. Two ends of the coil 21 are electrically connected to the corresponding first leads 23, and the two first leads 23 are electrically connected to the corresponding second leads 13 at the bottom of the buried substrate, respectively. One of the two second pins 13 (the pin on the left side of fig. 5) is electrically connected to the power supply chip 12, and the other pin (the pin on the right side of fig. 5) is used for connection to other components or as an output. In practical operation, the following method can be specifically adopted to connect the two ends of the coil 21 to the corresponding first pins 23: referring to fig. 5, firstly, solder paste is printed on the corresponding first leads 23, the coils 21 are placed on the corresponding first leads 23 on which the solder paste is printed in rows by a chip mounter, then the first leads 23 on which the solder paste is placed and the corresponding coils 21 are placed in a reflow soldering furnace, the solder paste on the first leads 23 is melted and cooled under the action of the reflow soldering furnace, and finally the coils 21 are firmly connected with the embedded substrate 11 through the corresponding first leads 23 and are electrically connected.
Of course, the specific welding manner between the two ends of the coil 21 and the first lead is not limited thereto, and other manners capable of electrically connecting the coil to the first lead are within the scope of the invention.
In another embodiment, the number of the power chips 12 is two, and the number of the coils 21 is two, as shown in fig. 7 and 8. In fig. 7 and 8, each power chip 12 corresponds to one coil 21, and specifically, one end of each coil 21 is connected to the corresponding second pin through the corresponding first pin 23, and is electrically connected to the corresponding power chip 12; the other end of the coil 21 is connected to a corresponding second pin through a corresponding first pin 23, which is used for connection with other components or as an output.
The specific welding method between the two ends of the coil 21 and the first leads 23 is the same as the above-mentioned method, and is not described herein again.
Of course, it should be appreciated that the two embodiments of the correspondence relationship between the power chips and the coils are only examples of the present invention, and the present invention is not limited thereto, and specifically, the number of the power chips and the coils in the present invention may also be other values, and the correspondence relationship may also be other correspondence relationships, for example, the number of the power chips may be 3 or other values, and the number of the coils may be 3 or other values. And the corresponding relationship between the power supply chip and the coil can be that one power supply chip corresponds to two or more coils.
S14: a magnetic package 22 is formed above the buried substrate, the magnetic package 22 covers the top of the buried substrate 11, and the magnetic package 22 covers the coil 21 and the first leads 23.
Therefore, compared with the prior art shown in fig. 1, the method for packaging a power chip provided by the present invention forms an on-chip inductor by directly preparing a coil on the top of the embedded substrate 11 instead of a conventional discrete inductor device, and forming a magnetic package 22 above the embedded substrate 11, wherein the magnetic package 22 covers the coil 21 and a first pin 23 disposed on the top of the embedded substrate for connecting the coil; compared with the prior art, the package shell of the discrete inductance element is omitted, and the magnetic material is directly used as the package body of the whole power supply chip, so that the plastic package body 110 in the prior art is omitted. Therefore, the effective utilization space inside the power supply chip is greatly improved, the power density, the system efficiency and the heat dissipation performance of the power supply chip are comprehensively improved, and the whole power supply system works more stably and reliably.
As a preferred embodiment, referring to fig. 3, the step S14 of forming the magnetic package above the embedded substrate specifically includes:
s141: placing the embedded substrate 11 welded with the coil 21 in a cavity mold, so that a specific space is formed between the upper part of the embedded substrate 11 and the cavity mold, and injecting a liquid magnetic conductive material into the specific space and then curing to form a magnetic packaging body 22;
s142: and taking out the cavity die.
S143: the embedded substrate 11 after the magnetic package 22 is formed is heated and secondarily cooled and solidified.
In an example, the buried substrate 11 after the magnetic package 22 is formed is heated in an oven and then cooled and cured again, and the buried substrate 11 after the magnetic package 22 is formed is placed in the oven and heated and cooled and cured.
Of course, it should be appreciated that the heating by the oven is only an example of the present invention, the heating method of the present invention is not limited thereto, and other heating methods are within the protection scope of the present invention as long as they do not depart from the concept of the present invention.
And, as an optional way, after step S143, the method may further include the steps of:
s144: and cutting the embedded substrate according to a preset size to form a single finished product.
The invention also provides a packaging structure of the power supply chip, which is prepared by the packaging method of the power supply chip, and the structure of the packaging structure is specifically shown in fig. 4 to 8; fig. 4 to 6 show a structure including a power chip and a coil; fig. 7 to 8 show a structure including two power chips and two coils.
As shown in fig. 4 to 6, the package structure of the power chip includes:
the embedded chip structure comprises an embedded chip structure 1 and a magnetic component 2 arranged above the embedded chip structure; wherein:
the embedded chip structure 1 includes: an embedded substrate 11, a power chip 12 disposed within the embedded substrate 11; the power chip 12 is electrically connected to the buried substrate 11.
The magnetic assembly 2 comprises: a magnetic package 22 and a coil 21; two first pins 23 are arranged at the top of the embedded substrate, and two ends of the coil 21 are electrically connected to the corresponding first pins 23 respectively; the coils 21 and the first pins 23 are all wrapped in the magnetic packaging body 22, and one end of each coil 21 is electrically connected with the power chip 12 through the corresponding first pin 23.
Specifically, a plurality of second pins 13 are disposed at the bottom of the embedded substrate 11, and the power chip 12 is electrically connected to the embedded substrate 11 through the corresponding second pins 13. The second leads 13 are electrically connected to the corresponding first leads 23, for example, a through hole penetrating through the bottom and the top of the embedded substrate 11 is formed inside the embedded substrate, the through hole connects the second leads and the corresponding first leads, and the through hole is filled with a conductive material to electrically connect the second leads and the corresponding first leads.
In an alternative embodiment, other electronic components 14 are further embedded in the embedded substrate 11, and the electronic components 14 may be, for example, resistors or capacitors as a specific embodiment. The electronic component 14 is also electrically connected to the embedded substrate 11, for example, the electronic component 14 has electronic component pins 132, and the electronic component pins 132 are connected to the corresponding first pins 13, so as to electrically connect the electronic component 14 to the embedded substrate 11.
The number of the electronic components 14 may be one or other values.
The pins disposed on the bottom of the embedded substrate 11 and used for connecting with the power chip 12 and the electronic component 14 are collectively referred to as second pins 13. The power chip 12 and the electronic component 14 are electrically connected through the corresponding second pins 13, and if one pin of the electronic component 14 is connected to one second pin 13, the first pin is simultaneously connected with one pin of the power chip 12, so that the electrical connection is realized.
Fig. 7 to 8 illustrate a structure including two power chips and two coils, where each coil 21 corresponds to one power chip 12, and other parts are similar to the structure including one power chip and one coil, and are not described herein again.
The embedded substrate 11 can shorten the circuit length between the components, improve the electrical characteristics, increase the effective packaging area of the printed circuit board, and reduce a large number of solder joints on the surface of the printed circuit board, thereby improving the reliability of the package.
In the present invention, the magnetic package 22 is made of a magnetic conductive material, and the magnetic package is formed by injecting a liquid magnetic conductive material into a specific space above the embedded substrate and then curing the liquid magnetic conductive material.
In a specific embodiment, such as: the current market can select the optimal magnetic element for the Buck system-level power supply chip based on the Buck circuit structure with the package size of 2.5mm multiplied by 1.2mm, the coil size in the power supply chip with the package size is 2.0mm multiplied by 1.6mm multiplied by 0.8mm, the corresponding inductance value is 0.47 muH, the saturation current is 4.5A, and the DCR (internal resistance of the coil device) is 28m omega.
In the packaging structure of the invention, because the coil is directly packaged by the magnetic packaging body, the parameter of the coil can be comprehensively optimized according to the simulation result. That is, in the Buck system-level power supply chip based on the Buck circuit structure with a package size of 2.5mm × 2.5mm × 1.2mm, the size of the coil can be increased to 2.5mm × 2.5mm × 1mm, and accordingly, the inductance value is 0.56 μ H, the saturation current is 6A, and the DCR (internal resistance of the coil device) is 20m Ω.
Under the condition of the same current, voltage and the like, the internal resistance of the coil is reduced from the original 28m omega to 20m omega according to the formula PL_loss＝I2The DCR can obtain the loss power P of the power supply with the reduction of the internal resistance of the coilL_lossAlso reducesAnd further, the efficiency of the power system chip is improved.
Because the saturation current of the coil is increased from 4.5A to 6A, the power density of the power system chip is increased by 25% under the same condition.
Besides, the inductance of the coil can be increased from 0.47 muH to 0.56 muH according to the formula:
the electric wave ripple output by the power supply system is inversely proportional to the inductance value of the coil, namely, the voltage ripple output by the power supply system is reduced along with the increase of the inductance value of the coil, so that the power supply system works more stably and reliably.
Referring to fig. 1, a casing of a plastic package body 110 is further included above the conventional power chip, and a heat conduction effect of the magnetic conductive material is much greater than that of the conventional plastic package body 110.
The electrical connection method according to the present invention is not limited thereto, and other types of electrical connection methods are within the scope of the present invention as long as they do not depart from the spirit of the present invention.
The invention provides a packaging structure and a packaging method of a power supply chip, wherein a coil is placed at the top of an embedded substrate, a magnetic packaging body is formed above the embedded substrate and covers the top of the embedded substrate, so that the effective utilization space in the power supply chip is greatly improved, the power density, the system efficiency and the heat dissipation performance of the power supply chip are comprehensively improved, and the whole power supply system works more stably and reliably.
In the alternative scheme of the invention, the coil is directly packaged by the magnetic packaging body, and the magnetic packaging body directly covers the embedded substrate, so that the partial thermal resistance from the coil shell to the plastic packaging shell in the traditional plastic packaging body is eliminated, the heat dissipation thermal resistance of a magnetic device is reduced, the direct heat dissipation surface area of the coil is increased, and the overall heat dissipation effect is effectively improved.
In the description herein, references to the description of the term "one embodiment," "an embodiment," or the like, mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the disclosure. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Finally, it should be noted that the above embodiments are only used for illustrating the technical solutions of the present invention, and not for limiting the same; while the invention has been described in detail and with reference to the foregoing embodiments, it will be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some or all of the technical features may be equivalently replaced; and the modifications or the substitutions do not make the essence of the corresponding technical solutions depart from the scope of the technical solutions of the embodiments of the present invention.
Claims (11)
1. A packaging method of a power supply chip is characterized by comprising the following steps:
providing an embedded substrate, wherein at least a power chip is embedded in the embedded substrate, and the power chip is electrically connected to the embedded substrate; the top of the embedded substrate is provided with a plurality of first pins;
providing at least one coil;
placing the at least one coil on the top of the buried substrate, and soldering two ends of each coil to corresponding first pins, wherein one end of each coil is electrically connected with the power supply chip through the corresponding first pins; and forming a magnetic packaging body above the embedded substrate, wherein the magnetic packaging body covers the top of the embedded substrate and covers the coil and the first pins.
2. The method for packaging a power chip as claimed in claim 1, wherein the step of forming the magnetic package over the buried substrate comprises:
placing the embedded substrate welded with the coil in a cavity mold to form a specific space between the upper part of the embedded substrate and the cavity mold, and injecting a liquid magnetic conductive material into the specific space and then curing to form a magnetic packaging body;
and taking out the cavity die.
3. The method for packaging a power chip as claimed in claim 2, further comprising, after removing the cavity mold:
and heating the embedded substrate after the magnetic packaging body is formed, and performing secondary cooling solidification.
4. The packaging method of a power supply chip according to claim 2 or 3,
the method further comprises the step of cutting the embedded substrate according to a preset size to form a single finished product.
5. A power chip package structure prepared by the power chip packaging method according to any one of claims 1 to 4, the power chip package structure comprising:
the embedded type chip structure comprises an embedded type chip structure and a magnetic assembly arranged above the embedded type chip structure; wherein:
the embedded chip structure includes: the embedded type substrate and the power chip arranged in the embedded type substrate are arranged in the embedded type substrate; the power chip is electrically connected to the embedded substrate;
the magnetic assembly includes: a magnetic package and at least one coil; the top of the embedded substrate is provided with a plurality of first pins, and two ends of each coil are respectively and electrically connected to the corresponding first pins; the coils and the first pins are all wrapped in the magnetic packaging body, and one end of each coil is electrically connected with the power supply chip through the corresponding first pin.
6. The package structure of the power chip as claimed in claim 5, wherein the magnetic package is formed by injecting a liquid magnetic conductive material into a specific space above the buried substrate and then curing the liquid magnetic conductive material.
7. The power supply chip package structure according to claim 5,
the embedded chip structure further comprises an electronic component, wherein the electronic component is arranged in the embedded substrate and is electrically connected with the embedded substrate.
8. The power chip package structure of claim 7, wherein a plurality of second leads are disposed at a bottom of the embedded substrate, and the power chip is electrically connected to the embedded substrate through the corresponding second leads.
9. The power supply chip package structure according to claim 8,
the electronic component comprises component pins which are electrically connected to the corresponding second pins.
10. The package structure of the power chip as claimed in claim 8, wherein the electronic component is a resistor or a capacitor.
11. The package structure of the power chips as claimed in claim 5, wherein the number of the power chips is at least one, and each power chip corresponds to at least one coil.
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20080303125A1 (en) * | 2007-06-08 | 2008-12-11 | Da-Jung Chen | Three-dimensional package structure |
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| CN103383891A (en) * | 2012-05-04 | 2013-11-06 | 陈建兴 | Inductor manufacturing method and inductor |
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| US20190214368A1 (en) * | 2018-01-05 | 2019-07-11 | Lite-On Singapore Pte. Ltd. | Magnetic coupling package structure for magnetically coupled isolator with duo leadframes and method for manufacturing the same |
| CN211879369U (en) * | 2020-05-25 | 2020-11-06 | 深圳市中兴微电子技术有限公司 | Chip packaging structure and electronic equipment |
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2021
- 2021-12-22 CN CN202111584935.5A patent/CN114334676B/en active Active
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| US20080303125A1 (en) * | 2007-06-08 | 2008-12-11 | Da-Jung Chen | Three-dimensional package structure |
| US20090160595A1 (en) * | 2007-11-23 | 2009-06-25 | Tao Feng | Compact Power Semiconductor Package and Method with Stacked Inductor and Integrated Circuit Die |
| CN103383891A (en) * | 2012-05-04 | 2013-11-06 | 陈建兴 | Inductor manufacturing method and inductor |
| CN104135139A (en) * | 2013-05-03 | 2014-11-05 | 胜美达电机（香港）有限公司 | Power supply module |
| CN109585149A (en) * | 2017-09-26 | 2019-04-05 | 绿点高新科技股份有限公司 | The preparation method and its product of inductor |
| US20190214368A1 (en) * | 2018-01-05 | 2019-07-11 | Lite-On Singapore Pte. Ltd. | Magnetic coupling package structure for magnetically coupled isolator with duo leadframes and method for manufacturing the same |
| CN109727969A (en) * | 2018-12-29 | 2019-05-07 | 华进半导体封装先导技术研发中心有限公司 | A kind of substrate flush type power device packaging structure and its manufacturing method |
| CN211879369U (en) * | 2020-05-25 | 2020-11-06 | 深圳市中兴微电子技术有限公司 | Chip packaging structure and electronic equipment |
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