CN114328283A - Counting address acquisition method, counting method, device, equipment and storage medium - Google Patents
Counting address acquisition method, counting method, device, equipment and storage medium Download PDFInfo
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Abstract
The application relates to the technical field of semiconductor integrated circuits, and particularly discloses a counting address obtaining method, a counting device, equipment and a storage medium, wherein the counting address obtaining method determines a final coding address bit by bit from the highest bit to the lowest bit, the final coding address can be determined without gradually searching the final coding address from a starting address and performing data reading operation and judgment of times corresponding to the number of address bits, the counting address obtaining method has the characteristic of stable time consumption for searching, and the average time consumption for searching the final coding address can be effectively reduced.
Description
Technical Field
The present disclosure relates to the field of semiconductor integrated circuit technologies, and in particular, to a method, an apparatus, a device, and a storage medium for acquiring a count address.
Background
The answer protection monotonic counter refers to a counter having a monotonic counting function in which data is counted and then monotonically increases with a change in a count value. The replay protection monotonic counter is typically used in conjunction with a flash memory chip.
Because the flash memory can be written randomly but erased according to the sector, in the response protection monotonic counter, the count is usually stored by a thermometer code method, that is, when reading the count, the last code of the data bit in the response protection monotonic counter needs to be found, and the count value is calculated by adding the data on the base bit in the response protection monotonic counter.
However, the conventional last code obtaining method, which generally starts to search from the starting address of the data bit gradually increasing until the last code address is searched, is very unstable in use time and needs to consume a large amount of searching time for the case of large count value.
In view of the above problems, no effective technical solution exists at present.
Disclosure of Invention
The application aims to provide a counting address obtaining method, a counting method, a device, equipment and a storage medium, which can stably and quickly find out the position of a last coding address for counting.
In a first aspect, the present application provides a counting address obtaining method, configured to obtain a last coded address counted by a response protection monotonic counter, where the counting address obtaining method includes the following steps:
acquiring a working storage block, wherein the working storage block is a storage block which is being used for writing counting in the response protection monotonic counter;
the last encoded address of the working memory block is determined bit by bit from the most significant bit to the least significant bit.
According to the method for acquiring the counting address, the last coding address is determined bit by bit from the highest bit to the lowest bit, the last coding address does not need to be gradually searched from the initial address, data reading operation and judgment of the number of times of corresponding address bits are carried out, the last coding address can be determined, the method has the characteristic of time-consuming and stable searching, and the average time consumption of searching the last coding address can be effectively reduced.
The method for obtaining a count address, wherein the step of determining the last encoded address of the working memory block bit by bit from the highest bit to the lowest bit comprises:
determining a boundary address of the working memory block bit by bit from the highest bit to the lowest bit, wherein the boundary address is used for separating the address of written data and the address of unwritten data in the memory block;
and acquiring the final coding address according to the data of the boundary address.
A count address acquisition method of this example is bound to acquire the last coded address by performing data read determination n times for an n-bit address.
The method for obtaining a count address, wherein the step of determining the boundary address of the working memory block bit by bit from the highest bit to the lowest bit comprises:
taking the address with the highest bit being 1 and the rest bits being 0 in the working storage block as a starting point, sequentially changing address operators from the highest bit to the lowest bit and reading data of the corresponding address;
and acquiring the operator of the demarcation address from the highest bit to the lowest bit by bit according to the data of the corresponding address to acquire the demarcation address.
One count address acquisition method of this example determines the demarcation address bit by bit from the highest bit to the lowest bit, and can determine the demarcation address quickly and stably to determine the final coding address.
The method for acquiring the count address, wherein the step of acquiring the last encoded address according to the data of the boundary address comprises:
reading the data of the demarcation address;
and if the data is not written into the demarcation address, the last address of the demarcation address is taken as the last coding address.
The method for acquiring the counting address, wherein the step of acquiring the working memory block comprises the following steps:
reading data of base number bits, identification bits and check bits of all storage blocks in the response protection monotonic counter;
and acquiring the working storage block according to the data of the base digit, the identification bit and the check bit.
In the counting address obtaining method of this example, the data of the base bit, the identification bit, and the check bit is analyzed to determine the memory block currently performing the counting operation, and the memory block is regarded as the working memory block.
In a second aspect, the present application further provides a counting method for responding to a protection monotonic counter, the counting method comprising the steps of:
acquiring a working storage block, wherein the working storage block is a storage block which is being used for writing counting in the response protection monotonic counter;
determining the last coded address of the working memory block bit by bit from the highest bit to the lowest bit;
acquiring write data of a chip;
acquiring counting data;
and writing data into the subsequent address of the last coding address according to the written data and the counting data.
According to the counting method, the last coding address is determined bit by bit from the highest bit to the lowest bit, the last coding address does not need to be gradually searched from the initial address, data reading operation and judgment of the number of times of the corresponding address bit are carried out, and the last coding address can be determined.
The counting method, wherein the step of acquiring counting data comprises:
and acquiring the counting data according to the last coded address and the base bit data of the working storage block.
In a third aspect, the present application further provides a count address obtaining apparatus, configured to obtain a last coded address counted by a response protection monotonic counter, where the count address obtaining apparatus includes:
a first obtaining module, configured to obtain a working storage block, where the working storage block is a storage block that is being used for write counting in the response protection monotonic counter;
a second obtaining module for determining a last encoded address of the working memory block bit by bit from a most significant bit to a least significant bit.
According to the counting address acquisition device, the second acquisition module is used for determining the last coding address from the highest position to the lowest position bit by bit, the last coding address does not need to be gradually searched from the initial address, data reading operation and judgment of the times of corresponding address bits are carried out, the last coding address can be determined, the counting address acquisition device has the characteristic of time-consuming and stable searching, and the average time consumption of searching the last coding address can be effectively reduced.
In a fourth aspect, the present application further provides an electronic device comprising a processor and a memory, wherein the memory stores computer readable instructions, and the computer readable instructions, when executed by the processor, perform the steps of the method as provided in the first aspect.
In a fifth aspect, the present application also provides a storage medium having a computer program stored thereon, which when executed by a processor performs the steps of the method as provided in the first aspect above.
Therefore, the counting address obtaining method, the counting device, the counting equipment and the storage medium are provided, wherein the counting address obtaining method determines the last coding address bit by bit from the highest bit to the lowest bit, the last coding address is determined without gradually searching the last coding address from the initial address, and the last coding address can be determined by performing data reading operation and judgment on the number of times of corresponding address bits, so that the counting address obtaining method has the characteristic of stable time consumption for searching and can effectively reduce the average time consumption for searching the last coding address.
Drawings
Fig. 1 is a flowchart of a method for acquiring a count address according to an embodiment of the present application.
Fig. 2 is a flowchart of a counting method according to an embodiment of the present application.
Fig. 3 is a schematic structural diagram of a counting address obtaining apparatus according to an embodiment of the present application.
Fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application.
Reference numerals: 101. a first acquisition module; 102. a second acquisition module; 3. an electronic device, 301, a processor; 302. a memory; 303. a communication bus.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations. Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present application without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
When the answer protection monotonic counter is used in a computer system, the answer protection monotonic counter is used for ensuring the confidentiality and the integrity of data: when the flash memory is operated, the response protection monotonic counter performs monotonic counting, so that the mutual authentication between the host computer and the flash memory chip with the response protection monotonic counter is ensured, and the information safety is ensured.
When the answer protection monotonic counter counts, a counting bit needs to be acquired, and the counting bit is the address next to the last coded address.
In a first aspect, please refer to fig. 1, where fig. 1 is a counting address obtaining method in some embodiments of the present application, for obtaining a last coded address counted by a response protection monotonic counter, the counting address obtaining method includes the following steps:
s101, acquiring a working storage block, wherein the working storage block is a storage block which is used for write-in counting in a response protection monotonic counter;
specifically, the answer protection monotonic counter counts with only one memory block at a time, and the memory block is defined as a working memory block.
More specifically, the memory block generally includes a base bit data, an identification bit, a check bit, and a data bit, wherein the working memory block counts based on the base bit data and the data bit data, addresses of the data bit are continuously set, and a counting function is implemented for writing data step by step in an address-increasing manner.
And S102, determining the last coded address of the working memory block from the highest bit to the lowest bit one by one.
Specifically, the step of gradually determining the address bit operator corresponding to the last encoded address from the highest bit to the lowest bit is equivalent to halving the addresses of all data bits for multiple times to gradually obtain the range of the last encoded address until the last encoded address is finally determined, and the step of gradually determining the value of the last encoded address from the highest bit to the lowest bit sequentially obtains the operators corresponding to the bits of the last encoded address from left to right; according to the counting address obtaining method, the last coding address can be determined only by carrying out data reading judgment on n-bit addresses for n times; the existing acquisition method needs to start data search from an initial address, and for an n-bit address, 1 to 2 steps are needednThe last encoded address can only be obtained with the secondary data read.
More specifically, in the case that the number of address bits of the data bit is still small, the embodiments of the present applicationThe acquisition time consumption of the counting address acquisition method is similar to that of the acquisition method in the prior art, but when the number of data bit address bits is increased, the average value of the acquisition time consumption of the counting address acquisition method in the embodiment of the application is obviously reduced compared with that of the acquisition method in the prior art; if the address bit number is 16 bits, the prior art acquisition method needs to read 1 to 2 bits16For the sub-address data, 32768.5 times of data need to be read on average to obtain the determined last coded address, whereas the counting address obtaining method of the embodiment of the present application needs to read only 16 times of data to obtain the determined last coded address, and the average time consumption is much smaller than that of the obtaining method in the prior art.
According to the method for obtaining the counting address, the last coding address is determined bit by bit from the highest bit to the lowest bit, the last coding address does not need to be gradually searched from the initial address, data reading operation and judgment of the number of times of the corresponding address bit are carried out, and the last coding address can be determined.
In some preferred embodiments, step S102 includes the following sub-steps:
s1021, determining a boundary address of the working storage block from the highest bit to the lowest bit one by one, wherein the boundary address is used for separating an address of written data and an address of unwritten data in the storage block;
specifically, the way of confirming the boundary address step by step from the highest bit to the lowest bit is equivalent to halving the addresses of all data bits for multiple times to obtain the boundary address step by step; for binary addresses, the halving process is similar to a least square method, the remaining half of the addresses can be removed by judging each pair of addresses once, the demarcation address can be determined by only performing n-1 times of data reading judgment on n-bit addresses, an operator beyond the lowest bit of the demarcation address is determined after n-1 times of data reading judgment, and at the moment, the operator with the lowest bit of the demarcation address can be defined as 1 to certainly separate the address with written data from the address with unwritten data.
More specifically, the function that the boundary address can separate the address of written data and the address of unwritten data in the memory block is the inherent characteristic of the boundary address, and is not limited to that the boundary address is used for simply distinguishing two types of addresses; in the embodiment of the present application, the previous address of the boundary address is an address where data has been written, the subsequent address of the boundary address is an address where data has not been written, and the boundary address itself may be written data or unwritten data.
And S1022, acquiring the final coding address according to the data of the boundary address.
Specifically, the address of the written data and the address of the unwritten data in the data bit in the working memory block can be known according to the boundary address obtained in step S1021, and the step can determine the address of the last written data by analyzing whether the boundary address has written data, and use the address of the last written data as the last encoded address for the subsequent counting of the protection-by-answer monotonic counter.
More specifically, as shown in step S1021, when the address is n bits, n-1 times of reading judgment is performed on the acquired boundary address, and step S1022 also performs one time of reading judgment on the boundary address data, so that the last encoded address can be inevitably acquired by performing n times of data reading judgment on the n-bit address in the counting address acquiring method according to the embodiment of the present application.
In some preferred embodiments, the step of determining the demarcation address of the working memory block bit by bit from the highest bit to the lowest bit comprises:
s10211, taking the address with the highest bit as 1 and the rest bits as 0 in the working memory block as a starting point, sequentially changing address operators from the highest bit to the lowest bit and reading data of the corresponding address;
specifically, the address with the highest bit being 1 and the remaining bits being 0 represents the address of an intermediate position of the data bits of the working memory block, and if the data bits are 3-bit addresses, the data reading is started at the address 100.
More specifically, in some embodiments, the address having the highest bit of 1 and the remaining bits of 0 may be an address in which all 0's are set, and then the highest operator of all 0's may be changed to 1, or may be directly set.
S10212, according to the data of the corresponding address, the operator of the demarcation address is obtained from the highest bit to the lowest bit in order to obtain the demarcation address.
Specifically, whether the address has written data or not can be determined according to the data of the corresponding address, so that whether the address of unwritten data exists in the previous address or not is determined, if the data read when the data bits have written data is data 0, the data read when the data bits have not written data is data 1, and for the address 100, when the data read is 0, the addresses of 000 to 100 are all written with data, and the address of unwritten data is located between 101 and 111 or the next storage block, so that the highest operator of the boundary address is determined to be 1 (the highest operator of the last encoded address is 1), so that the data of the next operator address, namely the data of the read address 110, is changed and checked under the condition that the highest operator is 1, and so on until operators of all bits of the boundary address are determined; on the contrary, for the address 100, when the read data is 1, it indicates that the addresses of 101-111 have not been written with data, and at this time, there exists an address where data is not written between the addresses 000-100, so that it is determined that the highest operator of the demarcation address is necessarily 0 (the highest operator of the last encoded address is 0), so that the data of the next operator is checked when the highest operator is 0, that is, the data of the address 010 is read, and so on until operators of all bits of the demarcation address are determined; therefore, for a 3-bit address, the first two operators of the boundary address can be determined by performing data reading judgment twice, and the boundary address can be determined by defining the lowest operator as 1 to determine the final coding address; the method for acquiring the counting address of the embodiment of the application adopts a method of determining the boundary address from the highest bit to the lowest bit one by one, and can quickly and stably determine the boundary address to determine the final coding address.
In some other embodiments, step S10211 may further be: taking the address with the highest bit being 0 and the rest bits being 1 in the working storage block as a starting point, sequentially changing address operators from the highest bit to the lowest bit and reading data of the corresponding address; if the data bit is a 3-bit address, the data read is started at address 011.
In some preferred embodiments, the step of obtaining the last encoded address from the data of the demarcation address comprises:
s10221, reading data of the boundary address;
specifically, as can be seen from the foregoing, the boundary address separates the address of the written data from the address of the unwritten data, and the lowest operator of the boundary address is defined as 1, so that the data of the boundary address is not verified, and the data of the boundary address needs to be read and analyzed to determine the addresses of all the unwritten data.
S10222, if the data is written into the boundary address, the boundary address is used as the last encoded address, and if the data is not written into the boundary address, the last address of the boundary address is used as the last encoded address.
Specifically, the step is used for classifying the boundary address into the address of written data or the address of unwritten data so as to determine the address of the last written data, and taking the address of the last written data as the last coding address; if the demarcation address is 010, if the data is 0, the address 010 is used as the last coded address, and if the data is 1, 001 which is the last address of the address 010 is used as the last coded address.
In some preferred embodiments, the answer protection monotonic counter has more than two memory blocks, and when data bits of one memory block are full, the next memory block needs to be switched to count.
In some preferred embodiments, the step of obtaining the working memory block comprises:
s1011, reading data of base bits, identification bits and check bits of all storage blocks in the response protection monotonic counter;
s1012, acquiring a working storage block according to the data of the base bit, the identification bit and the check bit.
Specifically, the data of the base digit is used for recording the counting data counted when the last current storage block is fully written and switched; the data of the identification bit is used for representing whether the corresponding storage block needs to be subjected to erasing and programming operation; the data of the check bit is used for representing the base bit of the corresponding storage block and whether the data in the identification bit is valid or not; thus, analysis in conjunction with the data of the base bit, identification bit, and check bit determines the memory block currently undergoing the count operation, which is considered the working memory block.
Example 1
When the method for acquiring the counting address is applied to the response protection monotonic counter, a specific implementation logic of the method is as follows:
a1, reading basic bit data, identification bit data and check bit data of each memory block;
a2, obtaining a storage block with effective base bit data and identification bit data, and verifying the base bit data and the identification bit data in the corresponding storage block by using check bit data to obtain a working storage block;
a3, setting the address of the address operator to be all 0 as an initial boundary address;
a4, setting the highest bit in the initial boundary address as the current judgment bit;
a5, setting the current judgment bit operator of the initial boundary address as 1;
a6, judging whether the current judgment bit is the lowest bit, if so, jumping to A10, otherwise, jumping to A7;
a7, reading and judging whether the data of the initial boundary address is 0, if so, jumping to A9, otherwise, jumping to A8;
a8, setting the operator of the current judgment bit of the initial boundary address as 0;
a9, setting the next bit in the initial demarcation address as the current judgment bit, and returning to A5;
a10, regarding the initial demarcation address as the demarcation address;
and A11, reading and judging whether the boundary address data is 0, if so, defining the boundary address as the last coded address, otherwise, defining the last address of the boundary address as the last coded address.
In a second aspect, please refer to fig. 2, fig. 2 is a counting method provided in some embodiments of the present application for responding to a protection monotonic counter count, the counting method includes the following steps:
s201, acquiring a working storage block, wherein the working storage block is a storage block which is used for write-in counting in a response protection monotonic counter;
s202, determining the last coded address of the working storage block from the highest bit to the lowest bit by bit;
s203, acquiring write-in data of the chip;
specifically, the written data is data generated by chip write operation, and needs to be converted into thermometer codes to be written into a working storage block which is counted by the response protection monotonic counter for data recording.
S204, acquiring counting data;
specifically, the count data is data that has been counted in the work memory block that counts in response to the protection monotonic counter.
And S205, writing data into the subsequent address of the last coding address according to the written data and the counting data.
Specifically, after the last encoded address is determined in steps S201 to S202, the data to be written is determined by steps S203 to S205 and written into the response protection monotonic counter to complete the counting operation.
According to the counting method, the last coding address is determined bit by bit from the highest bit to the lowest bit, the last address does not need to be gradually searched from the initial address, data reading operation and judgment of the number of times of the corresponding address bit are carried out, the last coding address can be determined, the time-consuming stability of searching is achieved, the average time consumption of searching time of the last coding address can be effectively reduced, and therefore the counting method can effectively reduce the time consumption of counting of a response protection monotonic counter.
In some preferred embodiments, the step of obtaining count data comprises:
and acquiring counting data according to the last coded address and the base bit data of the working memory block.
Specifically, the number of data 0 in the data bit can be determined according to the last coded address, and the counting data stored in the working memory block can be directly acquired after the base bit data is added.
In a third aspect, referring to fig. 3, fig. 3 is a counting address obtaining apparatus for obtaining a last coded address counted by a response protection monotonic counter according to some embodiments of the present application, where the counting address obtaining apparatus includes:
a first obtaining module 101, configured to obtain a working storage block, where the working storage block is a storage block that is being used for write counting in a response protection monotonic counter;
a second obtaining module 102, configured to determine a last encoded address of the working memory block bit by bit from a highest bit to a lowest bit.
According to the counting address acquisition device, the second acquisition module 102 is used for determining the last coded address from the highest bit to the lowest bit one by one, the last coded address does not need to be searched gradually from the initial address, data reading operation and judgment of the number of corresponding address bits are carried out, the last coded address can be determined, the counting address acquisition device has the characteristic of time-consuming and stable searching, and the average time consumed by searching the last coded address can be effectively reduced.
In some preferred embodiments, the counting address obtaining device is configured to execute the counting address obtaining method provided in the first aspect.
In a fourth aspect, please refer to fig. 4, where fig. 4 is a schematic structural diagram of an electronic device according to an embodiment of the present application, and the present application provides an electronic device 3, including: the processor 301 and the memory 302, the processor 301 and the memory 302 being interconnected and communicating with each other via a communication bus 303 and/or other form of connection mechanism (not shown), the memory 302 storing a computer program executable by the processor 301, the processor 301 executing the computer program when the computing device is running to perform the method of any of the alternative implementations of the embodiments described above.
In a fifth aspect, the present application provides a storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the computer program performs the method in any optional implementation manner of the foregoing embodiments. The storage medium may be implemented by any type of volatile or nonvolatile storage device or combination thereof, such as a Static Random Access Memory (SRAM), an Electrically Erasable Programmable Read-Only Memory (EEPROM), an Erasable Programmable Read-Only Memory (EPROM), a Programmable Read-Only Memory (PROM), a Read-Only Memory (ROM), a magnetic Memory, a flash Memory, a magnetic disk, or an optical disk.
In summary, the embodiments of the present application provide a counting address obtaining method, a counting method, an apparatus, a device, and a storage medium, where the counting address obtaining method determines a last coded address bit by bit from a highest bit to a lowest bit, and the last coded address can be determined without gradually searching the last coded address from a starting address and performing data reading operation and judgment for the number of times corresponding to the number of bits of the address.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units is only one logical division, and there may be other divisions when actually implemented, and for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection of devices or units through some communication interfaces, and may be in an electrical, mechanical or other form.
In addition, units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
Furthermore, the functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.
In this document, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions.
The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
Claims (10)
1. A count address acquisition method for acquiring a last coded address that has been counted by a response protection monotonic counter, the count address acquisition method comprising the steps of:
acquiring a working storage block, wherein the working storage block is a storage block which is being used for writing counting in the response protection monotonic counter;
the last encoded address of the working memory block is determined bit by bit from the most significant bit to the least significant bit.
2. The method of claim 1, wherein determining the last encoded address of the working memory block bit by bit from the most significant bit to the least significant bit comprises:
determining a boundary address of the working memory block bit by bit from the highest bit to the lowest bit, wherein the boundary address is used for separating the address of written data and the address of unwritten data in the memory block;
and acquiring the final coding address according to the data of the boundary address.
3. The method as claimed in claim 2, wherein the step of determining the boundary address of the working memory block bit by bit from the highest bit to the lowest bit comprises:
taking the address with the highest bit being 1 and the rest bits being 0 in the working storage block as a starting point, sequentially changing address operators from the highest bit to the lowest bit and reading data of the corresponding address;
and acquiring the operator of the demarcation address from the highest bit to the lowest bit by bit according to the data value of the corresponding address to acquire the demarcation address.
4. The method as claimed in claim 2, wherein the step of obtaining the last encoded address according to the data of the boundary address comprises:
reading the data of the demarcation address;
and if the data is not written into the demarcation address, the last address of the demarcation address is taken as the last coding address.
5. The counter address obtaining method according to claim 1, wherein the step of obtaining the working memory block includes:
reading data of base number bits, identification bits and check bits of all storage blocks in the response protection monotonic counter;
and acquiring the working storage block according to the data of the base digit, the identification bit and the check bit.
6. A counting method for responsive protection monotonic counter counting, said counting method comprising the steps of:
acquiring a working storage block, wherein the working storage block is a storage block which is being used for writing counting in the response protection monotonic counter;
determining the last coded address of the working memory block bit by bit from the highest bit to the lowest bit;
acquiring write data of a chip;
acquiring counting data;
and writing data into the subsequent address of the last coding address according to the written data and the counting data.
7. A counting method according to claim 6, wherein the step of obtaining count data comprises:
and acquiring the counting data according to the last coded address and the base bit data of the working storage block.
8. A count address acquisition apparatus for acquiring a last coded address that has been counted by an answer protection monotonic counter, comprising:
a first obtaining module, configured to obtain a working storage block, where the working storage block is a storage block that is being used for write counting in the response protection monotonic counter;
a second obtaining module for determining a last encoded address of the working memory block bit by bit from a most significant bit to a least significant bit.
9. An electronic device comprising a processor and a memory, said memory storing computer readable instructions which, when executed by said processor, perform the steps of the method of any of claims 1-5.
10. A storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, performs the steps of the method according to any one of claims 1-5.
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