CN114326233A - Array substrate, display panel and display device - Google Patents
Array substrate, display panel and display device Download PDFInfo
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- CN114326233A CN114326233A CN202111657299.4A CN202111657299A CN114326233A CN 114326233 A CN114326233 A CN 114326233A CN 202111657299 A CN202111657299 A CN 202111657299A CN 114326233 A CN114326233 A CN 114326233A
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- 239000000758 substrate Substances 0.000 title claims abstract description 119
- 239000002184 metal Substances 0.000 claims abstract description 57
- 238000002161 passivation Methods 0.000 claims abstract description 38
- 125000006850 spacer group Chemical group 0.000 claims description 41
- 239000011521 glass Substances 0.000 claims description 11
- 230000007423 decrease Effects 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 3
- 239000012212 insulator Substances 0.000 claims description 2
- 230000035939 shock Effects 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract 1
- 230000002265 prevention Effects 0.000 abstract 1
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- 230000000694 effects Effects 0.000 description 15
- 230000004888 barrier function Effects 0.000 description 9
- 238000010586 diagram Methods 0.000 description 7
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- 239000002356 single layer Substances 0.000 description 3
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- 239000003086 colorant Substances 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000004973 liquid crystal related substance Substances 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 235000009537 plain noodles Nutrition 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
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Abstract
The application discloses an array substrate, a display panel and a display device, wherein the array substrate comprises a substrate, a plurality of metal wires and a passivation layer, the passivation layer is arranged on the substrate in a covering mode, the plurality of metal wires are arranged between the substrate and the passivation layer, and a plurality of pixel areas are divided; the array substrate further comprises a laminated color resistor, the orthographic projection of the laminated color resistor on the substrate covers the orthographic projection of the metal wire on the substrate, the laminated color resistor is arranged above the passivation layer and positioned between two adjacent pixel areas, and the width of the laminated color resistor is larger than that of the metal wire; the laminated color resistor at least comprises a first color resistor and a second color resistor, and the second color resistor is stacked above the first color resistor; and the second color resistor covers and wraps the first color resistor. According to the light leakage prevention method and device, the peripheral area of the pixel area can be effectively improved, and the light leakage problem is caused after metal line light is reflected.
Description
Technical Field
The application relates to the technical field of display, in particular to an array substrate, a display panel and a display device.
Background
Along with the progress of society, the living standard is continuously improved, people also have higher and higher requirements for the quality of display screens, the variety of display screens is various, the common display panel mainly displays pictures by an effective display area, the periphery of the effective display area does not directly participate in display, and after light is emitted from a backlight module, the light can be irradiated on a metal layer through a substrate of the display panel.
In order to solve the above problem, the periphery of the effective display area is usually shielded, and in the conventional COA substrate, a single color barrier is disposed at the periphery of the pixel area to shield light, but the shielding effect of the single color barrier is not ideal, and a part of light may leak through the single color barrier, which causes a light leakage problem.
Therefore, how to effectively improve the peripheral area of the pixel region is a problem that needs to be solved in the art because of the light leakage generated after the metal line light is reflected.
Disclosure of Invention
The application aims to provide an array substrate, a display panel and a display device, which can effectively improve the light leakage problem generated after metal line light is reflected in the peripheral area of a pixel area.
The application discloses an array substrate, which comprises a substrate, a plurality of metal wires and a passivation layer, wherein the passivation layer is arranged on the substrate in a covering mode, the plurality of metal wires are arranged between the substrate and the passivation layer, and a plurality of pixel areas are divided; the array substrate further comprises a laminated color resistor, the orthographic projection of the laminated color resistor on the substrate covers the orthographic projection of the metal wire on the substrate, the laminated color resistor is arranged above the passivation layer and located between two adjacent pixel areas, and the width of the laminated color resistor is larger than that of the metal wire; the laminated color resistor at least comprises a first color resistor and a second color resistor, the second color resistor is stacked above the first color resistor, and the second color resistor covers and wraps the first color resistor.
Optionally, the cross-sectional shapes of the first color resistor, the second color resistor and the metal wire are matched; the side wall of the first color resistor covers the orthographic projection of the side wall of the metal wire in the direction vertical to the first color resistor; and the side wall of the first color resistor and the side wall of the second color resistor.
Optionally, a step portion is formed on a side of the side wall of the first color resistor, which is far away from the metal wire, and the second color resistor covers the surface of the first color resistor and the step portion.
Optionally, the number of the step portions is at least two, the at least two step portions are sequentially arranged along the direction from the passivation layer to the substrate base plate, the width of the at least two step portions in the cross-sectional direction is sequentially increased from the passivation layer to the substrate base plate, and the height of the at least two step portions is sequentially decreased from the passivation layer to the substrate base plate.
Optionally, the number of the step portions is at least two, at least two of the step portions are sequentially arranged along the passivation layer towards the substrate base plate, each of the at least two step portions has a first edge inclined to the substrate base plate and a second edge parallel to the substrate base plate, and an included angle between the first edge and the second edge of the at least two step portions is sequentially increased from the passivation layer towards the substrate base plate.
Optionally, an area of an orthographic projection of the second color resistor on the substrate is larger than one fourth to one third of an area of an orthographic projection of the first color resistor on the substrate.
Optionally, the first color resistance is a blue color resistance, and the second color resistance is a red color resistance; or the first color resistance is a red color resistance, and the second color resistance is a blue color resistance; the thickness range of the first color resistance and the second color resistance is 1-2.5 micrometers, the thickness of the first color resistance is larger than that of the second color resistance, and the width of the first color resistance is smaller than that of the second color resistance.
The application also discloses a display panel, which comprises a glass substrate and a spacer, and the display panel also comprises the array substrate, and the array substrate also comprises a planarization layer, wherein the planarization layer covers the substrate and is arranged above the laminated color resistor; the glass substrate and the array substrate are arranged in a box pair mode, one end of the spacer is fixed on the glass substrate, and the other end of the spacer abuts against the planarization layer corresponding to the first color resistor and the second color resistor; the second color resist is provided with a first groove corresponding to the position of the spacer, the planarization layer covers the first groove to form a second groove, and one end of the spacer is abutted to the second groove.
Optionally, the planarization layer is close to one side of the spacer, and covers an anti-slip layer corresponding to the second color resistor, wherein the anti-slip layer is made of a heat-resistant insulating material; the surface of the anti-skid layer, which is close to one side of the shock insulator, is uniformly provided with a plurality of bulges, and the heights of the bulges are the same.
The application also discloses a display device, including backlight unit, display device still includes foretell display panel, display panel sets up one side on backlight unit's the play plain noodles.
For the scheme that single-layer color resists carry out shading in pixel zone periphery, this application is through the passivation layer top between two adjacent pixel zones, the position that corresponds the metal wire sets up the stromatolite color resists, utilize first color resists and second color resists to form the shading after piling up, and the second color resists forms the cover parcel to first color resists, make from the light of metal wire reflection or refraction, no matter from which angle to penetrate into the stromatolite color resists, all can be sheltered from by the stromatolite color resists, can not see through the stromatolite color resists, further promoted first color resists and second color resists the shading effect after piling up, effectively improve pixel zone peripheral region, because the problem that produces after the metal wire light reflection.
Drawings
The accompanying drawings, which are included to provide a further understanding of the embodiments of the application, are incorporated in and constitute a part of this specification, illustrate embodiments of the application and together with the description serve to explain the principles of the application. It is obvious that the drawings in the following description are only some embodiments of the application, and that for a person skilled in the art, other drawings can be derived from them without inventive effort. In the drawings:
fig. 1 is a schematic view of a first embodiment of an array substrate according to the present application;
FIG. 2 is a schematic view of a second embodiment of an array substrate of the present application;
FIG. 3 is a schematic view of a third embodiment of an array substrate of the present application;
FIG. 4 is a schematic diagram of a display panel according to a first embodiment of the present application;
FIG. 5 is a diagram of a display panel according to a second embodiment of the present application;
FIG. 6 is a schematic diagram of a display panel according to a third embodiment of the present application;
FIG. 7 is a schematic diagram of an embodiment of a display device according to the present application.
10, a display device; 100. a display panel; 110. an array substrate; 111. a substrate base plate; 112. a metal wire; 113. a passivation layer; 114. laminating color resistance; 115. a first color resistance; 116. a step portion; 117. a first step portion; 118. a second step portion; 119. a third step portion; 120. a fourth step portion; 121. a second color resistance; 122. a first groove; 130. a glass substrate; 140. a pixel region; 150. a planarization layer; 151. a second groove; 160. a spacer; 170. an anti-slip layer; 171. a protrusion; 200. a backlight module; 210. a first side; 220. a second edge.
Detailed Description
It is to be understood that the terminology, the specific structural and functional details disclosed herein are for the purpose of describing particular embodiments only, and are representative, but that the present application may be embodied in many alternate forms and should not be construed as limited to only the embodiments set forth herein.
In the description of the present application, the terms "first", "second" are used for descriptive purposes only and are not to be construed as indicating relative importance or as implicitly indicating the number of technical features indicated. Thus, unless otherwise specified, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature; "plurality" means two or more. The terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that one or more other features, integers, steps, operations, elements, components, and/or combinations thereof may be present or added.
Further, terms of orientation or positional relationship indicated by "center", "lateral", "upper", "lower", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like, are described based on the orientation or relative positional relationship shown in the drawings, are simply for convenience of description of the present application, and do not indicate that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present application.
Furthermore, unless expressly stated or limited otherwise, the terms "mounted," "connected," and "connected" are to be construed broadly and may include, for example, fixed connections, removable connections, and integral connections; can be mechanically or electrically connected; either directly or indirectly through intervening media, or through both elements. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.
The present application is described in detail below with reference to the figures and alternative embodiments.
Fig. 1 is a schematic view of an embodiment of an array substrate, as shown in fig. 1, the present application discloses an array substrate 110, which includes a substrate 111, a plurality of metal lines 112 and a passivation layer 113, wherein the passivation layer 113 is disposed on the substrate 111 in a covering manner, and the plurality of metal lines 112 are arranged between the substrate 111 and the passivation layer 113 in an array manner to define a plurality of pixel regions 140; the array substrate 110 further includes a stacked color resistor 114, an orthogonal projection of the stacked color resistor 114 on the substrate 111 covers an orthogonal projection of the metal line 112 on the substrate 111, the stacked color resistor 114 is disposed above the passivation layer 113 corresponding to the metal line 112 and located between two adjacent pixel regions 140, and a width of the stacked color resistor 114 is greater than a width of the metal line 112; the laminated color resistor 114 at least comprises a first color resistor 115 and a second color resistor 121, wherein the second color resistor 121 is stacked above the first color resistor 115, and the second color resistor 121 covers and wraps the first color resistor 115.
Compared with the scheme that a single-layer color resistor shields light at the periphery of a pixel area, the stacked color resistor 114 is arranged above the passivation layer 113 between two adjacent pixel areas 140 and corresponds to the position of the metal wire 112, the first color resistor 115 and the second color resistor 121 are used for stacking to shield light, and the second color resistor 121 forms covering and wrapping on the first color resistor 115, so that light reflected or refracted from the metal wire 112 can be shielded by the stacked color resistor 114 no matter which angle the light enters the stacked color resistor 114, the light cannot penetrate through the stacked color resistor 114, the effect after the first color resistor 115 and the second color resistor 121 are stacked is further improved, the light shielding effect of the peripheral area of the pixel area is effectively improved, and the problem of light leakage caused by the reflection of the metal wire is solved.
Specifically, the cross-sectional shapes of the first color resistor 115, the second color resistor 121 and the metal wire 112 are matched, and the side wall of the first color resistor 115 covers the orthographic projection of the side wall of the metal wire 112 in the direction perpendicular to the first color resistor 115; the sidewall of the first color resist 115 and the sidewall of the second color resist 121, the metal line 112 generally has a trapezoidal cross section due to the influence of the manufacturing process, when light irradiates the metal line 112, the light is reflected or refracted by the two sidewalls of the metal line 112, and the reflected or refracted light is mainly transmitted from the direction toward which the sidewall of the metal line 112 faces, so the shape of the first color resist 115 and the second color resist 121 is designed to match the shape of the cross section of the metal line 112.
For example, as shown in fig. 1, both contact surfaces of the sidewall of the first color resistor 115 and the sidewall of the second color resistor 121 are flat, or the sidewall of the first color resistor 115 and the sidewall of the second color resistor 121 are of a flat structure, after the second color resistor 121 covers the first color resistor 115, the sidewall of the second color resistor 121 and the sidewall of the first color resistor 115 are more easily overlapped and attached, so as to better form light shielding, and after the sidewall of the first color resistor 115 and the sidewall of the second color resistor 121 are stacked, the sidewall of the first color resistor 115 and the sidewall of the second color resistor 121 just can shield a region toward which the sidewall of the metal wire 112 faces, so as to avoid light leakage caused by light rays reflected or refracted by the metal wire 112 leaking from the stacked color resistors.
Of course, in the present application, the surface where the sidewall of the first color resistor 115 contacts the sidewall of the second color resistor 121 is not necessarily a plane, but may also be a rough and uneven surface.
Fig. 2 is a schematic diagram of a second embodiment of the array substrate of the present application, as shown in fig. 2, the embodiment shown in fig. 2 is based on the improvement of fig. 1, a step portion 116 is disposed on a side of a sidewall of the first color resistor 115 away from the metal line 112, and the second color resistor 121 covers a surface of the first color resistor 115 and the step portion 116. Of course, the stepped portion 116 of the present application is not limited to only one, and a plurality of continuous stepped portions 116 may be provided on the side surface of the first color resist 115 in the direction of the passivation layer 113 toward the substrate 111, and the second color resist 121 may cover the surface of the first color resist 115 and the plurality of stepped portions 116.
Generally, a double-layer color resistor is used for shading, usually only two color resistors with different colors are stacked to achieve the shading effect, but due to the influence of the manufacturing process, the slope of the side wall of the bottom layer color resistor is large, and the color resistor covering the bottom layer color resistor cannot form complete covering, so that light reflected or refracted from a metal wire leaks out from the uncovered part of the bottom layer color resistor, and the shading effect of the double-layer color resistor is not ideal.
In order to solve the above problems, the present application specifically improves the structure of the stacked color resistor 114; by arranging the laminated color resistor 114 above the passivation layer 113 between two adjacent pixel areas 140 and corresponding to the position of the metal line 112, the first color resistor 115 and the second color resistor 121 are used for forming light shielding after being stacked, and by arranging one or more continuous step parts 116 on the side surface of the first color resistor 115 and forming one or more continuous step parts 116, the steepness of the side surface of the first color resistor 115 is reduced, so that the slope of the side surface of the first color resistor 115 is more gentle after being formed, the second color resistor 121 is more easily and completely covered above the first color resistor 115, the first color resistor 115 is wrapped, light reflected or refracted from the metal layer can be shielded by the laminated color resistor 114 no matter which angle the light enters the laminated color resistor 114, the light shielding effect after the first color resistor 115 and the second color resistor 121 are stacked is further improved, and the peripheral area of the pixel areas 140 is effectively improved, due to the light leakage problem generated after the metal line 112 is light-reflected.
By adopting the design of the laminated color resistor 114, the number of the stacked color resistors is not limited to two of the first color resistor 115 and the second color resistor 121, and other numbers of color resistors can be stacked, and the stacking between the two color resistors of the first color resistor 115 and the second color resistor 121 is only used for illustration.
The color resists 114 can be applied to a COA substrate or a general liquid crystal display panel 100, and the present application will be described by taking the COA substrate as an example.
As shown in fig. 2, there are at least two step portions 116 in the present application, at least two step portions 116 are sequentially arranged along the passivation layer 113 toward the substrate 111, widths of the at least two step portions 116 in the cross-sectional direction sequentially increase from the passivation layer 113 toward the substrate 111, and heights of the at least two step portions 116 sequentially decrease from the passivation layer 113 toward the substrate 111. The following description is given by taking four specific steps 116 as an example:
the step portion 116 includes a first step portion 117, a second step portion 118, a third step portion 119 and a fourth step portion 120, the first step portion 117, the second step portion 118, the third step portion 119 and the fourth step portion 120 are sequentially arranged along the passivation layer 113 toward the substrate 111, widths of the first step portion 117, the second step portion 118, the third step portion 119 and the fourth step portion 120 in the cross-sectional direction gradually increase, and heights of the first step portion 117, the second step portion 118, the third step portion 119 and the fourth step portion 120 sequentially decrease from the passivation layer 113 toward the substrate 111.
The side surface of the first color resistor 115 is provided with four step parts 116, the shape of the side surface of the first color resistor 115 is improved through a first step part 117, a second step part 118, a third step part 119 and a fourth step part 120 which are sequentially connected, the gradient of the side slope of the first color resistor 115 is gradually reduced along with the gradual increase of the width from the first step part 117 to the fourth step part 120 and the gradual reduction of the height, so that the side slope of the first color resistor 115 is more gentle, the second color resistor 121 is more easily covered and wrapped above the first color resistor 115, meanwhile, the shielding area of the first color resistor 115 is expanded to a certain extent, after light irradiates on the metal wire 112 to be refracted or reflected, the light can be completely shielded by the laminated color resistor 114 formed by stacking the first color resistor 115 and the second color resistor 121, and the situation that part of the light leaks from the first color resistor 115 can not occur, further improving the light-shielding effect of the stacked color resists 114 at the periphery of the pixel region 140, effectively preventing the array substrate 110 from light leakage caused by the refraction or reflection of the metal wires 112 to the light, and improving the display quality of the display panel 100.
Further, as shown in fig. 3, fig. 3 is a schematic diagram of a third embodiment of the array substrate of the present application, and the embodiment shown in fig. 3 is based on another modification of fig. 2, in order to make the slope of the side surface of the first color resist 115 become more gradual, so that the second color resist 121 can more easily cover and wrap the entire first color resist 115, an angle of inclination of the step portions 116 may also be designed, at least two step portions 116 are sequentially arranged along the passivation layer 113 toward the substrate 111, at least two step portions 116 each have a first side inclined to the substrate 111 and a second side parallel to the substrate 111, and an included angle between the first side and the second side of at least two step portions 116 sequentially increases from the passivation layer 113 toward the substrate 111. Specifically, four stepped portions are exemplified:
the inclination angles of the first step portion 117, the second step portion 118, the third step portion 119 and the fourth step portion 120 are adjusted as follows:
the first step 117, the second step 118, the third step 119, and the fourth step 120 each have a first side 210 inclined to the substrate 111 and a second side 220 parallel to the substrate 111, and angles of an included angle α between the first side 210 and the second side 220 of the first step 117, the second step 118, the third step 119, and the fourth step 120 increase in order.
By gradually increasing the included angle between the first step 117, the second step 118, the third step 119 and the fourth step 120, the slope of the side surface of the first color resistor 115 is gradually decreased from top to bottom, and becomes gradually gentle, so that the second color resistor 121 can better completely cover the first color resistor 115, and light reflected or refracted from the metal layer can be shielded by the stacked color resistor 114 no matter which angle the light enters the stacked color resistor 114, and cannot penetrate through the stacked color resistor 114, so that the light shielding effect after the first color resistor 115 and the second color resistor 121 are stacked is further improved, the peripheral area of the pixel area 140 is effectively improved, and the problem of light leakage generated after the light reflection of the metal wire 112 is solved.
It should be noted that, for sake of space limitation, the embodiment of the present application only uses four steps 116 as an example, in order to make the slope of the side surface of the first color resistor 115 become more gradual, the slope of the side surface of the first color resistor 115 is reduced by multiple steps, and five, six or other numbers of steps are adopted in a reasonable design, so as to achieve the above effect, which is not specifically limited herein.
In this application, the first color resistor 115 is a blue color resistor, and the second color resistor 121 is a red color resistor. Because the blue color resistor has low light transmittance and good light shielding effect, the blue color resistor is arranged below the second color resistor 121 as the first color resistor 115, when light is reflected and refracted by the metal wire 112, the light first contacts the blue color resistor, the blue color resistor with good light shielding performance shields part of the light, and the red color resistor is used as the second color resistor 121 to stack with the blue color resistor to form mixed color, so as to further form the light shielding effect.
In addition, in order to realize the light and thin production of the array substrate 110, the size of the additional stacked color resistor 114 is optimized to a certain extent, the thickness ranges of the first color resistor 115 and the second color resistor 121 are both 1 micrometer to 2.5 micrometers, the thickness of the first color resistor 115 is greater than that of the second color resistor 121, and the width of the first color resistor 115 is smaller than that of the second color resistor 121.
Through the above design, the thickness of the stacked color resistor 114 can reach the thickness of the original single-layer color resistor, the overall thickness of the array substrate 110 is not increased, and meanwhile, the thickness of the first color resistor 115 is larger than that of the second color resistor 121, so that the first color resistor 115 can be used for manufacturing multi-step steps more easily, and the slope of the side surface of the first color resistor 115 is smoothed.
Further, the area of the orthographic projection of the second color resistor 121 on the substrate base 111 is larger than one fourth to one third of the area of the orthographic projection of the first color resistor 115 on the substrate base 111.
The area of the orthographic projection of the second color resistor 121 on the substrate 111 is larger than one fourth to one third of the area of the orthographic projection of the first color resistor 115 on the substrate 111, so that the second color resistor 121 has a smaller occupied area under the condition that the second color resistor completely covers the first color resistor 115 to effectively shield the reflected or refracted light of the metal wire 112, and the use space of the array substrate 110 can be effectively saved, so that more space can be provided on the array substrate 110 for manufacturing other electronic devices, the cost is controlled, and the structure of the array substrate 110 is optimized.
Fig. 4 is a schematic diagram of a first embodiment of a display panel of the present application, and as shown in fig. 4, the present application further discloses a display panel 100, which includes a glass substrate 130 and a spacer 160, the display panel 100 further includes the array substrate 110, the array substrate 110 further includes a planarization layer 150, the planarization layer 150 covers the substrate 111 and is disposed above the stacked color resists 114; the glass substrate 130 and the array substrate 110 are arranged in a box-to-box manner, one end of the spacer 160 is fixed on the glass substrate 130, and the other end abuts against the planarization layer 150 corresponding to the first color resistor 115 and the second color resistor 121; the second color resistor 121 is provided with a first groove 122 at a position corresponding to the spacer 160, the planarization layer 150 is covered on the first groove 122 to form a second groove 151, and one end of the spacer 160 abuts against the second groove 151.
Since one end of the spacer 160 abuts against the planarization layer 150 after the glass substrate 130 and the array substrate 110 are aligned with each other, the spacer 160 is bent and deformed when being subjected to an external force, and the spacer 160 is easily moved on the planarization layer 150 to release the stress, which easily causes the spacer 160 to slide toward the pixel region 140, thereby scratching the alignment film of the pixel region 140 and affecting the normal display of the display panel 100, and simultaneously, in order to avoid the occurrence of significant misalignment between the spacer 160 and the color barrier stack 114 due to the large sliding distance of the spacer 160 and affecting the light shielding effect of the whole periphery of the pixel region 140, in this embodiment, after the second color barrier 121 is covered on the first color barrier 115 to form the color barrier stack 114, a groove, i.e. the first groove 122, can be formed by etching above the second color barrier 121, so that the planarization layer 150 covering the upper portion of the color barrier stack 114 is laid, the second groove 151 is formed at a position corresponding to the first groove 122, when the two substrates are paired, one end of the spacer 160 abuts against the second groove 151, and the second groove 151 limits the displacement of the spacer 160, so as to prevent the spacer 160 from sliding under the action of an external force and sliding toward the pixel region 140, thereby scratching the alignment film of the pixel region 140 and causing abnormal display of the display panel 100.
Fig. 5 is a schematic view of a display panel according to a second embodiment of the present application, and as shown in fig. 5, a non-slip layer 170 is covered on a portion of the planarization layer 150 close to the spacer 160 and corresponding to the second color resistor 121, and the non-slip layer 170 is made of a heat-resistant insulating material.
Different from the previous embodiment, in the present embodiment, the anti-slip layer 170 is disposed on the planarization layer 150 at a position corresponding to the second color resists 121, that is, the anti-slip layer 170 is disposed at a position opposite to the spacer 160, and the friction force of the spacer 160 on the planarization layer 150 is increased by the anti-slip layer 170, so that when the spacer 160 is deformed by an external force, the sliding distance generated for releasing the stress is effectively shortened by the anti-slip layer 170, and thus the spacer 160 is not easy to slide toward the pixel region 140, and the alignment film of the pixel region 140 is prevented from being scratched by the spacer 160, and meanwhile, the spacer 160, the stacked color resists 114, and the metal wires 112 are prevented from being significantly misaligned, so that the light-leakage-proof effect of the whole display panel 100 is enhanced. The display quality of the display panel 100 is further improved.
Fig. 6 is a schematic view of a third embodiment of the display panel of the present application, and the embodiment shown in fig. 6 is based on the improvement of fig. 5, as shown in fig. 6, a plurality of protrusions 171 are uniformly disposed on the surface of the anti-slip layer 170 on the side close to the spacer 160, and the heights of the plurality of protrusions 171 are the same.
Different from the previous embodiment, in the present embodiment, the continuous protrusions 171 are covered on the surface of the anti-slip layer 170 close to the spacer 160, and the surface area of the anti-slip layer 170 is increased by the continuous protrusions 171, so that when the spacer 160 abutting on the anti-slip layer 170 is subjected to an external force, the stress is released more easily by the anti-slip layer 170, and thus the amount of bending deformation of the spacer 160 due to the external force can be effectively reduced, and the display panel 100 can maintain a stable box thickness; meanwhile, the continuous protrusions 171 can roughen the surface of the anti-slip layer 170, the anti-slip layer 170 with the continuous protrusions 171 can gradually attenuate the acting force on the spacer 160, so that the sliding range of the spacer 160 is reduced, the spacer 160 is more difficult to slide out of the second groove 151, the situation that the spacer 160 slides towards the pixel area 140 and scratches the alignment film of the pixel area 140 to cause light leakage and abnormal display is avoided, and the display quality of the display panel 100 is further improved.
Fig. 7 is a schematic view of an embodiment of a display device of the present application, and as shown in fig. 7, the present application further discloses a display device 10 including a backlight module 200, wherein the display device 10 further includes the display panel 100, and the display panel 100 is disposed on one side of a light emitting surface of the backlight module 200. The backlight module 200 is used for providing light required by normal display for the display panel 100, and after the light in the backlight module 200 is emitted, the light firstly passes through the array substrate 110 in the display panel 100, and the light leakage phenomenon caused by reflection or refraction of the metal wire 112 due to the fact that the light irradiates the metal wire 112 in the array substrate 110 can be effectively reduced through the array substrate 110, so that the quality of the display device 10 is further improved.
The display device 10 of the present application may be a computer, a television, and other electronic devices with a display screen, and is not limited in particular.
It should be noted that the inventive concept of the present application can form many embodiments, but the present application has a limited space and cannot be listed one by one, so that, on the premise of no conflict, any combination between the above-described embodiments or technical features can form a new embodiment, and after the embodiments or technical features are combined, the original technical effect will be enhanced.
The foregoing is a more detailed description of the present application in connection with specific alternative embodiments, and the specific implementations of the present application are not to be considered limited to these descriptions. For those skilled in the art to which the present application pertains, several simple deductions or substitutions may be made without departing from the concept of the present application, and all should be considered as belonging to the protection scope of the present application.
Claims (10)
1. An array substrate comprises a substrate base plate, a plurality of metal wires and a passivation layer, wherein the passivation layer is covered on the substrate base plate, the plurality of metal wires are arranged between the substrate base plate and the passivation layer, and a plurality of pixel regions are divided;
the array substrate is characterized by further comprising a laminated color resistor, wherein the orthographic projection of the laminated color resistor on the substrate covers the orthographic projection of the metal wire on the substrate, the laminated color resistor is arranged above the passivation layer and positioned between two adjacent pixel areas, and the width of the laminated color resistor is larger than that of the metal wire;
the laminated color resistor at least comprises a first color resistor and a second color resistor, the second color resistor is stacked above the first color resistor, and the second color resistor covers and wraps the first color resistor.
2. The array substrate of claim 1, wherein the first color resistor, the second color resistor and the metal line have cross-sectional shapes matching each other; the side wall of the first color resistor covers the orthographic projection of the side wall of the metal wire in the direction vertical to the first color resistor; and the side wall of the first color resistor and the side wall of the second color resistor.
3. The array substrate of claim 2, wherein a side wall of the first color resistor, which is away from the metal line, has a step, and the second color resistor covers a surface of the first color resistor and the step.
4. The array substrate according to claim 3, wherein there are at least two step portions, at least two of the step portions are sequentially arranged along the passivation layer toward the substrate, and the width of at least two of the step portions in the cross-sectional direction increases sequentially from the passivation layer toward the substrate, and the height of at least two of the step portions decreases sequentially from the passivation layer toward the substrate.
5. The array substrate of claim 3, wherein there are at least two step portions, at least two step portions are sequentially arranged along the passivation layer in a direction toward the substrate, each of the at least two step portions has a first side inclined to the substrate and a second side parallel to the substrate, and an included angle between the first side and the second side of the at least two step portions increases sequentially from the passivation layer in a direction toward the substrate.
6. The array substrate of claim 1, wherein an area of an orthographic projection of the second color resistor on the substrate is greater than one quarter to one third of an area of an orthographic projection of the first color resistor on the substrate.
7. The array substrate of any one of claims 1 to 6, wherein the first color resistance is a blue color resistance, and the second color resistance is a red color resistance; or the first color resistance is a red color resistance, and the second color resistance is a blue color resistance;
the thickness range of the first color resistance and the second color resistance is 1-2.5 micrometers, the thickness of the first color resistance is larger than that of the second color resistance, and the width of the first color resistance is smaller than that of the second color resistance.
8. A display panel comprising a glass substrate and a spacer, wherein the display panel further comprises an array substrate according to any one of claims 1 to 7, the array substrate further comprising a planarization layer covering the substrate and disposed over the stacked color resists;
the glass substrate and the array substrate are arranged in a box pair mode, one end of the spacer is fixed on the glass substrate, and the other end of the spacer abuts against the planarization layer corresponding to the first color resistor and the second color resistor;
the second color resist is provided with a first groove corresponding to the position of the spacer, the planarization layer covers the first groove to form a second groove, and one end of the spacer is abutted to the second groove.
9. The display panel according to claim 8, wherein the planarization layer is disposed on a side of the spacer and covers an anti-slip layer corresponding to the second color resistor, and the anti-slip layer is made of a heat-resistant insulating material;
the surface of the anti-skid layer, which is close to one side of the shock insulator, is uniformly provided with a plurality of bulges, and the heights of the bulges are the same.
10. A display device comprising a backlight module, wherein the display device further comprises the display panel as claimed in any one of claims 8 or 9, the display panel being disposed on one side of the light exit surface of the backlight module.
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| CN202111657299.4A CN114326233A (en) | 2021-12-30 | 2021-12-30 | Array substrate, display panel and display device |
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| CN202111657299.4A CN114326233A (en) | 2021-12-30 | 2021-12-30 | Array substrate, display panel and display device |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024044879A1 (en) * | 2022-08-29 | 2024-03-07 | 京东方科技集团股份有限公司 | Display substrate and touch-control display apparatus |
| WO2024060240A1 (en) * | 2022-09-23 | 2024-03-28 | 京东方科技集团股份有限公司 | Display panel and method for manufacturing display panel |
Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09120074A (en) * | 1995-08-18 | 1997-05-06 | Toshiba Electron Eng Corp | Color filter substrate and liquid crystal display element formed by using the same |
| CN1677207A (en) * | 2004-03-30 | 2005-10-05 | Lg.菲利浦Lcd株式会社 | Liquid crystal display and mfg. method |
| CN105093746A (en) * | 2015-08-10 | 2015-11-25 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN110333635A (en) * | 2019-06-24 | 2019-10-15 | 深圳市华星光电半导体显示技术有限公司 | A kind of array substrate and display panel |
| CN111025731A (en) * | 2019-12-10 | 2020-04-17 | 深圳市华星光电半导体显示技术有限公司 | Color resistance stacking structure and display panel |
| CN111208687A (en) * | 2020-01-13 | 2020-05-29 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
| CN211088277U (en) * | 2019-11-28 | 2020-07-24 | 上海视欧光电科技有限公司 | Display panel and display device |
| CN111708214A (en) * | 2020-06-30 | 2020-09-25 | 厦门天马微电子有限公司 | Display panel and display device |
| CN112327536A (en) * | 2020-11-03 | 2021-02-05 | Tcl华星光电技术有限公司 | Display panel and display device |
| CN113238412A (en) * | 2021-04-22 | 2021-08-10 | 武汉华星光电技术有限公司 | Liquid crystal display panel and display device |
| CN113485039A (en) * | 2021-05-31 | 2021-10-08 | 惠科股份有限公司 | Array substrate and display panel |
| CN113514993A (en) * | 2021-04-20 | 2021-10-19 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
-
2021
- 2021-12-30 CN CN202111657299.4A patent/CN114326233A/en active Pending
Patent Citations (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH09120074A (en) * | 1995-08-18 | 1997-05-06 | Toshiba Electron Eng Corp | Color filter substrate and liquid crystal display element formed by using the same |
| CN1677207A (en) * | 2004-03-30 | 2005-10-05 | Lg.菲利浦Lcd株式会社 | Liquid crystal display and mfg. method |
| CN105093746A (en) * | 2015-08-10 | 2015-11-25 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN110333635A (en) * | 2019-06-24 | 2019-10-15 | 深圳市华星光电半导体显示技术有限公司 | A kind of array substrate and display panel |
| CN211088277U (en) * | 2019-11-28 | 2020-07-24 | 上海视欧光电科技有限公司 | Display panel and display device |
| CN111025731A (en) * | 2019-12-10 | 2020-04-17 | 深圳市华星光电半导体显示技术有限公司 | Color resistance stacking structure and display panel |
| CN111208687A (en) * | 2020-01-13 | 2020-05-29 | 深圳市华星光电半导体显示技术有限公司 | Display panel and display device |
| CN111708214A (en) * | 2020-06-30 | 2020-09-25 | 厦门天马微电子有限公司 | Display panel and display device |
| CN112327536A (en) * | 2020-11-03 | 2021-02-05 | Tcl华星光电技术有限公司 | Display panel and display device |
| CN113514993A (en) * | 2021-04-20 | 2021-10-19 | 厦门天马微电子有限公司 | Array substrate, display panel and display device |
| CN113238412A (en) * | 2021-04-22 | 2021-08-10 | 武汉华星光电技术有限公司 | Liquid crystal display panel and display device |
| CN113485039A (en) * | 2021-05-31 | 2021-10-08 | 惠科股份有限公司 | Array substrate and display panel |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2024044879A1 (en) * | 2022-08-29 | 2024-03-07 | 京东方科技集团股份有限公司 | Display substrate and touch-control display apparatus |
| WO2024060240A1 (en) * | 2022-09-23 | 2024-03-28 | 京东方科技集团股份有限公司 | Display panel and method for manufacturing display panel |
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