CN114305437B - Electrocardiogram feature detection device and method, and electrocardiograph feature detection system - Google Patents

Electrocardiogram feature detection device and method, and electrocardiograph feature detection system Download PDF

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CN114305437B
CN114305437B CN202011080007.0A CN202011080007A CN114305437B CN 114305437 B CN114305437 B CN 114305437B CN 202011080007 A CN202011080007 A CN 202011080007A CN 114305437 B CN114305437 B CN 114305437B
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CN114305437A (en
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刘恩福
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Oppo Chongqing Intelligent Technology Co Ltd
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Oppo Chongqing Intelligent Technology Co Ltd
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Abstract

The present disclosure relates to the technical field of biomedical engineering, and in particular, to an electrocardiograph feature detection device and method, and an electrocardiograph feature detection system, where the device includes: the signal acquisition module is used for acquiring initial electrocardiosignals and impedance change values of the detected object; the first input end of the operational amplification module is connected with the signal acquisition module and used for receiving an initial electrocardiosignal, and the second input end of the operational amplification module is used for receiving a cancellation signal; the motion artifact estimation module comprises a third input end and a second output end, wherein the third input end is connected with the reference signal generation module and the first output end, and the second output end is connected with the second input end and is used for generating a counteracting signal according to an output signal of the operational amplification module and the reference signal and feeding the counteracting signal back to the second input end of the operational amplification module. According to the technical scheme, the computing resource is saved, the design cost of signal acquisition is reduced, and the energy consumption of signal acquisition is reduced.

Description

Electrocardiogram feature detection device and method, and electrocardiograph feature detection system
Technical Field
The present disclosure relates to the field of biomedical engineering, and in particular, to an electrocardiographic feature detection device and method, and an electrocardiographic feature detection system.
Background
With the increasing development of wearable devices, health awareness of users is improved, and health monitoring functions of the wearable devices are receiving more widespread attention. The central electrogram (Electrocardiograph ECG) monitoring function provides the user with more comprehensive health information. In order to ensure the appearance and portability of the wearable device, a dry electrode is often adopted to collect signals for a monitoring electrode of an electrocardiosignal of the wearable device; the dry electrode signal is susceptible to movement artifacts.
In the related art, in order to reduce the influence of motion artifacts, the algorithm suppression of a digital end is realized, and in order to achieve an effective effect but good user experience, the algorithm is generally complex, the higher the calculation force requirement is, the higher the power consumption of a signal acquisition system is, and meanwhile, the higher the cost is.
It should be noted that the information disclosed in the above background section is only for enhancing understanding of the background of the present disclosure and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
The disclosure aims to provide an electrocardiograph feature detection device and method and an electrocardiograph feature detection system, and further overcome the defects of higher calculation cost, higher power consumption cost and higher design cost of the electrocardiograph feature detection device in the related art at least to a certain extent.
According to a first aspect of the present disclosure, there is provided an electrocardiographic feature detection device including:
the signal acquisition module is used for acquiring initial electrocardiosignals and impedance change values of the detected object;
the reference signal generation module is connected with the signal acquisition module and is used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected with the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
the motion artifact estimation module comprises a third input end and a second output end, wherein the third input end is connected with the reference signal generation module and the first output end, and the second output end is connected with the second input end and is used for generating the offset signal according to the output signal of the operational amplification module and the reference signal and feeding the offset signal back to the second input end of the operational amplification module.
According to a second aspect of the present disclosure, there is provided an electrocardiographic feature detection method, including:
collecting an initial electrocardiosignal and an impedance change value of a detected object;
generating a reference signal according to the impedance variation value;
obtaining an output signal according to the electrocardiosignal and the offset signal through an operational amplification module;
and generating the offset signal according to the output signal of the operational amplification module and the reference signal and feeding back the offset signal to the operational amplification module.
According to a third aspect of the present disclosure, there is provided an electrocardiographic feature detection system comprising at least one electrocardiographic feature detection device, a processor, and a display apparatus;
wherein, the electrocardio characteristic detection device includes:
the signal acquisition module is used for acquiring initial electrocardiosignals and impedance change values
The reference signal generation module is connected with the signal acquisition module and is used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected with the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
the motion artifact estimation module comprises a third input end and a second output end, wherein the third input end is connected with the reference signal generation module and the first output end, and the second output end is connected with the second input end and is used for generating the offset signal according to the output signal of the operational amplification module and the reference signal and feeding the offset signal back to the second input end of the operational amplification module;
The processor is used for receiving the output signal, generating an electrocardiogram according to the output signal and transmitting the electrocardiogram to the display equipment;
and the display device is connected with the processor and used for receiving and displaying the electrocardiogram.
According to the electrocardio characteristic detection device provided by the embodiment of the disclosure, the signal acquisition module acquires the initial electrocardio signal and the impedance change value of the detected object, and the reference signal generation module is utilized to generate the reference signal according to the impedance change value. The operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected with the signal acquisition module and used for receiving an initial electrocardiosignal, and the second input end is used for receiving a cancellation signal; the motion artifact estimation module comprises a third input end and a second output end, wherein the third input end is connected with the reference signal generation module and the first output end, and the second output end is connected with the second input end and is used for generating a counteracting signal according to an output signal of the operational amplification module and the reference signal and feeding the counteracting signal back to the second input end of the operational amplification module. Compared with the prior art, the offset signal is generated by utilizing the output signal and the reference signal of the operational amplification module and fed back to the second input end of the operational amplification module for eliminating the interference signal in the initial electrocardiosignal, the interference signal in the initial electrocardiosignal can be eliminated without setting a suppression algorithm of a digital end, namely, the motion artifact is eliminated, the calculation resource is saved, and the design cost of electrocardiosignal acquisition can be reduced without setting a complex algorithm on the digital end, and meanwhile, the energy consumption of signal acquisition can be reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the disclosure and together with the description, serve to explain the principles of the disclosure. It will be apparent to those of ordinary skill in the art that the drawings in the following description are merely examples of the disclosure and that other drawings may be derived from them without undue effort. In the drawings:
FIG. 1 schematically illustrates a schematic diagram of an electrocardiographic feature detection device in an exemplary embodiment of the present disclosure;
FIG. 2 schematically illustrates a schematic diagram of an electrocardiographic feature detection device after refining an operational amplification module in an exemplary embodiment of the present disclosure;
fig. 3 schematically illustrates a schematic diagram of a motion artifact estimation module in an exemplary embodiment of the present disclosure;
fig. 4 schematically illustrates a detailed structural schematic of a motion artifact estimation module in an exemplary embodiment of the present disclosure;
FIG. 5 schematically illustrates a specific structural diagram of a motion artifact estimation module in an exemplary embodiment of the present disclosure;
FIG. 6 schematically illustrates a flow chart of an electrocardiographic feature detection device in an exemplary embodiment of the present disclosure;
fig. 7 schematically illustrates a flowchart of generating the cancellation signal from the output signal of the operational amplification module and the reference signal in an exemplary embodiment of the present disclosure;
FIG. 8 schematically illustrates a schematic diagram of an electrocardiographic feature detection system in an exemplary embodiment of the present disclosure;
fig. 9 schematically illustrates a flowchart of center electrogram generation according to an exemplary embodiment of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. However, the exemplary embodiments may be embodied in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus a repetitive description thereof will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in software or in one or more hardware modules or integrated circuits or in different networks and/or processor devices and/or microcontroller devices.
With the increasing development of wearable devices, health awareness of users is improved, and a feasibility scheme (particularly, health monitoring in cardiovascular aspect) is provided for health management of users, so that health monitoring functions of the wearable devices are receiving more extensive attention. The central electrogram (Electrocardiograph ECG) monitoring function provides the user with more comprehensive health information. Compared with the traditional electrocardiograph, the front-end signal acquisition is carried out by adopting a wet electrode, and in order to ensure the appearance and portability of the wearable equipment, the monitoring electrode of the ECG (electrocardiogram) is always used for acquiring signals by adopting a dry electrode; dry electrode signals are more susceptible to motion artifacts than wet electrodes. Motion artifacts are typically a type of affecting the performance of an ECG signal due to skin stretching, electrode movement, electrode impedance changes, etc., which is typically superimposed on the ECG signal by a signal of relatively large amplitude. Therefore, to obtain a user experience with excellent ECG detection function, the quality of acquiring the electrocardiographic signals of the wearable device needs to be improved, and a method for effectively suppressing motion artifacts is needed.
In the related art, in order to reduce the influence of motion artifacts, the input dynamic range of the signal acquisition front end is required to be wider, the gain of the front end amplifier is reduced, the resolution/sampling rate of the analog-digital converter (Analog to Digital Converter ADC) is improved, and finally the suppression is performed through algorithms such as adaptive filtering of the digital end. The fact of reducing the gain of front-end amplification is the sacrifice of the signal-to-noise ratio of the signal acquisition system; meanwhile, the high-resolution ADC is adopted, so that the cost and the power consumption of the acquisition system are increased, and the increase of the power consumption is unfavorable for the wearable equipment; the algorithm is realized through the algorithm inhibition of the digital end, in order to achieve an effective effect but have good user experience, the algorithm is generally complex, for example, complex algorithms such as a filter bank, wavelet transformation, principal component analysis and the like are used, a certain requirement is required for the algorithm controller to realize the calculation power, and the higher the calculation power requirement is, the higher the power consumption of the signal acquisition system is.
Based on the above drawbacks, the present disclosure first proposes an electrocardiographic feature detection device, which can solve one or more of the above problems to some extent, and referring to fig. 1, the electrocardiographic feature detection device may include a signal acquisition module 110, a reference signal generation module 120, an operational amplification module 130, and a motion artifact estimation module 140. The signal acquisition module 110 is used for acquiring an initial electrocardiosignal and an impedance change value of the detected object; the reference signal generating module 120 is connected to the signal collecting module, and is configured to generate a reference signal according to the impedance change value; the operational amplification module 130 includes a first input end, a second input end and a first output end, wherein the first input end is connected to the signal acquisition module 110 and is used for receiving the initial electrocardiosignal, and the second input end is used for receiving the cancellation signal; the motion artifact estimation module 140 includes a third input end and a second output end, the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end, and is configured to generate a cancellation signal according to the output signal of the operational amplification module 130 and the reference signal and feed back the cancellation signal to the second input end of the operational amplification module 130.
Compared with the prior art, the offset signal is generated by using the output signal and the reference signal of the operational amplification module 130 and fed back to the second input end of the operational amplification module 130 for eliminating the interference signal in the initial electrocardiosignal, and the interference signal in the initial electrocardiosignal can be eliminated without setting a suppression algorithm of a digital end, namely, the motion artifact is eliminated, so that the computing resource is saved, the design cost of electrocardiosignal acquisition can be reduced because the complex algorithm is not required to be set at the digital end, and meanwhile, the energy consumption of signal acquisition can be reduced.
In an example embodiment of the present disclosure, the signal acquisition module 110 may include at least one electrocardiograph signal acquisition unit and an impedance acquisition unit, where the electrocardiograph signal acquisition unit may be used to acquire the initial electrocardiograph signal, and the electrocardiograph signal acquisition unit may be acquired by a three-lead electrocardiograph electrode, and a circuit structure of the electrocardiograph signal acquisition unit is substantially the same as a circuit structure of a signal acquisition portion of a commercial electrocardiograph signal detector, for example, an electrocardiograph signal acquisition module, an electrocardiograph sensor, and the like. The present exemplary embodiment is not particularly limited.
In the present exemplary embodiment, the initial electrocardiographic signals acquired by the signal acquisition module 110 include a target electrocardiographic signal and an interference signal, where the interference signal is generated by an impedance change of the detected object.
In this exemplary embodiment, the impedance acquisition unit is configured to acquire an impedance change of the detected object, that is, an impedance change when an electrocardiographic signal is acquired, and the impedance acquisition unit may be an impedance tester, or may calculate an impedance change by sensing a change in voltage and current, and is not specifically limited in this exemplary embodiment.
In an example embodiment of the present disclosure, the reference signal generating module 120 may include a current providing unit and a generating unit, wherein the current providing unit is configured to provide a constant current signal, and the current signal may be greater than or equal to 8nA and less than or equal to 12nA, and may specifically be, for example, 10nA, 10.5nA, and the like, and is not specifically limited in this example embodiment.
The generating module is used for calculating a reference signal according to the current signal and the impedance change value, and the specific calculation mode of the reference signal can be obtained by multiplying the current signal and the impedance change value.
In an example embodiment of the present disclosure, referring to fig. 2, the operational amplification module 130 may include a first input terminal connected to the signal acquisition module 110 for receiving the initial cardiac signal, a second input terminal for receiving the cancellation signal, and a first output terminal.
In this exemplary embodiment, referring to fig. 2, the operational amplification module 130 may include an operational amplifier 131, a first load 210, a second load 220, and a third load, where the operational amplifier 131 may include a first input terminal, a second input terminal, and a first output terminal, the first input terminal is connected to the signal acquisition module 110 and is used for receiving an initial cardiac signal, the second input terminal is used for receiving a cancellation signal, the first load 210 is connected between the first output terminal and the first input terminal, and the second load 220 is connected between the signal acquisition module 110 and the first output terminal; a third load 230 is connected between the second input and the motion artifact estimation module 140.
In this exemplary embodiment, the resistances of the first load 210, the second load 220, and the third load 230 may be equal, for example, the resistances of the first load 210, the second load 220, and the third load 230 may be 10 ohms, in another exemplary embodiment of the present disclosure, the resistances of the first load 210, the second load 220, and the third load may be different, for example, the resistances of the first load 210 may be 10 ohms, the resistances of the second load 220 may be 12 ohms, the resistances of the third load may be 11 ohms, and the resistances of the first load 210, the second load 220, and the third load 230 may be customized according to the needs of the user, which is not limited in this exemplary embodiment.
In one example embodiment of the present disclosure, referring to fig. 3, the motion artifact estimation module 140 may include a first cancellation circuit 310, a second cancellation circuit 330, a weight distribution circuit 340, and a combining circuit 320. Wherein the first cancellation circuit 310 is configured to generate a first sub-cancellation signal according to the reference signal and the first weight value; the second cancellation circuit 330 is configured to phase shift the reference signal to obtain a target signal, and generate a second sub-cancellation signal according to the target signal and a second weight value; the weight distribution circuit 340 is configured to determine a first weight value according to a reference signal and an output signal, and determine a second weight value according to the target signal and the output signal; the synthesizing circuit 320 is configured to synthesize the first sub-cancellation signal and the second sub-cancellation signal into a cancellation signal.
In this exemplary embodiment, the first cancellation circuit 310 may include a first transconductance amplifier 311, where an input end of the first transconductance amplifier 311 is connected to the reference signal generating module 120, and an output end of the first transconductance amplifier 311 is connected to the chorus module, where the first transconductance amplifier 311 may further include a gain circuit, where the gain circuit may further include a voltage signal and a sliding resistor, where a magnitude of the voltage signal may be 1V or more and 1.8V or less, for example, 1.5V, 1.2V, etc., and in this exemplary embodiment, a maximum resistance of the sliding resistor may be 5mΩ or more and 10mΩ or less, for example, 6mΩ, 5.5mΩ, etc., and in this exemplary embodiment, the maximum resistance of the sliding resistor may not be specifically limited. The actual connection resistance of the sliding resistor is determined according to the weight distribution circuit 340, so as to determine the gain of the first transconductance amplifier 311.
In the present exemplary embodiment, referring to fig. 4, the second cancellation circuit 330 may include a low-pass filter circuit and a second transconductance amplifier 332, where the low-pass filter circuit is used to phase shift the reference signal to obtain the target signal, and the low-pass filter circuit is a filter circuit in the related art, for example, an active low-pass filter 331, a passive low-pass filter 331, and the like, which is not specifically limited in the present exemplary embodiment.
In this exemplary embodiment, the input end of the second transconductance amplifier 332 is connected to the low-pass filter circuit, and the output end thereof is connected to the synthesizing circuit 320, where the second transconductance amplifier 332 may further include a gain circuit, where the gain circuit may further include a voltage signal and a sliding resistor, where the magnitude of the voltage signal may be 1V or more and less and 1.8V, for example, 1.5V, 1.2V, etc., and is not specifically limited in this exemplary embodiment, and the maximum resistance of the sliding resistor may be 5mΩ or more and less and 10mΩ, for example, 6mΩ, 5.5mΩ, etc., and is not specifically limited in this exemplary embodiment. The actual on-resistance of the slide varistor is determined according to the weight distribution circuit 340.
In this example embodiment, referring to fig. 5, the weight distribution circuit 340 may include a first sub-weight distribution circuit and a second word weight distribution circuit 340, wherein the first sub-weight distribution circuit 340 may be used to determine a first weight value according to a reference signal and an output signal, wherein the first sub-weight distribution circuit includes a first comparator 511, a first logic circuit 512, a first counter 513, and a second comparator 530, wherein the first comparator 511 input terminal is connected to the reference signal generation module 120; the first logic circuit 512 includes a fourth input terminal and a fifth input terminal, the fourth input terminal is connected to the output terminal of the first comparator 511, and the first logic circuit 512 outputs a high level when the signs of the input signals of the fourth input terminal and the fifth input terminal are the same; the input end of the first counter 513 is connected to the output end of the first logic circuit 512, and the output end is connected to the first transconductance amplifier 311, so as to determine the gain of the first transconductance amplifier 311 according to the output signal of the counter; the second comparator 530 has an input terminal connected to the first output terminal and an output terminal connected to the fifth input terminal.
In the present exemplary embodiment, the first comparator 511 may be used to determine the magnitudes of the reference signal and 0, that is, determine the positive and negative of the reference signal, and when the reference signal is greater than 0, the first comparator 511 outputs 1, that is, high, and when the reference signal is less than 0, the first comparator 511 outputs 0, that is, low.
In this exemplary embodiment, the second comparator 530 may be used to determine the magnitudes of the output signal of the operational amplification module 130 and 0, that is, determine the positive and negative of the output signal of the operational amplification module 130, and when the output signal of the operational amplification module 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification module 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The first logic circuit 512 outputs a high level when the output signal of the operational amplifier module 130 and the reference signal have the same sign, and outputs a low level when the output signal of the operational amplifier module 130 and the reference signal have different signs, that is, the first logic circuit 512 may be an exclusive or gate, or may be a logic circuit having a plurality of logic gates capable of realizing the above functions, and is not particularly limited in this exemplary embodiment.
In this exemplary embodiment, the first counter 513 is configured to complete counting according to the output of the first logic circuit 512, and when the output is 1, the counter generates a rising edge, and when the output is 0, the first counter 513 generates an 8-bit binary number with a sign bit to adjust the resistance of the sliding rheostat to adjust the gain of the first transconductance operational amplifier.
In an example embodiment of the present disclosure, the second word weight distribution circuit 340 may include a third comparator 521, a second logic circuit 522, a second counter 523, and a second comparator 530. Wherein the input end of the third comparator 521 is connected to the output end of the low-pass filter circuit; the second logic circuit 522 includes a sixth input terminal and a seventh input terminal, the sixth input terminal is connected to the output terminal of the third comparator 521, and the second logic circuit 522 outputs a high level when the signs of the input signals of the sixth input terminal and the seventh input terminal are the same; the input end of the second counter 523 is connected to the output end of the first logic circuit 512, and the output end is connected to the second transconductance amplifier 332, so as to determine the gain of the second transconductance amplifier 332 according to the output signal of the counter; the second comparator 530 has an input terminal connected to the first output terminal and an output terminal connected to the seventh input terminal.
In the present exemplary embodiment, the third comparator 521 may be configured to determine the magnitudes of the reference signal and 0, that is, determine the positive and negative of the reference signal, and output 1 as the third comparator 521 when the reference signal is greater than 0, that is, output high, and output 0 as the third comparator 521 when the reference signal is less than 0, that is, output low.
In this exemplary embodiment, the second comparator 530 may be used to determine the magnitudes of the output signal of the operational amplification module 130 and 0, that is, determine the positive and negative of the output signal of the operational amplification module 130, and when the output signal of the operational amplification module 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification module 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The second logic circuit 522 outputs a high level when the output signal of the operational amplifier module 130 and the reference signal have the same sign, and outputs a low level when the output signal of the operational amplifier module 130 and the reference signal have different signs, that is, the second logic circuit 522 may be an exclusive or gate, or may be a logic circuit having a plurality of logic gates capable of realizing the above functions, and is not particularly limited in this exemplary embodiment.
In the present exemplary embodiment, the second counter 523 is configured to complete counting according to the output of the second logic circuit 522, and when the output is 1, the counter generates a rising edge, and when the output is 0, the counter generates a falling edge, and the second counter 523 may generate an 8-bit binary number with sign bit to adjust the resistance of the sliding resistor to adjust the gain of the second transconductance amplifier.
In the present exemplary embodiment, the first cancellation signal and the second cancellation signal are generated after the reference signal and the target signal pass through the first transconductance amplifier and the second transconductance amplifier, respectively. The first counteracting signal and the second counteracting signal are current signals.
In the present exemplary embodiment, the synthesizing circuit may combine the first cancellation signal and the second cancellation signal to be cancellation signals in the form of voltage signals, and the synthesizing circuit may be the transimpedance amplifier 540 or other circuit structures capable of realizing the above functions, and is not specifically limited in the present exemplary embodiment.
Compared with the prior art, the offset signal is generated by using the output signal and the reference signal of the operational amplification module 130 and fed back to the second input end of the operational amplification module 130 for eliminating the interference signal in the initial electrocardiosignal, and the interference signal in the initial electrocardiosignal can be eliminated without setting a suppression algorithm of a digital end, namely, the motion artifact is eliminated, so that the computing resource is saved, the design cost of electrocardiosignal acquisition can be reduced because the complex algorithm is not required to be set at the digital end, and meanwhile, the energy consumption of signal acquisition can be reduced. The feedback circuit can effectively inhibit motion artifact at the acquisition end, so that the input range of the acquisition system is reduced, the gain of the front end of a signal can be improved without causing signal saturation distortion, and the signal-to-noise ratio of the whole electrocardiosignal acquisition device is increased.
Further, the present disclosure further provides an electrocardiographic feature detection method, referring to fig. 6, the method may include the following steps:
step S610, collecting initial electrocardiosignals and impedance change values of a detected object;
step S620, generating a reference signal according to the impedance variation value;
step S630, obtaining an output signal according to the electrocardiosignal and the cancellation signal through the operational amplification module 130;
step S640, generating the cancellation signal according to the output signal of the operational amplification module 130 and the reference signal, and feeding back the cancellation signal to the operational amplification module 130.
In an exemplary embodiment of the present disclosure, the details of step S110 to step S130 are already described in detail in the description of the electrocardiographic feature detection device above, and thus are not described herein.
In this exemplary embodiment, referring to fig. 7, the generation of the cancellation signal according to the output signal of the operational amplification module 130 and the reference signal and the feedback to the operational amplification module 130 may include steps S710 to S750, which are specifically as follows:
step S710, determining a first weight value according to the reference signal and the output signal;
Step S720, determining a second weight value according to the target signal and the output signal;
step S730, generating a first sub-cancellation signal according to the reference signal and the first weight value;
step S740, performing phase shift on the reference signal to obtain a target signal, and generating a second sub-cancellation signal according to the target signal and a second weight value;
step S750, synthesizing the first sub-cancellation signal and the second sub-cancellation signal into the cancellation signal.
In the present exemplary embodiment, the steps S710 to S750 will be described in detail when describing the above-mentioned electrocardiographic feature detection device, and thus will not be described here again.
Still further, the present disclosure also provides an electrocardiographic feature detection system, which includes at least one electrocardiographic feature detection device, a processor 870, and a display device 910, where the electrocardiographic feature detection device may include a signal acquisition module 110, a reference signal generation module 120, an operational amplification module 130, and a motion artifact estimation module 140. The signal acquisition module 110 is used for acquiring an initial electrocardiosignal and an impedance change value of the detected object; the reference signal generating module 120 is connected to the signal collecting module, and is configured to generate a reference signal according to the impedance change value; the operational amplification module 130 includes a first input end, a second input end and a first output end, wherein the first input end is connected to the signal acquisition module 110 and is used for receiving the initial electrocardiosignal, and the second input end is used for receiving the cancellation signal; the motion artifact estimation module 140 includes a third input end and a second output end, the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end, and is configured to generate a cancellation signal according to the output signal of the operational amplification module 130 and the reference signal and feed back the cancellation signal to the second input end of the operational amplification module 130.
In this example embodiment, a plurality of electrocardiograph signal acquisition modules may be included, for example, as shown with reference to fig. 8, including a plurality of electrocardiograph signal acquisition modules, namely, a first electrocardiograph signal acquisition module 811, a second electrocardiograph signal acquisition module 812, and a third electrocardiograph signal acquisition module 813.
In the present exemplary embodiment, a first front-end amplifier 821 may be further disposed between the first signal acquisition module and the first operational amplifier 831 to amplify the acquired initial cardiac signal, and a second front-end amplifier 822 may be further disposed between the second signal acquisition module and the second operational amplifier 832 to amplify the acquired initial cardiac signal. And further, the accuracy of eliminating the interference signals is higher.
In this example embodiment, the first operational amplifier has a signal buffering function, and increases the input impedance of the acquired signal to increase the signal-to-noise ratio, that is, the input impedance becomes large, and the impedance change caused by the movement of the human body has less influence on the subsequent calculation, so as to further improve the signal-to-noise ratio of the electrocardiosignal acquisition.
The processor 870 is configured to receive the output signal, generate an electrocardiogram according to the output signal, transmit the electrocardiogram to the display device 910, and receive and display the electrocardiogram from the display device.
In the present exemplary embodiment, the display device may be an electronic device having a display function, such as a mobile phone, a tablet computer, or the like, and is not particularly limited in the present exemplary embodiment.
In an example embodiment of the present disclosure, the signal acquisition module 110 may include at least one electrocardiograph signal acquisition unit and an impedance acquisition unit, where the electrocardiograph signal acquisition unit may be used to acquire the initial electrocardiograph signal, and the electrocardiograph signal acquisition unit may be acquired by a three-lead electrocardiograph electrode, and a circuit structure of the electrocardiograph signal acquisition unit is substantially the same as a circuit structure of a signal acquisition portion of a commercial electrocardiograph signal detector, for example, an electrocardiograph signal acquisition module, an electrocardiograph sensor, and the like. The present exemplary embodiment is not particularly limited.
In the present exemplary embodiment, the initial electrocardiographic signals acquired by the signal acquisition module 110 include a target electrocardiographic signal and an interference signal, where the interference signal is generated by an impedance change of the detected object.
In this exemplary embodiment, the impedance acquisition unit is configured to acquire an impedance change of the detected object, that is, an impedance change when an electrocardiographic signal is acquired, and the impedance acquisition unit may be an impedance tester, or may calculate an impedance change by sensing a change in voltage and current, and is not specifically limited in this exemplary embodiment.
In an example embodiment of the present disclosure, the reference signal generating module 120 may include a current providing unit and a generating unit, wherein the current providing unit is configured to provide a constant current signal, and the current signal may be greater than or equal to 8nA and less than or equal to 12nA, and may specifically be, for example, 10nA, 10.5nA, and the like, and is not specifically limited in this example embodiment.
The generating module is used for calculating a reference signal according to the current signal and the impedance change value, and the specific calculation mode of the reference signal can be obtained by multiplying the current signal and the impedance change value.
In an example embodiment of the present disclosure, referring to fig. 2, the operational amplification module 130 may include a first input terminal connected to the signal acquisition module 110 for receiving the initial cardiac signal, a second input terminal for receiving the cancellation signal, and a first output terminal.
In this exemplary embodiment, referring to fig. 2, the operational amplification module 130 may include an operational amplifier 131, a first load 210, a second load 220, and a third load, where the operational amplifier 131 may include a first input terminal, a second input terminal, and a first output terminal, the first input terminal is connected to the signal acquisition module 110 and is used for receiving an initial cardiac signal, the second input terminal is used for receiving a cancellation signal, the first load 210 is connected between the first output terminal and the first input terminal, and the second load 220 is connected between the signal acquisition module 110 and the first output terminal; and a third load connected between the second input and the motion artifact estimation module 140.
In this exemplary embodiment, the resistances of the first load 210, the second load 220, and the third load 230 may be equal, for example, the resistances of the first load 210, the second load 220, and the third load 230 may be 10 ohms, in another exemplary embodiment of the present disclosure, the resistances of the first load 210, the second load 220, and the third load may be different, for example, the resistances of the first load 210 may be 10 ohms, the resistances of the second load 220 may be 12 ohms, the resistances of the third load may be 11 ohms, and the resistances of the first load 210, the second load 220, and the third load 230 may be customized according to the needs of the user, which is not limited in this exemplary embodiment.
In one example embodiment of the present disclosure, referring to fig. 3, the motion artifact estimation module 140 may include a first cancellation circuit 310, a second cancellation circuit 330, a weight distribution circuit 340, and a combining circuit 320. Wherein the first cancellation circuit 310 is configured to generate a first sub-cancellation signal according to the reference signal and the first weight value; the second cancellation circuit 330 is configured to phase shift the reference signal to obtain a target signal, and generate a second sub-cancellation signal according to the target signal and a second weight value; the weight distribution circuit 340 is configured to determine a first weight value according to a reference signal and an output signal, and determine a second weight value according to the target signal and the output signal; the synthesizing circuit 320 is configured to synthesize the first sub-cancellation signal and the second sub-cancellation signal into a cancellation signal.
In this exemplary embodiment, the first cancellation circuit 310 may include a first transconductance amplifier 311, where an input end of the first transconductance amplifier 311 is connected to the reference signal generating module 120, and an output end of the first transconductance amplifier 311 is connected to the chorus module, where the first transconductance amplifier 311 may further include a gain circuit, where the gain circuit may further include a voltage signal and a sliding resistor, where a magnitude of the voltage signal may be 1V or more and 1.8V or less, for example, 1.5V, 1.2V, etc., and in this exemplary embodiment, a maximum resistance of the sliding resistor may be 5mΩ or more and 10mΩ or less, for example, 6mΩ, 5.5mΩ, etc., and in this exemplary embodiment, the maximum resistance of the sliding resistor may not be specifically limited. The actual connection resistance of the sliding resistor is determined according to the weight distribution circuit 340, so as to determine the gain of the first transconductance amplifier 311.
In the present exemplary embodiment, referring to fig. 4, the second cancellation circuit 330 may include a low-pass filter circuit and a second transconductance amplifier 332, where the low-pass filter circuit is used to phase shift the reference signal to obtain the target signal, and the low-pass filter circuit is a filter circuit in the related art, for example, an active low-pass filter 331, a passive low-pass filter 331, and the like, which is not specifically limited in the present exemplary embodiment.
In this exemplary embodiment, the input end of the second transconductance amplifier 332 is connected to the low-pass filter circuit, and the output end thereof is connected to the synthesizing circuit 320, where the second transconductance amplifier 332 may further include a gain circuit, where the gain circuit may further include a voltage signal and a sliding resistor, where the magnitude of the voltage signal may be 1V or more and less and 1.8V, for example, 1.5V, 1.2V, etc., and is not specifically limited in this exemplary embodiment, and the maximum resistance of the sliding resistor may be 5mΩ or more and less and 10mΩ, for example, 6mΩ, 5.5mΩ, etc., and is not specifically limited in this exemplary embodiment. The actual on-resistance of the slide varistor is determined according to the weight distribution circuit 340.
In this example embodiment, referring to fig. 5, the weight distribution circuit 340 may include a first sub-weight distribution circuit and a second word weight distribution circuit 340, wherein the first sub-weight distribution circuit 340 may be used to determine a first weight value according to a reference signal and an output signal, wherein the first sub-weight distribution circuit includes a first comparator 511, a first logic circuit 512, a first counter 513, and a second comparator 530, wherein the first comparator 511 input terminal is connected to the reference signal generation module 120; the first logic circuit 512 includes a fourth input terminal and a fifth input terminal, the fourth input terminal is connected to the output terminal of the first comparator 511, and the first logic circuit 512 outputs a high level when the signs of the input signals of the fourth input terminal and the fifth input terminal are the same; the input end of the first counter 513 is connected to the output end of the first logic circuit 512, and the output end is connected to the first transconductance amplifier 311, so as to determine the gain of the first transconductance amplifier 311 according to the output signal of the counter; the second comparator 530 has an input terminal connected to the first output terminal and an output terminal connected to the fifth input terminal.
In the present exemplary embodiment, the first comparator 511 may be used to determine the magnitudes of the reference signal and 0, that is, determine the positive and negative of the reference signal, and when the reference signal is greater than 0, the first comparator 511 outputs 1, that is, high, and when the reference signal is less than 0, the first comparator 511 outputs 0, that is, low.
In this exemplary embodiment, the second comparator 530 may be used to determine the magnitudes of the output signal of the operational amplification module 130 and 0, that is, determine the positive and negative of the output signal of the operational amplification module 130, and when the output signal of the operational amplification module 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification module 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The first logic circuit 512 outputs a high level when the output signal of the operational amplifier module 130 and the reference signal have the same sign, and outputs a low level when the output signal of the operational amplifier module 130 and the reference signal have different signs, that is, the first logic circuit 512 may be an exclusive or gate, or may be a logic circuit having a plurality of logic gates capable of realizing the above functions, and is not particularly limited in this exemplary embodiment.
In this exemplary embodiment, the first counter 513 is configured to complete counting according to the output of the first logic circuit 512, and when the output is 1, the counter generates a rising edge, and when the output is 0, the first counter 513 generates an 8-bit binary number with a sign bit to adjust the resistance of the sliding rheostat to adjust the gain of the first transconductance operational amplifier.
In an example embodiment of the present disclosure, the second word weight distribution circuit 340 may include a third comparator 521, a second logic circuit 522, a second counter 523, and a second comparator 530. Wherein the input end of the third comparator 521 is connected to the output end of the low-pass filter circuit; the second logic circuit 522 includes a sixth input terminal and a seventh input terminal, the sixth input terminal is connected to the output terminal of the third comparator 521, and the second logic circuit 522 outputs a high level when the signs of the input signals of the sixth input terminal and the seventh input terminal are the same; the input end of the second counter 523 is connected to the output end of the first logic circuit 512, and the output end is connected to the second transconductance amplifier 332, so as to determine the gain of the second transconductance amplifier 332 according to the output signal of the counter; the second comparator 530 has an input terminal connected to the first output terminal and an output terminal connected to the seventh input terminal.
In the present exemplary embodiment, the third comparator 521 may be configured to determine the magnitudes of the reference signal and 0, that is, determine the positive and negative of the reference signal, and output 1 as the third comparator 521 when the reference signal is greater than 0, that is, output high, and output 0 as the third comparator 521 when the reference signal is less than 0, that is, output low.
In this exemplary embodiment, the second comparator 530 may be used to determine the magnitudes of the output signal of the operational amplification module 130 and 0, that is, determine the positive and negative of the output signal of the operational amplification module 130, and when the output signal of the operational amplification module 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification module 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The second logic circuit 522 outputs a high level when the output signal of the operational amplifier module 130 and the reference signal have the same sign, and outputs a low level when the output signal of the operational amplifier module 130 and the reference signal have different signs, that is, the second logic circuit 522 may be an exclusive or gate, or may be a logic circuit having a plurality of logic gates capable of realizing the above functions, and is not particularly limited in this exemplary embodiment.
In the present exemplary embodiment, the second counter 523 is configured to complete counting according to the output of the second logic circuit 522, and when the output is 1, the counter generates a rising edge, and when the output is 0, the counter generates a falling edge, and the second counter 523 may generate an 8-bit binary number with sign bit to adjust the resistance of the sliding resistor to adjust the gain of the second transconductance amplifier.
In the present exemplary embodiment, the first cancellation signal and the second cancellation signal are generated after the reference signal and the target signal pass through the first transconductance amplifier and the second transconductance amplifier, respectively. The first counteracting signal and the second counteracting signal are current signals.
In the present exemplary embodiment, the synthesizing circuit may combine the first cancellation signal and the second cancellation signal to be cancellation signals in the form of voltage signals, and the synthesizing circuit may be the transimpedance amplifier 540 or other circuit structures capable of realizing the above functions, and is not specifically limited in the present exemplary embodiment.
In this example embodiment, referring to fig. 8, the electrocardiographic feature detection system further includes a storage module. The power supply device 890 and the communication module 880, wherein the memory module is used for storing the obtained output signals, the power supply device 890 is used for supplying power to the processor 870, and for charging management, battery power monitoring, voltage conversion required by each circuit module, and the like. The memory module may also be used for storing execution codes of the processor, data storage, etc.; the communication module 880 is used for communication between the processor 870 and the display device 910.
In the present exemplary embodiment, the communication module 880 may complete the communication from the processor 870 to the display device 910 before the subsequent communication, or may complete the wireless communication between the processor 870 and the display device 910, which is not specifically limited in the present exemplary embodiment.
In this example embodiment, the communication module 880 is a wireless communication module, and the communication module mainly transmits the processed output signal to the terminal device such as a mobile phone through a wireless protocol, where the wireless communication protocol used may include a wireless protocol such as bluetooth (conventional bluetooth or bluetooth low energy), WIFI, zigbee, and the like.
In one example embodiment of the present disclosure, the electrocardiograph feature detection system further comprises an instrumentation amplifier circuit, a first filter 850, and a first analog-to-digital conversion module 861, wherein the instrumentation amplifier 840 is connected between the electrocardiograph feature detection device and the processor 870; a first filter 850 connected between the instrumentation amplifier 840 and the processor 870 for removing noise of an output signal; a first analog-to-digital conversion module 861 is coupled to the first filter 850 and the processor 870.
In this example embodiment, the electrocardiographic feature detection system further includes a second analog-to-digital conversion module 862, connected to the output end of the motion artifact estimation module 140, configured to provide the cancellation signal for the processor 870, and further improve the cancellation effect on the interference signal, and improve the accuracy of obtaining the electrocardiogram.
In this example embodiment, the electrocardiograph detection system may further include a right leg driving circuit, wherein the right leg driving circuit is connected to the meter methodological machine, and the right leg driving circuit may include a driving amplifier 823 and a third signal acquisition module 813. The right leg driving circuit can be connected to a human body through a reverse common mode signal to play a role in eliminating a common mode. The specific implementation of the right leg driving circuit is already a well-known technology and will not be described in detail here.
In this exemplary embodiment, referring to fig. 9, the system further includes the following steps when acquiring an electrocardiographic signal:
step S910, a first analog-to-digital converter acquires ECG signals acquired by a point of presence feature detection device having a motion artifact estimation module;
step S920, the processor reconstructs the ECG signal to generate an electrocardiogram;
step S930, displaying the electrocardiogram on a display device.
The specific implementation manner of the above steps may be described in detail in the description of the electrocardiograph feature collection device and the electrocardiograph feature collection system, and thus will not be described herein.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any adaptations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It is to be understood that the present disclosure is not limited to the precise arrangements and instrumentalities shown in the drawings, and that various modifications and changes may be effected without departing from the scope thereof. The scope of the present disclosure is limited only by the appended claims.
The above described features, structures or characteristics may be combined in any suitable manner in one or more embodiments, such as the possible, interchangeable features as discussed in connection with the various embodiments. In the above description, numerous specific details are provided to give a thorough understanding of embodiments of the present disclosure. One skilled in the relevant art will recognize, however, that the disclosed aspects may be practiced without one or more of the specific details, or with other methods, components, materials, etc. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the disclosure.
The terms "about" and "approximately" are used in this specification to generally mean within 20%, preferably within 10%, and more preferably within 5% of a given value or range. The numbers given herein are about numbers, meaning that the meaning of "about," "approximately" may still be implied without specific recitation.
Although relative terms such as "upper" and "lower" are used in this specification to describe the relative relationship of one component of an icon to another component, these terms are used in this specification for convenience only, such as in terms of the orientation of the examples described in the figures. It will be appreciated that if the device of the icon is flipped upside down, the recited "up" component will become the "down" component. Other relative terms such as "high," "low," "top," "bottom," "front," "back," "left," "right," etc. are also intended to have similar meanings. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure through another structure.
In the present specification, the terms "a," "an," "the," "said" and "at least one" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements/components/etc., in addition to the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and do not limit the number of their objects.
It is to be understood that the disclosure is not limited in its application to the details of construction and the arrangement of components set forth in the disclosure. The disclosure is capable of other embodiments and of being practiced and carried out in various ways. The foregoing variations and modifications are within the scope of the present disclosure. It should be understood that the present disclosure disclosed and defined herein extends to all alternative combinations of two or more of the individual features mentioned or evident from the text and/or drawings. All of these different combinations constitute various alternative aspects of the present disclosure. The embodiments described herein explain the best modes known for practicing the disclosure and will enable others skilled in the art to utilize the disclosure.

Claims (17)

1. An electrocardiographic feature detection device, comprising:
the signal acquisition module is used for acquiring initial electrocardiosignals and impedance change values of the detected object;
the reference signal generation module is connected with the signal acquisition module and is used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected with the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
The motion artifact estimation module comprises a third input end and a second output end, wherein the third input end is connected with the reference signal generation module and the first output end, and the second output end is connected with the second input end and is used for generating the offset signal according to the output signal of the operational amplification module and the reference signal and feeding the offset signal back to the second input end of the operational amplification module;
wherein the cancellation signal comprises a first sub-cancellation signal and a second sub-cancellation signal, the motion artifact estimation module comprising:
the first cancellation circuit is used for generating a first sub cancellation signal according to the reference signal and a first weight value;
the second offset circuit is used for performing phase shift on the reference signal to obtain a target signal and generating a second sub offset signal according to the target signal and a second weight value;
a weight distribution circuit for determining the first weight value according to the reference signal and the output signal, and determining the second weight value according to the target signal and the output signal;
and the synthesis circuit is used for synthesizing the first sub-cancellation signal and the second sub-cancellation signal into the cancellation signal.
2. The apparatus of claim 1, wherein the first cancellation circuit comprises:
and the input end of the first transconductance amplifier is connected with the reference signal generating module, and the output end of the first transconductance amplifier is connected with the synthesizing circuit.
3. The apparatus of claim 2, wherein the second cancellation circuit comprises:
the low-pass filter circuit is connected with the reference signal generation module and is used for performing phase shift on the reference signal to obtain a target signal;
and the input end of the second transconductance amplifier is connected with the low-pass filter circuit, and the output end of the second transconductance amplifier is connected with the synthesis circuit.
4. The apparatus of claim 3, wherein the weight distribution circuit comprises a first sub-weight distribution circuit and a second sub-weight distribution circuit; wherein,
the first sub-weight distribution circuit is configured to determine a first weight value according to the reference signal and the output signal, and includes:
the input end of the first comparator is connected with the reference signal generation module;
the first logic circuit comprises a fourth input end and a fifth input end, the fourth input end is connected with the output end of the first comparator, and the first logic circuit outputs a high level when the signs of input signals of the fourth input end and the fifth input end are the same;
The input end of the first counter is connected with the output end of the first logic circuit, and the output end of the first counter is connected with the first transconductance amplifier and is used for determining the gain of the first transconductance amplifier according to the output signal of the first counter;
and the input end of the second comparator is connected with the first output end, and the output end of the second comparator is connected with the fifth input end.
5. The apparatus of claim 4, wherein the second sub-weight assignment circuit for determining a second weight value from the target signal and the output signal comprises:
the input end of the third comparator is connected with the output end of the low-pass filter circuit;
the second logic circuit comprises a sixth input end and a seventh input end, the sixth input end is connected with the output end of the third comparator, and the second logic circuit outputs a high level when the symbols of the input signals of the sixth input end and the seventh input end are the same;
the input end of the second counter is connected with the output end of the second logic circuit, and the output end of the second counter is connected with the second transconductance amplifier and is used for determining the gain of the second transconductance amplifier according to the output signal of the second counter;
And the input end of the second comparator is connected with the first output end, and the output end of the second comparator is connected with the seventh input end.
6. The apparatus of claim 1, wherein the signal acquisition module comprises:
the at least one electrocardiosignal acquisition unit is used for acquiring initial electrocardiosignals;
and the impedance acquisition unit is used for detecting the impedance change value of the detected object.
7. The apparatus of claim 1, wherein the reference signal generation module comprises:
a current supply unit for providing a constant current signal;
and a generation unit that generates the reference signal using the impedance change value and the current signal.
8. The apparatus of claim 1, wherein the operational amplification module comprises:
the operational amplifier comprises a first input end, a second input end and a first output end, wherein the first input end is connected with the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
the first load is connected between the first output end and the first input end;
the second load is connected between the signal acquisition module and the first output end;
And a third load connected between the second input terminal and the motion artifact estimation module.
9. An electrocardiographic feature detection method, comprising:
collecting an initial electrocardiosignal and an impedance change value of a detected object;
generating a reference signal according to the impedance variation value;
obtaining an output signal according to the electrocardiosignal and the offset signal through an operational amplification module;
determining a first weight value according to the reference signal and the output signal, determining a second weight value according to a target signal and the output signal, generating a first sub-cancellation signal according to the reference signal and the first weight value, performing phase shift on the reference signal to obtain the target signal, generating a second sub-cancellation signal according to the target signal and the second weight value, and synthesizing the first sub-cancellation signal and the second sub-cancellation signal into the cancellation signal.
10. An electrocardio characteristic detection system is characterized by comprising at least one electrocardio characteristic detection device, a processor and a display device;
wherein, the electrocardio characteristic detection device includes:
the signal acquisition module is used for acquiring initial electrocardiosignals and impedance change values;
The reference signal generation module is connected with the signal acquisition module and is used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected with the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
the motion artifact estimation module comprises a third input end and a second output end, wherein the third input end is connected with the reference signal generation module and the first output end, and the second output end is connected with the second input end and is used for generating the offset signal according to the output signal of the operational amplification module and the reference signal and feeding the offset signal back to the second input end of the operational amplification module;
the processor is used for receiving the output signal, generating an electrocardiogram according to the output signal and transmitting the electrocardiogram to the display equipment;
the display device is connected with the processor and is used for receiving and displaying the electrocardiogram;
wherein the cancellation signal comprises a first sub-cancellation signal and a second sub-cancellation signal, the motion artifact estimation module comprising:
The first cancellation circuit is used for generating a first sub cancellation signal according to the reference signal and a first weight value;
the second offset circuit is used for performing phase shift on the reference signal to obtain a target signal and generating a second sub offset signal according to the target signal and a second weight value;
a weight distribution circuit for determining the first weight value according to the reference signal and the output signal, and determining the second weight value according to the target signal and the output signal;
and the synthesis circuit is used for synthesizing the first sub-cancellation signal and the second sub-cancellation signal into the cancellation signal.
11. The system of claim 10, wherein the system further comprises:
the instrument amplifier is connected between the electrocardio characteristic detection device and the processor;
a first filter connected between the instrumentation amplifier and the processor for removing noise of an output signal;
the first analog-to-digital conversion module is connected with the first filter and the processor.
12. The system of claim 10, wherein the system further comprises:
and the second analog-to-digital conversion module is connected with the output end of the motion artifact estimation module.
13. The system of claim 10, wherein the system further comprises:
a storage module for storing the output signal;
a power supply device for powering the processor;
and the communication module is used for communication between the processor and the display equipment.
14. The system of claim 10, wherein the first cancellation circuit comprises:
and the input end of the first transconductance amplifier is connected with the reference signal generating module, and the output end of the first transconductance amplifier is connected with the synthesizing circuit.
15. The system of claim 14, wherein the second cancellation circuit comprises:
the low-pass filter circuit is connected with the reference signal generation module and is used for performing phase shift on the reference signal to obtain a target signal;
and the input end of the second transconductance amplifier is connected with the low-pass filter circuit, and the output end of the second transconductance amplifier is connected with the synthesis circuit.
16. The system of claim 15, wherein the weight distribution circuit comprises a first sub-weight distribution circuit and a second sub-weight distribution circuit; wherein,
the first sub-weight distribution circuit is configured to determine a first weight value according to the reference signal and the output signal, and includes:
The input end of the first comparator is connected with the reference signal generation module;
the first logic circuit comprises a fourth input end and a fifth input end, the fourth input end is connected with the output end of the first comparator, and the first logic circuit outputs a high level when the signs of input signals of the fourth input end and the fifth input end are the same;
the input end of the first counter is connected with the output end of the first logic circuit, and the output end of the first counter is connected with the first transconductance amplifier and is used for determining the gain of the first transconductance amplifier according to the output signal of the first counter;
and the input end of the second comparator is connected with the first output end, and the output end of the second comparator is connected with the fifth input end.
17. The system of claim 16, wherein the second sub-weight assignment circuit is configured to determine a second weight value based on the target signal and the output signal, comprising:
the input end of the third comparator is connected with the output end of the low-pass filter circuit;
the second logic circuit comprises a sixth input end and a seventh input end, the sixth input end is connected with the output end of the third comparator, and the second logic circuit outputs a high level when the symbols of the input signals of the sixth input end and the seventh input end are the same;
The input end of the second counter is connected with the output end of the second logic circuit, and the output end of the second counter is connected with the second transconductance amplifier and is used for determining the gain of the second transconductance amplifier according to the output signal of the second counter;
and the input end of the second comparator is connected with the first output end, and the output end of the second comparator is connected with the seventh input end.
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