CN114305437A - Electrocardio characteristic detection device and method and electrocardio characteristic detection system - Google Patents

Electrocardio characteristic detection device and method and electrocardio characteristic detection system Download PDF

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CN114305437A
CN114305437A CN202011080007.0A CN202011080007A CN114305437A CN 114305437 A CN114305437 A CN 114305437A CN 202011080007 A CN202011080007 A CN 202011080007A CN 114305437 A CN114305437 A CN 114305437A
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cancellation
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CN114305437B (en
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刘恩福
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Oppo Chongqing Intelligent Technology Co Ltd
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Oppo Chongqing Intelligent Technology Co Ltd
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Abstract

The present disclosure relates to the technical field of biomedical engineering, and in particular to an electrocardiographic feature detection device and method and an electrocardiographic feature detection system, wherein the device comprises: the signal acquisition module is used for acquiring an initial electrocardiosignal and an impedance change value of the detected object; the first input end of the operational amplification module is connected with the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end of the operational amplification module is used for receiving the offset signal; the motion artifact estimation module comprises a third input end and a second output end, the third input end is connected with the reference signal generation module and the first output end, the second output end is connected with the second input end, and the second input end is used for generating a cancellation signal according to the output signal of the operational amplification module and the reference signal and feeding the cancellation signal back to the second input end of the operational amplification module. The technical scheme of the invention saves computing resources, reduces the design cost of signal acquisition and reduces the energy consumption of signal acquisition.

Description

Electrocardio characteristic detection device and method and electrocardio characteristic detection system
Technical Field
The disclosure relates to the technical field of biomedical engineering, in particular to an electrocardio characteristic detection device and method and an electrocardio characteristic detection system.
Background
With the increasing development of wearable devices, the health awareness of users is improved, and the health monitoring function of the wearable devices is concerned more widely. Wherein an Electrocardiogram (ECG) monitoring function provides more comprehensive health information for the user. In order to ensure the appearance and portability of wearable equipment, a monitoring electrode of an electrocardiosignal of the wearable equipment usually adopts a dry electrode to acquire a signal; the dry electrode signal is susceptible to movement artifacts.
In the related art, in order to reduce the influence of motion artifacts, the motion artifacts are suppressed and implemented by an algorithm at a digital end, and in order to achieve an effective effect and have good user experience, the algorithm is generally complex, the calculation requirement is higher, the power consumption of a signal acquisition system is higher, and the cost is higher.
It is to be noted that the information disclosed in the above background section is only for enhancement of understanding of the background of the present disclosure, and thus may include information that does not constitute prior art known to those of ordinary skill in the art.
Disclosure of Invention
The present disclosure aims to provide an electrocardiographic feature detection apparatus and method, and an electrocardiographic feature detection system, so as to overcome the disadvantages of a conventional electrocardiographic feature detection apparatus in the related art, such as high calculation cost, high power consumption cost, and high design cost, at least to a certain extent.
According to a first aspect of the present disclosure, there is provided an electrocardiographic feature detection apparatus comprising:
the signal acquisition module is used for acquiring an initial electrocardiosignal and an impedance change value of the detected object;
the reference signal generating module is connected with the signal acquisition module and used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected to the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
and the motion artifact estimation module comprises a third input end and a second output end, the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end and is used for generating the cancellation signal according to the output signal of the operational amplification module and the reference signal and feeding the cancellation signal back to the second input end of the operational amplification module.
According to a second aspect of the present disclosure, there is provided an electrocardiographic feature detection method, including:
acquiring an initial electrocardiosignal and an impedance change value of a detected object;
generating a reference signal according to the impedance change value;
obtaining an output signal according to the electrocardiosignal and the offset signal through an operational amplification module;
and generating the cancellation signal according to the output signal of the operational amplification module and the reference signal and feeding the cancellation signal back to the operational amplification module.
According to a third aspect of the present disclosure, there is provided an electrocardiographic feature detection system, comprising at least one electrocardiographic feature detection apparatus, a processor and a display device;
wherein, electrocardio characteristic detection device includes:
a signal acquisition module for acquiring initial electrocardiosignal and impedance variation value
The reference signal generating module is connected with the signal acquisition module and used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected to the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
a motion artifact estimation module, including a third input end and a second output end, where the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end, and is used to generate the cancellation signal according to the output signal of the operational amplification module and the reference signal, and feed back the cancellation signal to the second input end of the operational amplification module;
the processor is used for receiving the output signal, generating an electrocardiogram according to the output signal and transmitting the electrocardiogram to the display equipment;
and the display device is connected with the processor and used for receiving and displaying the electrocardiogram.
According to the electrocardio-feature detection device provided by one embodiment of the disclosure, a signal acquisition module acquires an initial electrocardiosignal and an impedance change value of a detected object, and a reference signal generation module generates a reference signal according to the impedance change value. The operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected with the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving the offset signal; the motion artifact estimation module comprises a third input end and a second output end, the third input end is connected with the reference signal generation module and the first output end, and the second output end is connected with the second input end and used for generating a cancellation signal according to the output signal of the operational amplification module and the reference signal and feeding the cancellation signal back to the second input end of the operational amplification module. Compared with the prior art, the offset signal is generated by utilizing the output signal of the operational amplification module and the reference signal and fed back to the second input end of the operational amplification module to be used for eliminating the interference signal in the initial electrocardiosignal, the interference signal in the initial electrocardiosignal can be eliminated without setting a suppression algorithm of a digital end, namely, the motion artifact is eliminated, the computing resource is saved, the design cost of electrocardiosignal acquisition can be reduced without setting a complex algorithm at the digital end, and meanwhile, the energy consumption of signal acquisition can also be reduced.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the disclosure.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present disclosure and together with the description, serve to explain the principles of the disclosure. It is to be understood that the drawings in the following description are merely exemplary of the disclosure, and that other drawings may be derived from those drawings by one of ordinary skill in the art without the exercise of inventive faculty. In the drawings:
fig. 1 schematically illustrates a schematic view of an electrocardiographic feature detection apparatus in an exemplary embodiment of the present disclosure;
FIG. 2 is a schematic diagram illustrating an electrocardiographic feature detection apparatus after refining an operational amplification module according to an exemplary embodiment of the present disclosure;
fig. 3 schematically illustrates a schematic diagram of a motion artifact estimation module in an exemplary embodiment of the present disclosure;
fig. 4 schematically shows a detailed structure diagram of the motion artifact estimation module in an exemplary embodiment of the present disclosure;
fig. 5 schematically illustrates a specific structure diagram of a motion artifact estimation module in an exemplary embodiment of the present disclosure;
FIG. 6 schematically illustrates a flow chart of an electrocardiographic feature detection apparatus in an exemplary embodiment of the present disclosure;
fig. 7 schematically illustrates a flowchart of generating the cancellation signal according to the output signal of the operational amplification module and the reference signal in an exemplary embodiment of the disclosure;
FIG. 8 schematically illustrates a schematic diagram of a system for electrocardiographic feature detection in an exemplary embodiment of the present disclosure;
fig. 9 schematically shows a flowchart of electrocardiogram generation in an exemplary embodiment of the present disclosure.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments.
Furthermore, the drawings are merely schematic illustrations of the present disclosure and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus their repetitive description will be omitted. Some of the block diagrams shown in the figures are functional entities and do not necessarily correspond to physically or logically separate entities. These functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor devices and/or microcontroller devices.
With the increasing development of wearable devices, the health awareness of users is improved, and meanwhile, feasibility solutions (particularly cardiovascular health monitoring) are provided for the health management of users, so that the health monitoring function of the wearable devices is more widely concerned. Wherein an Electrocardiogram (ECG) monitoring function provides more comprehensive health information for the user. Compared with the traditional electrocardiograph, the front-end signal acquisition is carried out by adopting a wet electrode, and in order to ensure the appearance and the portability of the wearable device, the monitoring electrode of the ECG usually adopts a dry electrode to acquire signals; dry electrode signals are more susceptible to motion artifacts than wet electrodes. Motion artifacts are typically a kind of appearance affecting the ECG signal due to skin stretching, electrode movement, electrode impedance changes, etc., which is typically a relatively large amplitude signal superimposed on the ECG signal. Therefore, in order to obtain a user experience with an excellent ECG detection function, the quality of the ECG signal acquisition of the wearable device needs to be improved, and a method for effectively suppressing the motion artifact is further required.
In the related art, in order to reduce the influence of motion artifacts, a signal acquisition front end is required to have a relatively wide input dynamic range, which is realized by reducing the gain of a front end amplifier and simultaneously improving the resolution/sampling rate of an Analog-to-Digital Converter (Analog-to-Digital Converter ADC), and finally, the signal acquisition front end is inhibited by algorithms such as adaptive filtering of a Digital end. Reducing the gain of the front-end amplification is really a sacrifice on the signal-to-noise ratio of the signal acquisition system; meanwhile, the high-resolution ADC is adopted, so that the cost and the power consumption of the acquisition system are increased, and the increase of the power consumption is unfavorable for the wearable equipment; the algorithm is generally complex to achieve effective effect and good user experience through algorithm suppression of a digital end, for example, complex algorithms such as a filter bank, wavelet transformation and principal component analysis are used, the calculation power of algorithm controllers has certain requirements, and the higher the calculation power requirement is, the higher the power consumption of a signal acquisition system is.
In view of the above disadvantages, the present disclosure first provides an electrocardiograph feature detection apparatus, which can solve one or more of the above problems to some extent, and as shown in fig. 1, the electrocardiograph feature detection apparatus may include a signal acquisition module 110, a reference signal generation module 120, an operational amplification module 130, and a motion artifact estimation module 140. The signal acquisition module 110 is configured to acquire an initial electrocardiographic signal and an impedance change value of the detected object; the reference signal generating module 120 is connected to the signal acquiring module, and configured to generate a reference signal according to the impedance change value; the operational amplification module 130 includes a first input end, a second input end and a first output end, the first input end is connected to the signal acquisition module 110 for receiving the initial electrocardiographic signal, and the second input end is used for receiving the cancellation signal; the motion artifact estimation module 140 includes a third input end and a second output end, the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end, and is configured to generate a cancellation signal according to the output signal of the operational amplification module 130 and the reference signal and feed back the cancellation signal to the second input end of the operational amplification module 130.
Compared with the prior art, the offset signal is generated by utilizing the output signal of the operational amplification module 130 and the reference signal and fed back to the second input end of the operational amplification module 130 for eliminating the interference signal in the initial electrocardiosignal, the interference signal in the initial electrocardiosignal can be eliminated without setting a suppression algorithm of a digital end, namely, the motion artifact is eliminated, the calculation resource is saved, the design cost of electrocardiosignal acquisition can be reduced without setting a complex algorithm at the digital end, and meanwhile, the energy consumption of signal acquisition can also be reduced.
In an exemplary embodiment of the present disclosure, the signal acquisition module 110 may include at least one electrocardiographic signal acquisition unit and an impedance acquisition unit, wherein the electrocardiographic signal acquisition unit may be configured to acquire the initial electrocardiographic signal, and the electrocardiographic signal acquisition unit may be acquired by a three-lead electrocardiograph electrode, and a circuit structure of the electrocardiographic signal acquisition unit is substantially similar to a circuit structure of a signal acquisition portion of a commercially available electrocardiographic signal detector, for example, an electrocardiographic signal acquisition module, an electrocardiographic sensor, and the like. And is not particularly limited in the present exemplary embodiment.
In the present exemplary embodiment, the initial electrocardiographic signal acquired by the signal acquisition module 110 includes a target electrocardiographic signal and an interference signal, where the interference signal is generated by an impedance change of the detected object.
In this exemplary embodiment, the impedance collecting unit is configured to collect impedance changes of the detected object, that is, impedance changes during collection of the electrocardiographic signal, the impedance collecting unit may be an impedance tester, or impedance changes may be calculated by sensing changes of voltage and current, and the impedance collecting unit is not specifically limited in this exemplary embodiment.
In an example embodiment of the present disclosure, the reference signal generating module 120 may include a current providing unit and a generating unit, where the current providing unit is configured to provide a constant current signal, where the current signal may be greater than or equal to 8nA and less than or equal to 12nA, and specifically may be, for example, 10nA, 10.5nA, and the like, and is not limited in this example embodiment.
The generating module is configured to calculate a reference signal according to the current signal and the impedance change value, where a specific calculation manner of the reference signal may be obtained by multiplying the current signal by the impedance change value.
In an exemplary embodiment of the disclosure, referring to fig. 2, the operational amplifier module 130 may include a first input end, a second input end, and a first output end, the first input end is connected to the signal acquisition module 110 for receiving the initial cardiac signal, and the second input end is used for receiving the cancellation signal.
In this exemplary embodiment, referring to fig. 2, the operational amplification module 130 may include an operational amplifier 131, a first load 210, a second load 220 and a third load, wherein the operational amplifier 131 may include a first input end, a second input end and a first output end, the first input end is connected to the signal acquisition module 110 for receiving the initial cardiac signal, the second input end is used for receiving the cancellation signal, the first load 210 is connected between the first output end and the first input end, and the second load 220 is connected between the signal acquisition module 110 and the first output end; a third load 230 is connected between the second input and the motion artifact estimation module 140.
In this example embodiment, the first load 210, the second load 220, and the third load 230 may be resistance elements and have the same impedance, for example, the impedances of the first load 210, the second load 220, and the third load 230 are all 10 ohms, in another example embodiment of the present disclosure, the impedances of the first load 210, the second load 220, and the third load may also be different, for example, the impedance of the first load 210 is 10 ohms, the impedance of the second load 220 is 12 ohms, and the impedance of the third load is 11 ohms, which may be customized according to the needs of a user, and in this example embodiment, the impedances of the first load 210, the second load 220, and the third load 230 are not limited in detail.
In an example embodiment of the present disclosure, referring to fig. 3, the motion artifact estimation module 140 may include a first cancellation circuit 310, a second cancellation circuit 330, a weight assignment circuit 340, and a synthesis circuit 320. The first cancellation circuit 310 is configured to generate a first sub-cancellation signal according to the reference signal and the first weight value; the second cancellation circuit 330 is configured to phase shift the reference signal to obtain a target signal, and generate a second sub-cancellation signal according to the target signal and a second weight value; the weight distribution circuit 340 is used for determining a first weight value according to the reference signal and the output signal, and determining a second weight value according to the target signal and the output signal; the synthesizing circuit 320 is configured to synthesize the first sub-cancellation signal and the second sub-cancellation signal into a cancellation signal.
In this example embodiment, the first cancellation circuit 310 may include a first transconductance amplifier 311, an input end of the first transconductance amplifier 311 is connected to the reference signal generating module 120, and an output end of the first transconductance amplifier 311 is connected to the chorus module, wherein the first transconductance amplifier 311 may further include a gain circuit, wherein the gain circuit may further include a voltage signal and a sliding varistor, wherein a magnitude of the voltage signal may be greater than or equal to 1V and less than or equal to 1.8V, for example, 1.5V, 1.2V, and the like, which is not specifically limited in this example embodiment, and a maximum resistance of the sliding varistor may be greater than or equal to 5M Ω and less than or equal to 10M Ω, for example, 6M Ω, 5.5M Ω, and the like, which is not specifically limited in this example embodiment. The actual access resistance of the sliding rheostat is determined according to the weight distribution circuit 340, and then the gain of the first transconductance amplifier 311 is determined.
In this example embodiment, as shown in fig. 4, the second cancellation circuit 330 may include a low pass filter circuit and a second transconductance amplifier 332, where the low pass filter circuit is used to phase shift the reference signal to obtain the target signal, and the low pass filter circuit is a filter circuit in the related art, for example, an active low pass filter 331, a passive low pass filter 331, and the like, and is not limited in this example embodiment.
In this exemplary embodiment, the input terminal of the second transconductance amplifier 332 is connected to the low pass filter circuit, and the output terminal is connected to the combining circuit 320, wherein the second transconductance amplifier 332 further includes a gain circuit, wherein the gain circuit further includes a voltage signal and a sliding varistor, wherein the magnitude of the voltage signal may be greater than or equal to 1V and less than or equal to 1.8V, for example, 1.5V, 1.2V, and the like, and without specific limitation in this exemplary embodiment, the maximum resistance of the sliding varistor may be greater than or equal to 5M Ω and less than or equal to 10M Ω, for example, 6M Ω, 5.5M Ω, and the like, and is not specifically limited in this exemplary embodiment. The actual on-resistance of the sliding rheostat is determined according to the weight assignment circuit 340.
In this example embodiment, referring to fig. 5, the weight assignment circuit 340 may include a first sub-weight assignment circuit and a second word weight assignment circuit 340, wherein the first sub-weight assignment circuit 340 may be configured to determine a first weight value according to a reference signal and an output signal, wherein the first sub-weight assignment circuit includes a first comparator 511, a first logic circuit 512, a first counter 513 and a second comparator 530, wherein an input end of the first comparator 511 is connected to the reference signal generation module 120; the first logic circuit 512 includes a fourth input terminal and a fifth input terminal, the fourth input terminal is connected to the output terminal of the first comparator 511, and the first logic circuit 512 outputs a high level when the signs of the input signals at the fourth input terminal and the fifth input terminal are the same; the first counter 513 has an input end connected to the output end of the first logic circuit 512, and an output end connected to the first transconductance amplifier 311, and is configured to determine the gain of the first transconductance amplifier 311 according to the output signal of the counter; the input terminal of the second comparator 530 is connected to the first output terminal, and the output terminal is connected to the fifth input terminal.
In the present exemplary embodiment, the first comparator 511 may be configured to determine the magnitude of the reference signal and 0, i.e., determine whether the reference signal is positive or negative, and when the reference signal is greater than 0, the first comparator 511 outputs 1, i.e., outputs a high level, and when the reference signal is less than 0, the first comparator 511 outputs 0, i.e., outputs a low level.
In the present exemplary embodiment, the second comparator 530 may be configured to determine the magnitude of the output signal of the operational amplification block 130 and 0, that is, determine whether the output signal of the operational amplification block 130 is positive or negative, and when the output signal of the operational amplification block 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification block 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The first logic circuit 512 outputs a high level when the signs of the output signal of the operational amplifier module 130 and the reference signal are the same, and outputs a low level when the signs of the output signal of the operational amplifier module 130 and the reference signal are different, that is, the first logic circuit 512 may be an exclusive nor or a logic circuit including a plurality of logic gates and capable of implementing the above functions, which is not limited in this exemplary embodiment.
In the present exemplary embodiment, the first counter 513 is configured to complete counting according to the output of the first logic circuit 512, when the output is 1, the counter generates a rising edge, and the output is 0, the counter generates a falling edge, and the first counter 513 may generate an 8-bit binary number with a sign bit to adjust the resistance of the sliding rheostat to adjust the gain of the first transconductance amplifier.
In an example embodiment of the present disclosure, the second word weight assignment circuit 340 may include a third comparator 521, a second logic circuit 522, a second counter 523, and a second comparator 530. The input end of the third comparator 521 is connected to the output end of the low-pass filter circuit; the second logic circuit 522 comprises a sixth input terminal and a seventh input terminal, the sixth input terminal is connected to the output terminal of the third comparator 521, and the second logic circuit 522 outputs a high level when the signs of the input signals at the sixth input terminal and the seventh input terminal are the same; the input end of the second counter 523 is connected to the output end of the first logic circuit 512, and the output end is connected to the second transconductance amplifier 332, and is configured to determine the gain of the second transconductance amplifier 332 according to the output signal of the counter; the input end of the second comparator 530 is connected to the first output end, and the output end is connected to the seventh input end.
In the present exemplary embodiment, the third comparator 521 may be configured to determine the magnitude of the reference signal and 0, i.e., determine whether the reference signal is positive or negative, and when the reference signal is greater than 0, the third comparator 521 outputs 1, i.e., outputs high level, and when the reference signal is less than 0, the third comparator 521 outputs 0, i.e., outputs low level.
In the present exemplary embodiment, the second comparator 530 may be configured to determine the magnitude of the output signal of the operational amplification block 130 and 0, that is, determine whether the output signal of the operational amplification block 130 is positive or negative, and when the output signal of the operational amplification block 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification block 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The second logic circuit 522 outputs a high level when the signs of the output signal of the operational amplifier module 130 and the reference signal are the same, and outputs a low level when the signs of the output signal of the operational amplifier module 130 and the reference signal are different, that is, the second logic circuit 522 may be an exclusive nor gate, or a logic circuit including a plurality of logic gates and capable of implementing the above functions, which is not limited in this exemplary embodiment.
In the present exemplary embodiment, the second counter 523 is configured to complete counting according to the output of the second logic circuit 522, the counter generates a rising edge when the output is 1, the counter generates a falling edge when the output is 0, and the second counter 523 may generate an 8-bit binary number with a sign bit to adjust the resistance of the sliding rheostat to adjust the gain of the second transconductance amplifier.
In the exemplary embodiment, after the reference signal and the target signal pass through the first transconductance amplifier and the second transconductance amplifier, respectively, a first cancellation signal and a second cancellation signal are generated. The first cancellation signal and the second cancellation signal are both current signals.
In this exemplary embodiment, the combining circuit may combine the first cancellation signal and the second cancellation signal to be a cancellation signal in the form of a voltage signal, and the combining circuit may be the transimpedance amplifier 540 or another circuit structure capable of achieving the above functions, which is not limited in this exemplary embodiment.
Compared with the prior art, the offset signal is generated by utilizing the output signal of the operational amplification module 130 and the reference signal and fed back to the second input end of the operational amplification module 130 for eliminating the interference signal in the initial electrocardiosignal, the interference signal in the initial electrocardiosignal can be eliminated without setting a suppression algorithm of a digital end, namely, the motion artifact is eliminated, the calculation resource is saved, the design cost of electrocardiosignal acquisition can be reduced without setting a complex algorithm at the digital end, and meanwhile, the energy consumption of signal acquisition can also be reduced. The feedback circuit has an effective inhibition effect on motion artifacts at the acquisition end, so that the input range of the acquisition system is reduced, the gain of the front end of the signal can be improved without causing signal saturation distortion, and the signal-to-noise ratio of the whole electrocardiosignal acquisition device is increased.
Further, the present disclosure also provides an electrocardiographic feature detection method, as shown in fig. 6, the method may include the following steps:
step S610, acquiring an initial electrocardiosignal and an impedance change value of a detected object;
step S620, generating a reference signal according to the impedance change value;
step S630, obtaining an output signal according to the electrocardiosignal and the offset signal through the operational amplification module 130;
step S640 is performed to generate the cancellation signal according to the output signal of the operational amplifier module 130 and the reference signal, and feed back the cancellation signal to the operational amplifier module 130.
In an exemplary embodiment of the present disclosure, the details of steps S110 to S130 are already described in detail in the description of the electrocardiograph feature detection apparatus, and therefore are not described herein again.
In this exemplary embodiment, referring to fig. 7, the generating the cancellation signal according to the output signal of the operational amplification module 130 and the reference signal and feeding the cancellation signal back to the operational amplification module 130 may include steps S710 to S750, which are as follows:
step S710, determining a first weight value according to the reference signal and the output signal;
step S720, determining a second weight value according to the target signal and the output signal;
step S730, generating a first sub-cancellation signal according to the reference signal and the first weight value;
step S740, performing phase shift on the reference signal to obtain a target signal, and generating a second sub-cancellation signal according to the target signal and a second weight value;
step S750, synthesizing the first sub cancellation signal and the second sub cancellation signal into the cancellation signal.
In the present exemplary embodiment, steps S710 to S750 have already been described in detail in the description of the electrocardiographic feature detection device, and therefore, the description thereof is omitted here.
Still further, the present disclosure also provides an electrocardiographic feature detection system, which includes at least one electrocardiographic feature detection apparatus, a processor 870 and a display device 910, where the electrocardiographic feature detection apparatus may include a signal acquisition module 110, a reference signal generation module 120, an operational amplification module 130 and a motion artifact estimation module 140. The signal acquisition module 110 is configured to acquire an initial electrocardiographic signal and an impedance change value of the detected object; the reference signal generating module 120 is connected to the signal acquiring module, and configured to generate a reference signal according to the impedance change value; the operational amplification module 130 includes a first input end, a second input end and a first output end, the first input end is connected to the signal acquisition module 110 for receiving the initial electrocardiographic signal, and the second input end is used for receiving the cancellation signal; the motion artifact estimation module 140 includes a third input end and a second output end, the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end, and is configured to generate a cancellation signal according to the output signal of the operational amplification module 130 and the reference signal and feed back the cancellation signal to the second input end of the operational amplification module 130.
In the present exemplary embodiment, a plurality of electrocardiographic signal acquisition modules may be included, for example, as shown in fig. 8, a plurality of electrocardiographic signal acquisition modules are included, which are a first electrocardiographic signal acquisition module 811, a second electrocardiographic signal acquisition module 812, and a third electrocardiographic signal acquisition module 813, respectively.
In the present exemplary embodiment, a first front-end amplifier 821 may be further disposed between the first signal collecting module and the first operational amplifier 831 for amplifying the collected initial electrocardiographic signal, and a second front-end amplifier 822 may be further disposed between the second signal collecting module and the second operational amplifier 832 for amplifying the collected initial electrocardiographic signal. And further the precision of eliminating the interference signals is higher.
In this exemplary embodiment, the first operational amplifier has a signal buffering function, and increases the input impedance of the acquired signal to increase the signal-to-noise ratio, that is, the input impedance becomes large, and the impedance change caused by the movement of the human body has a small influence on the subsequent calculation, thereby improving the signal-to-noise ratio of the electrocardiographic signal acquisition.
The processor 870 is configured to receive the output signal, generate an electrocardiogram according to the output signal, transmit the electrocardiogram to the display device 910, and receive and display the line electrocardiogram.
In the present exemplary embodiment, the display device may be an electronic device having a display function, such as a mobile phone, a tablet computer, and the like, and is not particularly limited in the present exemplary embodiment.
In an exemplary embodiment of the present disclosure, the signal acquisition module 110 may include at least one electrocardiographic signal acquisition unit and an impedance acquisition unit, wherein the electrocardiographic signal acquisition unit may be configured to acquire the initial electrocardiographic signal, and the electrocardiographic signal acquisition unit may be acquired by a three-lead electrocardiograph electrode, and a circuit structure of the electrocardiographic signal acquisition unit is substantially similar to a circuit structure of a signal acquisition portion of a commercially available electrocardiographic signal detector, for example, an electrocardiographic signal acquisition module, an electrocardiographic sensor, and the like. And is not particularly limited in the present exemplary embodiment.
In the present exemplary embodiment, the initial electrocardiographic signal acquired by the signal acquisition module 110 includes a target electrocardiographic signal and an interference signal, where the interference signal is generated by an impedance change of the detected object.
In this exemplary embodiment, the impedance collecting unit is configured to collect impedance changes of the detected object, that is, impedance changes during collection of the electrocardiographic signal, the impedance collecting unit may be an impedance tester, or impedance changes may be calculated by sensing changes of voltage and current, and the impedance collecting unit is not specifically limited in this exemplary embodiment.
In an example embodiment of the present disclosure, the reference signal generating module 120 may include a current providing unit and a generating unit, where the current providing unit is configured to provide a constant current signal, where the current signal may be greater than or equal to 8nA and less than or equal to 12nA, and specifically may be, for example, 10nA, 10.5nA, and the like, and is not limited in this example embodiment.
The generating module is configured to calculate a reference signal according to the current signal and the impedance change value, where a specific calculation manner of the reference signal may be obtained by multiplying the current signal by the impedance change value.
In an exemplary embodiment of the disclosure, referring to fig. 2, the operational amplifier module 130 may include a first input end, a second input end, and a first output end, the first input end is connected to the signal acquisition module 110 for receiving the initial cardiac signal, and the second input end is used for receiving the cancellation signal.
In this exemplary embodiment, referring to fig. 2, the operational amplification module 130 may include an operational amplifier 131, a first load 210, a second load 220 and a third load, wherein the operational amplifier 131 may include a first input end, a second input end and a first output end, the first input end is connected to the signal acquisition module 110 for receiving the initial cardiac signal, the second input end is used for receiving the cancellation signal, the first load 210 is connected between the first output end and the first input end, and the second load 220 is connected between the signal acquisition module 110 and the first output end; a third load connected between the second input and the motion artifact estimation module 140.
In this example embodiment, the first load 210, the second load 220, and the third load 230 may be resistance elements and have the same impedance, for example, the impedances of the first load 210, the second load 220, and the third load 230 are all 10 ohms, in another example embodiment of the present disclosure, the impedances of the first load 210, the second load 220, and the third load may also be different, for example, the impedance of the first load 210 is 10 ohms, the impedance of the second load 220 is 12 ohms, and the impedance of the third load is 11 ohms, which may be customized according to the needs of a user, and in this example embodiment, the impedances of the first load 210, the second load 220, and the third load 230 are not limited in detail.
In an example embodiment of the present disclosure, referring to fig. 3, the motion artifact estimation module 140 may include a first cancellation circuit 310, a second cancellation circuit 330, a weight assignment circuit 340, and a synthesis circuit 320. The first cancellation circuit 310 is configured to generate a first sub-cancellation signal according to the reference signal and the first weight value; the second cancellation circuit 330 is configured to phase shift the reference signal to obtain a target signal, and generate a second sub-cancellation signal according to the target signal and a second weight value; the weight distribution circuit 340 is used for determining a first weight value according to the reference signal and the output signal, and determining a second weight value according to the target signal and the output signal; the synthesizing circuit 320 is configured to synthesize the first sub-cancellation signal and the second sub-cancellation signal into a cancellation signal.
In this example embodiment, the first cancellation circuit 310 may include a first transconductance amplifier 311, an input end of the first transconductance amplifier 311 is connected to the reference signal generating module 120, and an output end of the first transconductance amplifier 311 is connected to the chorus module, wherein the first transconductance amplifier 311 may further include a gain circuit, wherein the gain circuit may further include a voltage signal and a sliding varistor, wherein a magnitude of the voltage signal may be greater than or equal to 1V and less than or equal to 1.8V, for example, 1.5V, 1.2V, and the like, which is not specifically limited in this example embodiment, and a maximum resistance of the sliding varistor may be greater than or equal to 5M Ω and less than or equal to 10M Ω, for example, 6M Ω, 5.5M Ω, and the like, which is not specifically limited in this example embodiment. The actual access resistance of the sliding rheostat is determined according to the weight distribution circuit 340, and then the gain of the first transconductance amplifier 311 is determined.
In this example embodiment, as shown in fig. 4, the second cancellation circuit 330 may include a low pass filter circuit and a second transconductance amplifier 332, where the low pass filter circuit is used to phase shift the reference signal to obtain the target signal, and the low pass filter circuit is a filter circuit in the related art, for example, an active low pass filter 331, a passive low pass filter 331, and the like, and is not limited in this example embodiment.
In this exemplary embodiment, the input terminal of the second transconductance amplifier 332 is connected to the low pass filter circuit, and the output terminal is connected to the combining circuit 320, wherein the second transconductance amplifier 332 further includes a gain circuit, wherein the gain circuit further includes a voltage signal and a sliding varistor, wherein the magnitude of the voltage signal may be greater than or equal to 1V and less than or equal to 1.8V, for example, 1.5V, 1.2V, and the like, and without specific limitation in this exemplary embodiment, the maximum resistance of the sliding varistor may be greater than or equal to 5M Ω and less than or equal to 10M Ω, for example, 6M Ω, 5.5M Ω, and the like, and is not specifically limited in this exemplary embodiment. The actual on-resistance of the sliding rheostat is determined according to the weight assignment circuit 340.
In this example embodiment, referring to fig. 5, the weight assignment circuit 340 may include a first sub-weight assignment circuit and a second word weight assignment circuit 340, wherein the first sub-weight assignment circuit 340 may be configured to determine a first weight value according to a reference signal and an output signal, wherein the first sub-weight assignment circuit includes a first comparator 511, a first logic circuit 512, a first counter 513 and a second comparator 530, wherein an input end of the first comparator 511 is connected to the reference signal generation module 120; the first logic circuit 512 includes a fourth input terminal and a fifth input terminal, the fourth input terminal is connected to the output terminal of the first comparator 511, and the first logic circuit 512 outputs a high level when the signs of the input signals at the fourth input terminal and the fifth input terminal are the same; the first counter 513 has an input end connected to the output end of the first logic circuit 512, and an output end connected to the first transconductance amplifier 311, and is configured to determine the gain of the first transconductance amplifier 311 according to the output signal of the counter; the input terminal of the second comparator 530 is connected to the first output terminal, and the output terminal is connected to the fifth input terminal.
In the present exemplary embodiment, the first comparator 511 may be configured to determine the magnitude of the reference signal and 0, i.e., determine whether the reference signal is positive or negative, and when the reference signal is greater than 0, the first comparator 511 outputs 1, i.e., outputs a high level, and when the reference signal is less than 0, the first comparator 511 outputs 0, i.e., outputs a low level.
In the present exemplary embodiment, the second comparator 530 may be configured to determine the magnitude of the output signal of the operational amplification block 130 and 0, that is, determine whether the output signal of the operational amplification block 130 is positive or negative, and when the output signal of the operational amplification block 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification block 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The first logic circuit 512 outputs a high level when the signs of the output signal of the operational amplifier module 130 and the reference signal are the same, and outputs a low level when the signs of the output signal of the operational amplifier module 130 and the reference signal are different, that is, the first logic circuit 512 may be an exclusive nor or a logic circuit including a plurality of logic gates and capable of implementing the above functions, which is not limited in this exemplary embodiment.
In the present exemplary embodiment, the first counter 513 is configured to complete counting according to the output of the first logic circuit 512, when the output is 1, the counter generates a rising edge, and the output is 0, the counter generates a falling edge, and the first counter 513 may generate an 8-bit binary number with a sign bit to adjust the resistance of the sliding rheostat to adjust the gain of the first transconductance amplifier.
In an example embodiment of the present disclosure, the second word weight assignment circuit 340 may include a third comparator 521, a second logic circuit 522, a second counter 523, and a second comparator 530. The input end of the third comparator 521 is connected to the output end of the low-pass filter circuit; the second logic circuit 522 comprises a sixth input terminal and a seventh input terminal, the sixth input terminal is connected to the output terminal of the third comparator 521, and the second logic circuit 522 outputs a high level when the signs of the input signals at the sixth input terminal and the seventh input terminal are the same; the input end of the second counter 523 is connected to the output end of the first logic circuit 512, and the output end is connected to the second transconductance amplifier 332, and is configured to determine the gain of the second transconductance amplifier 332 according to the output signal of the counter; the input end of the second comparator 530 is connected to the first output end, and the output end is connected to the seventh input end.
In the present exemplary embodiment, the third comparator 521 may be configured to determine the magnitude of the reference signal and 0, i.e., determine whether the reference signal is positive or negative, and when the reference signal is greater than 0, the third comparator 521 outputs 1, i.e., outputs high level, and when the reference signal is less than 0, the third comparator 521 outputs 0, i.e., outputs low level.
In the present exemplary embodiment, the second comparator 530 may be configured to determine the magnitude of the output signal of the operational amplification block 130 and 0, that is, determine whether the output signal of the operational amplification block 130 is positive or negative, and when the output signal of the operational amplification block 130 is greater than 0, the output of the first comparator 511 is 1, that is, the output is high level, and when the output signal of the operational amplification block 130 is less than 0, the output of the first comparator 511 is 0, that is, the output is low level.
The second logic circuit 522 outputs a high level when the signs of the output signal of the operational amplifier module 130 and the reference signal are the same, and outputs a low level when the signs of the output signal of the operational amplifier module 130 and the reference signal are different, that is, the second logic circuit 522 may be an exclusive nor gate, or a logic circuit including a plurality of logic gates and capable of implementing the above functions, which is not limited in this exemplary embodiment.
In the present exemplary embodiment, the second counter 523 is configured to complete counting according to the output of the second logic circuit 522, the counter generates a rising edge when the output is 1, the counter generates a falling edge when the output is 0, and the second counter 523 may generate an 8-bit binary number with a sign bit to adjust the resistance of the sliding rheostat to adjust the gain of the second transconductance amplifier.
In the exemplary embodiment, after the reference signal and the target signal pass through the first transconductance amplifier and the second transconductance amplifier, respectively, a first cancellation signal and a second cancellation signal are generated. The first cancellation signal and the second cancellation signal are both current signals.
In this exemplary embodiment, the combining circuit may combine the first cancellation signal and the second cancellation signal to be a cancellation signal in the form of a voltage signal, and the combining circuit may be the transimpedance amplifier 540 or another circuit structure capable of achieving the above functions, which is not limited in this exemplary embodiment.
In this exemplary embodiment, referring to fig. 8, the electrocardiographic feature detection system further includes a storage module. A power device 890 and a communication module 880, wherein the storage module is configured to store the obtained output signal, and the power device 890 is configured to provide power to the processor 870, perform charging management, monitor battery power, and perform voltage conversion required by each circuit module. The storage module can also be used for storing the execution codes of the processor, data storage and the like; the communication module 880 is used for communication between the processor 870 and the display device 910.
In this exemplary embodiment, the communication module 880 may complete the subsequent communication between the processor 870 and the display device 910, or complete the wireless communication between the processor 870 and the display device 910, which is not limited in this exemplary embodiment.
In this exemplary embodiment, the communication module 880 is a wireless communication module, the communication module mainly sends the processed output signal to a terminal device such as a mobile phone through a wireless protocol, and the used wireless communication protocol may include wireless protocols such as bluetooth (traditional bluetooth or low-power bluetooth), WIFI, and Zigbee.
In an exemplary embodiment of the present disclosure, the system for detecting electrocardiographic characteristics further comprises an instrument amplifier circuit, a first filter 850 and a first analog-to-digital conversion module 861, wherein an instrument amplifier 840 is connected between the electrocardiographic characteristic detecting device and the processor 870; a first filter 850 connected between the instrumentation amplifier 840 and the processor 870 for removing noise of an output signal; a first analog-to-digital conversion module 861 is coupled to the first filter 850 and the processor 870.
In this exemplary embodiment, the system for detecting electrocardiographic features further includes a second analog-to-digital conversion module 862 connected to the output end of the motion artifact estimation module 140, and configured to provide a cancellation signal to the processor 870, so as to further enhance the effect of canceling the interference signal, and enhance the accuracy of obtaining an electrocardiogram.
In this exemplary embodiment, the electrocardiograph detection system may further include a right leg driving circuit, wherein the right leg driving circuit is connected to the meter method, and the right leg driving circuit may include a driving amplifier 823 and a third signal collecting module 813. The right leg driving circuit can be connected to a human body through a reverse common mode signal to play a role in eliminating a common mode. The specific implementation of the right leg driving circuit is well-known and will not be described herein.
In the present exemplary embodiment, referring to fig. 9, the recycling of the above system for acquiring an ecg signal includes the following steps:
step S910, a first analog-to-digital converter collects an ECG signal collected by a storage point feature detection device with a motion pseudo-implicit estimation module;
step S920, the processor reconstructs the ECG signal to generate an electrocardiogram;
step S930, displaying the electrocardiogram on a display device.
The detailed implementation of the above steps can be described in detail in the above description of the electrocardiographic feature acquisition device and the electrocardiographic feature acquisition system, and therefore, the detailed description thereof is omitted here.
Other embodiments of the disclosure will be apparent to those skilled in the art from consideration of the specification and practice of the disclosure disclosed herein. This application is intended to cover any variations, uses, or adaptations of the disclosure following, in general, the principles of the disclosure and including such departures from the present disclosure as come within known or customary practice within the art to which the disclosure pertains. It is intended that the specification and examples be considered as exemplary only, with a true scope and spirit of the disclosure being indicated by the following claims.
It will be understood that the present disclosure is not limited to the precise arrangements described above and shown in the drawings and that various modifications and changes may be made without departing from the scope thereof. The scope of the present disclosure is to be limited only by the terms of the appended claims.
The described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments, and the features discussed in connection with the embodiments are interchangeable, if possible. In the above description, numerous specific details are provided to give a thorough understanding of embodiments of the disclosure. One skilled in the relevant art will recognize, however, that the subject matter of the present disclosure can be practiced without one or more of the specific details, or with other methods, components, materials, and so forth. In other instances, well-known structures, materials, or operations are not shown or described in detail to avoid obscuring aspects of the disclosure.
The terms "about" and "approximately" as used herein generally mean within 20%, preferably within 10%, and more preferably within 5% of a given value or range. The amounts given herein are approximate, meaning that the meaning of "about", "approximately" or "approximately" may still be implied without specific recitation.
Although relative terms, such as "upper" and "lower," may be used in this specification to describe one element of an icon relative to another, these terms are used in this specification for convenience only, e.g., in accordance with the orientation of the examples described in the figures. It will be appreciated that if the device of the icon were turned upside down, the element described as "upper" would become the element "lower". Other relative terms, such as "high", "low", "top", "bottom", "front", "back", "left", "right", etc., are also intended to have similar meanings. When a structure is "on" another structure, it may mean that the structure is integrally formed with the other structure, or that the structure is "directly" disposed on the other structure, or that the structure is "indirectly" disposed on the other structure via another structure.
In this specification, the terms "a", "an", "the", "said" and "at least one" are used to indicate the presence of one or more elements/components/etc.; the terms "comprising," "including," and "having" are intended to be inclusive and mean that there may be additional elements/components/etc. other than the listed elements/components/etc.; the terms "first," "second," and "third," etc. are used merely as labels, and are not limiting on the number of their objects.
It is to be understood that the disclosure is not limited in its application to the details of construction and the arrangements of the components set forth in the specification. The present disclosure is capable of other embodiments and of being practiced and carried out in various ways. The foregoing variations and modifications are within the scope of the present disclosure. It should be understood that the disclosure disclosed and defined in this specification extends to all alternative combinations of two or more of the individual features mentioned or evident from the text and/or drawings. All of these different combinations constitute various alternative aspects of the present disclosure. The embodiments described in this specification illustrate the best mode known for carrying out the disclosure and will enable those skilled in the art to utilize the disclosure.

Claims (20)

1. An electrocardiographic feature detection device characterized by comprising:
the signal acquisition module is used for acquiring an initial electrocardiosignal and an impedance change value of the detected object;
the reference signal generating module is connected with the signal acquisition module and used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected to the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
and the motion artifact estimation module comprises a third input end and a second output end, the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end and is used for generating the cancellation signal according to the output signal of the operational amplification module and the reference signal and feeding the cancellation signal back to the second input end of the operational amplification module.
2. The apparatus of claim 1, wherein the cancellation signal comprises a first sub-cancellation signal and a second sub-cancellation signal, and wherein the motion artifact estimation module comprises:
the first cancellation circuit is used for generating a first sub cancellation signal according to the reference signal and a first weight value;
the second offset circuit is used for performing phase shift on the reference signal to obtain a target signal and generating a second sub offset signal according to the target signal and a second weight value;
a weight distribution circuit for determining the first weight value according to the reference signal and the output signal, and determining the second weight value according to the target signal and the output signal;
and the synthesis circuit is used for synthesizing the first sub-cancellation signal and the second sub-cancellation signal into the cancellation signal.
3. The apparatus of claim 2, wherein the first cancellation circuit comprises:
and the input end of the first transconductance amplifier is connected to the reference signal generation module, and the output end of the first transconductance amplifier is connected to the synthesis circuit.
4. The apparatus of claim 3, wherein the second cancellation circuit comprises:
the low-pass filter circuit is connected with the reference signal generation module and used for carrying out phase shift on the reference signal to obtain a target signal;
and the input end of the second transconductance amplifier is connected with the low-pass filter circuit, and the output end of the second transconductance amplifier is connected with the synthesis circuit.
5. The apparatus of claim 4, wherein the weight assignment circuit comprises a first sub-weight assignment circuit and a second sub-weight assignment circuit; wherein,
the first sub-weight assignment circuit is configured to determine a first weight value according to the reference signal and the output signal, and includes:
the input end of the first comparator is connected with the reference signal generation module;
the first logic circuit comprises a fourth input end and a fifth input end, the fourth input end is connected to the output end of the first comparator, and the first logic circuit outputs high level when the signs of the input signals of the fourth input end and the fifth input end are the same;
the input end of the first counter is connected to the output end of the first logic circuit, the output end of the first counter is connected to the first transconductance amplifier, and the first counter is used for determining the gain of the first transconductance amplifier according to the output signal of the first counter;
and the input end of the second comparator is connected to the first output end, and the output end of the second comparator is connected to the fifth input end.
6. The apparatus of claim 5, wherein the second sub-weight assignment circuit is configured to determine a second weight value according to the target signal and the output signal, and comprises:
the input end of the third comparator is connected with the output end of the low-pass filter circuit;
the second logic circuit comprises a sixth input end and a seventh input end, the sixth input end is connected to the output end of the third comparator, and the second logic circuit outputs high level when the signs of the input signals of the sixth input end and the seventh input end are the same;
the input end of the second counter is connected with the output end of the second logic circuit, and the output end of the second counter is connected with the second transconductance amplifier and used for determining the gain of the second transconductance amplifier according to the output signal of the second counter;
and the input end of the second comparator is connected to the first output end, and the output end of the second comparator is connected to the seventh input end.
7. The apparatus of claim 1, wherein the signal acquisition module comprises:
at least one electrocardiosignal acquisition unit for acquiring initial electrocardiosignals;
and the impedance acquisition unit is used for detecting the impedance change value of the detected object.
8. The apparatus of claim 1, wherein the reference signal generation module comprises:
the current providing unit is used for providing a constant current signal;
and a generating unit which generates the reference signal by using the impedance change value and the current signal.
9. The apparatus of claim 1, wherein the operational amplification module comprises:
the operational amplifier comprises a first input end, a second input end and a first output end, wherein the first input end is connected to the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
a first load connected between the first output terminal and the first input terminal;
the second load is connected between the signal acquisition module and the first output end;
a third load connected between the second input and the motion artifact estimation module.
10. An electrocardiogram characteristic detection method is characterized by comprising the following steps:
acquiring an initial electrocardiosignal and an impedance change value of a detected object;
generating a reference signal according to the impedance change value;
obtaining an output signal according to the electrocardiosignal and the offset signal through an operational amplification module;
and generating the cancellation signal according to the output signal of the operational amplification module and the reference signal and feeding the cancellation signal back to the operational amplification module.
11. The method of claim 10, wherein generating the cancellation signal according to the output signal of the operational amplification module and the reference signal comprises:
determining a first weight value according to the reference signal and the output signal;
determining a second weight value according to the target signal and the output signal;
generating a first sub-cancellation signal according to the reference signal and a first weight value;
performing phase shift on the reference signal to obtain a target signal, and generating a second sub-cancellation signal according to the target signal and a second weight value;
and synthesizing the first sub-cancellation signal and the second sub-cancellation signal into the cancellation signal.
12. An electrocardio characteristic detection system is characterized by comprising at least one electrocardio characteristic detection device, a processor and a display device;
wherein, electrocardio characteristic detection device includes:
a signal acquisition module for acquiring initial electrocardiosignal and impedance variation value
The reference signal generating module is connected with the signal acquisition module and used for generating a reference signal according to the impedance change value;
the operational amplification module comprises a first input end, a second input end and a first output end, wherein the first input end is connected to the signal acquisition module and used for receiving the initial electrocardiosignal, and the second input end is used for receiving a cancellation signal;
a motion artifact estimation module, including a third input end and a second output end, where the third input end is connected to the reference signal generation module and the first output end, and the second output end is connected to the second input end, and is used to generate the cancellation signal according to the output signal of the operational amplification module and the reference signal, and feed back the cancellation signal to the second input end of the operational amplification module;
the processor is used for receiving the output signal, generating an electrocardiogram according to the output signal and transmitting the electrocardiogram to the display equipment;
and the display device is connected with the processor and used for receiving and displaying the electrocardiogram.
13. The system of claim 12, further comprising:
the instrument amplifier is connected between the electrocardio characteristic detection device and the processor;
the first filter is connected between the instrumentation amplifier and the processor and is used for eliminating noise of an output signal;
and the first analog-to-digital conversion module is connected with the first filter and the processor.
14. The system of claim 12, further comprising:
and the second analog-to-digital conversion module is connected to the output end of the motion artifact estimation module.
15. The system of claim 12, further comprising:
a storage module for storing the output signal;
a power supply device for supplying power to the processor;
and the communication module is used for communication between the processor and the display equipment.
16. The system of claim 12, wherein the cancellation signal comprises a first sub-cancellation signal and a second sub-cancellation signal, and wherein the motion artifact estimation module comprises:
the first cancellation circuit is used for generating a first sub cancellation signal according to the reference signal and a first weight value;
the second offset circuit is used for performing phase shift on the reference signal to obtain a target signal and generating a second sub offset signal according to the target signal and a second weight value;
a weight distribution circuit for determining a first weight value according to the reference signal and the output signal, and determining a second weight value according to the target signal and the output signal;
and the synthesis circuit is used for synthesizing the first sub-cancellation signal and the second sub-cancellation signal into the cancellation signal.
17. The system of claim 16, wherein the first cancellation circuit comprises:
and the input end of the first transconductance amplifier is connected to the reference signal generation module, and the output end of the first transconductance amplifier is connected to the synthesis circuit.
18. The system of claim 17, wherein the second cancellation circuit comprises:
the low-pass filter circuit is connected with the reference signal generation module and used for carrying out phase shift on the reference signal to obtain a target signal;
and the input end of the second transconductance amplifier is connected with the low-pass filter circuit, and the output end of the second transconductance amplifier is connected with the synthesis circuit.
19. The system of claim 18, wherein the weight assignment circuit comprises a first sub-weight assignment circuit and a second sub-weight assignment circuit; wherein,
the first sub-weight assignment circuit is configured to determine a first weight value according to the reference signal and the output signal, and includes:
the input end of the first comparator is connected with the reference signal generation module;
the first logic circuit comprises a fourth input end and a fifth input end, the fourth input end is connected to the output end of the first comparator, and the first logic circuit outputs high level when the signs of the input signals of the fourth input end and the fifth input end are the same;
the input end of the first counter is connected to the output end of the first logic circuit, the output end of the first counter is connected to the first transconductance amplifier, and the first counter is used for determining the gain of the first transconductance amplifier according to the output signal of the first counter;
and the input end of the second comparator is connected to the first output end, and the output end of the second comparator is connected to the fifth input end.
20. The system of claim 19, wherein the second sub-weight assignment circuit is configured to determine a second weight value according to the target signal and the output signal, and comprises:
the input end of the third comparator is connected with the output end of the low-pass filter circuit;
the second logic circuit comprises a sixth input end and a seventh input end, the sixth input end is connected to the output end of the third comparator, and the second logic circuit outputs high level when the signs of the input signals of the sixth input end and the seventh input end are the same;
the input end of the second counter is connected with the output end of the second logic circuit, and the output end of the second counter is connected with the second transconductance amplifier and used for determining the gain of the second transconductance amplifier according to the output signal of the second counter;
and the input end of the second comparator is connected to the first output end, and the output end of the second comparator is connected to the seventh input end.
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Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5924980A (en) * 1998-03-11 1999-07-20 Siemens Corporate Research, Inc. Method and apparatus for adaptively reducing the level of noise in an acquired signal
WO2008080008A2 (en) * 2006-12-22 2008-07-03 Emotiv Systems Pty Ltd Analog conditioning of bioelectric signals
CN101422362A (en) * 2008-12-09 2009-05-06 华南理工大学 Wireless cardiac bioelectricity monitoring system with motion artifact elimination function
CN101548885A (en) * 2009-04-17 2009-10-07 南京大学 Method for eliminating power frequency interfering signals in electrophysiological signals
CN102885620A (en) * 2012-09-28 2013-01-23 上海理工大学 Ventricular tachycardia detector and detection method thereof
CN103099615A (en) * 2013-01-23 2013-05-15 深圳市理邦精密仪器股份有限公司 Method and device for eliminating exercise electrocardiosignal interference
WO2014155230A1 (en) * 2013-03-29 2014-10-02 Koninklijke Philips N.V. Apparatus and method for ecg motion artifact removal
CN203861212U (en) * 2014-04-04 2014-10-08 北京邮电大学 Multi-lead remote electrocardiogram monitoring device
US20140309943A1 (en) * 2013-04-15 2014-10-16 Stichting Imec Nederland System and method for the analysis of biopotential signals using motion artifact removal techniques
CN104622461A (en) * 2014-12-31 2015-05-20 北京瀚景锦河科技有限公司 Multi-lead ECG signal acquisition device
CN105022082A (en) * 2015-07-29 2015-11-04 武汉中派科技有限责任公司 Photon measurement front-end circuit
CN106716851A (en) * 2015-05-30 2017-05-24 华为技术有限公司 Device and method for canceling interference signal
CN107545901A (en) * 2016-06-28 2018-01-05 瑞昱半导体股份有限公司 Signal processing apparatus and signal processing method
CN109347500A (en) * 2018-11-26 2019-02-15 Oppo(重庆)智能科技有限公司 A kind of interference elimination method, device and computer storage medium
CN109984742A (en) * 2019-04-22 2019-07-09 深圳大学 Cardiac impedance signal processing system and method
CN209281373U (en) * 2018-11-13 2019-08-20 河南华南医电科技有限公司 Direct current biasing for human body Collection equipment eliminates circuit
CN110868235A (en) * 2019-11-08 2020-03-06 福州智程信息科技有限公司 Self-adaptive interference cancellation control device, system and method
CN111208451A (en) * 2018-11-22 2020-05-29 深圳迈瑞生物医疗电子股份有限公司 Electrocardio lead falling detection circuit and method and medical monitoring equipment
CN111627414A (en) * 2019-02-28 2020-09-04 上海汽车集团股份有限公司 Active denoising method and device and electronic equipment

Patent Citations (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5924980A (en) * 1998-03-11 1999-07-20 Siemens Corporate Research, Inc. Method and apparatus for adaptively reducing the level of noise in an acquired signal
WO2008080008A2 (en) * 2006-12-22 2008-07-03 Emotiv Systems Pty Ltd Analog conditioning of bioelectric signals
CN101422362A (en) * 2008-12-09 2009-05-06 华南理工大学 Wireless cardiac bioelectricity monitoring system with motion artifact elimination function
CN101548885A (en) * 2009-04-17 2009-10-07 南京大学 Method for eliminating power frequency interfering signals in electrophysiological signals
CN102885620A (en) * 2012-09-28 2013-01-23 上海理工大学 Ventricular tachycardia detector and detection method thereof
CN103099615A (en) * 2013-01-23 2013-05-15 深圳市理邦精密仪器股份有限公司 Method and device for eliminating exercise electrocardiosignal interference
WO2014155230A1 (en) * 2013-03-29 2014-10-02 Koninklijke Philips N.V. Apparatus and method for ecg motion artifact removal
US20140309943A1 (en) * 2013-04-15 2014-10-16 Stichting Imec Nederland System and method for the analysis of biopotential signals using motion artifact removal techniques
CN203861212U (en) * 2014-04-04 2014-10-08 北京邮电大学 Multi-lead remote electrocardiogram monitoring device
CN104622461A (en) * 2014-12-31 2015-05-20 北京瀚景锦河科技有限公司 Multi-lead ECG signal acquisition device
CN106716851A (en) * 2015-05-30 2017-05-24 华为技术有限公司 Device and method for canceling interference signal
CN105022082A (en) * 2015-07-29 2015-11-04 武汉中派科技有限责任公司 Photon measurement front-end circuit
CN107545901A (en) * 2016-06-28 2018-01-05 瑞昱半导体股份有限公司 Signal processing apparatus and signal processing method
CN209281373U (en) * 2018-11-13 2019-08-20 河南华南医电科技有限公司 Direct current biasing for human body Collection equipment eliminates circuit
CN111208451A (en) * 2018-11-22 2020-05-29 深圳迈瑞生物医疗电子股份有限公司 Electrocardio lead falling detection circuit and method and medical monitoring equipment
CN109347500A (en) * 2018-11-26 2019-02-15 Oppo(重庆)智能科技有限公司 A kind of interference elimination method, device and computer storage medium
CN111627414A (en) * 2019-02-28 2020-09-04 上海汽车集团股份有限公司 Active denoising method and device and electronic equipment
CN109984742A (en) * 2019-04-22 2019-07-09 深圳大学 Cardiac impedance signal processing system and method
CN110868235A (en) * 2019-11-08 2020-03-06 福州智程信息科技有限公司 Self-adaptive interference cancellation control device, system and method

Non-Patent Citations (3)

* Cited by examiner, † Cited by third party
Title
代蜀梅: "心电信号去噪方法的研究与实现", 《中国优秀硕士学位论文全文数据库》, pages 062 - 81 *
李树楠: "心电测量工频干扰智能抑制技术", 《中国优秀硕士学位论文全文数据库》, pages 080 - 28 *
杨杰: "心电信号的检测与模式分类方法的研究", 《中国优秀硕士学位论文全文数据库》, pages 136 - 131 *

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