CN114299077A - Test method, system, storage medium and equipment based on PCB (printed Circuit Board) diagram - Google Patents
Test method, system, storage medium and equipment based on PCB (printed Circuit Board) diagram Download PDFInfo
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Abstract
The invention provides a test method, a test system, a storage medium and a device based on a PCB (printed Circuit Board), wherein the method comprises the following steps: acquiring the position numbers, the packaging type names and the silk-screen coordinate information of a plurality of parts on the PCB by PCB drawing software; associating the packaging type name of each part with the silk-screen coordinate information through the position number of each part, and recording the name into a table; extracting silk-screen coordinate information of a specific part in a table according to the position number of the specific part, and increasing or decreasing a plurality of coordinate values in the table by preset values to obtain a plurality of expanded coordinate values; aiming at a specified part, extracting silk-screen coordinate information of the specified part from a table according to the position number of the specified part, comparing a plurality of coordinate values with a plurality of extended coordinate values, and determining whether the coordinate values fall into a range formed by the plurality of extended coordinate values or not based on a comparison result; if so, obtaining a test result that the specified part is a part which does not meet the preset requirement. The invention improves the efficiency of testing whether the position of the appointed part meets the installation safety requirement.
Description
Technical Field
The invention relates to the technical field of hardware, in particular to a test method, a test system, a storage medium and test equipment based on a PCB (printed circuit board) diagram.
Background
During the production process of a Printed Circuit Board Assembly (PCBA), certain stress is generated during the installation of components such as a compression joint part and a screw, and the stress affects the surrounding components, and the tin of the components is seriously cracked. The main reasons why electronic parts that have been soldered fall or have tin cracks can be summarized as follows: stress > bonding force. And the bonding force of the part is strongly related to the size of the bonding pad.
However, in all the parts commonly used in the manufacture of PCBs (Printed Circuit boards), such as the schematic diagram of the BGA packaged chip shown in fig. 2 and the schematic diagram of the QFN packaged chip shown in fig. 3, the BGA packaged chip and the QFN packaged chip are both parts having a larger body and smaller pads, and all the pads are under the body of the part. For such parts, if the problem of tin cracking is generated, hardware engineers cannot know from the appearance of the parts, so that the parts are not beneficial to detection and maintenance. Therefore, the BGA packaged chip, the QFN packaged chip, the screw hole and the pressure connection piece are required to meet a certain safety distance in the process of plate making. This safety distance is related to the board thickness of the PCB. In the past, the measurement is manually carried out, parts are easy to miss, and the testing efficiency and the reliability are poor.
Disclosure of Invention
In view of the above, an object of the present invention is to provide a PCB diagram based testing method, system, storage medium and device, so as to solve the problems of low testing efficiency and poor reliability when testing whether part of components meet the preset installation safety requirements in the prior art.
Based on the above purpose, the invention provides a PCB diagram-based test method, which comprises the following steps:
acquiring the bit numbers and the packaging type names of a plurality of parts on the PCB drawing through PCB drawing software;
acquiring the position numbers and silk-screen coordinate information of a plurality of parts on a silk-screen layer of a PCB (printed Circuit Board) through PCB (printed Circuit Board) drawing software;
associating the packaging type name of each part with silk-screen coordinate information through the position number of each part, and recording the position number, the packaging type name and the silk-screen coordinate information of each part into a table;
extracting silk-screen coordinate information of a specific part in a table according to the position number of the specific part, and increasing or decreasing a plurality of coordinate values in the silk-screen coordinate information by preset numerical values to obtain a plurality of extended coordinate values;
aiming at a specified part, extracting silk-screen coordinate information of the specified part from a table according to the position number of the specified part, comparing a plurality of coordinate values in the silk-screen coordinate information with a plurality of extended coordinate values, and determining whether the coordinate values fall into a range formed by the extended coordinate values or not based on a comparison result;
and responding to the coordinate value of the designated part falling into the range, and obtaining the test result of the designated part which is the part not meeting the preset requirement.
In some embodiments, the method further comprises:
the preset value is determined based on the thickness of the PCB plate used for making the PCB picture.
In some embodiments, obtaining, by the PCB drawing software, the bit number and the package type name of the number of parts on the PCB drawing comprises:
and acquiring the bit numbers, the packaging type names and the first center coordinate information of a plurality of parts on the PCB by PCB drawing software.
In some embodiments, associating the package type name with the silk-screen coordinate information through the bit number of each part, and recording the bit number, the package type name, and the silk-screen coordinate information of each part into a table includes:
associating the packaging type name, the first center coordinate information and the silk-screen coordinate information of each part through the position number of each part, recording the position number, the packaging type name, the first center coordinate information and the silk-screen coordinate information of each part into a table, and determining whether the specified part lacks the packaging type name or not based on the table;
responding to the name of the missing packaging type of the specified part, obtaining pin coordinate information of the specified part through PCB (printed circuit board) drawing software, and obtaining second center coordinate information of the specified part based on the pin coordinate information;
judging whether the second central coordinate information is consistent with one or more of the first central coordinate information of the parts;
and recording the packaging type name of the specified part with the missing packaging type name into a table in response to the second center coordinate information being consistent with one or more of the first center coordinate information.
In some embodiments, the package type of the designated part missing the package type name is a QFN package.
In some embodiments, the method further comprises:
and copying the bit number, the packaging type name and the silk-screen coordinate information of the part which does not meet the preset requirements from the table to a test report based on the test result.
In some embodiments, the specific parts include a press and/or a screw, and the specific parts include a chip of which a package type is a BGA package and/or a chip of which a package type is a QFN package.
In another aspect of the present invention, there is also provided a PCB diagram based test system, including:
the first acquisition module is configured for acquiring the bit numbers and the packaging type names of a plurality of parts on the PCB drawing through PCB drawing software;
the second acquisition module is configured for acquiring the position numbers and the silk-screen coordinate information of the parts on a silk-screen layer of the PCB through PCB drawing software;
the recording module is configured and used for associating the packaging type name of each part with the silk-screen coordinate information through the position number of each part, and recording the position number, the packaging type name and the silk-screen coordinate information of each part into a table;
the coordinate extension module is configured and used for extracting silk-screen coordinate information of a specific part from a table according to the position number of the specific part, and increasing or decreasing a plurality of coordinate values in the silk-screen coordinate information by preset values to obtain a plurality of extended coordinate values;
the confirming module is configured for extracting the silk-screen coordinate information of the specified part from the table according to the position number of the specified part, comparing a plurality of coordinate values in the silk-screen coordinate information with a plurality of extended coordinate values, and confirming whether the coordinate values fall into the range formed by the plurality of extended coordinate values or not based on the comparison result; and
and the test result obtaining module is configured for responding to the coordinate value of the specified part falling into the range and obtaining the test result of the specified part which is the part not meeting the preset requirement.
In yet another aspect of the present invention, a computer-readable storage medium is also provided, storing computer program instructions, which when executed by a processor, implement the above-described method.
In yet another aspect of the present invention, a computer device is further provided, which includes a memory and a processor, the memory storing a computer program, which when executed by the processor performs the above method.
The invention has at least the following beneficial technical effects:
according to the method, the position numbers, the packaging type names and the silk-screen coordinate information of all parts in a PCB are obtained, the silk-screen coordinate of a specific part is expanded to define a safety region of the specific part in the installation process, and whether the coordinate of the specific part falls into the safety region is judged, so that the specific part which does not meet the preset requirement is obtained; the efficiency and the reliability of whether the position of the appointed part of test accords with the preset installation safety requirement are further improved, and the hardware development personnel can be instructed to readjust the position of the appointed part which does not accord with the preset requirement, so that the research and development period of the product can be shortened, and the market competitiveness of the product can be further improved.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
FIG. 1 is a schematic diagram of a PCB diagram-based testing method provided in accordance with an embodiment of the present invention;
FIG. 2 is a schematic diagram of a chip of a BGA package provided in accordance with the prior art;
fig. 3 is a schematic diagram of a chip of a QFN package provided according to the prior art;
fig. 4 is a schematic diagram of adding an auxiliary line in the process of determining the characteristics of a chip of a QFN package provided by the embodiment of the present invention;
FIG. 5 is a schematic coordinate diagram of a crimp and a chip of a BGA package provided in accordance with an embodiment of the present invention;
FIG. 6 is a schematic diagram of a PCB diagram-based test system provided in accordance with an embodiment of the present invention;
FIG. 7 is a schematic diagram of a computer-readable storage medium for implementing a PCB diagram-based testing method according to an embodiment of the present invention;
fig. 8 is a schematic hardware structure diagram of a computer device for executing a PCB diagram-based testing method according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two non-identical entities with the same name or different parameters, and it is understood that "first" and "second" are only used for convenience of expression and should not be construed as limiting the embodiments of the present invention. Furthermore, the terms "comprises" and "comprising," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements does not include all of the other steps or elements inherent in the list.
In view of the above objects, a first aspect of the embodiments of the present invention provides an embodiment of a PCB diagram based test method. Fig. 1 is a schematic diagram illustrating an embodiment of a PCB diagram-based testing method provided by the present invention. As shown in fig. 1, the embodiment of the present invention includes the following steps:
step S10, acquiring the position numbers and the packaging type names of a plurality of parts on the PCB through PCB drawing software;
step S20, acquiring the position numbers and silk-screen coordinate information of a plurality of parts on a silk-screen layer of a PCB through PCB drawing software;
step S30, associating the packaging type name of each part with silk-screen coordinate information through the position number of each part, and recording the position number, the packaging type name and the silk-screen coordinate information of each part into a table;
step S40, extracting the silk-screen coordinate information of the specific part from the table according to the position number of the specific part, and increasing or decreasing a plurality of coordinate values in the silk-screen coordinate information by preset numerical values to obtain a plurality of expanded coordinate values;
step S50, extracting the silk-screen coordinate information of the specified part from the table according to the position number of the specified part, comparing a plurality of coordinate values in the silk-screen coordinate information with a plurality of extended coordinate values, and confirming whether the coordinate values fall into the range formed by the extended coordinate values or not based on the comparison result;
and step S60, responding to the coordinate value of the designated part falling into the range, and obtaining the test result of the designated part being the part which does not meet the preset requirement.
In this embodiment, the PCB (Printed Circuit Board) drawing software includes Altium Designer software, Protel software, and the like. The PCB drawing refers to a circuit board layout drawing designed and drawn on a PCB drawing software.
The method comprises the steps of obtaining the position numbers, the packaging type names and the silk-screen coordinate information of all parts in a PCB picture, expanding the silk-screen coordinate of a specific part to define a safety area of the specific part in the installation process, and judging whether the coordinate of the specific part falls into the safety area or not to obtain the specific part which does not meet the preset requirement; the efficiency and the reliability of whether the position of the appointed part of test accords with the preset installation safety requirement are further improved, and the hardware development personnel can be instructed to readjust the position of the appointed part which does not accord with the preset requirement, so that the research and development period of the product can be shortened, and the market competitiveness of the product can be further improved.
In some embodiments, the method further comprises: the preset value is determined based on the thickness of the PCB plate used for making the PCB picture.
In some embodiments, obtaining, by the PCB drawing software, the bit number and the package type name of the number of parts on the PCB drawing comprises: and acquiring the bit numbers, the packaging type names and the first center coordinate information of a plurality of parts on the PCB by PCB drawing software.
In some embodiments, associating the package type name with the silk-screen coordinate information through the bit number of each part, and recording the bit number, the package type name, and the silk-screen coordinate information of each part into a table includes: associating the packaging type name, the first center coordinate information and the silk-screen coordinate information of each part through the position number of each part, recording the position number, the packaging type name, the first center coordinate information and the silk-screen coordinate information of each part into a table, and determining whether the specified part lacks the packaging type name or not based on the table; responding to the name of the missing packaging type of the specified part, obtaining pin coordinate information of the specified part through PCB (printed circuit board) drawing software, and obtaining second center coordinate information of the specified part based on the pin coordinate information; judging whether the second central coordinate information is consistent with one or more of the first central coordinate information of the parts; and recording the packaging type name of the specified part with the missing packaging type name into a table in response to the second center coordinate information being consistent with one or more of the first center coordinate information.
In some embodiments, the package type of the designated part missing the package type name is a QFN package.
In some embodiments, the specific parts include a press and/or a screw, and the specific parts include a chip of which a package type is a BGA package and/or a chip of which a package type is a QFN package.
BGA (ball Grid Array Package) represents a ball Grid Array package. QFN (Quad Flat No-leads Package) represents a Quad Flat non-leaded Package, which is one of surface mount packages. QFN packages are completely different from LCC (lead Chip carriers) packages, which still have epitaxial leads and only bend the leads to the bottom, while QFN packages do not have any epitaxial leads at all.
In some embodiments, the method further comprises: and copying the bit number, the packaging type name and the silk-screen coordinate information of the part which does not meet the preset requirements from the table to a test report based on the test result.
In this embodiment, it is also necessary to copy the first center coordinate information of the part that does not meet the preset requirement from the table into the test report.
FIG. 2 shows a schematic diagram of a chip of a BGA package; FIG. 3 shows a schematic diagram of a chip of a QFN package; fig. 4 is a schematic diagram illustrating the addition of auxiliary lines in the process of determining the characteristics of a chip of a QFN package; fig. 5 shows a coordinate diagram of the crimp and the chip of the BGA package. As shown in fig. 2-5, an exemplary embodiment of the PCB diagram based test method of the present invention is as follows:
1. and acquiring the bit numbers, the package type names and the center coordinate information (namely the first center coordinate information) of a plurality of parts on the PCB by PCB drawing software.
2. And acquiring the position numbers and the silk-screen coordinate information of the parts on a silk-screen layer of the PCB through PCB drawing software. The silk screen printing of parts in the PCB is only square or circular. And the silk screen printing of the part with the U-shaped start part of the position number is square, and the silk screen printing coordinate information of the part is the initial coordinate and the end coordinate of four square side line segments. The silk screen printing of a part with MH at the beginning of a position number is circular, and the silk screen printing coordinate information of the part comprises a center coordinate center-xy and a radius size radius.
3. And combining the information obtained in the step 1 and the step 2 to obtain the position numbers, the packaging type names, the center coordinate information and the silk-screen coordinate information of all the parts in the PCB. Analyzing naming rules of parts on a PCB (printed circuit board) diagram, wherein the package symbolname (package type name) of a screw hole comprises MH characters, the package symbolname of a BGA part comprises BGA characters, and the package symbolname of a crimping piece comprises PF characters, and according to the rules, coordinate information and screen printing frame information of the screw hole, the crimping piece and the BGA packaged chip can be quickly obtained through data in a screening table. Only the package symbol name of the QFN packaged chip has no characters and cannot be obtained by screening. The following description is made on how to obtain the chips for screening QFN packages:
as shown in fig. 3, the external shape of the QFN packaged chip has the following features: a. besides a circle of signal pins (pins) arranged around, a larger GND Pin is arranged at the central position; b. all pins are surrounded by the silk screen printing, and no pin is arranged outside the silk screen printing frame. And acquiring pin information of the whole plate part according to the two characteristics, sequentially traversing the pin information of all the parts and the central coordinates of the parts, and judging that the part meets the a characteristic if the pin coordinates are the same as the central coordinates of the parts. And then the parts conforming to the characteristic a are processed as follows: the pin coordinate information of these parts is acquired and connected as a dotted line as shown in fig. 4. And acquiring the size of the ellipse pin, and recording the size as (a, b), wherein a is the major axis size of the ellipse pin, and b is the minor axis size. Obtaining the silk-screen coordinates of the part from the table, recording the ordinate of the AB line segment as y1, and recording the abscissa of the dotted line parallel to the AB line segment as y 2; let the abscissa x1 of the AC line segment and the abscissa of the dashed line parallel to the AC line segment be x 2; if y1-y2> a/2; and at the same time, x2-x1> a/2, the part is judged to meet the b characteristic (pins are surrounded by the silk screen, and no pin is arranged outside the silk screen frame).
4. Screen printing coordinate information of screw holes (MH), crimping Pieces (PF), BGA packaged chips and QFN packaged chips is screened from the table.
5. Presetting different required safety distances according to different PCB thicknesses, and assuming that the safety distance is H1:
when the thickness of the plate is less than 2.4mm, the distance between the crimping piece and the screw hole and the BGA packaged chip and the distance between the crimping piece and the screw hole and the QFN packaged chip are required to be more than 10 mm;
when the thickness of the board is larger than 2.4mm, the distance between the pressure welding piece and the screw hole and the BGA packaged chip and the distance between the pressure welding piece and the screw hole and the QFN packaged chip are required to be larger than 5 mm;
and recording the information of the BGA packaged chip and the QFN packaged chip which do not meet the rules according to the requirements.
6. As shown in fig. 5, the table is traversed, and distances from all the chips of the QFN package and the BGA package are calculated based on the crimp. The shapes of the crimping piece, the QFN packaged chip and the BGA packaged chip are square. Coordinates of four corners of the crimp are sequentially marked as { a (x1, y2), B (x2, y2), C (x1, y1), D (x2, y1) }, a dashed frame is drawn for the crimp screen frame extending outward from H1, coordinates of four corners of a rectangle of the dashed frame are { a1(x1-H1, y2+ H1), B1(x2+ H1, y2+ H1), C1(x1-H1, y1-H1), D1(x2+ H2, y 2-H2)), and coordinates of BGA-packaged chips and QFN-packaged chips are traversed again in the BGA-packaged chips or QFN-packaged chips in the comparison table, provided that the coordinates of one corner are (x, y), and if x 2-H2 < x2, y + 2, 2+ 2 is satisfied, and the coordinates of one corner 2 < x2+ H < x2, 2+ 2, 2 is not satisfied, and the coordinates are not satisfied, the parts 2 < x < H < x < x2+ 2.
Similarly, the circular screw hole can be compared with a square with the same diameter, and according to the steps, the information of the BGA packaged chip and the QFN packaged chip which do not accord with the preset rule around the screw hole can be exported.
7. And copying the position number, the packaging type name, the center coordinate information and the silk-screen coordinate information of the part which does not meet the preset requirement from the table to a test report.
In a second aspect of the embodiments of the present invention, a PCB diagram based test system is also provided. Fig. 6 is a schematic diagram of an embodiment of a PCB diagram based test system provided by the present invention. As shown in fig. 6, a PCB diagram-based test system includes: the first obtaining module 10 is configured to obtain the bit numbers and the package type names of a plurality of parts on the PCB drawing through PCB drawing software; the second obtaining module 20 is configured to obtain the position numbers and the silk-screen coordinate information of the parts on the silk-screen layer of the PCB through PCB drawing software; the recording module 30 is configured to associate the packaging type name of each part with the silk-screen coordinate information through the position number of the part, and record the position number, the packaging type name and the silk-screen coordinate information of each part into a table; the coordinate extension module 40 is configured to extract silk-screen coordinate information of a specific part from a table according to the position number of the specific part, and increase or decrease a plurality of coordinate values in the silk-screen coordinate information by preset numerical values to obtain a plurality of extended coordinate values; the confirming module 50 is configured to extract the silk-screen coordinate information of the designated part from the table according to the position number of the designated part, compare a plurality of coordinate values in the silk-screen coordinate information with a plurality of extended coordinate values, and confirm whether the coordinate values fall into a range formed by the plurality of extended coordinate values or not based on the comparison result; and a test result obtaining module 60 configured to obtain a test result that the designated part is a part that does not meet the preset requirement in response to the designated part having the coordinate value falling within the range.
In a third aspect of the embodiment of the present invention, a computer-readable storage medium is further provided, and fig. 7 is a schematic diagram of a computer-readable storage medium for implementing a PCB diagram-based testing method according to an embodiment of the present invention. As shown in fig. 7, the computer-readable storage medium 3 stores computer program instructions 31. The computer program instructions 31, when executed by a processor, implement the method of any of the embodiments described above.
It should be understood that all embodiments, features and advantages set forth above with respect to the PCB graph based testing method according to the present invention are equally applicable to the PCB graph based testing system and the storage medium according to the present invention without conflicting therewith.
In a fourth aspect of the embodiments of the present invention, there is further provided a computer device, including a memory 402 and a processor 401 as shown in fig. 8, where the memory 402 stores therein a computer program, and the computer program implements the method of any one of the above embodiments when executed by the processor 401.
Fig. 8 is a schematic hardware structure diagram of an embodiment of a computer device for executing a PCB diagram-based test method according to the present invention. Taking the computer device shown in fig. 8 as an example, the computer device includes a processor 401 and a memory 402, and may further include: an input device 403 and an output device 404. The processor 401, the memory 402, the input device 403 and the output device 404 may be connected by a bus or other means, and fig. 8 illustrates an example of a connection by a bus. The input device 403 may receive input numeric or character information and generate key signal inputs related to user settings and function control of the PCB graph-based test system. The output device 404 may include a display device such as a display screen.
The memory 402, which is a non-volatile computer-readable storage medium, may be used to store non-volatile software programs, non-volatile computer-executable programs, and modules, such as program instructions/modules corresponding to the PCB diagram-based testing method in the embodiments of the present application. The memory 402 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created based on use of a test method of a PCB diagram, and the like. Further, the memory 402 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some embodiments, memory 402 may optionally include memory located remotely from processor 401, which may be connected to local modules via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The processor 401 executes various functional applications of the server and data processing, i.e., implementing the PCB diagram-based test method of the above-described method embodiment, by running the nonvolatile software program, instructions and modules stored in the memory 402.
Finally, it should be noted that the computer-readable storage medium (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items. The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.
Claims (10)
1. A PCB diagram-based test method is characterized by comprising the following steps:
acquiring the bit numbers and the packaging type names of a plurality of parts on the PCB drawing through PCB drawing software;
acquiring the position numbers and the silk-screen coordinate information of the parts on a silk-screen layer of the PCB through the PCB drawing software;
associating the packaging type name of each part with silk-screen coordinate information through the position number of each part, and recording the position number, the packaging type name and the silk-screen coordinate information of each part into a table;
extracting silk-screen coordinate information of a specific part in the table according to the position number of the specific part, and increasing or decreasing a plurality of coordinate values in the silk-screen coordinate information by preset numerical values to obtain a plurality of extended coordinate values;
aiming at a specified part, extracting silk-screen coordinate information of the specified part from the table according to the position number of the specified part, comparing a plurality of coordinate values in the silk-screen coordinate information with a plurality of extended coordinate values, and determining whether the coordinate values fall into the range formed by the extended coordinate values or not based on the comparison result;
and responding to the coordinate value of the specified part falling into the range, and obtaining the test result that the specified part is the part which does not meet the preset requirement.
2. The method of claim 1, further comprising:
the preset value is determined based on a thickness of a PCB plate used for platemaking of the PCB image.
3. The method of claim 1, wherein obtaining the part numbers and package type names of the parts on the PCB drawing by the PCB drawing software comprises:
and acquiring the bit numbers, the packaging type names and the first center coordinate information of a plurality of parts on the PCB by PCB drawing software.
4. The method of claim 3, wherein associating the package type name with the silk-screen coordinate information by the bit number of each part, and recording the bit number, the package type name, and the silk-screen coordinate information of each part into a table comprises:
associating the packaging type name, the first center coordinate information and the silk-screen coordinate information of each part through the position number of each part, recording the position number, the packaging type name, the first center coordinate information and the silk-screen coordinate information of each part into a table, and determining whether the specified part lacks the packaging type name or not based on the table;
responding to the name of the missing packaging type of the specified part, obtaining pin coordinate information of the specified part through the PCB drawing software, and obtaining second center coordinate information of the specified part based on the pin coordinate information;
judging whether the second central coordinate information is consistent with one or more of the first central coordinate information of the parts;
in response to the second center coordinate information being consistent with one or more of the number of first center coordinate information, recording the package type name of the specified part missing the package type name into the table.
5. The method of claim 4, wherein the package type of the part specified by the missing package type name is a QFN package.
6. The method of claim 1, further comprising:
and copying the bit number, the packaging type name and the silk-screen coordinate information of the part which does not meet the preset requirements from the table to a test report based on the test result.
7. The method according to claim 1, wherein the specific parts include a crimp and/or a screw, and the specific parts include a chip of a package type BGA package and/or a chip of a package type QFN package.
8. A PCB graph based test system, comprising:
the first acquisition module is configured for acquiring the bit numbers and the packaging type names of a plurality of parts on the PCB drawing through PCB drawing software;
the second acquisition module is configured to acquire the position numbers and the silk-screen coordinate information of the parts on a silk-screen layer of the PCB through the PCB drawing software;
the recording module is configured and used for associating the packaging type name of each part with the silk-screen coordinate information through the position number of each part, and recording the position number, the packaging type name and the silk-screen coordinate information of each part into a table;
the coordinate extension module is configured and used for extracting the silk-screen coordinate information of the specific part from the table according to the position number of the specific part, and increasing or decreasing a plurality of coordinate values in the silk-screen coordinate information by preset numerical values to obtain a plurality of extended coordinate values;
the confirming module is configured for extracting the silk-screen coordinate information of the specified part from the table according to the position number of the specified part, comparing a plurality of coordinate values in the silk-screen coordinate information with the plurality of extended coordinate values, and confirming whether the coordinate values fall into the range formed by the plurality of extended coordinate values or not based on the comparison result; and
and the test result obtaining module is configured to respond that the coordinate value of the specified part falls into the range, and obtain the test result that the specified part is the part which does not meet the preset requirement.
9. A computer-readable storage medium, characterized in that computer program instructions are stored which, when executed by a processor, implement the method according to any one of claims 1-7.
10. A computer device comprising a memory and a processor, characterized in that the memory has stored therein a computer program which, when executed by the processor, performs the method according to any one of claims 1-7.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114692557A (en) * | 2022-06-01 | 2022-07-01 | 深圳市鄱阳科技有限公司 | Flexible circuit board manufacturing performance monitoring and analyzing method and system |
Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1784120A (en) * | 2004-11-29 | 2006-06-07 | 华为技术有限公司 | Method for realizing reutilization in printed circuit board design |
| CN103902779A (en) * | 2014-04-04 | 2014-07-02 | 无锡市同步电子科技有限公司 | Screen printing identifying method for pins of device packaging libraries |
| CN110083925A (en) * | 2019-04-24 | 2019-08-02 | 苏州浪潮智能科技有限公司 | It is a kind of based on allegro skill package pins silk-screen mark automatically create method and system |
| CN112597737A (en) * | 2020-12-20 | 2021-04-02 | 苏州浪潮智能科技有限公司 | Method, system and readable storage medium for creating PCB test point identification |
-
2021
- 2021-11-14 CN CN202111343850.8A patent/CN114299077B/en active Active
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1784120A (en) * | 2004-11-29 | 2006-06-07 | 华为技术有限公司 | Method for realizing reutilization in printed circuit board design |
| CN103902779A (en) * | 2014-04-04 | 2014-07-02 | 无锡市同步电子科技有限公司 | Screen printing identifying method for pins of device packaging libraries |
| CN110083925A (en) * | 2019-04-24 | 2019-08-02 | 苏州浪潮智能科技有限公司 | It is a kind of based on allegro skill package pins silk-screen mark automatically create method and system |
| CN112597737A (en) * | 2020-12-20 | 2021-04-02 | 苏州浪潮智能科技有限公司 | Method, system and readable storage medium for creating PCB test point identification |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114692557A (en) * | 2022-06-01 | 2022-07-01 | 深圳市鄱阳科技有限公司 | Flexible circuit board manufacturing performance monitoring and analyzing method and system |
| CN114692557B (en) * | 2022-06-01 | 2022-08-16 | 深圳市鄱阳科技有限公司 | Flexible circuit board manufacturing performance monitoring and analyzing method and system |
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