CN114296634A - Method and device for detecting utilization rate of memory resources and allocating memory - Google Patents
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Abstract
The method comprises the steps of dividing the storage space of a storage chip into a plurality of address sectors and a plurality of data sectors, wherein each address sector and each data sector respectively comprise a data area and a counting area, reading the address of the sector where the parameter to be detected is located in the address sector after the storage chip is electrified and initialized, and reading the data sectors according to the addresses to obtain the parameter data to be detected; the parameter data to be tested at least comprises accumulated erasing times; when parameters of a data sector to be written need to be written, comparing the accumulated erasing times with a preset erasing time threshold value and displaying a comparison result; and judging whether to write the parameters into the data sector to be written or generate fault information according to the comparison result and displaying the fault information. According to the method and the device, the display of the resource utilization rate of the memory chip and the display of the abnormal storage fault are added, the storage problem of the memory chip is conveniently checked, and the controller is prevented from running without being found under the condition of function failure.
Description
Technical Field
The application relates to the technical field of computers, in particular to a method for detecting the utilization rate of memory resources and allocating the memory.
Background
Non-Volatile Memory (NVM) refers to a computer Memory in which stored data does not disappear after the current is turned off, and is the biggest difference from Volatile Memory. Has the advantages of high speed, high density, low power consumption, radiation resistance and the like.
Since the non-volatile memory (usually including FLASH memory, EEPROM, electrically erasable read only memory, ferroelectric device, etc., and hereinafter using FLASH as an example to replace the non-volatile memory as a description) has the characteristics of no loss of data when power is off and on-line programmability, the embedded system usually uses the non-volatile memory such as FLASH as a memory for applying and developing the MCU program. FLASH has erase times limit, and usually FLASH has about 10 ten thousand times of erasability. If the accumulated erasing of the same storage area exceeds the limit, the memory chip is damaged and loses the memory function.
In the related art, the service life of a memory storage chip is generally prolonged by sacrificing the memory real-time performance of parameters, and the memory storage chip is prevented from being damaged by frequently rewriting the parameters, for example, the changed parameters are written into a FLASH after the parameters are changed for a half hour. Or sacrifice accurate control of the unit operation, such as giving up the function of power-off storage in minutes or seconds for certain timings. In addition, the current nonvolatile memory has no FLASH resource utilization rate display and storage failure alarm in the use process, and cannot judge whether to normally use FLASH.
Disclosure of Invention
In view of this, the present invention provides a method and a device for detecting a memory resource utilization rate and allocating storage to solve the problem that in the prior art, a nonvolatile memory has no FLASH resource utilization rate display and storage failure alarm during the use process, and cannot determine whether to normally use FLASH.
In order to achieve the purpose, the invention adopts the following technical scheme: a method for detecting the utilization rate of memory resources and allocating memory comprises the following steps:
dividing a storage space of a storage chip into a plurality of address sectors and a plurality of data sectors, wherein the data sectors are used for storing data parameters, and the address sectors are used for storing addresses of sectors where the data parameters are located; each address sector and each data sector including a data area and a count area;
after the memory chip is electrified and initialized, reading the address of the sector where the parameter to be measured is located in the address sector, and reading the data sector according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times;
comparing the accumulated erasing times with a preset erasing time threshold value and displaying a comparison result;
and when parameters need to be written in the data sector to be written, judging whether to write the parameters in the data sector to be written or generate fault information according to the comparison result and displaying the fault information.
Furthermore, each address sector and each data sector are provided with N sectors, the data area occupies the first N-1 sectors to store memory data, and the counting area occupies the last sector of the memory chip to record the accumulated erasing times of the sector.
Further, the determining whether to write the parameter into the data sector to be written or generate and display the fault information according to the comparison result includes:
if the accumulated erasing times are smaller than the erasing times threshold, adding 1 to the accumulated erasing times, and rewriting the updated parameters and the updated accumulated erasing times into the data sector to be written;
and if the accumulated erasing times is more than or equal to the erasing times threshold, generating fault information and displaying the fault information.
Further, when the accumulated erasure count is greater than or equal to the erasure count threshold, the method further includes:
confirming whether the storage address is changed or not to a user;
if a signal that a user confirms to change the storage address is received, displaying all unused data sectors to the user, receiving user selection, resetting the accumulated erasing times, writing the updated parameters and the reset accumulated erasing times into the changed data sectors and clearing fault information;
and if not, continuously writing the updated parameters and the accumulated erasing times which are obtained by adding 1 to the accumulated erasing times into the data sector to be written, and continuously displaying the fault information.
Further, still include:
when the data sector is damaged, the corresponding address sector updates the address for storing another data sector.
Further, still include:
a new address sector is created that is used to store the sector address of the address sector.
Further, still include:
another memory chip connected to the memory chip.
An embodiment of the present application provides a device for detecting a utilization rate of a memory resource and allocating the memory resource, including:
the device comprises a dividing module, a storage module and a processing module, wherein the dividing module is used for dividing a storage space of a storage chip into a plurality of address sectors and a plurality of data sectors, the address sectors are used for storing addresses of sectors where data parameters are located, and the data sectors are used for storing the data parameters; each address sector and each data sector comprise a data area and a counting area, wherein each address sector and each data sector are provided with N sectors, the data area occupies the first N-1 sectors to store memory data, and the counting area occupies the last sector of the memory chip to record the accumulated erasing and writing times of the sector;
the reading module is used for reading the address of the sector where the parameter to be measured is located in the address sector after the memory chip is electrified and initialized, and reading the data sector according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times;
the comparison module is used for comparing the accumulated erasing times with a preset erasing time threshold and displaying a comparison result;
and the processing module is used for judging whether to write the parameters into the data sector to be written or generate fault information and display the fault information according to the comparison result when the parameters are required to be written in the data sector to be written.
An embodiment of the present application provides a device for detecting a utilization rate of a memory resource and allocating the memory resource, including: a controller for performing the memory resource usage detection and memory allocation method of any of the above embodiments; and
and the display module is used for displaying the comparison result of the accumulated erasing times and a preset erasing time threshold.
Further, still include:
and the touch input module is used for receiving a touch instruction of a user.
The embodiment of the application provides a storage medium, wherein the storage medium stores a computer program;
the computer program, when executed by a processor, performs the steps of the memory resource usage detection and memory allocation method provided in any of the above embodiments.
The technical scheme provided by the embodiment of the application can have the following beneficial effects:
according to the method and the device, accumulated erasing times and total used sector number of each sector are recorded, the accumulated erasing times and the preset erasing times threshold are compared and displayed, the use condition of the storage chip can be displayed, the state of the storage is recorded and displayed, in addition, the technical scheme provided by the application can adjust the position of the sector where data are stored according to the accumulated erasing times, the space utilization rate of the storage is increased, and the service life of the storage function is prolonged.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a schematic diagram illustrating steps of a method for detecting memory resource utilization and allocating memory according to the present invention;
FIG. 2 is a schematic diagram of sector lengths provided in accordance with an embodiment of the present invention;
FIG. 3 is a diagram of address sectors and data sectors provided in accordance with an embodiment of the present invention;
FIG. 4 is a flow chart illustrating a method for detecting memory resource utilization and allocating memory according to the present invention;
FIG. 5 is a schematic diagram of a memory resource utilization detecting and memory allocating apparatus according to the present invention;
FIG. 6 is a schematic diagram of a memory resource utilization detecting and memory allocating apparatus according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the technical solutions of the present invention will be described in detail below. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be derived by a person skilled in the art from the examples given herein without any inventive step, are within the scope of the present invention.
A specific method and apparatus for detecting memory resource utilization and allocating memory provided in the embodiments of the present application are described below with reference to the accompanying drawings.
As shown in fig. 1, a method for detecting a utilization rate of a memory resource and allocating the memory resource provided in the embodiment of the present application includes:
s101, dividing a storage space of a storage chip into a plurality of address sectors and a plurality of data sectors, wherein the data sectors are used for storing data parameters, and the address sectors are used for storing addresses of sectors where the data parameters are located; each address sector and each data sector including a data area and a count area;
in software development, data is usually stored in a memory chip by writing in sectors (pages) and partitions. Taking EEPROM chips (such as 24C16, 24C08, 24C02, etc. as examples, it is explained that 24C02 device performs page write at 8 bytes/page, 24C04/08/16 device performs page write at 16 bytes/page, and 24C32/64 device performs page write at 32 bytes/page. When writing storage, only the sector where the parameter is located is erased and written in its entirety. Wherein the parameter refers to the meaning of the data that needs to be written to the memory chip. For convenience of description, the minimum unit of the sector for storing data is regarded as 1, that is, the size of the space occupied by each data to be stored in the sector is 1, and it is understood that 1 may be a bit, a byte, a word, or the like.
Preferably, each of the address sectors and the data sectors has N sectors, the data area occupies the first N-1 sectors to store the memory data, and the counting area occupies the last sector of the memory chip to record the accumulated erasing times of the sector. As shown in fig. 2, the total number of sectors available for storing data in the memory chip is N. The size of an effective area where one sector can write data is L. Dividing each sector into two sections, namely a data area and a counting area; wherein, the size of the data area is x, and the data area is used for storing memory data; the size of the counting area is y, and the written times of the sector are recorded, wherein L is x + y.
In one embodiment, as shown in fig. 3, according to two functions of the sector, the address of the sector in which the data parameter is stored is called address sector a; the second is responsible for storing data parameters, called data sector B. In the case of an air conditioner, the data parameters may be a refrigeration target temperature, a mode, a timing time, a fault record, and the like set by a user, and it can be understood that the data parameters are different according to different devices.
In one embodiment, if the total amount of data to be stored is m, then N1+ N2 ≦ N, i.e., (m/x +1) + (m/x)2N is less than or equal to +1), i.e. m is less than or equal to (N-2) x2Where "/" indicates division, not rounding, but directly rounding off, and +1 is reserved for occurrence of a remainder, it should be noted that n1 and n2 are the number of sectors. That is, m should satisfy m ≦ (N-2) x2V (1+ x), ordering P0～P(m-1)Then the number of data sectors to be used is at most n1 ═ m/x + 1, ordered as sector B0～B(n1-1). Phase (C)For that, the number of address sectors to be used is at most n2 ═ m/x2+1) ordered as sector A0～A(n2-1). By default will P0～P(m-1)Sequentially stored to data sector B0～B(n1-1)The default erase/write count of the y-region of each data sector is 0. B is to be0～B(n1-1)Sequentially stored to address sector A0～A(n2-1)The default erase/write count of the Y region of each address sector is 0. For example: if x data are stored in each sector, m/x +1 sectors are required for storing m data, for example, 20 data and 8 data are stored in each sector, n1 (20/8+1) is required, that is, 3 sectors are required to be stored. Based on the fact that each sector can only store 8 data, the number of sectors used for the address is n 2-n 1/x + 1, i.e. (m/x)2+1)。
S102, after the memory chip is electrified and initialized, reading the address of the sector where the parameter to be measured is located in the address sector, and reading the data sector according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times;
specifically, as shown in FIG. 4, after initialization is completed, address sector A is read first0～A(n2-1)The address value is the serial number of the sector which is responsible for storing the data parameter, thereby obtaining the actual address B of the memory parameter according to the address value0～B(n1-1)Then, the data sector is read according to the real address to obtain the memory parameter P0～P(m-1). When data sector BiWhen the parameter needs to be written into the memory, firstly BiAll data read out, including yi。
S103, comparing the accumulated erasing times with a preset erasing time threshold value and displaying a comparison result;
and displaying the accumulated erasing times and a preset erasing time threshold in the display area, comparing and displaying the mutual relation.
And S104, when parameters need to be written in the data sector to be written, judging whether to write the parameters in the data sector to be written or generate fault information according to the comparison result and displaying the fault information.
And if the parameter data is required to be written into the sector, judging whether the sector can continuously store the parameter data according to the comparison result so as to carry out corresponding processing. If the fault information can not be stored, generating fault information and displaying the fault information; it can be understood that the comparison results are different, the processing modes are different, and the corresponding processing mode is selected for processing according to the comparison results.
The working principle of the memory resource utilization rate detection and memory allocation method is as follows: after the memory chip is electrified and initialized, reading the address of the sector where the parameter to be measured is located in the address sector A, and reading the data sector B according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times; comparing the accumulated erasing times with a preset erasing time threshold value and displaying a comparison result; and when parameters need to be written in the data sector to be written, judging whether to write the parameters in the data sector to be written or generate fault information according to the comparison result and displaying the fault information.
In some embodiments, the determining whether to write the parameter into the data sector to be written or generate and display the fault information according to the comparison result includes:
if the accumulated erasing times are smaller than the erasing times threshold, adding 1 to the accumulated erasing times, and rewriting the updated parameters and the updated accumulated erasing times into the data sector to be written;
and if the accumulated erasing times is more than or equal to the erasing times threshold, generating fault information and displaying the fault information.
Specifically, as shown in FIG. 4, the cumulative number of erasures y is counted in the display areaiOr accumulated erase times yiAnd displaying the correlation with a preset erasing time threshold value S (which is smaller than the maximum value required by the chip). Simultaneously judging yiWhether greater than S. If yiIf the value is less than the preset value, the sector can be used continuously, and y is usediAdd up 1 time while sector B isiAnd all updated parameters including the updated accumulated erasure times yi are rewritten. If yiIf not less than the preset value, the table is displayedIndicating that the sector is close to being corrupted. And displaying and prompting the fault in the display area.
In some embodiments, when the accumulated erasure count is greater than or equal to the erasure count threshold, the method further includes:
confirming whether the storage address is changed or not to a user;
if a signal that a user confirms to change the storage address is received, displaying all unused data sectors to the user, receiving user selection, resetting the accumulated erasing times, writing the updated parameters and the reset accumulated erasing times into the changed data sectors and clearing fault information;
and if not, continuously writing the updated parameters and the accumulated erasing times which are obtained by adding 1 to the accumulated erasing times into the data sector to be written, and continuously displaying the fault information.
Preferably, the method further comprises the following steps:
when the data sector is damaged, the corresponding address sector updates the address for storing another data sector.
Specifically, whether the storage address needs to be changed is confirmed to the user. If the user selects the change, unused sectors are displayed in the display area for selection by the user. User selects modified area B through touch input area(max+1)At this time, y isiZero clearing, and the original B isiAll parameters in (1) include yiWrite to B(max+1)In (1). At the same time, the original B needs to be storediAddress sector A of an addressjChange the value of (A) to B(max+1). This step implements sector BiOrdered transfer of all storage parameters to unused sector B(max+1)In (1). At which time the display of the associated fault is cleared. And if the user chooses not to change, the original area is continuously used for storage, and the fault prompt is kept. By analogy, when a data sector B is damaged due to excessive writing, the corresponding address sector A stores a new data sector address, finally, the function that the same memory parameter can be rewritten beyond the single-region erasing and writing limit times of the memory chip and has the memory capacity is realized, and FLASH use information and an abnormal state are provided for a user.
In some embodiments, the method for detecting the utilization rate of the memory resource and allocating the memory provided by the present application further includes:
a new address sector is created that is used to store the sector address of the address sector.
It is understood that if the memory chip memory used is large enough, the address sector C can be created, the sector address of the address sector a can be recorded, and the number of times the parameter can be rewritten and memorized can be further increased. Knowing the total capacity of the used memory chip and the sector number of the currently used memory chip, the total resource utilization rate of the memory chip can be calculated.
In some embodiments, further comprising:
another memory chip connected to the memory chip.
Specifically, if the memory has insufficient space of a single memory chip, a plurality of memory chips with different device addresses can be accessed. The service life of the memory chip can be estimated, and the parameters can be stored in another chip before the chip is damaged.
Preferably, the memory provided by the application adopts a nonvolatile memory.
The method and the device are based on the characteristic that the nonvolatile memory can be stored in a power-off mode, the operation information of the memory used each time is stored, and the information is used for state display and storage address allocation. The method has the advantages that the display of the utilization rate of the storage chip resources and the display of the fault of abnormal storage are increased, the problem is convenient to troubleshoot, and the controller is prevented from running without being found under the condition of functional failure; in addition, the storage address of the memory in the technical scheme provided by the application can be set, more choices are provided for users, the space utilization rate of the memory is improved, and the service life of the memory function can be prolonged.
In some embodiments, as shown in fig. 5, the present application provides a memory resource usage detection and memory allocation apparatus, including:
a dividing module 501, configured to divide a storage space of a memory chip into a plurality of address sectors and a plurality of data sectors, where the address sectors are used to store addresses of sectors where data parameters are located, and the data sectors are used to store data parameters; each address sector and each data sector comprise a data area and a counting area, wherein each address sector and each data sector are provided with N sectors, the data area occupies the first N-1 sectors to store memory data, and the counting area occupies the last sector of the memory chip to record the accumulated erasing and writing times of the sector;
a reading module 502, configured to read an address of a sector where a parameter to be measured is located in an address sector after power-on initialization of a memory chip, and read the data sector according to the address to obtain parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times;
a comparing module 503, configured to compare the accumulated erasure count with a preset erasure count threshold and display a comparison result;
and the processing module 504 is configured to, when a parameter needs to be written in the data sector to be written, determine whether to write the parameter in the data sector to be written or generate failure information according to the comparison result, and display the failure information.
The working principle of the memory resource utilization rate detection and storage allocation device provided by the application is that the dividing module 501 divides the storage space of the memory chip into a plurality of address sectors and a plurality of data sectors, wherein the address sectors are used for storing the addresses of the sectors where the data parameters are located, and the data sectors are used for storing the data parameters; each address sector and each data sector comprise a data area and a counting area, wherein each address sector and each data sector are provided with N sectors, the data area occupies the first N-1 sectors to store memory data, and the counting area occupies the last sector of the memory chip to record the accumulated erasing and writing times of the sector; after the memory chip of the reading module 502 is powered on and initialized, the address of the sector where the parameter to be measured is located in the address sector is read, and the data sector is read according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times; the comparing module 503 compares the accumulated erasing times with a preset erasing time threshold and displays the comparison result; when the data sector to be written has parameters to be written, the processing module 504 determines whether to write the parameters into the data sector to be written or generate fault information according to the comparison result, and displays the fault information.
An embodiment of the present application provides a device for detecting a utilization rate of a memory resource and allocating the memory resource, as shown in fig. 6, including: the controller 1 is configured to execute the steps of the memory resource utilization detection and memory allocation method provided in any of the above embodiments; and
and the display module 2 is used for displaying a comparison result of the accumulated erasing times and a preset erasing time threshold.
Preferably, the apparatus further comprises:
the touch input module 3 is configured to receive a touch instruction of a user.
Specifically, the controller 1 is configured to store an erasing frequency threshold, and the controller 1 is further configured to receive the touch instruction and the accumulated erasing frequency sent by the memory 4 and send the accumulated erasing frequency to the display module 2 for displaying. The memory 4 may employ FLASH.
Preferably, the display module 2 is a display screen.
As a specific implementation manner, the memory 4 reads an address of a sector where a parameter to be measured is located in an address sector, and reads the data sector according to the address to obtain parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times; the memory 4 sends the parameter data to be tested to the controller 1, and the controller 1 controls the module 2 to display the accumulated erasing times and the preset erasing time threshold. It can be understood that, a user performs a touch operation through the touch input module 3, and the controller 1 receives a touch instruction of the user to perform a corresponding operation.
The embodiment of the application provides a storage medium, wherein the storage medium stores a computer program;
when the computer program is executed by a processor, the method steps are executed:
dividing a storage space of a storage chip into a plurality of address sectors and a plurality of data sectors, wherein the data sectors are used for storing data parameters, and the address sectors are used for storing addresses of sectors where the data parameters are located; each address sector and each data sector including a data area and a count area;
after the memory chip is electrified and initialized, reading the address of the sector where the parameter to be measured is located in the address sector, and reading the data sector according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times;
comparing the accumulated erasing times with a preset erasing time threshold value and displaying a comparison result;
and when parameters need to be written in the data sector to be written, judging whether to write the parameters in the data sector to be written or generate fault information according to the comparison result and displaying the fault information.
In summary, the present invention provides a method and an apparatus for detecting and allocating memory resource utilization, wherein the method includes dividing a memory space of a memory chip into a plurality of address sectors and a plurality of data sectors, the data sectors being used for storing data parameters, and the address sectors being used for storing addresses of sectors where the data parameters are located; each address sector and each data sector including a data area and a count area; after the memory chip is electrified and initialized, reading the address of the sector where the parameter to be measured is located in the address sector, and reading the data sector according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times; comparing the accumulated erasing times with a preset erasing time threshold value and displaying a comparison result; and when parameters need to be written in the data sector to be written, judging whether to write the parameters in the data sector to be written or generate fault information according to the comparison result and displaying the fault information. According to the method and the device, accumulated erasing times and total used sector number of each sector are recorded, the accumulated erasing times and the preset erasing times threshold are compared and displayed, the use condition of the storage chip can be displayed, the state of the storage is recorded and displayed, in addition, the technical scheme provided by the application can adjust the position of the sector where data are stored according to the accumulated erasing times, the space utilization rate of the storage is increased, and the service life of the storage function is prolonged.
It is understood that the same or similar parts in the above embodiments may be mutually referred to, and the same or similar parts in other embodiments may be referred to for the content which is not described in detail in some embodiments.
It should be noted that, in the description of the present application, the terms "first", "second", etc. are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. Further, in the description of the present application, the meaning of "a plurality" means at least two unless otherwise specified.
Any process or method descriptions in flow charts or otherwise described herein may be understood as representing modules, segments, or portions of code which include one or more executable instructions for implementing specific logical functions or steps of the process, and the scope of the preferred embodiments of the present application includes other implementations in which functions may be executed out of order from that shown or discussed, including substantially concurrently or in reverse order, depending on the functionality involved, as would be understood by those reasonably skilled in the art of the present application.
It should be understood that portions of the present application may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
It will be understood by those skilled in the art that all or part of the steps carried by the method for implementing the above embodiments may be implemented by hardware related to instructions of a program, which may be stored in a computer readable storage medium, and when the program is executed, the program includes one or a combination of the steps of the method embodiments.
In addition, functional units in the embodiments of the present application may be integrated into one processing module, or each unit may exist alone physically, or two or more units are integrated into one module. The integrated module can be realized in a hardware mode, and can also be realized in a software functional module mode. The integrated module, if implemented in the form of a software functional module and sold or used as a stand-alone product, may also be stored in a computer readable storage medium.
The storage medium mentioned above may be a read-only memory, a magnetic or optical disk, etc.
In the description herein, reference to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Although embodiments of the present application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present application, and that variations, modifications, substitutions and alterations may be made to the above embodiments by those of ordinary skill in the art within the scope of the present application.
Claims (11)
1. A method for detecting the utilization rate of memory resources and allocating the memory resources is characterized by comprising the following steps:
dividing a storage space of a storage chip into a plurality of address sectors and a plurality of data sectors, wherein the data sectors are used for storing data parameters, and the address sectors are used for storing addresses of sectors where the data parameters are located; each address sector and each data sector including a data area and a count area;
after the memory chip is electrified and initialized, reading the address of the sector where the parameter to be measured is located in the address sector, and reading the data sector according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times;
comparing the accumulated erasing times with a preset erasing time threshold value and displaying a comparison result;
and when parameters need to be written in the data sector to be written, judging whether to write the parameters in the data sector to be written or generate fault information according to the comparison result and displaying the fault information.
2. The method of claim 1,
each address sector and each data sector are provided with N sectors, the data area occupies the first N-1 sectors to store memory data, and the counting area occupies the last sector of the memory chip to record the accumulated erasing times of the sector.
3. The method according to claim 1, wherein the determining whether to write the parameter into the data sector to be written or generate and display the failure information according to the comparison result comprises:
if the accumulated erasing times are smaller than the erasing times threshold, adding 1 to the accumulated erasing times, and rewriting the updated parameters and the updated accumulated erasing times into the data sector to be written;
and if the accumulated erasing times is more than or equal to the erasing times threshold, generating fault information and displaying the fault information.
4. The method of claim 3, further comprising, when the accumulated erasure count is greater than or equal to the erasure count threshold value:
confirming whether the storage address is changed or not to a user;
if a signal that a user confirms to change the storage address is received, displaying all unused data sectors to the user, receiving user selection, resetting the accumulated erasing times, writing the updated parameters and the reset accumulated erasing times into the changed data sectors and clearing fault information;
and if not, continuously writing the updated parameters and the accumulated erasing times which are obtained by adding 1 to the accumulated erasing times into the data sector to be written, and continuously displaying the fault information.
5. The method of claim 1, further comprising:
when the data sector is damaged, the corresponding address sector updates the address for storing another data sector.
6. The method of claim 1, further comprising:
a new address sector is created that is used to store the sector address of the address sector.
7. The method of any one of claims 1-6, further comprising:
another memory chip connected to the memory chip.
8. A memory resource usage detection and memory allocation apparatus, comprising:
the device comprises a dividing module, a storage module and a processing module, wherein the dividing module is used for dividing a storage space of a storage chip into a plurality of address sectors and a plurality of data sectors, the address sectors are used for storing addresses of sectors where data parameters are located, and the data sectors are used for storing the data parameters; each address sector and each data sector comprise a data area and a counting area, wherein each address sector and each data sector are provided with N sectors, the data area occupies the first N-1 sectors to store memory data, and the counting area occupies the last sector of the memory chip to record the accumulated erasing and writing times of the sector;
the reading module is used for reading the address of the sector where the parameter to be measured is located in the address sector after the memory chip is electrified and initialized, and reading the data sector according to the address to obtain the parameter data to be measured; the parameter data to be tested at least comprises accumulated erasing times;
the comparison module is used for comparing the accumulated erasing times with a preset erasing time threshold and displaying a comparison result;
and the processing module is used for judging whether to write the parameters into the data sector to be written or generate fault information and display the fault information according to the comparison result when the parameters are required to be written in the data sector to be written.
9. A memory resource usage detection and memory allocation apparatus, comprising: a controller for performing the memory resource usage detection and memory allocation method of any one of claims 1-7; and
and the display module is used for displaying the comparison result of the accumulated erasing times and a preset erasing time threshold.
10. The apparatus of claim 9, further comprising:
and the touch input module is used for receiving a touch instruction of a user.
11. A storage medium, characterized in that the storage medium stores a computer program;
the computer program, when executed by a processor, performs the steps of the method of any one of claims 1 to 7.
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