CN114268331B - Power self-adaptive radio frequency antenna switch and control method thereof - Google Patents
Power self-adaptive radio frequency antenna switch and control method thereof Download PDFInfo
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- CN114268331B CN114268331B CN202111580158.7A CN202111580158A CN114268331B CN 114268331 B CN114268331 B CN 114268331B CN 202111580158 A CN202111580158 A CN 202111580158A CN 114268331 B CN114268331 B CN 114268331B
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Abstract
The invention provides a radio frequency antenna switching circuit and a control method thereof, wherein the switching circuit comprises: a power sampling circuit configured to sample an output power of the antenna terminal ANT and adjust an output voltage of the power sampling circuit according to the sampled output power of the antenna terminal ANT; a first control circuit configured to adjust an output current of the first control circuit according to an output voltage value of the power sampling circuit; an oscillator configured to adjust an output frequency of the oscillator according to an output current value of the first control circuit; a second control circuit for applying a logic control signal to the radio frequency circuit according to the output of the oscillator; and the radio frequency circuit is configured to adjust the working state of a switch of the radio frequency circuit according to the logic control signal of the second control circuit.
Description
Technical Field
The present invention relates to the field of radio frequency chips, and more particularly, to a radio frequency antenna switch and a control method thereof.
Background
The RF antenna switch chip is a crucial component in the multimode multi-frequency RF front-end module. The radio frequency antenna switch chip in the prior art is usually implemented by adopting a CMOS SOI process. The main indexes of the radio frequency antenna switch comprise indexes such as insertion loss, isolation, harmonic wave, P0.1dB and the like.
The existing radio frequency communication system has higher power capacity requirement for the antenna switch, for example, a 5G mobile phone, and the switch of the antenna port is required to bear power of 39dBm, and the corresponding voltage swing is 28.3V. The switch is designed for the CMOS SOI process, the voltage swing that each transistor can bear is 2.5V, and at least 12 CMOS transistors are required to be stacked theoretically to design the switch meeting the system index requirement. At large voltage signal swings, the voltage swings of each transistor of the switch in the isolated state leg are not evenly distributed due to the leakage of the gate and substrate of the transistor at large radio frequency voltage swings. In addition, when the antenna port has a large voltage swing, the gate leakage Ig (i.e., the load of the negative charge pump) of each transistor increases. When the output of the energy storage capacitor CL of the charge pump is greater than the input, this will cause a negative voltage rise, which in turn will cause the control voltage of the switch-off branch to be raised. The switch can be made to enter the compression region to work, so that the harmonic index can be deteriorated, and if the input power is continuously increased at the moment, the switch can enter the saturation region to work, and the risk of burning exists.
To prevent this problem, it is common practice to increase the oscillation frequency of the oscillator, for example by using a higher oscillation frequency (e.g. 10 MHz), so that the CL can extract sufficient energy required by the Ig. The increase in oscillation frequency, while solving the above-described problems, has two drawbacks, the first being an increase in power consumption of the circuit. Second, when the switch is operated in the receiving mode, the excessive oscillation frequency may interfere with the receiving sensitivity of the entire rf front-end system. The sensitivity of the switch exceeds the standard, and the error rate of the system can rise, which can seriously affect the performance of the receiver. Another method is to increase the safe isolation distance between the oscillator analog circuit and the radio frequency circuit, i.e. to increase the space distance between the two modules, when the chip layout is drawn. This has the disadvantage that the chip size is too large, increasing the manufacturing cost of the product.
In view of the above technical problems, there is a need for a radio frequency antenna switch control circuit with adaptive power to provide a reliable solution, so as to automatically adjust the performance of the control circuit according to the power level emitted by an antenna port, further improve the performance of the switch, optimize the layout size of the switch chip, and save the manufacturing cost of the product.
Disclosure of Invention
Technical problem to be solved
Along with the increase of the power born by the radio frequency antenna switch chip, the switch enters a compression area to work, so that the harmonic index is deteriorated; the switch works in saturation region, which brings risk of burning out, which makes it difficult to meet the higher power capacity requirement of the existing radio frequency communication system. Furthermore, the existing solutions have the following drawbacks: the increase in circuit power consumption, poor sensitivity in the reception mode, and excessive chip size result in an increase in cost.
Technical proposal
In order to solve the problems, the invention provides a power-adaptive radio frequency antenna switch and a control method thereof.
The invention provides a radio frequency antenna switching circuit, which comprises: a power sampling circuit configured to sample an output power of the antenna terminal ANT and adjust an output voltage value of the power sampling circuit according to the sampled power of the antenna terminal ANT; the input end of the first control circuit is connected with the output end of the power sampling circuit, and the first control circuit is configured to adjust the output current value of the first control circuit according to the output voltage value of the power sampling circuit; an oscillator, an input of which is connected to an output of the first control circuit, the oscillator being configured to adjust an output frequency of the oscillator according to an output current value of the first control circuit; the input end of the second control circuit is connected with the output end of the oscillator and is used for applying logic control signals to the radio frequency circuit; the input end of the radio frequency circuit is connected with the output end of the second control circuit, and the radio frequency circuit is configured to adjust the working state of a switch of the radio frequency circuit according to the logic control signal of the second control circuit.
The invention provides a radio frequency antenna switching circuit, wherein the power sampling circuit comprises: a resistor R (811), one end of the resistor R (811) being connected to the N-terminal of the diode D (816), the other end of the resistor R (811) being the output terminal of the power sampling circuit; a resistor R (812), one end of the resistor R (812) is connected to the output end of the power sampling circuit, and the other end of the resistor R (812) is grounded; a capacitor C (813), one end of the capacitor C (813) being connected to the antenna terminal ANT, the other end of the capacitor C (813) being connected to the P-terminal of the diode D (816); a capacitor C (814), an upper plate of the capacitor C (814) being connected to an N-terminal of the diode D (816), a lower plate of the capacitor C (814) being grounded; a capacitor C (815), wherein an upper polar plate of the capacitor C (815) is connected to the output end of the power sampling circuit, and a lower polar plate of the capacitor C (815) is grounded; diode D (816).
The invention provides a radio frequency antenna switching circuit, wherein the power sampling circuit comprises: a resistor R (911), one end of the resistor R (911) being connected to an output terminal of the power sampling circuit, the other end of the resistor R (911) being connected to an upper plate of a capacitor C (913); a resistor R (912), one end of the resistor R (912) being connected to the output of the power sampling circuit, the other end of the resistor R (912) being grounded; a capacitor C (913), an upper plate of the capacitor C (913) being connected to an N-terminal of the diode D (916) and to one terminal of the resistor R (911), a lower plate of the capacitor C (913) being grounded; a diode D (914); a diode D (915); and a diode D (916), wherein the diode D (914), the diode D (915), and the diode D (916) are connected in series, and a P terminal of the diode D (914) is connected to the antenna terminal ANT, and an N terminal of the diode D (916) is connected to an upper plate of the capacitor C (913).
The invention provides a radio frequency antenna switching circuit, wherein the first control circuit comprises a first current mirror module, a driving current providing module and a feedback module, wherein the first current mirror module is configured to provide a first current, wherein the feedback module is configured to provide a second current proportional to an output voltage of the power sampling circuit, and wherein the driving current providing module is used for providing a driving current proportional to a sum of the first current and the second current to the oscillator.
The invention provides a radio frequency antenna switching circuit, wherein the feedback module comprises an operational amplifier, a feedback transistor and a feedback resistor, wherein the operational amplifier is configured with a negative input end connected to the output of the power sampling circuit, a positive input end of the operational amplifier is connected to a grounding node through the feedback resistor, and an output end of the operational amplifier is connected to a grid electrode of the feedback transistor, wherein the feedback transistor is configured with a source electrode connected with a power supply, a grid electrode connected with the output of the operational amplifier, and a drain electrode connected with the grounding node through the feedback resistor.
The invention provides a radio frequency antenna switching circuit wherein the feedback module further comprises a second current mirror circuit configured to provide a second current to the oscillator that is proportional to the current on the feedback resistor.
The invention provides a radio frequency antenna switching circuit, wherein the first control circuit comprises a first current mirror module, a driving current providing module and a comparison circuit, wherein the first current mirror module is configured to provide a first current, wherein the comparison circuit is configured to output a third current according to a comparison result of an output voltage of the power sampling circuit and a first reference voltage, and wherein the driving current providing module is used for providing a driving current proportional to the sum of the first current and the third current for an oscillator.
The invention provides a radio frequency antenna switching circuit, wherein the second control circuit comprises a negative pressure charge pump configured to output a negative pressure for generating a logic control signal according to an output frequency of the oscillator.
The invention provides a radio frequency antenna switching circuit, wherein the first current is set so that the negative pressure charge pump is at a minimum operating frequency.
The invention provides a radio frequency antenna switching circuit, wherein the power sampling circuit is configured to: when the output power of the antenna end ANT is within the first range, the output voltage of the power sampling circuit increases as the output power of the antenna end ANT increases.
Advantageous effects
Compared with the prior art, the invention provides a radio frequency antenna switch control circuit with self-adaptive power, which has the following beneficial effects: (1) In the transmitting mode, the switch has higher functional capacity and can bear larger voltage swing; (2) In the receive mode, the switch has very low power consumption and excellent sensitivity fingers; (3) The layout of the chip can be more compact, the layout area of the chip is saved, and the manufacturing cost is reduced.
Drawings
FIG. 1 is a schematic diagram of the circuit structure of a CMOS SOI switch;
FIG. 2 is a schematic diagram of the large signal characteristics of a switch;
FIG. 3 is a schematic diagram of the harmonic characteristics of a switch operating in the linear region and the compression region;
FIG. 4 is a schematic diagram of switch gate and substrate leakage at large voltage signal swing;
FIG. 5 is a schematic diagram of a conventional manner of control of a switch;
FIG. 6 is a schematic diagram of a conventional chip layout of a switch;
fig. 7 is a block diagram of the overall structure of a radio frequency antenna switching circuit according to an embodiment of the present invention;
Fig. 8 is a schematic circuit diagram according to a first embodiment of the present invention;
fig. 9 is a schematic circuit diagram according to a second embodiment of the invention;
fig. 10 is a schematic circuit diagram according to a third embodiment of the present invention;
fig. 11 is a schematic circuit diagram according to a fourth embodiment of the present invention;
FIG. 12 is a schematic diagram of output characteristics of components versus input power according to the first and second embodiments of the present invention;
FIG. 13 is a schematic diagram of output characteristics of components versus input power according to third and fourth embodiments of the present invention; and
FIG. 14 is a schematic diagram of a chip layout of a radio frequency antenna switch according to an embodiment of the present invention;
Detailed Description
Before proceeding with the following detailed description, it may be advantageous to set forth definitions of certain words and phrases used throughout this patent document. The terms "coupled," "connected," and derivatives thereof, refer to any direct or indirect communication or connection between two or more elements, whether or not those elements are in physical contact with one another. The terms "transmit," "receive," and "communicate," and derivatives thereof, encompass both direct and indirect communication. The terms "include" and "comprise," as well as derivatives thereof, mean inclusion without limitation. The term "or" is inclusive, meaning and/or. The phrase "associated with … …" and its derivatives are intended to include, be included in, interconnect with, contain within … …, connect or connect with … …, couple or couple with … …, communicate with … …, mate, interleave, juxtapose, approximate, bind or bind with … …, have attributes, have relationships or have relationships with … …, etc. The term "controller" refers to any device, system, or portion thereof that controls at least one operation. Such a controller may be implemented in hardware, or a combination of hardware and software and/or firmware. The functionality associated with any particular controller may be centralized or distributed, whether locally or remotely. The phrase "at least one," when used with a list of items, means that different combinations of one or more of the listed items may be used, and that only one item in the list may be required. For example, "at least one of A, B, C" includes any one of the following combinations: A. b, C, A and B, A and C, B and C, A and B and C.
Definitions for other specific words and phrases are provided throughout this patent document. Those of ordinary skill in the art should understand that in many, if not most instances, such definitions apply to prior as well as future uses of such defined words and phrases.
In this patent document, the application combinations of modules and the division levels of sub-modules are for illustration only, and the application combinations of modules and the division levels of sub-modules may have different manners without departing from the scope of the disclosure.
As shown in fig. 1, the CMOS SOI switching circuit is a single pole double throw switching circuit that basically includes an oscillator 110, a control circuit 120, and a radio frequency circuit 130. Wherein the radio frequency circuit 130 takes the form of a series-parallel stack. The control mode of the switch circuit is to use positive and negative voltages to control, namely, when the switch is turned on, the grid electrode of the transistor is controlled by adding positive voltage; when the switch is closed, the gate of the transistor is controlled by adding negative voltage. The negative pressure of the switching circuit is realized by a negative pressure charge pump, and the working frequency of the charge pump is provided by the oscillator 110 with a stable oscillation frequency, and the common frequency is about several megabytes.
The main working states of the switch circuit are a transmitting state and a receiving state, when the switch circuit works in the transmitting state, the input end of the switch circuit is connected to the output end of the radio frequency power amplifier, the output end of the switch circuit is connected to the antenna end 140, and the switch circuit radiates out the output power signal of the power amplifier. In the transmitting state, the requirement for the switching circuit is to have a low insertion loss and a high power-carrying capacity. When the switch circuit works in a receiving state, the switch circuit is required to have higher isolation and good receiving sensitivity, and in practical application, if the receiving sensitivity of the switch circuit exceeds the standard, the error rate of the system can rise, and the performance of the receiver is seriously affected. The transistor breakdown voltage of CMOS SOI technology is typically 2.5V due to its low voltage. To be able to withstand high power voltage signal swings, CMOS SOI switching circuits typically take the form of series-parallel stacks as shown in fig. 1. In the above-described switching structure, the power withstand capability of the switching circuit depends on the voltage withstand capability of the off-state branch and the current carrying capability of the on-state branch. The power handling capability of the off-state leg can be increased by increasing the number of stacked crystals of the off-state leg. By increasing the size of the pass-through branch transistors, the power handling capability of the pass-through branch can be increased.
Fig. 2 is a schematic diagram of the large signal characteristics of the switching circuit. The main indexes of the radio frequency antenna switching circuit comprise indexes such as insertion loss, isolation, harmonic waves, P0.1dB and the like. Insertion loss and isolation are small signal indicators that can be obtained by testing the S parameter. The harmonic wave and P0.1dB belong to large signal indexes, and the external input power is needed for measurement. The power capacity compression of the radio frequency antenna switching circuit is related to the power of an input signal, when the power of the input signal is maintained within a certain range, the input power and the output power of the switching circuit maintain a linear relation, namely the insertion loss value of an antenna switch is kept constant, and when the power of the input signal of the switching circuit is increased to a certain value, the insertion loss of the switching circuit is not kept constant any more and tends to be increased, which is called power compression. As shown in fig. 2, the output power corresponding to the small signal insertion loss is reduced by 0.1dB, namely, p0.1db, when the small signal insertion loss is reduced by 0.1dB. The large signal characteristics of the switching circuit include three operating intervals: a linear region, a compression region, and a saturation region. Generally, when the output power is less than 0.1dB compression point power, the antenna switch operates in a linear mode, corresponding to the linear region in fig. 2. When the input power exceeds P0 and 1dB power, the output power no longer changes linearly with the input power, and the antenna switch enters a power compression state, and the output power is called maximum saturation power, which corresponds to a saturation region, abbreviated as Pmax in fig. 2. The output power changes by less than 0.1dB every 3dB of the input power in the saturation region. The output power is between the 0.1dB gain compression point power and the saturation power Pmax, there is still a slowly varying phase corresponding to the compression zone in fig. 2. When the switching circuit works in the compression area, the input power is increased by 0.1-0.5 dB every time the input power is increased by 1dB.
Fig. 3 is a schematic diagram of the harmonic characteristics of the switching circuit operating in the linear region and the compression region. In practical applications, as shown in fig. 3, the antenna switch is normally operated in the linear region and is disabled from operating in the saturation region. Once operating in the saturation region, the switching circuit runs the risk of being burned out by a large signal swing breakdown. The harmonic of the switch working in the linear region also changes linearly, and in the linear region, every 1dB of input power is increased, the second harmonic H2 is increased by 2dB, and the third harmonic H3 is increased by 3dB. The harmonics shown in fig. 3 include the second harmonic and the third harmonic. Once in the compression region, the second and third harmonics can rapidly deteriorate as the input power increases.
Fig. 4 is a schematic diagram of switch gate and substrate leakage at large voltage signal swing. The main reason for this is that as the input power increases, the voltage swing at the antenna port increases, and when the antenna port has a larger voltage swing, the gate leakage Ig of each transistor increases as shown in fig. 4. Wherein Ig is the load of the negative charge pump. When the output of the energy storage capacitor CL of the charge pump is greater than the input, this will cause a negative voltage rise, which in turn will cause the control voltage of the switch-off branch to be raised. The switch enters the compression region to work, harmonic indexes of the switch in the compression region can be deteriorated, and if the input power is continuously increased at the moment, the switch can enter the saturation region to work, so that the risk of burning exists.
The existing radio frequency communication system has higher power capacity requirement for the antenna switch, for example, a 5G mobile phone, and the switch of the antenna port is required to bear power of 39dBm, and the corresponding voltage swing is 28.3V. The CMOS SOI process shown in fig. 1 is used to design a switch, where each transistor can withstand a voltage swing of 2.5V, and at least 12 CMOS transistors need to be stacked to design a switch that meets the system specification requirements. Because of the leakage of the gate and substrate of the transistors at large radio frequency voltage swings, the voltage swings of each transistor of the switch in the isolated state leg are not evenly distributed at large voltage signal swings. As shown in fig. 4, the voltage swing imbalance of the stacked series transistors is caused by the additional current required to provide the loss through the substrate and gate resistor.
Fig. 5 is a schematic diagram of a conventional control scheme of a switching circuit. The voltage required to control the state of the off-branch switch is generated by the negative charge pump 520, with a typical control voltage of-2.5V. Fig. 5 shows a schematic diagram of a standard negative-pressure charge pump 520, wherein an oscillator 510 provides a stable clock frequency for the negative-pressure charge pump 520. The negative pressure charge pump 520 outputs a negative pressure by constantly switching the switching capacitor inside. When the antenna port has a larger voltage swing, the gate leakage Ig of each transistor increases. Ig is the load of negative charge pump 520. When the output of the storage capacitor CL of the negative charge pump 520 is greater than the input, this will cause the negative voltage to rise, which in turn causes the control voltage of the switch off branch to rise. The switch is made to operate in the compression region, resulting in deterioration of the harmonic index. When the input power is continuously increased, the switch can enter a saturation region to work, and the risk of burning out is increased.
Fig. 6 is a schematic diagram of a conventional chip layout of a switching circuit. As shown in fig. 6, a safety isolation distance is added between the analog circuit and the rf circuit of the oscillator 510, i.e., the space between the two modules is increased.
Fig. 7 is a block diagram of the overall structure of a radio frequency antenna switching circuit according to an embodiment of the present invention.
As shown in fig. 7, the rf antenna switching circuit includes a power sampling circuit 710, a first control circuit 720, an oscillator 730, a second control circuit 740, and an rf circuit 750.
An output of the power sampling circuit 710 is connected to an input of the first control circuit 720, and an input of the power sampling circuit 710 is connected to an output of the radio frequency circuit 750. Specifically, the power sampling circuit 710 is configured to sample power information of the antenna terminal ANT 760 and adjust an output voltage value thereof according to the sampled power of the antenna terminal ANT 760, and the output voltage value of the power sampling circuit 710 is provided to the first control circuit 720. According to an embodiment of the invention, the power sampling circuit 710 may be configured to: when the operating state of the switch is in the transmitting mode, the output power of the antenna terminal ANT 760 is within a first range (e.g., between Pt and Pmax) (where Pt is the lowest power value that can be detected by the power sampling circuit and Pmax is the maximum saturated power value), and as the sampled power of the antenna terminal ANT 760 increases, the output voltage value of the power sampling circuit 710 increases; when the operating state of the switch is in the receive mode, the output of the power sampling circuit 710 is 0V.
An output of the first control circuit 720 is connected to an input of the oscillator 730 for providing a driving current for the oscillator 730. Specifically, the first control circuit 720 is configured to adjust its output current value according to the output voltage value of the power sampling circuit 710, and the output current value of the first control circuit 720 is used as a driving current for driving the oscillator 730. When the output voltage value of the power sampling circuit 710 increases, the output current value of the first control circuit 720 increases, that is, the driving current of the oscillator 730 increases; when the output of the power sampling circuit 710 is 0V, the output current value of the first control circuit 720 is at the lowest output current value, that is, the driving current of the oscillator 730 is at the lowest driving current.
An output of the oscillator 730 is connected to an input of the second control circuit 740 for supplying input energy to a negative pressure charge pump in the second control circuit 740. Specifically, the oscillator 730 is configured to adjust its output frequency according to the driving current of the oscillator 730, and the output frequency of the oscillator 730 is used as the operating frequency of the negative-pressure charge pump in the second control circuit 740. When the driving current of the oscillator 730 increases, the output frequency of the oscillator 730 increases, that is, the operating frequency of the negative-pressure charge pump in the second control circuit 740 increases; when the driving current of the oscillator 730 is at the lowest driving current, the output frequency of the oscillator 730 is at the lowest output frequency, i.e., the negative voltage charge pump in the second control circuit 740 is at the lowest operating frequency.
An output terminal of the second control circuit 740 is connected to an input terminal of the rf circuit 750, and is configured to apply a logic control signal to the rf circuit 750, so as to control an operation state of a switch in the rf circuit 750. Specifically, the negative pressure charge pump is configured to output a negative pressure for generating a logic control signal according to the output frequency of the oscillator 730. When the output frequency of the oscillator 730 increases, the operating frequency of the negative charge pump increases, and the output negative voltage of the negative charge pump is a specific negative voltage value, for example, -2.5V; the negative charge pump can maintain normal operation when the output frequency of the oscillator 730 is at the lowest output frequency, i.e., when the negative charge pump is at the lowest operating frequency.
An output of the rf circuit 750 is connected to the antenna terminal ANT 760, and an output of the rf circuit 750 is connected to an input of the power sampling circuit 710. Specifically, the radio frequency circuit 750 is configured to switch to a transmit mode or a receive mode according to the logic control signal of the second control circuit 740. Specifically, when the output negative pressure of the negative pressure charge pump is a specific negative pressure value, the working state of the switch is in a transmitting mode; otherwise, the working state of the switch is in a receiving mode.
The antenna end ANT 760 is configured to have a corresponding power transmission state according to an operation state of the switch, wherein the antenna end ANT 760 transmits at various levels of power when the operation state of the switch is in a transmission mode; when the switch is in the receive mode, the antenna end ANT 760 does not transmit power.
According to the above radio frequency antenna switching circuit, the method for controlling the radio frequency antenna switching circuit comprises:
when the operating state of the switch is in the transmitting mode, the antenna end ANT 760 transmits with various levels of power; the power sampling circuit 710 outputs a continuous voltage waveform by sampling power information transmitted from the antenna terminal ANT 760, the output voltage value of which increases as the power of the sampled antenna terminal ANT 760 increases; the first control circuit 720 increases the driving current output to the oscillator 730 according to the increase of the output voltage value of the power sampling circuit 710, so that the output frequency of the oscillator 730 increases while the negative voltage charge pump in the second control circuit 740 outputs a specific negative voltage value. Under the above situation, when the input power does not exceed the maximum saturation power value Pmax, the switch works in the linear region in the corresponding input power range; when the input power exceeds the maximum saturation power value Pmax, the switch leaves the linear region and enters the saturation region for operation. According to the embodiment of the invention, the input power of the switch circuit is provided by the rf power amplifier, the output of the rf power amplifier is connected to the input end of the switch, and after the switch circuit is turned on, the rf power is radiated from the antenna end ANT, however, it should be clear to those skilled in the art that other power providing manners may be adopted without departing from the scope of the invention.
When the operating state of the switch is in the receiving mode, the antenna terminal ANT 760 does not transmit power; the power sampling circuit 710 samples power information of the antenna terminal ANT 760, and an output voltage value thereof is 0V; the output current value of the first control circuit 720 is at the lowest output current value, while the driving current of the oscillator 730 is at the lowest driving current; in the above case, the negative voltage charge pump in the second control circuit 740 operates at the lowest operating frequency.
Fig. 8 is a schematic circuit diagram according to a first embodiment of the present invention.
Fig. 12 is a schematic diagram showing the relationship between the output characteristics and the input power of each component according to the first and second embodiments of the present invention.
Fig. 14 is a schematic diagram of a chip layout of a radio frequency antenna switch according to an embodiment of the present invention.
As shown in fig. 8, the rf antenna switching circuit according to one embodiment of the present invention includes a power sampling circuit 810, a first control circuit 820, an oscillator 830, a second control circuit 840, and an rf circuit 850.
As shown in fig. 8, the power sampling circuit 810 includes a resistor R811, a resistor R812, a capacitor C813, a capacitor C814, a capacitor C815, and a diode D816. One end of the capacitor C813 serves as an input terminal of the power sampling circuit 810, and is connected to the antenna terminal ANT 860. The other end of the capacitor C813 is connected to the P-terminal of the diode D816. The N terminal of diode D816 is connected to the upper plate of capacitor C814, and the lower plate of capacitor C814 is grounded. The N terminal of the diode D816 is connected to a resistor R811, and the other terminal of the resistor R811 is the output terminal of the power sampling circuit 810. The upper plate of capacitor C815 is connected to the output of power sampling circuit 810 and the lower plate of capacitor C815 is grounded. One end of the resistor R812 is connected to the output of the power sampling circuit 810, and the other end of the resistor R812 is grounded. The output node of the power sampling circuit 810 is V SENSE. According to an embodiment of the present invention, the power sampling circuit 810 may be configured to sample the output power of the antenna terminal ANT 860. When the operating state of the switch is in the transmitting mode, the output power of the antenna end ANT 860 is within a first range (e.g., between Pt and Pmax), and as the power of the acquired and sampled antenna end ANT 860 increases, the output voltage value of the power sampling circuit 810 increases; when the operating state of the switch is in the receive mode, the output of the power sampling circuit 810 is 0V.
The first control circuit 820 includes a first current mirror module, a driving current providing module, and a feedback module. The output current Iosc of the first control circuit 820 provides a driving current for the oscillator 830 for changing the operating frequency of the oscillator 830.
The first current mirror module is configured to provide a first current, including a current source 821, a transistor MN822, and a transistor MN823. Wherein the current of the current source 821 is I 1 When transistor size MN 822=mn 823, I 1 ＝I 2 . The feedback module comprises a feedback transistor MP827, a feedback resistor R828, an operational amplifier OP829, and a second current mirror circuit configured to provide a second current proportional to the output voltage of the power sampling circuit 810. Wherein the current isWherein the output node v_sense is connected to a negative input of an operational amplifier OP829, the operational amplifier OP829 is configured with its negative input connected to the output of the power sampling circuit 810, the positive input of the operational amplifier OP829 is connected to the ground node through the feedback resistor R828, and the output of the operational amplifier OP829 is connected to the gate of a feedback transistor MP 827. The feedback transistor MP827 is configured to have its source connected to the power supply, its gate connected to the output of the operational amplifier OP829, and its drain passing through The feedback resistor R828 is connected to the ground node. The second current mirror circuit is configured to provide a second current to the oscillator 830 that is proportional to the current across the feedback resistor R828.
The driving current providing means includes a transistor MP824, a transistor MP825, and a transistor MP826 for providing a driving current proportional to a sum of the first current and the second current to the oscillator 830.
When the transistor size MP 824=mp 825=mp 826=mp 827, I 3 ＝I 1 ，I 4 ＝I 5 Then output currentWhen the power of the antenna terminal ANT 860 increases, the output voltage value of the power sampling circuit 810 increases, the output current Iosc increases, the driving current of the oscillator 830 increases, and the operating frequency of the oscillator 830 increases.
An output terminal of the oscillator 830 is connected to an input terminal of the second control circuit 840 for supplying input energy to the negative voltage charge pump 841 in the second control circuit 840, and in particular, the oscillator 830 is configured to adjust its output frequency according to the driving current of the oscillator 830, and the output frequency of the oscillator 830 is used as the operating frequency of the negative voltage charge pump 841. When the driving current of the oscillator 830 increases, the output frequency of the oscillator 830 increases, that is, the operating frequency of the negative-pressure charge pump in the second control circuit 840 increases; when the driving current of the oscillator 830 is at the lowest driving current, the output frequency of the oscillator 830 is at the lowest output frequency, i.e., the negative voltage charge pump in the second control circuit 840 is at the lowest operating frequency.
An output of the second control circuit 840 is connected to an input of the radio frequency circuit 850 for applying a logic control signal to the radio frequency circuit 850 to control an operating state of a switch in the radio frequency circuit 850. Specifically, the negative-pressure charge pump 841 is configured to output a negative pressure for generating a logic control signal according to the output frequency of the oscillator 830. When the output frequency of the oscillator 830 increases, the operating frequency of the negative charge pump 841 increases, and the output negative voltage of the negative charge pump 841 is a specific negative voltage value, for example, -2.5V; the negative charge pump 841 can maintain normal operation when the output frequency of the oscillator 830 is at the lowest output frequency, i.e., when the negative charge pump 841 is at the lowest operating frequency. The first current is set so that when the rf antenna switching circuit operates in the receiving state, the oscillation frequency of the rf antenna switching circuit is made sufficiently low to maintain only the negative voltage required for the normal operation of the negative voltage charge pump 841.
An output of the radio frequency circuit 850 is connected to an antenna terminal ANT 860, and an output of the radio frequency circuit 850 is connected to an input of the power sampling circuit 810. Specifically, the radio frequency circuit 850 may be an antenna switch structure in any combination, and is configured to switch in a transmitting mode or a receiving mode according to the logic control signal of the second control circuit 840. Specifically, when the negative pressure output by the negative pressure charge pump 841 is a specific negative pressure value, the working state of the switch is in the emission mode; otherwise, the working state of the switch is in a receiving mode.
The antenna end ANT 860 is configured to have a corresponding power transmission state according to an operation state of the switch, wherein the antenna end ANT 860 transmits with various levels of power when the operation state of the switch is in the transmission mode; when the switch is in the receiving mode, the antenna end ANT 860 does not transmit power.
As shown in fig. 12, wherein the abscissa is input power. When the switch operates in the emission mode, the output power increases with the increase of the input power, and when the output power reaches Pt, the power sampling circuit 810 starts outputting the voltage while the output current Iosc increases, the output frequency of the oscillator 830 increases linearly, while the negative charge pump 841 in the second control circuit 840 outputs a voltage with a negative voltage value of-2.5V, and the harmonic of the switch changes linearly. In the above case, the harmonic characteristic of the switch is not deteriorated until the input power reaches Pmax; when the input power reaches Pmax, the output power is not increased any more; when the input power continues to be increased under the condition that the input power reaches Pmax, the switch enters a saturation region to work.
When the switch is operated in the receive mode, v_sense= 0,I OSC ＝I 1 . The oscillation frequency of the switch is fixed and unchanged by selecting proper I 1 The value is such that the oscillation frequency of the switch is low enough to maintain the negative voltage required for the negative voltage charge pump 841 to operate normally, the negative voltage charge pump 841 operating at the lowest operating frequency. In the above case, the power consumption of the entire switching system is reduced, and the reception sensitivity of the switch is improved.
In the process of drawing the chip layout, the distance between the radio frequency module and the analog module can be shortened, and the area of the chip layout is reduced as shown in fig. 14. Specifically, the sizes of the transistors MP824, MP825, MP826, MP827 may be set in a proportional relationship according to the requirement of Iosc, and may be, but not limited to, MP 824=mp 825=mp 826=mp 827.
Fig. 9 is a schematic circuit diagram according to a second embodiment of the present invention.
Fig. 12 is a schematic diagram showing the relationship between the output characteristics and the input power of each component according to the first and second embodiments of the present invention.
Fig. 14 is a schematic diagram of a chip layout of a radio frequency antenna switch according to an embodiment of the present invention.
As shown in fig. 9, the rf antenna switching circuit according to one embodiment of the present invention includes a power sampling circuit 910, a first control circuit 920, an oscillator 930, a second control circuit 940, and an rf circuit 950.
The power sampling circuit 910 includes a resistor R911, a resistor R912, a capacitor C913, a diode D914, a diode D915, and a diode D916. The capacitor C913, the P terminal of the diode D914 and the antenna terminal ANT 960 are connected. Diode D914, diode D915, and diode D916 are cascaded. The upper plate of the capacitor C913 is connected to the N terminal of the diode D916, and the lower plate of the capacitor C913 is grounded. One end of the resistor R912 is connected to the output terminal of the power sampling circuit 910, and the other end of the resistor R912 is grounded. One end of the resistor R911 is connected to the output terminal of the power sampling circuit 910, and the other end of the resistor R911 is connected to the upper plate of the capacitor C913. The output node of the power sampling circuit 910 is v_sense. According to an embodiment of the present invention, the power sampling circuit 910 may be configured to sample the output power of the antenna terminal ANT 960. When the operating state of the switch is in the transmitting mode, the output power of the antenna terminal ANT 960 is within a first range (e.g., between Pt and Pmax), and as the power of the sampled antenna terminal ANT 960 increases, the output voltage value of the power sampling circuit 910 increases; when the operating state of the switch is in the receive mode, the output of the power sampling circuit 910 is 0V.
The first control circuit 920 includes a first current mirror module, a driving current providing module, and a feedback module. The output current Iosc of the first control circuit 920 provides a driving current to the oscillator 930 for changing the operating frequency of the oscillator 930.
The first current mirror module is configured to provide a first current, including a current source 921, a transistor MN922, and MN923. Wherein the current of the current source 921 is I 1 When transistor size mn922=mn923, I 1 ＝I 2 。
The feedback module comprises a feedback transistor MP927, a feedback resistor R928, an operational amplifier OP929, and a second current mirror circuit configured to provide a second current proportional to the output voltage of the power sampling circuit 910. Electric currentWherein the output node v_sense is connected to a negative input of an operational amplifier OP929, the operational amplifier OP929 is configured with its negative input connected to the output of the power sampling circuit 910, the positive input of the operational amplifier OP929 is connected to the ground node through the feedback resistor R928, and the output of the operational amplifier OP929 is connected to the gate of the feedback transistor MP 927. The feedback transistor MP927 is configured to have its source connected to a power supply, its gate connected to the output of the operational amplifier OP929, and its drain connected to a ground node through the feedback resistor R928. The second current mirror circuit is configured to provide a second current to the oscillator 930 that is proportional to the current on the feedback resistor R928.
The driving current providing module comprises a transistor MN924, a transistor MN925, and a transistor MP926 for providing the oscillator 930 with a first current and a second currentAnd a proportional drive current. Wherein, when transistor size mp926=mp927, mn924=mn925, I 3 ＝I 4 ，I 4 ＝I 5 Then output currentWhen the power of the antenna terminal ANT 960 increases, the output voltage value of the power sampling circuit 910 increases, the output current Iosc increases, the driving current of the oscillator 930 increases, and the operating frequency of the oscillator 930 increases.
An output terminal of the oscillator 930 is connected to an input terminal of the second control circuit 940 for supplying input energy to the negative voltage charge pump 941 in the second control circuit 940, and specifically, the oscillator 930 is configured to adjust its output frequency according to a driving current of the oscillator 930, and the output frequency of the oscillator 930 is used as an operating frequency of the negative voltage charge pump 941. When the driving current of the oscillator 930 increases, the output frequency of the oscillator 930 increases, that is, the operating frequency of the negative-pressure charge pump in the second control circuit 940 increases; when the driving current of the oscillator 930 is at the lowest driving current, the output frequency of the oscillator 930 is at the lowest output frequency, i.e., the negative voltage charge pump in the second control circuit 940 is at the lowest operating frequency.
An output terminal of the second control circuit 940 is connected to an input terminal of the radio frequency circuit 950 for applying a logic control signal to the radio frequency circuit 950 to control an operating state of a switch in the radio frequency circuit 950. Specifically, the negative-pressure charge pump 941 is configured to output a negative pressure for generating a logic control signal according to the output frequency of the oscillator 930. When the output frequency of the oscillator 930 increases, the operating frequency of the negative charge pump 941 increases, and the output negative pressure of the negative charge pump 941 is a specific negative pressure value, for example, -2.5V; the negative pressure charge pump 941 can maintain normal operation when the output frequency of the oscillator 930 is at the lowest output frequency, i.e., when the negative pressure charge pump 941 is at the lowest operating frequency. The first current is set such that when the rf antenna switching circuit is operating in the receiving state, the oscillating frequency of the rf antenna switching circuit is made sufficiently low to maintain only the negative voltage required for the negative voltage charge pump 941 to operate normally.
An output of the radio frequency circuit 950 is connected to the antenna terminal ANT 960, and an output of the radio frequency circuit 950 is connected to an input of the power sampling circuit 910. Specifically, the radio frequency circuit 950 may be an antenna switch structure in any combination, and is configured to switch in a transmitting mode or a receiving mode according to the applied logic control signal of the second control circuit 940. Specifically, when the negative pressure output by the negative pressure charge pump 941 is a specific negative pressure value, the working state of the switch is in the emission mode; otherwise, the working state of the switch is in a receiving mode.
The antenna end ANT 960 is configured to have a corresponding power transmission state according to an operation state of the switch, wherein the antenna end ANT 960 transmits at various levels of power when the operation state of the switch is in a transmission mode; when the switch is in the receiving mode, the antenna end ANT 960 does not transmit power.
As shown in fig. 12, wherein the abscissa is input power. When the switch is operated in the emission mode, the output power increases with the increase of the input power, and when the output power reaches Pt, the power sampling circuit 910 starts to output voltage, while the output current Iosc increases, the output frequency of the oscillator 930 increases linearly, while the negative charge pump 941 in the second control circuit 940 outputs a voltage with a negative voltage value of-2.5V, and the harmonic of the switch changes linearly. In the above case, the harmonic characteristic of the switch is not deteriorated until the input power reaches Pmax; when the input power reaches Pmax, the output power is not increased any more; when the input power continues to be increased under the condition that the input power reaches Pmax, the switch enters a saturation region to work.
When the switch is operated in the receive mode, v_sense= 0,I OSC ＝I 1 . The oscillation frequency of the switch is fixed and unchanged by selecting proper I 1 The value is such that the oscillation frequency of the switch is low enough to maintain the negative voltage required for the negative voltage charge pump 941 to operate properly, with the negative voltage charge pump 941 operating at the lowest operating frequency. In the above case, the power consumption of the entire switching system is reduced, and the reception sensitivity of the switch is improved.
In the process of drawing the chip layout, the distance between the radio frequency module and the analog module can be shortened, and the area of the chip layout is reduced as shown in fig. 14. Specifically, the sizes of the transistors MN922, MN923, MN924, MN925 may be set in a proportional relationship according to the requirement of Iosc, and may be, but not limited to, MN 922=mn 923, MN 924=mn 925, MP 926=mp 927.
Fig. 10 is a schematic circuit diagram according to a third embodiment of the present invention.
Fig. 13 is a schematic diagram showing the relationship between output characteristics and input power of each component according to the third and fourth embodiments of the present invention.
Fig. 14 is a schematic diagram of a chip layout of a radio frequency antenna switch according to an embodiment of the present invention.
As shown in fig. 10, the rf antenna switching circuit according to one embodiment of the present invention includes a power sampling circuit 1010, a first control circuit 1020, an oscillator 1030, a second control circuit 1040, and an rf circuit 1050.
The power sampling circuit 1010 includes a resistor R1011, a resistor R1012, a capacitor C1013, a capacitor C1014, a capacitor C1015, and a diode D1016. A capacitor C1013 is an input terminal of the power sampling circuit 1010, which is connected to the antenna terminal ANT 1060. The other end of the capacitor C1013 is connected to the P-terminal of the diode D1016, the N-terminal of the diode D1016 is connected to the upper plate of the capacitor C1014, and the lower plate of the capacitor C1014 is grounded. The N terminal of the diode D1016 is connected to a resistor R1011, and the other terminal of the resistor R1011 is the output terminal of the power sampling circuit 1010. The upper plate of the capacitor C1015 is connected to the output of the power sampling circuit 1010, and the lower substrate of the capacitor C1015 is grounded. One end of the resistor R1012 is connected to the output of the power sampling circuit 1010, and the other end of the resistor R1012 is grounded. The output node of the power sampling circuit 1010 is v_sense. According to an embodiment of the invention, the power sampling circuit 1010 may be configured to sample the output power of the antenna terminal ANT 1060. When the operating state of the switch is in the transmitting mode, the output power of the antenna end ANT 1060 is within a first range (e.g., between Pt and Pmax), and as the power of the antenna end ANT 1060 is increased, the output voltage value of the power sampling circuit 1010 increases; when the operating state of the switch is in the receive mode, the output of the power sampling circuit 1010 is 0V.
The first control circuit 1010 includes a first current mirror module, a driving current supply module, and a comparison circuit. The output current Iosc of the first control circuit 1020 provides a driving current for the oscillator 1030 for changing the operating frequency of the oscillator 1030.
The first current mirror module includes a current source 1021, a transistor MN1022, and a MN1023 configured to provide a first current. Wherein the current of the current source 1021 is I 1 When transistor size mn1022=mn1023, mp1=mp2=mp3, I 1 ＝I 2 ＝I 3 。
The comparison circuit includes a transistor MP1028, a voltage comparator COMP1071, and an inverter INV1072 configured to output a third current according to a comparison result of the output voltage of the power sampling circuit 1010 and the first reference voltage VREF. The output node v_sense is connected to a positive input terminal of the voltage comparator COMP1071, the reference voltage VREF is connected to a negative input terminal of the voltage comparator COMP1071, an output terminal of the voltage comparator COMP1071 is connected to an input terminal of the inverter INV1072, and an output terminal of the inverter INV1072 is connected to a gate of the transistor MP 1028. I 4 Controlled by inverter INV1072, when V_SENSE>When VREF, the inverter INV1072 outputs low level, the transistor MP1028 turns on, I 4 ＝I 1 . When V_SENSE<When VREF, the inverter INV1072 outputs high level, the transistor MP1028 is turned off, I 4 =0. Output current
The driving current providing module is configured to provide a driving current proportional to a sum of the first current and the third current to the oscillator 1030, and includes a transistor MP1024, a transistor MP1025, a transistor MP1026, and a transistor MP1027.
An output terminal of the oscillator 1030 is connected to an input terminal of the second control circuit 1040 for supplying input energy to a negative pressure charge pump 1041 in the second control circuit 1040, in particular, the oscillator 1030 is configured to adjust its output frequency according to a driving current of the oscillator 1030, the output frequency of the oscillator 1030 being an operating frequency of the negative pressure charge pump 1041. When the driving current of the oscillator 1030 increases, the output frequency of the oscillator 1030 increases, i.e., the operating frequency of the negative-pressure charge pump in the second control circuit 1040 increases; when the driving current of the oscillator 1030 is at the lowest driving current, the output frequency of the oscillator 1030 is at the lowest output frequency, i.e., the negative voltage charge pump in the second control circuit 1040 is at the lowest operating frequency.
An output of the second control circuit 1040 is connected to an input of the radio frequency circuit 1050 for applying logic control signals to the radio frequency circuit 1050 for controlling the operating states of the switches in the radio frequency circuit 1050. Specifically, the negative pressure charge pump 1041 is configured to output a negative pressure for generating a logic control signal according to the output frequency of the oscillator 1030. When the output frequency of the oscillator 1030 increases, the operating frequency of the negative pressure charge pump 1041 increases, and the output negative pressure of the negative pressure charge pump 1041 is a specific negative pressure value, for example, 2.5V; the negative pressure charge pump 1041 can maintain normal operation when the output frequency of the oscillator 1030 is at the lowest output frequency, i.e., when the negative pressure charge pump 1041 is at the lowest operating frequency. The first current is set such that when the rf antenna switching circuit is operating in the receiving state, the oscillation frequency of the rf antenna switching circuit is made sufficiently low to maintain only the negative voltage required for the normal operation of the negative voltage charge pump 1041.
An output of the radio frequency circuit 1050 is connected to the antenna terminal ANT 1060, while an output of the radio frequency circuit 1050 is connected to an input of the power sampling circuit 1010. Specifically, the radio frequency circuit 1050 may be an antenna switch structure in any combination, and is configured to be operated in a transmitting mode or a receiving mode according to the logic control signal of the second control circuit 1040. Specifically, when the output negative pressure of the negative pressure charge pump 1041 is a specific negative pressure value, the working state of the switch is in a transmitting mode; otherwise, the working state of the switch is in a receiving mode.
The antenna end ANT 1060 is configured to have a corresponding power transmission state according to an operation state of the switch, wherein the antenna end ANT 1060 transmits at various levels of power when the operation state of the switch is in the transmission mode; when the switch is in the receiving mode, the antenna end ANT 1060 does not transmit power.
As shown in fig. 13, where the abscissa is input power. When the switch is operating in the transmit mode, the power sampling circuit 1010 begins to output voltage as the input power increases and the output power increases accordingly; when v_sense is greater than VREF, the output of the voltage comparator COMP1071 is inverted, so that the transistor MP1028 is turned on, the output of the output current Iosc is doubled, the output frequency of the oscillator 1030 is doubled, the negative voltage charge pump 1041 in the second control circuit 1040 outputs a voltage with a negative voltage value of-2.5V, and the harmonic of the switch varies linearly. In the above case, the harmonic characteristic of the switch is not deteriorated until the input power reaches Pmax; when the input power reaches Pmax, the output power is not increased any more; when the input power continues to be increased under the condition that the input power reaches Pmax, the switch enters a saturation region to work.
When the switch is operated in the receive mode, v_sense= 0,I OSC ＝I 1 . The oscillation frequency of the switch is fixed and unchanged by selecting proper I 1 The value is such that the oscillation frequency of the switch is low enough to maintain the negative voltage required for the negative voltage charge pump 1041 to operate normally, the negative voltage charge pump 1041 operating at the lowest operating frequency. In the above case, the power consumption of the entire switching system is reduced, and the reception sensitivity of the switch is improved.
In the process of drawing the chip layout, the distance between the radio frequency module and the analog module can be shortened, and the area of the chip layout is reduced as shown in fig. 14. Specifically, the sizes of the transistors MP1024, MP1025, MP1026, and MP1027 may be set in a proportional relationship according to the Iosc requirement, and may be, but not limited to, mn1022=mn1023, MP 1024=mp1025=mp1026.
Fig. 11 is a schematic circuit diagram according to a fourth embodiment of the present invention.
Fig. 13 is a schematic diagram showing the relationship between output characteristics and input power of each component according to the third and fourth embodiments of the present invention.
Fig. 14 is a schematic diagram of a chip layout of a radio frequency antenna switch according to an embodiment of the present invention.
As shown in fig. 11, the rf antenna switching circuit according to one embodiment of the present invention includes a power sampling circuit 1110, a first control circuit 1120, an oscillator 1130, a second control circuit 1140, and an rf circuit 1150.
The power sampling circuit 1110 includes a resistor R1111, a resistor R1112, a capacitor C1113, a diode D1114, a diode D1115, and a diode D1116. The capacitor C1113, the P terminal of the diode D1114, and the antenna terminal ANT 1160 are connected. Diode D1114, diode D1115, and diode D1116 are cascaded. The upper plate of capacitor C1113 is connected to the N-terminal of diode D1116, and the lower plate of capacitor C1113 is grounded. One end of the resistor R1112 is connected to the output end of the power sampling circuit 1110, and the other end of the resistor R1112 is grounded. One end of the resistor R1111 is connected to the output terminal of the power sampling circuit 1110, and the other end of the resistor R1111 is connected to the upper plate of the capacitor C1113. The output node of the power sampling circuit 1110 is v_sense. According to an embodiment of the present invention, the power sampling circuit 1110 may be configured to sample the output power of the antenna terminal ANT 1160. When the operating state of the switch is in the transmitting mode, the output power of the antenna terminal ANT 1160 is within a first range (e.g., between Pt and Pmax), and as the power of the acquired and sampled antenna terminal ANT 1160 increases, the output voltage value of the power sampling circuit 1110 increases; when the operating state of the switch is in the receiving mode, the output of the power sampling circuit 1110 is 0V.
The first control circuit 1120 includes a first current mirror module, a driving current providing module, and a feedback module. The output current Iosc of the first control circuit 110 provides a driving current to the oscillator 1130 for changing the operating frequency of the oscillator 1130.
The first current mirror module is configured to provide a first current, including a current source 1121, a transistor MN1122, and a transistor MN1123. Wherein the current of the current source 1121 is I 1 When transistor size mn1122=mn1123=mn1125, I 1 ＝I 2 ，I 3 . The comparison circuit comprises a transistor MN1126 and a voltage comparator COMP1171, configured to be dependent on the power sampling circuit 1110 and the first reference voltage VREF. Wherein the output node v_sense is connected to the positive input of the voltage comparator COMP1171 and the reference voltage VREF is connected to the negative input of the voltage comparator COMP 1171. An output terminal of the voltage comparator COMP1171 is connected to the gate of the transistor MN1126, and an output voltage of the voltage comparator COMP1171 controls on and off of the transistor MN 1126. Controlled by the output of voltage comparator COMP1171, when V_SENSE>When VREF, voltage comparator COMP1171 outputs high level, transistor MN1126 is turned on, I 3 ＝I 1 . When V_SENSE<When VREF, voltage comparator COMP1171 outputs a low level, transistor MN1126 is turned off, I 3 =0. Output current
The driving current supply module includes a transistor MN1124 and a transistor MN1125 for supplying a driving current to the oscillator 1130, and for supplying a driving current proportional to the sum of the first current and the third current to the oscillator 1130.
An output terminal of the oscillator 1130 is connected to an input terminal of the second control circuit 1140 for supplying input energy to the negative voltage charge pump 1141 in the second control circuit 1140, specifically, the oscillator 1130 is configured to adjust its output frequency according to the driving current of the oscillator 1130, and the output frequency of the oscillator 1130 is used as the operating frequency of the negative voltage charge pump 1141. When the driving current of the oscillator 1130 increases, the output frequency of the oscillator 1130 increases, i.e., the operating frequency of the negative-pressure charge pump in the second control circuit 1140 increases; when the driving current of the oscillator 1130 is at the lowest driving current, the output frequency of the oscillator 1130 is at the lowest output frequency, i.e., the negative voltage charge pump in the second control circuit 1140 is at the lowest operating frequency.
An output terminal of the second control circuit 1140 is connected to an input terminal of the rf circuit 1150, and is configured to apply a logic control signal to the rf circuit 1150 to control an operation state of a switch in the rf circuit 1150. Specifically, the negative pressure charge pump 1141 is configured to output a negative pressure for generating a logic control signal according to the output frequency of the oscillator 1130. When the output frequency of the oscillator 1130 increases, the operating frequency of the negative pressure charge pump 1141 increases, and the output negative pressure of the negative pressure charge pump 1141 is a specific negative pressure value, for example, 2.5V; the negative charge pump 1141 can maintain normal operation when the output frequency of the oscillator 1130 is at the lowest output frequency, i.e., the negative charge pump 1141 is at the lowest operating frequency. The first current is set such that when the rf antenna switching circuit is operating in the receiving state, the oscillating frequency of the rf antenna switching circuit is made sufficiently low to maintain only the negative voltage required for the negative voltage charge pump 1141 to operate normally.
An output of the radio frequency circuit 1150 is connected to the antenna terminal ANT 1160 while an output of the radio frequency circuit 1150 is connected to an input of the power sampling circuit 1110. Specifically, the radio frequency circuit 1150 may be an antenna switch structure in any combination, and is configured to switch in a transmitting mode or a receiving mode according to the logic control signal of the second control circuit 1140. Specifically, when the negative pressure output by the negative pressure charge pump 1141 is a specific negative pressure value, the working state of the switch is in the transmitting mode; otherwise, the working state of the switch is in a receiving mode.
The antenna end ANT 1160 is configured to have a corresponding power transmission state according to an operation state of the switch, wherein the antenna end ANT 1160 transmits with various levels of power when the operation state of the switch is in a transmission mode; when the switch is in the receiving mode, the antenna terminal ANT 1160 does not transmit power.
As shown in fig. 13, where the abscissa is input power. When the switch is operated in the transmit mode, as the input power increases, the output power increases, and the power sampling circuit 1110 begins to output voltage; when v_sense is greater than VREF, the output of the voltage comparator COMP1171 is inverted, so that the transistor MP1128 is turned on, the output of the output current Iosc is doubled, the output frequency of the oscillator 1130 is doubled, the negative voltage charge pump 1141 in the second control circuit 1140 outputs a voltage with a negative voltage value of-2.5V, and the harmonic of the switch varies linearly. In the above case, the harmonic characteristic of the switch is not deteriorated until the input power reaches Pmax; when the input power reaches Pmax, the output power is not increased any more; when the input power continues to be increased under the condition that the input power reaches Pmax, the switch enters a saturation region to work.
When the switch is operated in the receive mode, v_sense= 0,I OSC ＝I 1 . The oscillation frequency of the switch is fixed and unchanged by selecting proper I 1 The value is such that the oscillation frequency of the switch is low enough to maintain the negative voltage required for the negative voltage charge pump 1141 to operate properly, the negative voltage charge pump 1141 operating at the lowest operating frequency. In the above case, the power consumption of the entire switching system is reduced, and the reception sensitivity of the switch is improved.
In the process of drawing the chip layout, the distance between the radio frequency module and the analog module can be shortened, and the area of the chip layout is reduced as shown in fig. 14. Specifically, the sizes of the transistors MN1122, MN1123, MN1124, MN1125 may be set in a proportional relationship according to the requirement of Iosc, and may be, but not limited to, mn1122=mn1123=mn1125.
Although the present disclosure has been described with exemplary embodiments, various changes and modifications may be suggested to one skilled in the art. The disclosure is intended to embrace such alterations and modifications that fall within the scope of the appended claims.
Any description of the present invention should not be construed as implying that any particular element, step, or function is a necessary element to be included in the scope of the claims. The scope of patented subject matter is defined only by the claims.
Claims (10)
1. A radio frequency antenna switching circuit comprising:
a power sampling circuit configured to sample an output power of the antenna terminal ANT and adjust an output voltage of the power sampling circuit according to the sampled output power of the antenna terminal ANT;
the input end of the first control circuit is connected with the output end of the power sampling circuit, and the first control circuit is configured to adjust the output current of the first control circuit according to the output voltage value of the power sampling circuit;
an oscillator, an input of which is connected to an output of the first control circuit, the oscillator being configured to adjust an output frequency of the oscillator according to an output current value of the first control circuit;
the input end of the second control circuit is connected with the output end of the oscillator and is used for applying a logic control signal to the radio frequency circuit according to the output of the oscillator; and
the input end of the radio frequency circuit is connected with the output end of the second control circuit, and the radio frequency circuit is configured to adjust the working state of a switch of the radio frequency circuit according to the logic control signal of the second control circuit.
2. The radio frequency antenna switching circuit of claim 1, wherein the power sampling circuit comprises:
a resistor R (811), one end of the resistor R (811) being connected to the N-terminal of the diode D (816), the other end of the resistor R (811) being the output terminal of the power sampling circuit;
a resistor R (812), one end of the resistor R (812) is connected to the output end of the power sampling circuit, and the other end of the resistor R (812) is grounded;
a capacitor C (813), one end of the capacitor C (813) being connected to the antenna terminal ANT, the other end of the capacitor C (813) being connected to the P-terminal of the diode D (816);
a capacitor C (814), an upper plate of the capacitor C (814) being connected to an N-terminal of the diode D (816), a lower plate of the capacitor C (814) being grounded;
a capacitor C (815), wherein an upper polar plate of the capacitor C (815) is connected to the output end of the power sampling circuit, and a lower polar plate of the capacitor C (815) is grounded; and
diode D (816).
3. The radio frequency antenna switching circuit of claim 1, wherein the power sampling circuit comprises:
a resistor R (911), one end of the resistor R (911) being connected to an output terminal of the power sampling circuit, the other end of the resistor R (911) being connected to an upper plate of a capacitor C (913);
A resistor R (912), one end of the resistor R (912) being connected to the output of the power sampling circuit, the other end of the resistor R (912) being grounded;
a capacitor C (913), an upper plate of the capacitor C (913) being connected to an N-terminal of the diode D (916) and to one terminal of the resistor R (911), a lower plate of the capacitor C (913) being grounded;
a diode D (914);
a diode D (915); and
diode D (916),
wherein the diode D (914), the diode D (915) and the diode D (916) are connected in series, and the P terminal of the diode D (914) is connected to the antenna terminal ANT, and the N terminal of the diode D (916) is connected to the upper plate of the capacitor C (913).
4. The radio frequency antenna switching circuit of claim 1 wherein the first control circuit comprises a first current mirror module, a drive current providing module, and a feedback module,
wherein the first current mirror module is configured to provide a first current,
wherein the feedback module is configured to provide a second current proportional to the output voltage of the power sampling circuit, and
wherein the driving current providing module is configured to provide a driving current proportional to a sum of a first current and a second current to the oscillator.
5. The radio frequency antenna switching circuit of claim 4 wherein the feedback module comprises an operational amplifier, a feedback transistor, and a feedback resistor,
wherein the operational amplifier is configured with its negative input connected to the output of the power sampling circuit, its positive input connected to a ground node through the feedback resistor, and its output connected to the gate of a feedback transistor,
wherein the feedback transistor is configured with its source connected to a power supply, its gate connected to the output of the operational amplifier, and its drain connected to a ground node through the feedback resistor.
6. The radio frequency antenna switching circuit of claim 5, wherein the feedback module further comprises a second current mirror circuit configured to provide a second current to the oscillator that is proportional to a current on the feedback resistor.
7. The radio frequency antenna switching circuit of claim 1 wherein the first control circuit comprises a first current mirror module, a drive current providing module, and a comparison circuit,
wherein the first current mirror module is configured to provide a first current,
Wherein the comparison circuit is configured to output a third current according to a comparison result of the output voltage of the power sampling circuit and a first reference voltage, and
wherein the driving current providing module is configured to provide a driving current proportional to a sum of the first current and the third current to the oscillator.
8. The radio frequency antenna switching circuit of claim 1, wherein the second control circuit comprises a negative pressure charge pump configured to output a negative pressure for generating a logic control signal in accordance with an output frequency of the oscillator.
9. The radio frequency antenna switching circuit of claim 4 or 7,
wherein the second control circuit includes a negative-pressure charge pump configured to output a negative pressure for generating a logic control signal according to an output frequency of the oscillator,
wherein the first current is set such that the negative pressure charge pump is at a minimum operating frequency.
10. The radio frequency antenna switching circuit of claim 1, wherein the power sampling circuit is configured to: when the output power of the antenna end ANT is within a first range, the output voltage of the power sampling circuit increases as the output power of the antenna end ANT increases, wherein the first range is a range from a lowest power value to a maximum saturated power value which can be detected by the power sampling circuit.
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| CN114268331A (en) | 2022-04-01 |
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