CN114268297A - Relaxation oscillator circuit with temperature compensation - Google Patents
Relaxation oscillator circuit with temperature compensation Download PDFInfo
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- CN114268297A CN114268297A CN202111530813.8A CN202111530813A CN114268297A CN 114268297 A CN114268297 A CN 114268297A CN 202111530813 A CN202111530813 A CN 202111530813A CN 114268297 A CN114268297 A CN 114268297A
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Abstract
The invention relates to a relaxation oscillator circuit with temperature compensation, and belongs to the technical field of integrated circuits. The circuit comprises 14 MOS transistors, namely M1, M2, M3 … … M14, two resistors R1 and R2, a capacitor C1 and three inverters INV1, INV2 and INV 3. The temperature compensation is completed by a charge-discharge capacitor and a very typical PTAT current generating circuit and a CTAT current generating circuit, so that the power consumption of a chip is reduced, and the area overhead is saved; the differential input comparator in the traditional relaxation oscillator structure is not used, so that the design difficulty of the circuit is reduced, and the power consumption is saved; the circuit can be widely applied to relaxation oscillator modules, and the conventional devices of CMOS process are used, so that the circuit is very convenient to integrate.
Description
Technical Field
The invention relates to a relaxation oscillator circuit with temperature compensation, and belongs to the technical field of integrated circuits.
Background
In the field of analog CMOS integrated circuits, an oscillator is one of the most common functional modules, such as an LC oscillator, a ring oscillator, a relaxation oscillator, etc., wherein the LC oscillator and the ring oscillator are commonly used in a phase-locked loop system, and cannot be used as an independent functional module to provide a stable clock for a chip, because the oscillating frequency is highly susceptible to process, temperature and operating voltage, which causes great variation in the oscillating frequency. In comparison, the relaxation oscillator not only has a simple structure and low power consumption, and the precision of the output frequency is easy to control, but also can be compensated relatively easily according to the changes of the process, the temperature and the working voltage, so that the relaxation oscillator is more and more concerned in the field of low-power consumption portable chip design.
Patent "application number: 201810086194. X' discloses a novel relaxation oscillator circuit, and although the structure of the relaxation oscillator is optimized in a relatively targeted manner, the structure of the relaxation oscillator inevitably uses a differential input comparator, the maximum frequency and the accuracy of the oscillator which can work are severely limited by the speed of the comparator, and if the speed of the comparator is increased, the power consumption is increased, so that the application of the oscillator in certain fields is limited.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: a relaxation oscillator circuit with temperature compensation is provided.
In order to solve the technical problems, the technical scheme provided by the invention is as follows: a relaxation oscillator circuit with temperature compensation comprises 14 MOS (metal oxide semiconductor) transistors, namely M1, M2, M3 … … M14, two resistors R1 and R2, a capacitor C1, and three inverters INV1, INV2 and INV 3; the source ends of M1, M2, M3, M9, M10 and M11 are all connected with a power supply; the source ends of M5, M7, M13 and M14 are all grounded; the gate end of M1 is connected with the drain end of M1 and is connected with the gate end of M2, the gate end of M3 and the drain end of M4; the drain end of M2 is connected with the drain end of M5, the gate end of M5 and the gate end of M4; the drain end of M3 is connected with the drain end of M6, the gate end of M6 and the gate end of M8; the source end of M4 is grounded through a resistor R1; the source end of M6 is connected with the drain end of M7 and the gate end of M7; the drain end of M8 is connected with the drain end of M9, the gate end of M9 and the gate end of M10, and the source end of M8 is grounded through R2; the drain end of the M10 is connected with one end of a capacitor C1, the gate end of the M12 and the drain end of the M14, and the other end of the capacitor C1 is grounded; the drain end of M11 is connected with the source end of M12 and the input end of INV 1; the drain end of M12 is connected with the drain end of M13 and the gate end of M13; the gate end of M14 and the output end of INV3 are both connected with the clock output end; the output end of the INV1 is connected with the input end of the INV2, and the output end of the INV2 is connected with the input end of the INV 3.
The invention has the beneficial effects that: the temperature compensation is completed by a charge-discharge capacitor and a very typical PTAT current generating circuit and a CTAT current generating circuit, so that the power consumption of a chip is reduced, and the area overhead is saved; the differential input comparator in the traditional relaxation oscillator structure is not used, so that the design difficulty of the circuit is reduced, and the power consumption is saved; the circuit can be widely applied to relaxation oscillator modules, and the conventional devices of CMOS process are used, so that the circuit is very convenient to integrate.
Drawings
Fig. 1 is a schematic diagram of a relaxation oscillator circuit with temperature compensation and simple structure according to an embodiment of the present invention.
Detailed Description
Example one
As shown in fig. 1, the relaxation oscillator circuit with temperature compensation of this embodiment includes 14 MOS transistors, which are M1, M2, M3 … … M14, two resistors R1, R2, a capacitor C1, and three inverters INV1, INV2, and INV 3; the source ends of M1, M2, M3, M9, M10 and M11 are all connected with a power supply; the source ends of M5, M7, M13 and M14 are all grounded; the gate end of M1 is connected with the drain end of M1 and is connected with the gate end of M2, the gate end of M3 and the drain end of M4; the drain end of M2 is connected with the drain end of M5, the gate end of M5 and the gate end of M4; the drain end of M3 is connected with the drain end of M6, the gate end of M6 and the gate end of M8; the source end of M4 is grounded through a resistor R1; the source end of M6 is connected with the drain end of M7 and the gate end of M7; the drain end of M8 is connected with the drain end of M9, the gate end of M9 and the gate end of M10, and the source end of M8 is grounded through R2; the drain end of the M10 is connected with one end of a capacitor C1, the gate end of the M12 and the drain end of the M14, and the other end of the capacitor C1 is grounded; the drain end of M11 is connected with the source end of M12 and the input end of INV 1; the drain end of M12 is connected with the drain end of M13 and the gate end of M13; the gate end of M14 and the output end of INV3 are both connected with the clock output end; the output end of the INV1 is connected with the input end of the INV2, and the output end of the INV2 is connected with the input end of the INV 3.
The MOS transistors M1, M2, M4, M5 and the resistor R1 form a bias current generating circuit, the magnitude of the bias current is I1 and is mirrored to a current path where M3 and M11 are located in an equal proportion, and the dimensions of M6, M7, M12 and M13 are equal, so that the gate voltage V of M6 is equal to that of M6G6Gate voltage of M12VG12Must be equal and satisfy the following expression,
VG6＝VG12＝VGS6+VGS7 (1)
assuming that VGS6 ≈ VGS7 ≈ VGS8 by selecting an appropriate resistance R2, the current I flowing through R2R2Can be expressed as a number of times as,
assuming that the mirror ratio of M9 to M10 is 1:1, the current for charging the capacitor C1 is the current flowing through R2, and when the voltage of the upper plate of the capacitor C1 is larger than VG12When the voltage VD12 of the drain terminal of M12 is pulled low, the voltage of the gate terminal of M14 is high after the voltage is subjected to INV1, INV2 and INV3, M14 is conducted, the charges stored in the capacitor C1 are discharged, and the voltage V of the upper plate electrode isG12Pulling low, so that the drain voltage of M12 will be charged high by the M11 transistor, the gate voltage of M14 is low after passing through INV1, INV2 and INV3, the M14 transistor is turned off, the M10 transistor will charge the capacitor C1 again, and thus the output end of the inverter INV3 will generate the clock CLK in cycles. In a CMOS integrated circuit, the capacitance is less affected by temperature, and the resistance is affected by temperature, that is, the oscillator will have a charging time affected by the change of the resistance R2 with temperature, and those skilled in the integrated circuit know that the MOS transistors M1, M2, M4, M5 and the resistance R1 form a bias current generating circuit, and the bias current I is adjusted to have a proper size1Will exhibit PTAT characteristics, and MOS transistors M3, M6, M7, M8, M9 and resistor R2 constitute a bias current generating circuit, and by adjusting the appropriate size, the bias current I thereofR2The CTAT characteristic is shown, therefore, the structure can realize the frequency deviation of CLK caused by the temperature change of the resistor R2 through proper current adjustment, thereby showing the characteristic which is independent of the temperature.
The present invention is not limited to the specific technical solutions described in the above embodiments, and other embodiments may be made in the present invention in addition to the above embodiments. It will be understood by those skilled in the art that various changes, substitutions of equivalents, and alterations can be made without departing from the spirit and scope of the invention.
Claims (1)
1. A relaxation oscillator circuit with temperature compensation, characterized by: the circuit comprises 14 MOS transistors, namely M1, M2, M3 … … M14, two resistors R1 and R2, a capacitor C1, and three inverters INV1, INV2 and INV 3; the source ends of M1, M2, M3, M9, M10 and M11 are all connected with a power supply; the source ends of M5, M7, M13 and M14 are all grounded; the gate end of M1 is connected with the drain end of M1 and is connected with the gate end of M2, the gate end of M3 and the drain end of M4; the drain end of M2 is connected with the drain end of M5, the gate end of M5 and the gate end of M4; the drain end of M3 is connected with the drain end of M6, the gate end of M6 and the gate end of M8; the source end of M4 is grounded through a resistor R1; the source end of M6 is connected with the drain end of M7 and the gate end of M7; the drain end of M8 is connected with the drain end of M9, the gate end of M9 and the gate end of M10, and the source end of M8 is grounded through R2; the drain end of the M10 is connected with one end of a capacitor C1, the gate end of the M12 and the drain end of the M14, and the other end of the capacitor C1 is grounded; the drain end of M11 is connected with the source end of M12 and the input end of INV 1; the drain end of M12 is connected with the drain end of M13 and the gate end of M13; the gate end of M14 and the output end of INV3 are both connected with the clock output end; the output end of the INV1 is connected with the input end of the INV2, and the output end of the INV2 is connected with the input end of the INV 3.
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI794081B (en) * | 2022-04-20 | 2023-02-21 | 新唐科技股份有限公司 | Oscillator with temperature compensation and electronic device using the same |
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| US20100171558A1 (en) * | 2009-01-06 | 2010-07-08 | Hyoung Rae Kim | Oscillator for providing a constant oscillation signal, and a signal processing device including the oscillator |
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| US20200021249A1 (en) * | 2016-11-11 | 2020-01-16 | Skyworks Solutions, Inc. | Temperature compensated oscillator |
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2021
- 2021-12-14 CN CN202111530813.8A patent/CN114268297B/en active Active
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| US20100171558A1 (en) * | 2009-01-06 | 2010-07-08 | Hyoung Rae Kim | Oscillator for providing a constant oscillation signal, and a signal processing device including the oscillator |
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| US20150205319A1 (en) * | 2014-01-21 | 2015-07-23 | Dialog Semiconductor Gmbh | Apparatus and Method for Low Voltage Reference and Oscillator |
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