CN114267748A - Photoelectric device, solar cell and detector - Google Patents

Photoelectric device, solar cell and detector Download PDF

Info

Publication number
CN114267748A
CN114267748A CN202111585241.3A CN202111585241A CN114267748A CN 114267748 A CN114267748 A CN 114267748A CN 202111585241 A CN202111585241 A CN 202111585241A CN 114267748 A CN114267748 A CN 114267748A
Authority
CN
China
Prior art keywords
sub
layer
layers
stress
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111585241.3A
Other languages
Chinese (zh)
Inventor
吴真龙
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiamen Changelight Co Ltd
Original Assignee
Xiamen Changelight Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiamen Changelight Co Ltd filed Critical Xiamen Changelight Co Ltd
Priority to CN202111585241.3A priority Critical patent/CN114267748A/en
Publication of CN114267748A publication Critical patent/CN114267748A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/544Solar cells from Group III-V materials
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Photovoltaic Devices (AREA)

Abstract

The invention provides a photoelectric device, a solar cell and a detector, wherein the photoelectric device comprises a substrate and a photoelectric device active region, the photoelectric device active region also comprises at least two sub-absorption layers, a plurality of layers of stress regulation and control layers are arranged between two adjacent sub-absorption layers, and the lattice constant of the stress regulation and control layers is greatly different from the lattice constant of the absorption layers. Because the lattice constant of the stress regulation layer is different from that of the absorption layer, when the stress regulation layer is arranged between the sub absorption layers, the stress regulation layer can provide stress opposite to that of the absorption layer so as to balance stress action generated by lattice mismatch. When the thermal expansion coefficient of the absorption layer is different from that of the substrate and thermal stress is generated, the stress regulation layer is arranged between the sub absorption layers and provides stress opposite to that of the absorption layer so as to balance the action of the thermal stress caused by thermal expansion mismatch.

Description

Photoelectric device, solar cell and detector
Technical Field
The invention relates to the technical field of solar cells, in particular to a photoelectric device, a solar cell and a detector.
Background
For iii-v compound semiconductor materials, semiconductor devices are often formed from multiple materials or combinations of materials of different compositions.
The lattice constants of different materials or materials of different compositions are often not uniform, and the difference in lattice constants can cause lattice mismatch in epitaxial growth, thereby creating stress. The thermal expansion coefficients of different materials or materials with different components are different, and the different thermal expansion coefficients can cause that thermal stress exists in the materials after the epitaxial growth is completed and the temperature is reduced. And the stress generated by lattice mismatch or thermal stress caused by thermal expansion coefficient mismatch can be released by generating defects and the like, so that the quality of the material is influenced.
Since defects can form non-radiative recombination centers, reducing defects in materials is critical to improving semiconductor device performance. For a multi-section solar cell, the defects can reduce the diffusion constant of minority carriers, and reduce the photoelectric conversion efficiency of the solar cell.
Disclosure of Invention
In view of the above, in order to solve the above problems, the present invention provides a photovoltaic device, a solar cell and a detector, and the technical scheme is as follows:
an optoelectronic device, comprising:
a substrate;
an active region on one side of the substrate;
the active region comprises at least two sub-absorption layers; at least two sub-absorption layers are sequentially stacked in a first direction; a plurality of stress regulation layers are arranged between two adjacent sub-absorption layers;
the first direction is perpendicular to the plane of the substrate and is directed to the active region by the substrate;
wherein a lattice constant of the stress control layer is different from a lattice constant of the active region.
Preferably, in the above photoelectric device, a thickness of any one of the stress control layers is in a range of 3nm to 30 nm.
Preferably, in the above optoelectronic device, the material of the stress control layer is InGaAs material or AlInGaAs material or InGaAsP material or AlInGaAs material or GaInP material or AlGaInP material.
Preferably, in the above-described photoelectric device, the thicknesses of the plurality of sub-absorption layers sequentially increase along the direction from the substrate to the PN junction interface of the active region.
Preferably, in the above-mentioned photoelectric device, the total thickness of at least two of the sub-absorption layers ranges from 1 μm to 4 μm.
A solar cell, the solar cell comprising:
a substrate;
a first subcell on one side of the substrate;
a second sub-cell located on a side of the first sub-cell facing away from the substrate; the second sub-cell includes a base region;
the base region comprises at least two sub-base regions; at least two sub-base regions are sequentially stacked in the second direction; a plurality of stress regulating layers are arranged between every two adjacent sub-base regions;
the second direction is perpendicular to the plane of the substrate and is directed to the second sub-battery by the substrate; the lattice constant of the stress regulation layer is different from that of the base region;
wherein the stress control layer is the stress control layer in the photoelectric device.
Preferably, in the solar cell, the base region has a thickness in a range of 1 μm to 3 μm.
Preferably, in the above solar cell, the solar cell includes an metamorphic buffer layer;
the metamorphic buffer layer comprises at least three sub buffer layers;
the lattice constants of any sub buffer layers are different, and in the second direction, the lattice constants of at least three sub buffer layers are gradually increased;
the lattice constant of any sub-buffer layer is larger than that of the first sub-cell.
Preferably, in the solar cell, at least one of the sub buffer layers has a lattice constant larger than that of the second sub cell.
A probe, the probe comprising:
a substrate;
an absorber layer on one side of the substrate;
the absorbent layer comprises at least two sub-absorbent layers; at least two sub-absorption layers are sequentially stacked in a third direction; a plurality of stress regulation layers are arranged between two adjacent sub-absorption layers;
the lattice constant of the stress regulation layer is different from that of the absorption layer;
the third direction is perpendicular to the plane of the substrate and is directed to the absorption layer by the substrate;
wherein the stress control layer is the stress control layer in the photoelectric device.
Compared with the prior art, the invention has the following beneficial effects:
the invention provides a photoelectric device, which comprises a substrate and a photoelectric device active region, wherein the photoelectric device active region also comprises at least two sub-absorption layers, a plurality of layers of stress regulation and control layers are arranged between two adjacent sub-absorption layers, and the lattice constant of the stress regulation and control layers is greatly different from the lattice constant of the absorption layers. Because the lattice constant of the stress regulation layer is different from that of the absorption layer, when the stress regulation layer is arranged between the sub absorption layers, the stress regulation layer can provide stress opposite to that of the absorption layer so as to balance stress action generated by lattice mismatch. When the thermal expansion coefficient of the absorption layer is different from that of the substrate and thermal stress is generated, the stress regulation layer is arranged between the sub absorption layers and provides stress opposite to that of the absorption layer so as to balance the action of the thermal stress caused by thermal expansion mismatch.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
Fig. 1 is a schematic structural diagram of an optoelectronic device provided in an embodiment of the present invention;
fig. 2 is a schematic view of a partial structure of an optoelectronic device according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a solar cell according to an embodiment of the present invention;
fig. 4 is a schematic partial structural diagram of a solar cell according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a solar cell according to an embodiment of the present invention;
fig. 6 is a schematic view of a partial structure of a solar cell according to an embodiment of the present invention;
fig. 7 is a schematic view of a partial structure of a solar cell according to an embodiment of the present invention;
fig. 8 is a schematic flowchart of a method for manufacturing a solar cell according to an embodiment of the present invention;
fig. 9 is a schematic partial structural diagram of a solar cell according to an embodiment of the present invention;
fig. 10 is a schematic view of a partial structure of a solar cell according to an embodiment of the present invention;
FIG. 11 is a schematic structural diagram of a detector according to an embodiment of the present invention;
FIG. 12 is a schematic diagram of a portion of a detector according to an embodiment of the present invention;
fig. 13 is a schematic structural diagram of a detector according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Based on the contents recorded in the background art, there are two main methods for the epitaxial growth of lattice-mismatched heterogeneous materials in the prior art, namely, a lattice gradual transition method and a large-mismatch buffer layer method. By optimizing the processes of the two methods, the dislocation density can be reduced and the stress can be released, but a small amount of dislocations can still continuously enter the functional layer of the device upwards to influence the performance of the device, and the stress generated by mismatch cannot be completely eliminated.
In the invention creation process in the application, the inventor finds that in the heteroepitaxial growth process, the crystal lattice of the thick-layer bulk material subjected to heteroepitaxial growth is larger than that of the substrate or the dummy substrate, and the thick-layer bulk material subjected to heteroepitaxial growth is subjected to compressive stress provided by the substrate or the dummy substrate; or the thermal expansion coefficient of the thick layer bulk material is smaller than that of the substrate or the dummy substrate, and the thick layer bulk material can be subjected to compressive stress provided by the substrate or the dummy substrate after being cooled. At this time, a stress regulation layer with a lattice constant different from that of the bulk layer is inserted to provide an opposite stress to the bulk layer, so that a stress balancing effect can be achieved.
Based on the drawbacks of the prior art, the present application provides a photovoltaic device comprising:
a substrate;
an active region on one side of the substrate;
the active region comprises at least two sub-absorption layers; at least two sub-absorption layers are sequentially stacked in a first direction; a plurality of stress regulation layers are arranged between two adjacent sub-absorption layers;
the first direction is perpendicular to the plane of the substrate and is directed to the active region by the substrate;
wherein a lattice constant of the stress control layer is different from a lattice constant of the active region.
The invention provides a photoelectric device, which comprises a substrate and a photoelectric device active region, wherein the photoelectric device active region also comprises at least two sub-absorption layers, a plurality of layers of stress regulation and control layers are arranged between two adjacent sub-absorption layers, and the lattice constant of the stress regulation and control layers is greatly different from the lattice constant of the absorption layers. Because the lattice constant of the stress regulation layer is different from that of the absorption layer, when the stress regulation layer is arranged between the sub absorption layers, the stress regulation layer can provide stress opposite to that of the absorption layer so as to balance stress action generated by lattice mismatch. When the thermal expansion coefficient of the absorption layer is different from that of the substrate and thermal stress is generated, the stress regulation layer is arranged between the sub absorption layers and provides stress opposite to that of the absorption layer so as to balance the action of the thermal stress caused by thermal expansion mismatch.
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an optoelectronic device according to an embodiment of the present invention.
The optoelectronic device comprises:
a substrate 01.
An active region 02 on one side of the substrate 01.
The active region 02 includes at least two sub-absorption layers 03; at least two sub-absorption layers 03 are sequentially stacked in the first direction Z; and a plurality of stress regulating layers 04 are arranged between the two adjacent sub-absorbing layers 03.
The first direction Z is perpendicular to the plane of the substrate 01 and is directed from the substrate 01 to the active region 02.
Wherein the lattice constant of the stress control layer 04 is different from the lattice constant of the active region 02.
It should be noted that the active region 02 includes at least two sub-absorption layers 03, where the sub-absorption layers 03 may be illustrated in fig. 1, for example, the sub-absorption layer b1 and the sub-absorption layer b2 in fig. 1, and the sub-absorption layers 03 may also be at least two sub-absorption layers b3, the sub-absorption layer b4, the sub-absorption layer b5, and the like, which are not specifically limited in this embodiment, and a plurality of stress adjustment layers 04 may be disposed between each pair of adjacent two sub-absorption layers 03.
It should be noted that, due to lattice mismatch or thermal mismatch between the substrate 01 and the sub-absorption layer 03, the sub-absorption layer 03 is subjected to tensile stress or compressive stress applied by the substrate 01, after the stress control layer 04 is disposed, the stress control layer 04 applies stress to the sub-absorption layer 03, and the type of stress applied by the stress control layer 04 to the sub-absorption layer 03 is opposite to the type of stress applied by the sub-absorption layer 03 to the substrate 01.
Further, referring to fig. 2, fig. 2 is a schematic view of a partial structure of an optoelectronic device according to an embodiment of the present invention.
It should be noted that fig. 2 shows a multilayer stress control layer 04 disposed between two adjacent sub-absorption layers, where the multilayer stress control layer 04 includes C periods, and C > 1.
Further, the number of the layers of the multilayer stress control layer 04 between each pair of adjacent sub-absorption layers 03 is different, or the number of the layers of the multilayer stress control layer 04 between each pair of adjacent sub-absorption layers 03 is the same. Taking three sub-absorbing layers 03 as an example, let the three sub-absorbing layers 03 be sub-absorbing layer b1, sub-absorbing layer b2 and sub-absorbing layer b3, respectively. The sub-absorption layer b1, the sub-absorption layer b2, and the sub-absorption layer b3 are stacked in the first direction Z. When the number of the film layers of the multilayer stress control layer 04 between each pair of adjacent sub-absorbing layers 03 is different, if the stress control layer between the sub-absorbing layer b1 and the sub-absorbing layer b2 is an α layer, and the stress control layer 04 between the sub-absorbing layer b2 and the sub-absorbing layer b3 is a β layer, α and β are not equal. When the number of the layers of the multilayer stress control layer 04 between each pair of adjacent sub-absorbing layers 03 is the same, if the stress control layer 04 between the sub-absorbing layer b1 and the sub-absorbing layer b2 is d layer, and the stress control layer 03 between the sub-absorbing layer b2 and the sub-absorbing layer b3 is f layer, d is equal to f.
Optionally, the thickness of any stress control layer 04 ranges from 3nm to 30 nm.
It should be noted that the thickness of the stress control layer 04 ranges from 3nm to 30nm, inclusive. For example, the thickness of the stress control layer 04 may be set to be 6nm, 18nm, 23nm, or the like, the thickness of the stress control layer 04 is the thickness of a single-layer stress control layer 04, and since the thickness of the stress control layer 04 is set to be thinner than the critical thickness of heteroepitaxial growth, at this time, the stress control layer 04 is in a strained state rather than a relaxed state, so that dislocation is not generated to affect the device performance. And the thickness of the stress regulation layer 04 is set to be thin, so that carriers can tunnel through, and an additional potential barrier cannot be formed.
Optionally, the stress control layer 04 is made of InGaAs material, or AlInGaAs material, or InGaAsP material, or AlInGaAs material, or GaInP material, or AlGaInP material.
It should be noted that each stress control layer 04 may be made of the same material, for example, in C periods of the stress control layer 15, the material of each stress control layer 04 may be InGaAs material, AlInGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, or the like. Alternatively, the material of each stress control layer 04 may be different, for example, the material of one of the stress control layers 04 in the C periods of the stress control layer 04 may be InGaAs material, AlInGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc., and the material of the other layer may be InGaAs material, AlInGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc.
Optionally, the thicknesses of the sub-absorption layers 03 sequentially increase along the direction from the substrate 01 to the PN junction interface of the active region 02.
In this embodiment, the thickness of each sub-absorption layer 03 is different, and the multi-sub-absorption layer 03 is formed such that the thickness of each sub-absorption layer 03 is greater than the thickness of the previous sub-absorption layer 03 along the PN junction interface direction of the substrate 01 toward the active region 02, for example, the thickness of each sub-absorption layer 03 is λ in the PN junction interface direction of the substrate 01 toward the active region 02, taking the three sub-absorption layers 03 as an example1、λ2And λ3Then λ1<λ2<λ3
Optionally, the total thickness of at least two sub-absorption layers 03 ranges from 1 μm to 4 μm.
Note that the total thickness of the sub-absorption layer 03 ranges from 1 μm to 4 μm inclusive. For example, the total thickness of the sub absorption layer 03 may be set to 1.3 μm or 2.5 μm or 3.5 μm or the like.
Based on the above-mentioned photoelectric device, in the embodiments of the present application, two different embodiments of the solar cell and the detector are given for the inventor of the photoelectric device to embody the function of the photoelectric device, the stress regulating layer is included in both the embodiments of the solar cell and the detector, and the stress regulating layer in the solar cell and the detector has the same function as the stress regulating layer of the above-mentioned photoelectric device, and the following is a statement on the two different embodiments.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a solar cell according to an embodiment of the present invention.
The solar cell includes:
a substrate 11.
A first sub-cell 12 located on one side of the substrate 11.
A second sub-cell 13 located on a side of the first sub-cell 12 facing away from the substrate 11; the second sub-cell 13 comprises a base region 14.
The base region 14 comprises at least two sub-base regions; at least two sub-base regions are sequentially stacked in the second direction M; and a plurality of stress regulation layers 15 are arranged between every two adjacent sub-base regions.
The second direction M is perpendicular to the plane of the first sub-battery 12 and is directed to the second sub-battery 13 from the first sub-battery 12; the lattice constant of the stress control layer 15 is different from the lattice constant of the base region 14.
Wherein the stress control layer 15 is the stress control layer in the photoelectric device.
In this embodiment, the substrate 11 is a Ge substrate, the first sub-cell 12 is a Ge cell, and the second sub-cell is an InGaAs cell.
It should be noted that in this embodiment, an n-type emitter region is obtained by performing phosphorus diffusion on a p-type Ge substrate, a pn junction of the first subcell 12 is formed, and a (Al) GaInP layer lattice-matched with the substrate 11 is grown on the p-type Ge substrate as a nucleation layer and as a window layer of the first subcell 12.
It should be noted that the pn junction of the first sub-cell 12 is made of a material with a first lattice constant, and the pn junction of the second sub-cell 13 is made of a material with a second lattice constant, and in this embodiment, the difference between the first lattice constant and the second lattice constant is at least greater than 0.001nm, and does not include 0.001 nm.
It should be noted that, in the first direction M, the second sub-cell 14 includes a back field layer, a p-type doped base region, an n-type doped emitter region, and an aperture layer, which are sequentially stacked. The material of the back field layer may be GaInP material or AlGaAs material, the material doped by the p-type doped base region may be InGaAs material, the material doped by the n-type doped emitter region may be InGaAs material, and the material of the window layer may be AlGaInP or AlInP material.
It should be noted that the second subcell 13 includes a base region 14, the base region 14 includes at least two sub-base regions, here, taking the sub-base region in fig. 3 as an example, the two sub-base regions are a sub-region a1 and a sub-region a2, in this embodiment, the sub-region a1 and the sub-base region a2 are only embodiments of the minimum unit in the at least two sub-base regions, and certainly, more sub-regions may be included, for example, the sub-base region a3, the sub-region a4, and the sub-region a 5. Between each pair of adjacent sub-regions, a plurality of stress control layers 15 are provided.
Referring to fig. 4, fig. 4 is a schematic view of a partial structure of a solar cell according to an embodiment of the present invention.
It should be noted that the multilayer stress control layer 15 disposed between two adjacent sub-base regions includes E periods, where E > 1.
Further, the multilayer stress modulating layer 15 has a different number of film layers between each pair of adjacent sub-regions, or the multilayer stress modulating layer 15 has the same number of film layers between each pair of adjacent sub-regions. Taking three sub-base regions as an example, let the three sub-base regions be sub-base region a1, sub-base region a2, and sub-base region a3, respectively. The sub-base region a1, the sub-base region a2, and the sub-base region a3 are stacked in the first direction M. When the multilayer stress control layer 15 has different numbers of film layers between each pair of adjacent sub-regions, q is unequal to r, assuming that the stress control layer between the sub-base region a1 and the sub-base region a2 is q layer, and the stress control layer between the sub-base region a2 and the sub-base region a3 is r layer. When the number of film layers of the multilayer stress control layer 15 between each pair of adjacent sub-regions is the same, w is equal to v assuming that the stress control layer between the sub-base region a1 and the sub-base region a2 is w layers and the stress control layer between the sub-base region a2 and the sub-base region a3 is v layers.
In this embodiment, the stress control layer 15 in the solar cell corresponds to the stress control layer 04 in the photovoltaic device, and the base region 14 in the solar cell corresponds to the active region 02 in the photovoltaic device.
Further, the thickness of any stress control layer 15 ranges from 3nm to 30 nm.
It should be noted that the thickness of the stress control layer 15 ranges from 3nm to 30nm, inclusive. For example, the thickness of the stress control layer 15 may be set to be 4nm, or 15nm, or 23nm, etc., where the thickness of the stress control layer 15 is the thickness of a single-layer stress control layer 15, and since the thickness of the stress control layer 15 is set to be thinner than the critical thickness of heteroepitaxial growth, at this time, the stress control layer 15 is in a strained state rather than a relaxed state, so that dislocation is not generated to affect the device performance. And the thickness of the stress control layer 15 is set to be thin, so that carriers can tunnel through without forming an additional potential barrier.
Further, the lattice constant of any one of the stress control layers 15 is larger than the lattice constant of the base region 14.
It should be noted that the lattice constant of each stress control layer 15 is larger than the lattice constant of the base region 14, where the base region 14 refers to the sum of all sub-base regions, for example, the base region 14 refers to the sum of the sub-base region a1 and the sub-base region a2 according to the above embodiment, so in this embodiment, the lattice constant of each stress control layer 15 is larger than the lattice constant of the whole base region 14.
Further, the material of the stress control layer 15 is InGaAs material, or AlInGaAs material, or InGaAsP material, or AlInGaAs material, or GaInP material, or AlGaInP material.
It should be noted that each stress control layer 15 may be made of the same material, for example, in E periods of the stress control layer 15, the material of each stress control layer 15 may be InGaAs material, AlInGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc. Alternatively, the material of each stress control layer 15 may be different, for example, in the E periods of the stress control layer 15, the material of one of the stress control layers 15 may be InGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc., and the material of the other layer may be InGaAs material, AlInGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc.
Further, the materials of the stress control layers 15 are the same.
It should be noted that, in this embodiment, the material of each stress control layer 15 is the same, and the same material can not only save the manufacturing time and the manufacturing cost, but also make the structure more stable.
Optionally, the thickness of the base region 14 ranges from 1 μm to 3 μm.
It should be noted that the base region 14 has a thickness in the range of 1 μm to 3 μm, inclusive. For example, the thickness of the base region 14 may be set to 1.5 μm or 2 μm or 2.5 μm or the like.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a solar cell according to an embodiment of the present invention.
Further, the solar cell further includes: and a first tunnel junction 16, an metamorphic buffer layer 17 and a DBR reflecting layer 18 which are sequentially stacked and arranged on the side of the first sub-cell 12 away from the substrate 11 in the first direction M.
And a second tunneling junction 19, a third sub-cell 20 and an ohmic contact layer 21 which are located on the side of the second sub-cell 13 away from the substrate 11 and are sequentially stacked in the first direction M.
It should be noted that the N-type layer of the first tunnel junction 16 may be an N-type GaAs material or an N-type GaInP material, and the P-type layer of the first tunnel junction 16 may be a P-type (Al) GaAs material. The N-type doping adopts Si doping, and the P-type doping respectively adopts C doping.
Further, referring to fig. 6, fig. 6 is a schematic view of a partial structure of a solar cell according to an embodiment of the present invention.
The dbr (distributed Bragg reflector) reflective layer 18 is formed by two layers of different materials periodically superimposed in a first direction M. Of the DBR reflective layer 18The first layer 181 material may be AlxInzGaAs material, etc., the second layer 182 material may be AlyInzGaAs material and the like, wherein the value range of x is 0-1 inclusive. For example, the value of x may be set to 0.2, 0.5, 0.6, or the like. And y ranges from 0 to 1 inclusive. For example, the value of y may be set to 0.1, 0.5, 0.7, or the like. Where x < y. z ranges from 0.01 to 0.03 inclusive. For example, the value of z may be set to 0.01, 0.02, 0.03, or the like. The first layer 181 and the second layer 182 are alternately stacked for L periods in the first direction M to form the DBR reflective layer 18, where L has a value in a range of 3 to 30 inclusive. For example, the value of L may be set to 3, 10, 25, or the like.
Note that the N-type layer material of the second tunnel junction 19 may be an N-type InGaAs material or an N-type GaInP material, and the P-type layer material of the second tunnel junction 19 may be a P-type (Al) InGaAs material. The N-type doping adopts Si doping, and the P-type doping respectively adopts C doping.
It should be noted that, in the first direction M, the third sub-cell 20 includes a back field layer, a p-type doped base region, an n-type doped emitter region, and an aperture layer, which are sequentially stacked. The material of the back field layer can be AlGaInP material, the material doped by the p-type doped base region can be AlGaInP material or GaInP material, the material doped by the n-type doped emitter region can be AlGaInP material or GaInP material, and the material of the window layer can be AlInP material.
The ohmic contact layer 21 is an N-type ohmic contact layer, and the material thereof may be InGaAs material or the like.
Referring to fig. 7, fig. 7 is a schematic view of a partial structure of a solar cell according to an embodiment of the present invention.
Optionally, the solar cell comprises an metamorphic buffer layer 17; the metamorphic buffer layer 17 includes at least three sub-buffer layers 171.
Any one of the sub-buffer layers 171 has a different lattice constant, and at least three of the sub-buffer layers 171 have a gradually increasing lattice constant in the first direction M.
The lattice constant of any of the sub-buffer layers 171 is larger than the lattice constant of the first sub-cell 12.
The modified buffer layer 17 may be made of AlGaInAs material or GaInAs material, the modified buffer layer 17 includes at least three sub buffer layers 171, and the materials of the sub buffer layers 171 may be the same or different, and are not specifically limited in this embodiment. Each sub-buffer layer 171 has a lattice constant greater than that of the first sub-cell 12.
It should be noted that the lattice constants of each sub-buffer layer 171 are different, in this embodiment, taking the three sub-buffer layers 171 as an example, if the lattice constants of the three sub-buffer layers 171 are I1, I2, and I3, respectively, I1, I2, and I3 are all different, and if the three sub-buffer layers 171 with lattice constants I1, I2, and I3 are sequentially stacked in the first direction M, I1 < I2 < I3 is obtained. And the lattice constant I1, the lattice constant I2 and the lattice constant I3 are gradually increased in the form of an arithmetic progression, so that the control can be more controllable during growth.
Optionally, the lattice constant of at least one of the sub-buffer layers 171 is larger than the lattice constant of the second sub-cell 13.
In the above embodiment, at least one of the three sub-buffer layers 171 has a lattice constant larger than that of the second sub-cell 13.
Further, based on the above embodiment of the solar cell, in another embodiment of the present application, a method for manufacturing a solar cell is also provided, which is used for manufacturing the solar cell described in the above embodiment. Referring to fig. 8, fig. 8 is a schematic flow chart illustrating a method for manufacturing a solar cell according to an embodiment of the present invention.
S101: as shown in fig. 9, a substrate 11 is provided.
Optionally, in this step, the present embodiment is formed by growing on a Ge substrate by using a metal organic chemical vapor deposition MOCVD method.
S102: as shown in fig. 10, a first sub-cell 12 is formed on the substrate 11 side.
Optionally, in this step, a first sub-cell 12 is grown on one side of the Ge substrate, and phosphorus diffusion is performed on the p-type Ge substrate to obtain an n-type emitter region, so as to form a pn junction of the first sub-cell 12, and a (Al) GaInP layer lattice-matched with the substrate 11 is grown on the p-type Ge substrate to serve as a nucleation layer and a window layer of the first sub-cell 12.
S103: as shown in fig. 3, a second sub-cell 13 is formed on the side of the first sub-cell 12 facing away from the substrate 11; the second sub-cell 13 comprises a base region 14; the base region 14 comprises at least two sub-base regions; at least two sub-base regions are sequentially stacked in the first direction M; a plurality of stress regulating layers are arranged between every two adjacent sub-base regions; the first direction M is perpendicular to the plane of the first sub-battery 12 and is directed to the second sub-battery 13 from the first sub-battery 12; the lattice constant of the stress control layer is different from the lattice constant of the base region 14; wherein the stress control layer is the stress control layer in the photoelectric device.
Optionally, in this step, in the first direction M, the first sub-cell 12 grows the second sub-cell 13 on the side facing away from the Ge substrate. The material of the base region 14 in the second subcell 13 may be InGaAs material, etc., and since the lattice constant of the stress control layer is larger than that of the base region 14, the stress control layer 15 provides compressive stress to balance the stress action.
Further, the embodiments of the present application provide a complete example of a solar cell, and are specifically set forth below.
Growing a first sub-cell 12 on a Ge substrate by adopting a Metal Organic Chemical Vapor Deposition (MOCVD) method, and sequentially growing a first tunnel junction 16, a modified buffer layer 17, a Distributed Bragg Reflector (DBR) reflective layer 18, a second sub-cell 13, a second tunnel junction 19, a third sub-cell 20 and an ohmic contact layer 21 on one side of the first sub-cell 12, which is far away from the substrate 11, in a first direction M. The three sub-cells are connected through a tunnel junction, wherein the first sub-cell 12 is a Ge cell, the second sub-cell 13 is an InGaAs cell, and the third sub-cell 20 is an (Al) GaInP cell.
Further, based on the stress control layer of the optoelectronic device, the embodiment of the present application further provides a detector, where the stress control layer in the detector is equivalent to the stress control layer in the optoelectronic device, and the absorption layer in the detector is equivalent to the active region in the optoelectronic device, and the detector is specifically stated below.
Referring to fig. 11, fig. 11 is a schematic structural diagram of a detector according to an embodiment of the present invention.
The detector includes:
a substrate 31.
An absorption layer 32 on one side of said substrate 31.
The absorbent layer 32 comprises at least two sub-absorbent layers; at least two sub-absorption layers are sequentially stacked in the third direction K; and a plurality of stress regulation layers 33 are arranged between two adjacent sub-absorption layers.
The lattice constant of the stress control layer 33 is different from the lattice constant of the absorption layer 32.
The third direction K is perpendicular to the plane of the substrate 31 and is directed from the substrate 31 to the absorption layer 32.
Wherein the stress control layer 33 is the stress control layer in the photovoltaic device.
The substrate 31 is an InP substrate, and the absorption layer is In0.53A GaAs absorber layer. In0.53The GaAs absorption layer has the same lattice constant as the InP substrate.
It should be noted that the absorption layer 32 includes at least two sub-absorption layers, here, taking the sub-absorption layer in fig. 12 as an example, the two sub-absorption layers are the sub-absorption layer s1 and the sub-absorption layer s2, in this embodiment, the sub-absorption layer s1 and the sub-absorption layer s2 are only embodiments of the minimum unit in the at least two sub-absorption layers, and of course, more sub-absorption layers may be included, such as the sub-absorption layer s3, the sub-absorption layer s4, and the sub-absorption layer s 5. Between each pair of adjacent sub-absorption layers, a plurality of stress modulation layers 33 are disposed.
Optionally, the thickness of any stress control layer 33 ranges from 3nm to 30 nm.
It should be noted that the thickness of the stress control layer 33 ranges from 3nm to 30nm, inclusive. For example, the thickness of the stress control layer 33 may be set to 9nm, 14nm, 23nm, etc., the thickness of the stress control layer 33 is the thickness of a single-layer stress control layer 33, and since the stress control layer 33 is set to be thinner than the critical thickness of the heteroepitaxial growth, at this time, the stress control layer 33 is in a strained state rather than a relaxed state, and therefore, no dislocation is generated to affect the device performance. And the thickness of the stress control layer 33 is set to be thin, so that carriers can tunnel through without forming an additional potential barrier.
Referring to fig. 12, fig. 12 is a schematic partial structural diagram of a detector according to an embodiment of the present invention.
It should be noted that the multilayer stress control layer 33 disposed between two adjacent sub-absorption layers includes J periods, J > 1.
Further, the number of layers of the multilayer stress control layer 33 between each pair of adjacent sub-absorption layers is different, or the number of layers of the multilayer stress control layer 33 between each pair of adjacent sub-absorption layers is the same. Taking three sub-absorbing layers as an example, let the three sub-absorbing layers be sub-absorbing layer s1, sub-absorbing layer s2 and sub-absorbing layer s3, respectively. The sub-absorption layer s1, the sub-absorption layer s2, and the sub-absorption layer s3 are stacked in the first direction K. When the number of the film layers of the multilayer stress control layer 33 between each pair of adjacent sub-absorption layers is different, g is not equal to o if the stress control layer between the sub-absorption layer s1 and the sub-absorption layer s2 is g, and the stress control layer 33 between the sub-absorption layer s2 and the sub-absorption layer s3 is o. When the number of the layers of the multilayer stress control layer 33 between each pair of adjacent sub-absorption layers is the same, it is assumed that the stress control layer between the sub-absorption layer s1 and the sub-absorption layer s2 is u, the stress control layer 33 between the sub-absorption layer s2 and the sub-absorption layer s3 is t, and u is equal to t.
Further, the lattice constant of any of the stress control layers 33 is smaller than the lattice constant of the absorption layer 32.
It should be noted that the lattice constant of each stress control layer 33 is smaller than the lattice constant of the absorption layer 32, where the absorption layer 32 refers to the sum of all the sub-absorption layers, for example, according to the above embodiment, the absorption layer 32 refers to the sum of the sub-absorption layer s1 and the sub-absorption layer s2, so that in this embodiment, the lattice constant of each stress control layer 33 is smaller than the lattice constant of the whole absorption layer 32.
Further, the material of the stress control layer 33 is InGaAs material, or AlInGaAs material, or InGaAsP material, or AlInGaAs material, or GaInP material, or AlGaInP material.
It should be noted that each stress control layer 33 may be made of the same material, for example, in J cycles of the stress control layer 33, the material of each stress control layer 33 may be InGaAs material, AlInGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc. Alternatively, the material of each stress control layer 33 may be different, for example, the material of one stress control layer 33 in J periods of the stress control layer 33 may be InGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc., and the material of the other stress control layer may be InGaAs material, AlInGaAs material, InGaAsP material, AlInGaAs material, GaInP material, AlGaInP material, etc.
Further, the materials of the stress control layers 33 are the same.
It should be noted that, in this embodiment, the material of each stress control layer 33 is the same, and the same material can not only save the manufacturing time and the manufacturing cost, but also make the structure more stable.
Further, In0.53The thickness of the GaAs absorption layer ranges from 2 μm to 4 μm.
In is0.53The GaAs absorber layer has a thickness in the range of 2 μm to 4 μm, inclusive. For example, In can be added0.53The thickness of the GaAs absorption layer is set to 2 μm or 2.6 μm or 3 μm or the like.
Referring to fig. 13, fig. 13 is a schematic structural diagram of a detector according to an embodiment of the present invention.
Further, the detector further comprises: an N-type buffer layer 34 on one side of the substrate 31.
And the graded layer 35, the P-type layer 36 and the P-type ohmic contact layer 37 are sequentially stacked on the side of the absorption layer 32 away from the substrate 31 in the third direction K.
It should be noted that the detector is grown on the substrate 31 by using a metal organic chemical vapor deposition MOCVD method. The N-type buffer layer 34 may be formed of InP material, the graded layer 35 may be formed of InGaAsP material, the P-type layer 36 may be formed of InP material, and the P-type ohmic contact layer 37 may be formed of InGaAs material.
In this embodiment, the lattice constant of the stress modulating layer 33 is smaller than the lattice constant of the absorbing layer 32, providing tensile stress to balance the stress effect.
The photoelectric device, the solar cell and the detector provided by the invention are described in detail above, and the principle and the implementation mode of the invention are explained by applying specific examples, and the description of the examples is only used for helping to understand the method and the core idea of the invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
It is further noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include or include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. An optoelectronic device, wherein the optoelectronic device comprises:
a substrate;
an active region on one side of the substrate;
the active region comprises at least two sub-absorption layers; at least two sub-absorption layers are sequentially stacked in a first direction; a plurality of stress regulation layers are arranged between two adjacent sub-absorption layers;
the first direction is perpendicular to the plane of the substrate and is directed to the active region by the substrate;
wherein a lattice constant of the stress control layer is different from a lattice constant of the active region.
2. The optoelectronic device according to claim 1, wherein the thickness of any of the stress modulating layers is in the range of 3nm to 30 nm.
3. The optoelectronic device according to claim 1, wherein the material of the stress regulating layer is InGaAs material or AlInGaAs material or InGaAsP material or AlInGaAs material or GaInP material or AlGaInP material.
4. The optoelectronic device according to claim 1, wherein the thickness of the plurality of sub-absorption layers increases sequentially along the substrate toward the PN junction interface of the active region.
5. The optoelectronic device according to claim 1, wherein the total thickness of at least two of the sub-absorber layers is in the range of 1 μm to 4 μm.
6. A solar cell, comprising:
a substrate;
a first subcell on one side of the substrate;
a second sub-cell located on a side of the first sub-cell facing away from the substrate; the second sub-cell includes a base region;
the base region comprises at least two sub-base regions; at least two sub-base regions are sequentially stacked in the second direction; a plurality of stress regulating layers are arranged between every two adjacent sub-base regions;
the second direction is perpendicular to the plane of the substrate and is directed to the second sub-battery by the substrate; the lattice constant of the stress regulation layer is different from that of the base region;
wherein the stress control layer is the stress control layer according to any one of claims 1 to 5.
7. The solar cell according to claim 6, characterized in that the thickness of the base region is in the range of 1 μm to 3 μm.
8. The solar cell of claim 6, wherein the solar cell comprises an metamorphic buffer layer;
the metamorphic buffer layer comprises at least three sub buffer layers;
the lattice constants of any sub buffer layers are different, and in the second direction, the lattice constants of at least three sub buffer layers are gradually increased;
the lattice constant of any sub-buffer layer is larger than that of the first sub-cell.
9. The solar cell of claim 8, wherein at least one of the sub-buffer layers has a lattice constant greater than a lattice constant of the second sub-cell.
10. A probe, characterized in that the probe comprises:
a substrate;
an absorber layer on one side of the substrate;
the absorbent layer comprises at least two sub-absorbent layers; at least two sub-absorption layers are sequentially stacked in a third direction; a plurality of stress regulation layers are arranged between two adjacent sub-absorption layers;
the lattice constant of the stress regulation layer is different from that of the absorption layer;
the third direction is perpendicular to the plane of the substrate and is directed to the absorption layer by the substrate; wherein the stress control layer is the stress control layer according to any one of claims 1 to 5.
CN202111585241.3A 2021-12-22 2021-12-22 Photoelectric device, solar cell and detector Pending CN114267748A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111585241.3A CN114267748A (en) 2021-12-22 2021-12-22 Photoelectric device, solar cell and detector

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111585241.3A CN114267748A (en) 2021-12-22 2021-12-22 Photoelectric device, solar cell and detector

Publications (1)

Publication Number Publication Date
CN114267748A true CN114267748A (en) 2022-04-01

Family

ID=80829082

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111585241.3A Pending CN114267748A (en) 2021-12-22 2021-12-22 Photoelectric device, solar cell and detector

Country Status (1)

Country Link
CN (1) CN114267748A (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140094080A (en) * 2013-01-21 2014-07-30 서울바이오시스 주식회사 Light detecting device and package having the same
CN109860325A (en) * 2019-02-03 2019-06-07 扬州乾照光电有限公司 A kind of arsenide multijunction solar cell and preparation method thereof

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140094080A (en) * 2013-01-21 2014-07-30 서울바이오시스 주식회사 Light detecting device and package having the same
CN109860325A (en) * 2019-02-03 2019-06-07 扬州乾照光电有限公司 A kind of arsenide multijunction solar cell and preparation method thereof

Similar Documents

Publication Publication Date Title
AU2005205373B2 (en) Solar cell with epitaxially grown quantum dot material
US7626116B2 (en) Isoelectronic surfactant suppression of threading dislocations in metamorphic epitaxial layers
US20210305448A1 (en) Multijunction metamorphic solar cells
US20180240922A1 (en) Four junction solar cell and solar cell assemblies for space applications
US20150357501A1 (en) Four junction inverted metamorphic solar cell
US20200251603A1 (en) Distributed bragg reflector structures in multijunction solar cells
US20200027999A1 (en) Multijunction solar cell and solar cell assemblies for space applications
JP2010118667A (en) Four junction inverted metamorphic multijunction solar cell with two metamorphic layers
CN108461568B (en) Multi-junction solar cell with Bragg reflector and manufacturing method thereof
US11721777B1 (en) Multijunction metamorphic solar cell
Philipps et al. Present status in the development of III–V multi-junction solar cells
TWI675493B (en) Hybrid mocvd/mbe epitaxial growth of high-efficiency lattice-matched multijunction solar cells
CN110911502B (en) Solar cell and manufacturing method thereof
CN108963019B (en) Multi-junction solar cell and manufacturing method thereof
US20170092800A1 (en) Four junction inverted metamorphic solar cell
CN110707172B (en) Multi-junction solar cell with Bragg reflection layer and manufacturing method
US20170110615A1 (en) Multijunction solar cell assembly for space applications
CN112117344B (en) Solar cell and manufacturing method thereof
CN114267748A (en) Photoelectric device, solar cell and detector
CN111009584B (en) Lattice mismatched multi-junction solar cell and manufacturing method thereof
US20160365466A1 (en) Inverted metamorphic multijunction solar subcells coupled with germanium bottom subcell
Chmielewski et al. Metamorphic Tunnel Junctions Grown Via MOCVD Designed for GaAs 0.75 P 0.25/Si Tandem Solar Cells
EP3091583B1 (en) Multijunction inverted metamorphic solar cell
EP4170732A1 (en) Multijunction metamorphic solar cell
CN110718599B (en) Multi-junction solar cell with metamorphic buffer layer and manufacturing method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination