CN114267309A - Public voltage detection circuit, display module and display device - Google Patents
Public voltage detection circuit, display module and display device Download PDFInfo
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Abstract
The embodiment of the application discloses a public voltage detection circuit with better detection accuracy, which comprises a compensation circuit and a detection circuit, wherein the compensation circuit is used for receiving a detection public voltage output by a liquid crystal display panel and a reference voltage output by a power circuit, and outputting a compensation voltage to a voltage compensation point according to the reference voltage and the detection public voltage. The detection circuit is connected between the compensation circuit and the voltage compensation point and outputs a first detection voltage or a second detection voltage, and the compensation circuit can accurately adjust and output the compensation voltage according to the first detection voltage and the second detection voltage, so that the compensation effect of the common voltage in the display panel is better and more stable. The embodiment also provides a display module and a display device comprising the common voltage detection circuit.
Description
Technical Field
The application relates to the technical field of display, in particular to a public voltage detection circuit, a display module and a display device applied to the display technology.
Background
At present, a Liquid Crystal Display (LCD) is widely applied to various Display devices, and a Thin Film Transistor Liquid Crystal Display (TFT-LCD) is usually driven by using an alternating current, however, in the driving process, since the Voltage at two ends of a Liquid Crystal capacitor in the TFT cannot be changed instantaneously, when a pixel electrode is changed, a Common Voltage (Vcom) fluctuates, so that the Voltage is unstable, and an abnormal Display phenomenon is caused. The current solution to this problem is to add Operational Amplifiers (OPs). After the OP is added, the voltage fluctuation detected by the OP output end is commonly influenced by the OP and the common electrode, and the specific influence factors of the voltage fluctuation cannot be distinguished, so that possible faults cannot be found in time.
Disclosure of Invention
In view of the above-mentioned deficiencies of the prior art, the present application provides a common voltage detection circuit capable of effectively identifying the cause of the common voltage fluctuation and adjusting the compensation voltage.
The application provides a public voltage detection circuit, including compensating circuit, compensating circuit includes first input, second input and first output. The first input end is connected with a voltage feedback detection point arranged in the liquid crystal display panel, the second input end receives a reference voltage, and the voltage feedback detection point is used for providing a detection common voltage on a common voltage line. The compensation circuit is used for outputting a compensation voltage from the first output end according to the reference voltage and the detection common voltage. The compensation voltage is used for being output to a voltage compensation point which is different from the position of the voltage feedback detection point in the liquid crystal panel, and the voltage compensation point is used for providing compensated common voltage on the common voltage line. The common voltage detection circuit further comprises a detection circuit, the detection circuit is connected between the compensation circuit and the voltage compensation point and outputs a first detection voltage or a second detection voltage according to the voltage difference between the compensation voltage and the compensation common voltage, and the compensation circuit adjusts the compensation voltage to a preset range according to the first detection voltage and the second detection voltage.
Alternatively, the detection circuit outputs the first detection voltage when the compensation voltage is greater than the compensation common voltage. When the compensation voltage is less than the compensation common voltage, the detection circuit outputs a second detection voltage.
Optionally, the detection circuit includes a first detection path and a second detection path connected in parallel to the first output terminal and the second output terminal. When the compensation voltage is larger than the compensation common voltage, the first detection path is conducted and outputs a first detection voltage. When the compensation voltage is smaller than the compensation common voltage, the second detection path is conducted and outputs a second detection voltage.
Optionally, the first detection path and the second detection path are both connected to a first common node and a second common node, the first common node is configured to output a first common node voltage, the second common node is configured to output a second common node voltage, and the first detection voltage and the second detection voltage are a difference between the first common node voltage and the second common node voltage.
Optionally, the first detection path includes a first unidirectional conductive element and a second unidirectional conductive element sequentially connected in series between the first output terminal and the second output terminal, and the first common node and the second common node are nodes between the first unidirectional conductive element and the second unidirectional conductive element.
Optionally, the first unidirectional conductive element and the second unidirectional conductive element are diodes, and the first unidirectional conductive element and the second unidirectional conductive element are unidirectionally conducted from the first output terminal to the second output terminal.
Optionally, the second detection path includes a third unidirectional conductive element and a fourth unidirectional conductive element sequentially connected in series between the second output terminal and the first output terminal, and the first common node and the second common node are nodes between the third unidirectional conductive element and the fourth unidirectional conductive element.
Optionally, the third unidirectional conductive element and the fourth unidirectional conductive element are diodes, and the third unidirectional conductive element and the fourth unidirectional conductive element are unidirectionally conducted from the second output terminal to the first output terminal.
Optionally, the detection circuit includes a common detection resistor, the first detection path includes a first unidirectional conductive element, a second unidirectional conductive element and a first detection resistor, the first unidirectional conductive element, the common detection resistor, the second unidirectional conductive element and the first detection resistor are sequentially connected in series between the first output end and the second output end, two ends of the common detection resistor include a first common node and a second common node, and a first node is included between the first detection resistor and the second unidirectional conductive element. The second detection path comprises a third unidirectional conductive element, a fourth unidirectional conductive element and a second detection resistor, the third unidirectional conductive element, the common detection resistor, the fourth unidirectional conductive element and the second detection resistor are sequentially connected in series between the second output end and the first output end, and a second node is arranged between the second detection resistor and the fourth unidirectional conductive element. The first node is used for outputting a first node voltage, and the first common node and the second common node are used for outputting a first detection voltage. The second node is used for outputting a second node voltage, and the first common node and the second common node are used for outputting a second detection voltage.
Optionally, the compensation circuit includes a differential amplifier, an inverting terminal of the differential amplifier is connected to the first input terminal, a non-inverting terminal of the differential amplifier is connected to the second input terminal, and an output terminal of the differential amplifier is connected to the first output terminal. And a first feedback resistor and a second feedback resistor which are connected in series are further arranged between the output end of the differential amplifier and the inverting end of the differential amplifier. The compensation circuit adjusts the resistance values of the first feedback resistor and the second feedback resistor according to the first detection voltage and the second detection voltage so as to adjust the compensation voltage to a preset range.
Optionally, the present application further provides a display module, which includes a liquid crystal display panel and a driving circuit module, where the driving circuit module includes an image driving module, a power supply module, and any one of the foregoing common voltage detection circuits, the image driving module is configured to output an image data signal, and the power supply module is configured to output a reference voltage. The liquid crystal display panel is connected to the driving circuit module and receives the image data signal, the power supply voltage and the compensation voltage, and displays an image under the driving of the data voltage and the compensation voltage.
Optionally, the present application further includes a display device of the foregoing common voltage detection circuit.
Compared with the prior art, in the common voltage detection circuit provided by the application, the detection circuit can effectively feed back the voltage difference between the first output end and the second output end through the first detection voltage and the second detection voltage, the fluctuation reason of the common voltage can be clearly known according to the voltage difference, and the feedback resistor in the differential amplifier can be fed back and adjusted according to the first detection voltage and the second detection voltage in the detection circuit to provide a resistance adjustment reference, so that the amplification factor of the differential amplifier is adjusted to a preset value, and the output compensation voltage can be maintained in an expected stable range for the common voltage in the display panel.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed to be used in the embodiments are briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic plan view of a display device according to an embodiment of the present application;
FIG. 2 is a schematic layout diagram of a pixel unit of the display panel of FIG. 1;
FIG. 3 is a schematic diagram of an equivalent circuit structure of the pixel unit in FIG. 2;
FIG. 4 is a schematic diagram of a polarity inversion driving of a pixel electrode;
FIG. 5 is a schematic plane structure diagram of the display device shown in FIG. 1;
FIG. 6 is an equivalent circuit diagram of a compensation circuit according to a first related embodiment of the present application;
FIG. 7 is an equivalent circuit diagram of the common voltage detection circuit shown in FIG. 5;
FIG. 8 is an equivalent circuit diagram of the detection circuit shown in FIG. 7;
FIG. 9 is a voltage waveform diagram of a node in the detection circuit shown in FIG. 8.
1-display device, 10-display panel, 11-voltage feedback detection point, 12-voltage compensation point, 13-data driving circuit, 14-scanning driving circuit, 15-timing control circuit, 16-power driving circuit, 20-driving circuit module, 21-power circuit, 22-common voltage detection circuit, 221-compensation circuit, 222-detection circuit, 222-1-first detection path, 222-2-second detection path, 223-feedback control unit, P-pixel unit, S1-Sm-m data lines, G1-Gn-n scanning driving lines, CL 1-CLn-n common electrode lines, F1-first direction, F2-second direction, CE-common electrode, T1-thin film transistor, PE-pixel electrode, C1-liquid crystal capacitor, C2-storage capacitor, OP-differential amplifier, in 1-differential amplifier inverting terminal, in 2-differential amplifier positive terminal, out-differential amplifier output terminal, out 1-first output terminal, out 2-second output terminal, D1-first one-way conducting element, D2-second one-way conducting element, D3-third one-way conducting element, D4-fourth one-way conducting element, Q1-first common node, Q2-second common node, R11-first detection resistor, R22-second detection resistor, R1-first feedback resistor, R2-second feedback resistor, t 1-first time, t 2-second time.
Detailed Description
To facilitate an understanding of the present application, the present application will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present application are given in the accompanying drawings. This application may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
The following description of the various embodiments refers to the accompanying drawings, which are included to illustrate specific embodiments that can be implemented by the application. The numbering of the components as such, e.g., "first", "second", etc., is used herein only to distinguish the objects as described, and does not have any sequential or technical meaning. The term "connected" and "coupled" when used in this application, unless otherwise indicated, includes both direct and indirect connections (couplings). Directional phrases used in this application, such as, for example, "upper," "lower," "front," "rear," "left," "right," "inner," "outer," "side," and the like, refer only to the orientation of the appended drawings and are, therefore, used herein for better and clearer illustration and understanding of the application and are not intended to indicate or imply that the device or element so referred to must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the application.
In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as being fixedly connected, detachably connected, or integrally connected; may be a mechanical connection; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art. It should be noted that the terms "first", "second", and the like in the description and claims of the present application and in the drawings are used for distinguishing different objects and not for describing a particular order.
Furthermore, the terms "comprises," "comprising," "includes," "including," or "including," when used in this application, specify the presence of stated features, operations, elements, and/or the like, but do not limit one or more other features, operations, elements, and/or the like. Furthermore, the terms "comprises" or "comprising" indicate the presence of the respective features, numbers, steps, operations, elements, components or combinations thereof disclosed in the specification, but do not preclude the presence or addition of one or more other features, numbers, steps, operations, elements, components or combinations thereof, and are intended to cover non-exclusive inclusions. Furthermore, when describing embodiments of the present application, the use of "may" mean "one or more embodiments of the present application. Also, the term "exemplary" is intended to refer to an example or illustration.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein in the description of the present application is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.
Please refer to fig. 1, which is a schematic plan view of a display device 1 according to an embodiment of the present disclosure.
As shown in fig. 1, the display device 1 includes a display panel 10 and a driving module (not shown) for driving the display panel 10 to display an image. In this embodiment, the driving module for driving the display panel 10 to display images includes an image driving module, a backlight module, and a power module.
In this embodiment, the display Panel 10 is a liquid crystal display Panel (LCD Panel), and the image driving circuit includes a data driving circuit 13, a scan driving circuit 14, a timing control circuit 15, and a power driving circuit 16.
The display panel 10 includes a plurality of m × n Pixel cells (pixels) P, m arranged in a matrix, data lines (Source lines) S1 to Sm, n scanning drive lines (Gate lines) G1 to Gn, and n Common electrode lines (Common lines, CL) CL1 to CLn, where m and n are natural numbers greater than 1.
The data driving circuit 13 is electrically connected to the data lines S1 through Sm, and is configured to transmit image data to be displayed to the pixel units P via the data lines S1 through Sm in the form of data voltages.
The scan driving circuit 14 is electrically connected to the plurality of scan driving lines G1-Gn, and is used for outputting scan signals Gn through the plurality of scan driving lines G1-Gn for controlling when the pixel units P receive image data. The scanning drive circuit 14 sequentially outputs scanning signals G1, G2, … G3, …, Gn from a plurality of scanning drive lines G1 to Gn in the order of positional arrangement in a scanning cycle, and Gn outputs scanning signals G1, G2, … G3, …. In this embodiment, the scan driving circuit 14 may be directly disposed in the non-image display area of the display panel 14 by a Gate On Array (GOA) process.
The power driving circuit 16 is electrically connected to n common electrode lines CL, and is configured to provide a common voltage Vcom to each pixel unit P through the common electrode lines CL. It can be understood that the common voltage Vcom is the same in each pixel unit P in the display panel 10. For each pixel unit P, a pixel electrode (not shown) in the pixel unit P receives image data, and a common electrode (not shown) in the pixel unit P receives a common voltage Vcom, so that the pixel electrode and the common electrode can generate a corresponding electric field corresponding to the image data, thereby driving liquid crystal molecules in the pixel unit P to implement deflection at a corresponding angle, thereby achieving image display of the image data.
It should be noted that the common electrodes of each pixel unit P in the display panel 10 are electrically connected to each other, that is, the common electrodes of all the pixel units P in the display panel 10 share the same voltage and have the same potential.
The timing control circuit 15 is electrically connected to the data driving circuit 13 and the scan driving circuit 14, respectively, and is configured to control the working timings of the data driving circuit 13 and the scan driving circuit 14, that is, to output corresponding timing control signals to the scan driving circuit 14 and the data driving circuit 13, so as to control when to output the corresponding scan signals Gn.
Please refer to fig. 2, which is a layout diagram of the pixel unit of the display panel 10 in fig. 1. As shown in fig. 2, in the display panel 10, a plurality of scan lines (Gate lines) G1 to Gn extending along a first direction F1 and a plurality of data lines (Source lines) S1 to Sm extending along a second direction F2 constitute a plurality of pixel cells P arranged in a matrix. Each pixel unit P includes a driving device and a liquid crystal layer (not shown). The liquid crystal layer emits light under the driving of the driving element. In this embodiment, the driving element includes a semiconductor switch element and an energy storage element, the semiconductor switch may be a Thin Film Transistor (TFT), and the energy storage element may be a capacitor formed by a pixel electrode (fig. 3) and a common electrode CE (fig. 3).
Referring to fig. 3, fig. 3 is a schematic diagram of an equivalent circuit structure of the pixel unit P in fig. 2.
As shown in fig. 3, the pixel unit P includes a thin film transistor T1, a pixel electrode PE, a liquid crystal capacitor C1, and a storage capacitor C2. The gate of the thin film transistor T1 is electrically connected to the kth scan line Gk, the source is electrically connected to the data line Sk, where k is greater than or equal to 1 and less than or equal to n, the drain is electrically connected to the pixel electrode PE, one end of the liquid crystal capacitor C1 and one end of the storage capacitor C2 are electrically connected to the pixel electrode PE, and the other end is electrically connected to the common electrode CE.
Referring to fig. 2 to 3, the pixel unit P receives the Data voltages corresponding to the gray levels in the Data signals Data provided by the Data lines S1 to Sm in a predetermined time period under the control of the scan lines G1 to Gn, and drives the liquid crystal layer (not labeled) to deflect a corresponding angle accordingly, so that the received backlight emits light with corresponding brightness according to the deflected corresponding angle, and the light with corresponding brightness is emitted according to the image Data for image display.
When the display panel 10 displays an image, the liquid crystal capacitor C1 and the storage capacitor C2 are charged and discharged, and when the display panel 10 is driven by a direct current, residual charges are generated at two ends of the liquid crystal capacitor C1 and the storage capacitor C2, so that an afterimage appears on the display panel 10. To avoid this phenomenon, driving is generally performed using data voltages of alternating polarity. When the data voltage with alternating polarity is used for driving, the direction of the electric field between the pixel electrode PE and the common electrode CE changes with the change of the polarity direction of the data voltage.
For example, when the display panel 10 is driven by frame inversion, the pixel electrode PE in a certain pixel unit P receives a positive (+) data voltage when displaying a previous frame, so that the pixel electrode PE and the common electrode CE are directed from the pixel electrode PE to the common electrode CE in the electric field direction of the positive data voltage and the common voltage Vcom; the pixel electrode PE in the pixel unit P receives the negative polarity (-) data voltage when the next frame of image is displayed, and the electric field direction between the pixel electrode PE and the common electrode CE is changed to be directed from the common electrode CE to the pixel electrode PE.
In addition, for example, the display panel 10 may be driven in a column-by-column manner (fig. 3), when one frame of image is displayed, the pixel electrode PE in the pixel unit P in the Sm-2 th column receives a data voltage of positive polarity (+), the pixel electrode PE in the pixel unit P in the Sm-1 th column receives a data voltage of negative polarity (-), and the pixel electrode PE in the pixel unit P in the Sm-th column receives a data voltage of positive polarity (+), that is, the data voltages received by the pixel electrodes in the pixel units P in two adjacent columns are opposite. In this way, the remaining charges generated by the liquid crystal capacitor C1 and the storage capacitor C2 are cancelled, and the image sticking generated when the display panel 10 displays images is prevented.
Referring to fig. 3 to 4, fig. 4 is a schematic diagram illustrating polarity inversion driving of the pixel electrode. As shown in fig. 4, the "+" on the pixel electrode PE indicates that the voltage of the pixel electrode PE is higher than that of the common electrode CE, and the electric field direction between the pixel electrode PE and the common electrode CE is directed to the common electrode CE by the pixel electrode PE. The "-" on the pixel electrode PE indicates that the voltage of the pixel electrode PE is lower than that of the common electrode CE, and the electric field direction between the pixel electrode PE and the common electrode CE is directed to the pixel electrode PE from the common electrode CE.
When the pixel electrode PE is driven by using the data voltage with alternating polarity, image ghosting is eliminated, and simultaneously, since the voltages at the two ends of the liquid crystal capacitor C1 and the storage capacitor C2 cannot change instantaneously, when the polarity of the voltage of the pixel electrode PE changes, the voltage of the common electrode CE is also affected and fluctuates, so that voltage instability occurs, and an image display process is abnormal. In order to prevent the common voltage from fluctuating and falling within a desired range, the common voltage needs to be detected and compensated.
Please refer to fig. 5, which is a schematic plane structure diagram of the display device shown in fig. 1.
Specifically, the display panel 10 includes at least one voltage feedback detection point 11 corresponding to a position of any one of the pixel units P, and at least one voltage compensation point 12. The display device 1 includes a driving circuit module 20, which includes a power circuit 21 and a common voltage detection circuit 22, in addition to the display panel 10. The data driving circuit, the timing control circuit, and the power driving circuit shown in fig. 1 may be disposed in the driving circuit module 20.
The voltage feedback detection point 11 and the voltage compensation point 12 are respectively located on the common electrode CE (fig. 3) of the pixel unit P at different positions of the display panel 10. The voltage feedback detecting point 11 is used for feeding back the state of the common voltage of the display panel 10, that is, the voltage at the voltage feedback detecting point 11 may represent the magnitude of the common voltage in each pixel unit P in the display panel 10, and in this embodiment, the voltage at the voltage feedback detecting point 11 is defined as the detected common voltage.
Through the processing and analysis for detecting the common voltage, if it is determined that the common voltage in the pixel unit P is not within the preset expected range, compensation adjustment is required, and the common voltage after compensation adjustment can be transmitted from the voltage compensation point 12 to the display panel 10, so that the common voltage in the pixel unit P is adjusted to be within the preset expected range, and fluctuation is prevented. In this embodiment, the voltage at the voltage compensation point 12 is defined as a compensated common voltage.
It should be noted that the position of the power driving circuit 16 supplying the common voltage to each pixel unit P is different from the positions of the voltage feedback point 11 and the voltage compensation point 12. In this embodiment, the power supply circuit 21 may be an Integrated Circuit (IC).
Specifically, the voltage feedback detecting point 11 is electrically connected to the common voltage detecting circuit 22, and the voltage feedback detecting point 11 is used for providing the common point detecting circuit 22 with the variation of the common voltage in the display panel 10, that is, providing the detected common voltage to the common point detecting circuit 22. The common voltage detection circuit 22 performs compensation by performing comparison calculation or the like according to the detected common voltage, and transmits the obtained compensated supply voltage Vout to the voltage compensation point 12 of the display panel 10 through the voltage compensation point 12, thereby supplying to the common electrode of each pixel voltage, so that the common voltage in each pixel unit is less affected by fluctuation and is within a desired range.
The power circuit 21 is electrically connected to the common voltage detecting circuit 22, and the power circuit 21 is configured to provide a reference voltage Voc to the common voltage detecting circuit 22, wherein the reference voltage Voc is an ideal or desired common voltage. The common voltage detection circuit 22 outputs the compensation voltage Vout to the voltage compensation point 12 by comparing and compensating the reference voltage Voc with the detection common voltage Vic transmitted from the voltage feedback detection point 11, that is, the detection common voltage Vic output from the common electrode CE. It is understood that the power circuit 21 can be used to provide other driving voltages for the display panel 10, such as the power voltage VDD, the high and low voltages (VGH, VGL) for the scan driving and the data driving, and the like.
Please refer to fig. 6, which is an equivalent circuit diagram of the compensation circuit 22' according to the first related embodiment of the present application. As shown in fig. 6, the compensation circuit 22 'includes a differential amplifier OP, an inverting terminal in1 of the differential amplifier OP is electrically connected to the voltage feedback detection point 11 (fig. 5), a positive terminal in2 of the differential amplifier OP is electrically connected to the power circuit 21 (fig. 5), and an output terminal out1 of the compensation circuit 22' is electrically connected to the voltage compensation point 12 (fig. 5). The differential amplifier OP further includes a first feedback resistor R1 and a second feedback resistor R2 connected in series between the output terminal out1 and the inverting terminal in 1. The inverting terminal in1 of the differential amplifier OP is connected to the first input terminal, and the positive terminal in2 is connected to the second input terminal.
The working process is as follows:
the inverting terminal in1 of the differential amplifier OP receives the detection common voltage Vic output from the voltage feedback detection point 11, and the forward terminal of the differential amplifier OP receives the reference voltage Voc output from the power supply circuit 21. The differential amplifier OP outputs the compensation voltage Vout from the output terminal out1 to the voltage compensation point 12 (fig. 1) by a differential operation based on the received detection common voltage Vic and the reference voltage Voc, for compensating the voltage fluctuation of the common electrode CE (fig. 3) due to the polarity change of the data voltage received by the pixel electrode PE (fig. 3).
However, it is found that the output terminal out of the differential amplifier OP is directly connected to the voltage compensation point 12 after the compensation of the voltage fluctuation of the common electrode CE by the compensation circuit 22'. When the compensated common voltage at the voltage compensation point 12 is detected, since the voltage at the voltage compensation point 12 is commonly influenced by the compensation voltage Vout output by the differential amplifier OP and each common electrode CE in the display panel 10, if the compensation voltage Vout output by the output end out1 of the differential amplifier OP is found not to be in the desired preset range, it is hard to distinguish that the compensation voltage Vout output by the output end out1 of the differential amplifier OP does not reach the ideal range or is caused by the fluctuation of other common electrodes CE in the display panel 10.
In view of the above problem, the embodiment of the present application further discloses a common voltage detection circuit capable of separately detecting and identifying the compensation voltage Vout output by the differential amplifier and the voltage compensation point 12, so as to effectively adjust the compensation voltage according to the detection result, so that the compensation common voltage at the voltage compensation point 12 is within a desired stable preset range.
Please refer to fig. 7, which is a schematic circuit diagram of the common voltage detecting circuit shown in fig. 5. As shown in fig. 7, the common voltage detecting circuit 22 includes a compensating circuit 221, a detecting circuit 222, a feedback control unit 223, a first output terminal out1, and a second output terminal out 2.
The compensation circuit 221 is connected between the power circuit 21 (fig. 5) and the first output end out1, and the compensation circuit 221 is configured to output the compensation voltage Vout according to the reference voltage Voc output by the power circuit 21 and the detection common voltage Vic output by the voltage detection feedback point.
The detection circuit 222 is connected between the first output terminal out1 and the second output terminal out2, and the second output terminal out2 is connected to the voltage compensation point 12. It is understood that, as shown in fig. 5, the voltage compensation point 12 is located on the common electrode CE of one of the pixel cells P in the display panel 10, i.e., the second output terminal out2 is connected to the common electrode CE of one of the pixel cells P in the display panel 10 (fig. 3). The detection circuit 222 is configured to output a first detection voltage V1 and a second detection voltage V2 according to the difference between the compensation voltage Vout and the compensation common voltage at the voltage compensation point 12.
The second output terminal out2 is connected to the voltage compensation point 12, and outputs the compensation voltage Vout to the common electrode CE in the display panel 10, so as to compensate the voltage fluctuation effect of the common electrode CE.
The feedback control unit 223 is connected to the detection circuit 222 and the compensation circuit 221, and is configured to output a feedback-adjusted signal to the compensation circuit 221 according to the first detection voltage V1 and the second detection voltage V2 output by the detection circuit 222, so that the compensation circuit 221 adjusts the magnitude of the compensation voltage Vout according to the feedback-adjusted signal.
Specifically, the compensation circuit 221 includes a differential amplifier OP, an inverting terminal in1 of the differential amplifier OP is connected to the voltage feedback detection point 11 (fig. 5), a non-inverting terminal in2 of the differential amplifier OP is connected to the power circuit 21 (fig. 5), and an output terminal out of the differential amplifier OP is connected to the first output terminal out 1. The first feedback resistor R1 and the second feedback resistor R2 are connected in series between the first output terminal out1 and the inverting terminal in 1. The first feedback resistor R1 and the second feedback resistor R2 are used for adjusting the amplification factor of the differential amplifier. In this embodiment, since the first feedback resistor R1 and the second feedback resistor R2 are disposed between the inverting terminal in1 and the output terminal out of the differential amplifier OP, the differential amplifier OP constitutes an inverting differential amplifier, that is, the polarity of the compensation voltage Vout output by the output terminal out1 of the differential amplifier OP is opposite to the polarity of the detection common voltage provided by the voltage feedback detection point 11.
Since the second output terminal out2 is connected to the voltage compensation point 12, since the common electrodes of all the pixel units P in the display panel 10 are electrically connected to each other to have substantially the same voltage magnitude and polarity, i.e., the voltage polarities of the sensing common voltage and the compensation common voltage are the same, the polarity of the compensation common voltage of the second output terminal out2 is opposite to the polarity of the compensation voltage Vout output by the first output terminal out 1.
Please refer to fig. 8, which is an equivalent circuit diagram of the circuit 222 in fig. 7.
As shown in FIG. 8, the detection circuit 222 includes a first detection path 222-1, a second detection path 222-2, and a second output out 2. The first and second sensing paths 222-1 and 222-2 are connected in parallel to the first and second output terminals out1 and out2, and the first and second sensing paths 222-1 and 222-2 are unidirectionally conducted in opposite directions from the first output terminal out1 to the second output terminal out 2.
More specifically, the first sensing path 222-1 includes a first one-way conductive element D1, a second one-way conductive element D2, a common sensing resistor R3, and a first sensing resistor R11. The first unidirectional conductive element D1, the common detection resistor R3, the second unidirectional conductive element D2 and the first detection resistor R11 are sequentially connected in series between the first output end out1 and the second output end out 2. The common sense resistor R3 includes a first common node Q1 and a second common node Q2 across. A first node Q11 is included between the first sensing resistor R11 and the second unidirectional conductive element D2, or any one of nodes between the first sensing resistor R11 and the second unidirectional conductive element D2 is defined as a first node Q11. The first and second common nodes Q1 and Q2 are used to output a first sensing voltage V1.
The second detection path 222-2 includes a third unidirectional conductive element D3, a fourth unidirectional conductive element D4 and a second detection resistor R22, and the third unidirectional conductive element D3, the common detection resistor R3, the fourth unidirectional conductive element D4 and the second detection resistor R22 are sequentially connected in series between the first output terminal out1 and the second output terminal out 2. A second node Q22 is included between the second sensing resistor R22 and the fourth unidirectional conductive element D2, or any node between the second sensing resistor R22 and the fourth unidirectional conductive element D2 is defined as a second node Q22. Common resistor R3 is shared by first sense path 222-1 and second sense path 222-2.
In this embodiment, the first detection path 222-1 is unidirectionally conducted from the second output terminal out2 to the first output terminal out1, and the second detection path 222-2 is unidirectionally conducted from the first output terminal out1 to the second output terminal out 2. The first common node Q1 and the second common node Q2 are used for outputting a second detection voltage V2.
In this embodiment, the resistances of the first detection resistor R11, the second detection circuit R22 and the common resistor R3 in the detection circuit 222 are greater than 0 Ω and smaller than 10 Ω, and the three resistors may be identical or resistors with other resistances may be selected according to specific circuit conditions, which is not limited in this application.
In addition, the feedback control unit 223 adjusts the resistances of the first feedback resistor R1 and the second feedback resistor R2 in the compensation circuit according to the first detection voltage V1 and the second detection voltage V2 to control the amplification factor of the differential amplifier OP. For example, the resistances of the first feedback resistor R1 and the second feedback resistor R2 may be automatically adjusted according to the magnitude of the feedback signal of the feedback unit 223. In other implementations, the resistances of the first feedback resistor R1 and the second feedback resistor R2 may be directly and manually adjusted according to the first detection voltage V1 and the second detection voltage V2.
In this embodiment, the first unidirectional conductive element D1 to the fourth unidirectional conductive element D4 are diodes, and may also be other elements capable of realizing a unidirectional conductive function, such as a triode, a MOS transistor, and the like, which is not limited in this embodiment.
Referring to fig. 8-9, fig. 9 is a schematic voltage waveform diagram of the node in the detection circuit 222 shown in fig. 8. Now, the detection process of the first detection path 222-1 and the second detection path 222-2 will be described in detail with reference to fig. 8 to 9:
at a first time t1, when the compensation voltage Vout output by the first output terminal out1 is negative and smaller than the compensation common voltage Vcom1 at the voltage compensation point 12, that is, the second output terminal out2 is at a high level, the second detection path 222-2 is turned on in a single direction, and the current passes through the third unidirectional conductive element D3, the common detection resistor R3, the fourth unidirectional conductive element D3838 in sequenceA resistor D4 and a second sensing resistor R22. The first common node Q1 and the second common node Q2 across the common sense resistor R3, and the first node Q11 are also at a high level at the first time t1, and at this time, the second sense path 222-2 outputs the second sense voltage V2. Wherein the second detection voltage V2 is the first common node Q1 and outputs the first common node voltage VQ1And a second common node Q2 to output a second common node voltage VQ2The difference, V1 ═ VQ1-VQ2L. A second node voltage V22 and a second common node voltage V output by the second node Q22Q2Are equal.
At the second time t2, when the polarity of the compensation voltage Vout output by the first output terminal out1 is greater than the compensation common voltage Vcom1 at the voltage compensation point 12, that is, the first output terminal out1 is at a high level, the first detection path 222-1 is turned on in a single direction, and the current passes through the first unidirectional conducting element D1, the common detection resistor R3, the second unidirectional conducting element D2, and the first detection resistor R11 in sequence, and at this time, the first detection path 222-1 outputs the first detection voltage V1. The first common node Q1 and the second common node Q2 across the common sense resistor R3 and the first node Q11 are also high at the second time t 2. Wherein the first detection voltage V1 is the first common node Q1 and outputs the first common node voltage VQ1And a second common node Q2 to output a second common node voltage VQ2The difference, V1 ═ VQ1-VQ2L. The first node Q11 outputs a first node voltage V11 and the second common node Q2 outputs a second common node voltage VQ2Are equal.
Since the first detection path 222-1 and the second detection path 222-2 are unidirectional conduction circuits, there is only one conduction circuit when there is a voltage difference between the first output terminal out1 and the second output terminal out2, that is, when the first detection path 222-1 is conducted, the second detection path 222-2 is not conducted, and when the second detection path 222-2 is conducted, the first detection path 222-1 is not conducted.
When the first node Q11 outputs the first node voltage V11, only the first detection path 222-1 of the detection circuit 222 is turned on, that is, the compensation voltage Vout output by the first output terminal out1 is greater than the compensation common voltage Vcom1 of the second output terminal out 2. When the second output node Q22 outputs the second node voltage V22, only the second detection path 222-2 of the detection circuit 222 is turned on, i.e., the compensation voltage Vout output by the first output terminal out1 is smaller than the compensation common voltage Vcom1 of the second output terminal out 2.
Therefore, the conduction states of the first detection path 222-1 and the second detection path 222-2 can be clearly distinguished by the node voltages detected from the first node Q11 and the second node Q22, and the levels of the first output terminal out1 and the second output terminal out2 can be further distinguished.
And the specific magnitudes of the compensation voltage output by the compensation circuit 221 and the compensation common voltage of the voltage compensation point 12 can be accurately distinguished according to the magnitudes of the first detection voltage V1 and the second detection voltage V2, so as to determine the specific compensation value of the compensation circuit 221. That is, it can be determined according to the magnitudes of the first detection voltage V1 and the second detection voltage V2, what magnitude of the compensation voltage Vout the compensation circuit 221 outputs according to the inputted detection common voltage.
For example, according to the magnitudes of the first detection voltage V1 and the second detection voltage V2, the feedback control unit 223 provides a feedback adjustment signal, and the compensation circuit 221 adjusts the resistances of the first feedback resistor R1 and the second feedback resistor R2 according to the feedback adjustment signal, so as to adjust the amplification factor of the differential amplifier OP, such that the differential amplifier OP outputs the compensation voltage Vout in a desired range to the voltage compensation point 12 connected to the second output terminal out 2. Specifically, the calculation formula of the amplification factor of the differential amplifier OP is: vout1 ═ - (R1/R2) × Vin1, where Vin1 is the sensed common voltage Vic input at the first input terminal in 1.
It can be understood that when the compensation voltage Vout is adjusted to a desired range, the compensation voltage Vout can be directly transmitted to the voltage compensation point 12 through the second output terminal out2, so that the compensation voltage Vout is output to the common electrode CE in the display panel 10 for compensating the voltage fluctuation effect of the common electrode CE.
Compared with the prior art, in the embodiment, the real-time voltage fluctuation of the common voltage Vcom in the display panel 10 and the compensation voltage of the differential amplifier OP can be effectively distinguished by the first node voltage V1 and the second node voltage V2 output by the two unidirectional conductive paths in the detection circuit 222, so that the compensation voltage Vout output by the compensation circuit is adjusted to the voltage compensation point 12 in the display panel 10, thereby ensuring that the compensation circuit 221 accurately outputs the compensation voltage, and ensuring that the compensation effect of the common voltage in the display panel 10 is better and more stable.
It is to be understood that the invention is not limited to the examples described above, but that modifications and variations may be effected thereto by those of ordinary skill in the art in light of the foregoing description, and that all such modifications and variations are intended to be within the scope of the invention as defined by the appended claims.
Claims (10)
1. A common voltage detection circuit comprises a compensation circuit, wherein the compensation circuit comprises a first input end, a second input end and a first output end, the first input end is connected with a voltage feedback detection point arranged in a liquid crystal display panel, the second input end receives a reference voltage, the voltage feedback detection point is used for providing a detection common voltage on a common voltage line, the compensation circuit is used for outputting a compensation voltage from the first output end according to the reference voltage and the detection common voltage, the compensation voltage is used for being output to a voltage compensation point, different from the position of the voltage feedback detection point, in the liquid crystal panel, and the voltage compensation point is used for providing a compensated common voltage on the common voltage line; the public voltage detection circuit is characterized by further comprising a detection circuit, wherein the detection circuit is connected between the compensation circuit and the voltage compensation point and outputs a first detection voltage or a second detection voltage according to a voltage difference between the compensation voltage and the compensation public voltage, and the compensation circuit adjusts the compensation voltage to a preset range according to the first detection voltage and the second detection voltage.
2. The common voltage detection circuit according to claim 1,
the detection circuit outputs the first detection voltage when the compensation voltage is greater than the compensation common voltage,
when the compensation voltage is less than the compensation common voltage, the detection circuit outputs the second detection voltage.
3. The common voltage detection circuit according to claim 2,
the detection circuit comprises a first detection path and a second detection path which are connected in parallel with the first output end and the second output end,
when the compensation voltage is larger than the compensation common voltage, the first detection path is conducted and outputs the first detection voltage;
and when the compensation voltage is smaller than the compensation common voltage, the second detection path is conducted and outputs the second detection voltage.
4. The common voltage detection circuit according to claim 3,
the first detection path and the second detection path are both connected to a first common node and a second common node, the first common node is used for outputting a first common node voltage, the second common node is used for outputting a second common node voltage, and the first detection voltage and the second detection voltage are the difference between the first common node voltage and the second common node voltage.
5. The common voltage detection circuit according to claim 4,
the first detection path comprises a first unidirectional conductive element and a second unidirectional conductive element which are sequentially connected in series between the first output end and the second output end, and the first common node and the second common node are nodes between the first unidirectional conductive element and the second unidirectional conductive element.
6. The common voltage detection circuit according to claim 4,
the second detection path comprises a third unidirectional conductive element and a fourth unidirectional conductive element which are sequentially connected in series between the second output end and the first output end, and the first common node and the second common node are nodes between the third unidirectional conductive element and the fourth unidirectional conductive element.
7. The common voltage detection circuit according to claim 3,
the detection circuit comprises a common detection resistor;
the first detection path comprises a first unidirectional conductive element, a second unidirectional conductive element and a first detection resistor, the first unidirectional conductive element, the common detection resistor, the second unidirectional conductive element and the first detection resistor are sequentially connected in series between the first output end and the second output end, two ends of the common detection resistor comprise the first common node and the second common node, and a first node is arranged between the first detection resistor and the second unidirectional conductive element;
the second detection path comprises a third unidirectional conductive element, a fourth unidirectional conductive element and a second detection resistor, the third unidirectional conductive element, the common detection resistor, the fourth unidirectional conductive element and the second detection resistor are sequentially connected in series between the second output end and the first output end, and a second node is arranged between the second detection resistor and the fourth unidirectional conductive element;
the first node is used for outputting a first node voltage, and the first common node and the second common node are used for outputting the first detection voltage;
the second node is configured to output a second node voltage, and the first common node and the second common node are configured to output the second detection voltage.
8. The common voltage detection circuit according to any one of claims 1 to 7,
the compensation circuit comprises a differential amplifier, wherein the inverting terminal of the differential amplifier is connected with the first input terminal, the non-inverting terminal of the differential amplifier is connected with the second input terminal, the output terminal of the differential amplifier is connected with the first output terminal,
a first feedback resistor and a second feedback resistor which are connected in series are further arranged between the output end of the differential amplifier and the inverting end of the differential amplifier;
the compensation circuit adjusts the resistance values of the first feedback resistor and the second feedback resistor according to the first detection voltage and the second detection voltage so as to adjust the compensation voltage to the preset range.
9. A display module is characterized in that it comprises a display panel and a driving circuit module,
the driving circuit module comprises an image driving module for outputting image data, a power module for outputting the reference voltage, and the common voltage detecting circuit of any one of claims 1 to 8,
the display panel is connected to the driving circuit module and receives the image data, the power supply voltage and the compensation voltage, and displays an image under the driving of the data voltage and the compensation voltage.
10. A display device, comprising a housing and the display module set as claimed in claim 9 disposed in the housing.
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