CN114267299B - Display device and driving method - Google Patents
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- CN114267299B CN114267299B CN202111627301.3A CN202111627301A CN114267299B CN 114267299 B CN114267299 B CN 114267299B CN 202111627301 A CN202111627301 A CN 202111627301A CN 114267299 B CN114267299 B CN 114267299B
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Abstract
The embodiment of the application relates to the technical field of display and discloses a display device and a driving method. In this application, a display device includes: the display driving module is used for outputting a first voltage to the initialization module in a first time period and outputting a second voltage to the initialization module in a second time period; the first period includes an initialization phase, the second period is at least part of other phases except the initialization phase, the first voltage is smaller than the data voltage, and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage. According to the display device and the driving method, in the second time period, the problem that the initialization module generates electric leakage can be solved, and further the problem that AMOLED easily generates picture flickering is solved.
Description
Technical Field
The embodiment of the application relates to the technical field of display, in particular to a display device and a driving method.
Background
Active matrix organic light emitting display devices (Active Matrix Organic Light Emitting Diode, AMOLED) are one of the hot spots in the field of display device research today. AMOLED has the advantages of low energy consumption, low production cost, self-luminescence, wide viewing angle, high response speed and the like, so that the AMOLED is increasingly widely applied to the display fields of mobile phones, digital cameras and the like.
The inventors of the present application found that: the related art AMOLED is prone to a problem of flickering of a picture when used. Therefore, it is desirable to provide a display device and a driving method for improving the problem that the AMOLED is prone to generate flicker.
Disclosure of Invention
An object of the present embodiment is to provide a display device and a driving method for improving the problem that an AMOLED easily generates flicker.
In order to solve the above technical problem, an embodiment of the present application provides a display device, including: the display panel comprises a pixel circuit, wherein the pixel circuit comprises an initialization module, a data writing module and a storage module; the initialization module is used for initializing the storage module in an initialization stage; the data writing module is used for writing data voltage into the storage module in the data writing stage; the display driving module is used for outputting a first voltage to the initializing module in a first time period and outputting a second voltage to the initializing module in a second time period; the first period includes an initialization phase, the second period is at least part of other phases except the initialization phase, the first voltage is smaller than the data voltage, and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage.
In addition, the display driving module comprises a first signal transmission module and a first voltage conversion module; the first voltage conversion module is provided with a first control end and a first output end, the first control end is connected with the first signal transmission module, and the first output end is connected with the initialization module through an initialization signal line; the first signal transmission module is used for transmitting a first level signal to the first voltage conversion module in a first time period so that the first voltage conversion module outputs a first voltage to the initialization module; the first signal transmission module is also used for transmitting a second level signal to the first voltage conversion module in a second time period so that the first voltage conversion module outputs a second voltage to the initialization module.
In addition, the display driving module further includes a first voltage supply module for supplying a first voltage, and a second voltage supply module for supplying a second voltage; the first voltage conversion module is also provided with a first connecting end and a second connecting end, the first connecting end is connected with the first voltage supply module, and the second connecting end is connected with the second voltage supply module; the first voltage conversion module is used for conducting the first connection end and the first output end when the first control end receives the first level signal so that the first voltage supply module supplies a first voltage to the initialization module; the first voltage conversion module is further used for conducting the second connection end and the first output end when the first control end receives the second level signal, so that the second voltage supply module supplies the second voltage to the initialization module.
In addition, the first voltage conversion module comprises a first transistor and a second transistor, wherein one of the first transistor and the second transistor is a PMOS (P-channel metal oxide semiconductor) transistor, and the other is an NMOS (N-channel metal oxide semiconductor) transistor; the grid electrode of the first transistor is connected with the grid electrode of the second transistor, and a first control end is formed together; the first electrode of the first transistor is a first connection end; the second electrode of the first transistor is connected with the first electrode of the second transistor and forms a first output end together; the second electrode of the second transistor is a second connection terminal.
In addition, the display driving module further comprises a second signal transmission module and a second voltage conversion module; the second voltage conversion module is provided with a second control end, a second output end, a third connecting end and a fourth connecting end, wherein the second control end is connected with the second signal transmission module, the second output end is connected with the initialization module through an initialization signal wire, the third connecting end is connected with the first output end, and the fourth connecting end is grounded; the second signal transmission module is used for transmitting a third level signal to the second voltage conversion module when switching between the first time period and the second time period so as to enable the second voltage conversion module to conduct the fourth connecting end and the second output end, and the initialization module is grounded; the second signal transmission module is used for transmitting a fourth level signal to the second voltage conversion module at other times except when the first time period and the second time period are switched, so that the second voltage conversion module conducts the third connecting end and the second output end, and the first output end supplies voltage to the initialization module through the second voltage conversion module.
In addition, the second voltage is greater than zero volts; preferably, the voltage value of the second voltage is the same as the voltage value of the data voltage.
In addition, the second voltage conversion module comprises a third transistor and a fourth transistor, wherein one of the third transistor and the fourth transistor is a PMOS (P-channel metal oxide semiconductor) transistor, and the other is an NMOS (N-channel metal oxide semiconductor) transistor; the grid electrode of the third transistor is connected with the grid electrode of the fourth transistor, and the grid electrode of the third transistor and the grid electrode of the fourth transistor form a second control end together; the first electrode of the third transistor is a third connection terminal; the second electrode of the third transistor is connected with the first electrode of the fourth transistor, and forms a second output end together; the second electrode of the fourth transistor is a fourth connection terminal.
In addition, the display driving module also comprises a discharge control module; the discharging control module is provided with a third control end and a third output end, the third control end is connected with the first signal conveying module, and the third output end is connected with the second signal conveying module; the discharging control module is used for controlling the third output end to transmit a third level signal to the second signal transmission module when the third control end receives the rising edge signal or the falling edge signal so as to enable the second signal transmission module to transmit the third level signal to the second voltage conversion module; the discharging control module is used for controlling the third output end to transmit a fourth level signal to the second signal transmission module when the third control end receives the first level signal or the second level signal so as to enable the second signal transmission module to transmit the fourth level signal to the second voltage conversion module;
In addition, the display driving module also comprises a clock control module; the discharge control module includes: a D flip-flop and an exclusive OR gate; the D trigger is provided with an enabling input end, a trigger input end and a trigger output end, wherein the enabling input end is connected with the clock control module, and the trigger input end is connected with the first signal conveying module; the exclusive-or logic gate is provided with a first exclusive-or input end, a second exclusive-or input end and an exclusive-or output end, wherein the first exclusive-or input end is connected with the first signal transmission module, the second exclusive-or input end is connected with the output end of the trigger, and the exclusive-or output end is connected with the second signal transmission module.
In addition, the display driving module also comprises a power supply module and a voltage detection module; the power supply module is used for being connected with a power supply; the second signal transmission module and the power supply module are connected with the voltage detection module; the voltage detection module is used for detecting the voltage supplied by the power supply module and transmitting a third level signal to the second signal transmission module when the voltage supplied by the power supply module is lower than a preset voltage;
in addition, the display driving module further comprises a reference voltage supply module, wherein the reference voltage supply module is used for providing preset voltage; the voltage detection module is a comparator, the comparator is provided with a positive input end, a negative input end and a comparator output end, the positive input end is connected with the power supply module, the negative input end is connected with the reference voltage supply module, and the comparator output end is connected with the second signal transmission module.
In order to solve the above technical problem, an embodiment of the present application further provides a driving method, based on the above display device, including: in a first time period, the display driving module outputs a first voltage to the initializing module; in an initialization stage in the first time period, initializing a storage module by an initialization module; the display driving module outputs a second voltage to the initializing module in a second period.
The display device and the driving method provided by the embodiment of the application, the display device comprises a display driving module for outputting a first voltage to an initialization module in a first time period and outputting a second voltage to the initialization module in a second time period; the first period includes an initialization phase, the second period is at least part of other phases except the initialization phase, the first voltage is smaller than the data voltage, and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage. Therefore, in the second period (i.e., at least part of the other stages except the initialization stage), since the input end of the initialization module is the second voltage and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage, the difference between the voltage at the input end of the initialization module and the voltage at the output end of the initialization module (i.e., the data voltage written into the memory module by the data writing module) can be reduced, i.e., the voltage difference at the two ends of the initialization module is reduced, so that the problem that the initialization module generates electric leakage is solved, and the problem that AMOLED easily generates picture flicker is solved.
Drawings
One or more embodiments are illustrated by way of example and not limitation in the figures of the accompanying drawings, in which like references indicate similar elements, and in which the figures of the drawings are not to be taken in a limiting sense, unless otherwise indicated.
Fig. 1 is a schematic circuit diagram of a display device according to an embodiment of the present application;
fig. 2 is a timing diagram of respective control signals of a pixel driving circuit provided according to an embodiment of the present application;
FIG. 3 is a schematic circuit diagram of a portion of a display driving module according to an embodiment of the present application;
FIG. 4 is a timing diagram of a portion of control signals of a portion of a display driving module according to an embodiment of the present application;
FIG. 5 is a timing diagram of another portion of control signals of a portion of a display driving module according to an embodiment of the present application;
fig. 6 is a flow chart providing a driving method according to an embodiment of the present application.
Detailed Description
As described in the background art, the AMOLED of the related art is prone to a problem of flickering of a picture when used. The inventor of the present application found that, in the related art, a pixel driving circuit for driving an AMOLED may initialize a memory module with an initialization voltage provided by an initialization module in an initialization stage; since the data writing stage is the first stage after the initialization stage, and the data writing module writes the data voltage into the memory module during the data writing stage, the voltage value of the memory module is the same as the voltage value of the data voltage written into the memory module by the data writing module after the initialization stage, that is, the voltage value of the memory module is the same as the voltage value of the data voltage written into the memory module by the data writing module in other stages except the initialization stage; therefore, after the initialization stage, since the output end of the initialization module is connected with the memory module, that is, the voltage value of the output end of the initialization module is the same as the current voltage value of the memory module, and the voltage value of the input end of the initialization module is the initialization voltage, the difference between the data voltage provided by the data writing module (that is, the current voltage value of the memory module) and the voltage value of the input end of the initialization module is larger, so that the voltage difference between the two ends of the initialization module is larger, the initialization module is easy to generate electric leakage, and the AMOLED is easy to generate picture flicker.
In order to solve the above-mentioned problems, an embodiment of the present application provides a display device, including: the display panel comprises a pixel circuit, wherein the pixel circuit comprises an initialization module, a data writing module and a storage module; the initialization module is used for initializing the storage module in an initialization stage; the data writing module is used for writing data voltage into the storage module in the data writing stage; the display driving module is used for outputting a first voltage to the initializing module in a first time period and outputting a second voltage to the initializing module in a second time period; the first period includes an initialization phase, the second period is at least part of other phases except the initialization phase, the first voltage is smaller than the data voltage, and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage. Therefore, in the second period (i.e., at least part of the other stages except the initialization stage), since the input end of the initialization module is the second voltage and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage, the difference between the voltage at the input end of the initialization module and the voltage at the output end of the initialization module (i.e., the data voltage written into the memory module by the data writing module) can be reduced, i.e., the voltage difference at the two ends of the initialization module is reduced, so that the problem that the initialization module generates electric leakage is solved, and the problem that AMOLED easily generates picture flicker is solved.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present application more apparent, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. However, those of ordinary skill in the art will understand that in various embodiments of the present application, numerous technical details have been set forth in order to provide a better understanding of the present application. However, the technical solutions claimed in the present application can be implemented without these technical details and with various changes and modifications based on the following embodiments.
Referring to fig. 1, an embodiment of the present application provides a display device, including: a display panel including a pixel circuit 100, the pixel circuit 100 including an initialization signal line 110, an initialization module 120, a data writing module 130, and a storage module 140; the initialization signal line 110 is connected to the memory module 140 through the initialization module 120; the initialization module 120 is configured to initialize the storage module 140 in an initialization phase; the data writing module 130 is configured to write a data voltage to the storage module 140 during a data writing phase; the display driving module 200 is configured to output a first voltage to the initialization module 120 in a first period of time and output a second voltage to the initialization module 120 in a second period of time; the first time period comprises an initialization stage, the second time period is at least part of other stages except the initialization stage, the first voltage is smaller than the data voltage, and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage.
Specifically, the display driving module 200 outputs a first voltage to the initialization signal line 110 during a first period; and in the initialization stage in the first period, the initialization module 120 is turned on, so that the initialization module 120 provides the first voltage to the memory module 140, and initializes the memory module 140 through the first voltage.
In some examples, the first voltage is below zero volts, thereby facilitating initialization of the memory module 140. In this embodiment, the voltage value of the first voltage is minus 3 volts, that is, in the initialization stage, the display driving module 200 outputs the first voltage with the voltage value of minus 3 volts to the initialization module 120, the initialization signal line 110 supplies the first voltage with the voltage value of minus 3 volts to the memory module 140 through the initialization module 120, and the memory module 140 is initialized by the first voltage with the voltage value of minus 3 volts.
In the second period, the display driving module 200 outputs a second voltage to the initializing module 120, and an absolute value of a difference between the second voltage and the data voltage is smaller than an absolute value of a difference between the first voltage and the data voltage. At this time, since the second period is at least a part of the other phases except the initialization phase, the voltage value of the memory module 140 is the same as the voltage value of the data voltage written into the memory module 140 by the data writing module 130; since the output end of the initialization module 120 is connected to the storage module 140, the input end of the initialization module 120 is connected to the initialization signal line 110, and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage, the difference between the voltage provided by the initialization signal line 110 and the current voltage of the storage module 140 at this time can be reduced, that is, the voltage difference between the two ends of the initialization module 120 is reduced, so that the problem that the initialization module 120 generates electric leakage is improved, and the problem that the AMOLED easily generates picture flicker is improved.
In some examples, the second voltage is greater than zero volts. In this embodiment, the voltage value of the second voltage is the same as the voltage value of the data voltage. In this way, in the second period, the voltage difference between the two ends of the initialization module 120 can be made to be zero, so as to further improve the problem of electric leakage generated by the initialization module 120.
With continued reference to fig. 1. In some examples, the pixel driving circuit 100 has a structure of 7T1C (i.e. 7 transistors and 1 capacitor), where the initialization module 120 includes a transistor T1 and a transistor T2, the storage module 140 is a capacitor C1, the data writing module 130 includes a transistor T6, and the pixel driving circuit 100 further includes: the driving transistor T3, the Light Emitting module, the transistor T7, the scan signal line S1, the scan signal line S2, the signal control line En, the power line ELVDD, the power line ELVSS, the data line Dm, and an Organic Light-Emitting Diode (OLED), wherein the Light Emitting module includes the transistor T4 and the transistor T5.
Specifically, the first electrode of the transistor T1 is connected to the initialization signal line 110, the second electrode of the transistor T1 is connected to one end of the capacitor C1, the gate of the driving transistor T3, and the first electrode of the transistor T7, that is, the transistor T1 is connected to both the initialization signal line 110 and the capacitor C1, so that in the second period, the voltage value of the first electrode of the transistor T1 is the second voltage provided by the initialization signal line 110, the voltage value of the second electrode of the transistor T1 is the voltage value of the capacitor C1 (that is, the voltage value of the data voltage written into the capacitor C1 by the data writing module 130), at this time, since the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage, the voltage difference between the two ends of the transistor T1 can be reduced, thereby improving the problem of leakage generated by the transistor T1; a first electrode of the transistor T2 is connected to the initialization signal line 110, and a second electrode of the transistor T2 is connected to a first electrode of the transistor T4 and an anode of the OLED; a first electrode of the driving transistor T3 is connected to a second electrode of the transistor T4 and a second electrode of the transistor T7, and a second electrode of the driving transistor T3 is connected to a first electrode of the transistor T5 and a first electrode of the transistor T6; a first electrode of the transistor T4 is connected with the anode of the OLED, and a second electrode of the transistor T4 is connected with a second electrode of the transistor T7; a first electrode of the transistor T5 is connected to a first electrode of the transistor T6, and a second electrode of the transistor T5 is connected to the power line ELVDD; a second electrode of the transistor T6 is connected to the data line Dm; the scan signal line S1 is connected to the gate of the transistor T1 and the gate of the transistor T2, and is used to turn on the transistor T1 and the transistor T2 in the initialization stage; the scan signal line S2 is connected to the gate of the transistor T6 and the gate of the transistor T7, and is used to turn on the transistor T6 and the transistor T7 in the data writing stage; the signal control line En is connected to the gate of the transistor T4 and the gate of the transistor T5, and is used to turn on the transistor T4 and the transistor T5 in the first stage of the read-write light emission stage and the initialization stage; the cathode of the OLED is connected to the power line ELVSS.
As an alternative implementation of the embodiment of the present application, the driving timing shown in fig. 2 may be applied to the pixel driving circuit shown in fig. 1. Taking the pixel circuit shown in fig. 1 as an example, the working principle of the pixel driving circuit provided in the embodiment of the present application is specifically described with reference to fig. 2. The transistors in the pixel circuit provided in this embodiment may be P-type or N-type. The following embodiments of the present application will take P-type transistors as examples.
The pixel driving circuit provided in the embodiment of the present application includes an initialization phase, a data writing phase (i.e., a time period t3 in fig. 2) and a read/write light emitting phase (i.e., a time period t4 in fig. 2), wherein the initialization phase includes a first phase (i.e., a time period t1 in fig. 2) and a second phase (i.e., a time period t2 in fig. 2).
In the first stage T1, the scan signal line S1 emits a low level signal, the transistor T1 and the transistor T2 are turned on, the initialization signal line 110 is connected to one end of the capacitor C1 through the transistor T1, and at this time, the driving transistor T3 is turned on because the initialization signal line 110 is at a first voltage lower than zero volt; in addition, in the first stage, the signal control line En sends out a low level signal, the transistor T4 and the transistor T5 are turned on, so that the power line ELVDD provides a fixed voltage to the second electrode of the driving transistor T3 through the transistor T5, and the initialization signal line 110 provides a fixed voltage to the first electrode of the driving transistor T3 through the transistor T2 and the transistor T4, so that the current presented by the driving transistor T3 is more stable when the voltage of the gate electrode of the driving transistor T3 relative to the source electrode is from high to low and from low to high; in addition, at this time, the power line ELVDD may be connected to the initialization signal line 110 through the transistor T5, the driving transistor T3, the transistor T4, and the transistor T2, thereby preventing the OLED from being powered on to prevent the OLED from emitting light, and thus increasing the black state luminance of the OLED.
In the second stage T2, the scan signal line S1 still emits a low level signal, and the signal control line En emits a high level signal to turn off the transistors T4 and T5, so that the current flowing through the driving transistor T3 is blocked, i.e. the power line ELVDD cannot be connected to the initialization signal line 110 through the transistors T5, T3, T4 and T2, to ensure that the OLED does not emit light and cause abnormal flicker in the subsequent data writing stage for charging the capacitor C1.
In the data writing stage T3, the scan signal line S1 sends out a high level signal, the scan signal line S2 sends out a low level signal to turn off the transistors T1 and T2 and turn on the transistors T6 and T7, and the driving transistor T3 is kept on due to the conduction of the transistor T7, so that the data line Dm can write the data voltage into the capacitor C1 through the transistors T6, T3 and T7, and further the capacitor C1 is continuously charged.
In the read/write light-emitting stage T4, the scan signal line S2 emits a high-level signal, the signal control line En emits a low-level signal to turn off the transistors T6 and T7, and turn on the transistors T4 and T5, and the OLED emits light with different brightness corresponding to the data voltage written in the capacitor C1 by the data line Dm in the data writing stage.
In one example, the AMOLED display includes a plurality of pixel driving circuits 100, the initialization signal lines 110 of different pixel driving circuits 100 are independent, and at this time, for any pixel driving circuit 100, the second period may include at least one of a data writing phase, a read-write light emitting phase, and a third phase, where the third phase is a period after the end of the read-write light emitting phase and before the start of the next initialization phase.
In yet another example, the AMOLED display screen includes a plurality of pixel driving circuits 100, the initialization signal lines 110 of the plurality of pixel driving circuits 100 are the same initialization signal line 110, and since the AMOLED display screen adopts a progressive scanning display mode, the first period may be at least a part of the period from before the initialization of the first line pixel driving circuit to after the initialization of the last line pixel driving circuit is completed, and the second period is at least a part of the period other than the first period, where when the AMOLED display screen adopts progressive scanning, the scanned first line pixel driving circuit 100 is the first line pixel driving circuit, and the scanned last line pixel driving circuit 100 is the last line pixel driving circuit.
In this embodiment, the AMOLED display screen includes a plurality of pixel driving circuits 100, the initialization signal lines 110 of the plurality of pixel driving circuits 100 are the same initialization signal line 110, the first time period is from before the initialization phase of the primary pixel driving circuit starts to after the read-write light-emitting phase of the final pixel driving circuit ends, and the second time period is other time periods except the first time period.
In addition, with continued reference to fig. 2, in the present embodiment, there is a time interval between the period t2 of the initialization stage and the period t3 of the data writing stage, so that when the scan signal line S1 sends out a low level signal, the scan signal line S2 sends out a low level signal, so that the initialization signal line 110 provides the first voltage to the capacitor C1, and the data line Dm provides the data voltage to the capacitor C1, so that the capacitor C1 fails; the data writing stage T3 and the read/write light emitting stage T4 also have a time interval therebetween, so that the signal control line En can be prevented from emitting a low level signal when the scanning signal line S2 emits a low level signal, and the data line Dm is prevented from being connected to the power line ELVDD through the transistor T6 and the transistor T5, so that the pixel driving circuit 100 is prevented from generating a fault.
It should be noted that the pixel driving circuit 100 shown in fig. 1 is only an example structure of the embodiment of the present application, and in practical applications, the pixel driving circuit of the embodiment of the present application may also be a structure of other types of pixel driving circuits (such as 2T1C, i.e. composed of 2 transistors and 1 capacitor), which is not limited in this application.
With continued reference to fig. 1, in some examples, the display drive module 200 includes a first signal delivery module 210 and a first voltage conversion module 220; the first voltage conversion module 220 has a first control end connected to the first signal transmission module 210 and a first output end connected to the initialization module 120 through the initialization signal line 110; the first signal transmitting module 210 is configured to transmit a first level signal to the first voltage converting module 220 in a first period of time, so that the first voltage converting module 220 outputs a first voltage to the initialization signal line 110; the first signal transmitting module 210 is further configured to transmit a second level signal to the first voltage converting module 220 in a second period of time, so that the first voltage converting module 220 outputs a second voltage to the initialization signal line 110.
In this way, the first signal transmission module 210 can send out different level signals to control the first voltage conversion module 220 to output different voltages, so that the initialization signal line 110 outputs different voltages in the first time period and the second time period.
Further, the display driving module 200 further includes a first voltage supply module 231 for supplying a first voltage, and a second voltage supply module 232 for supplying a second voltage; the first voltage conversion module 220 further has a first connection terminal connected to the first voltage supply module 231 and a second connection terminal connected to the second voltage supply module 232; the first voltage conversion module 220 is configured to, when the first control end receives the first level signal, turn on the first connection end and the first output end, so that the first voltage supply module 231 supplies the first voltage to the initialization signal line 110; the first voltage conversion module 220 is further configured to, when the first control terminal receives the second level signal, turn on the second connection terminal and the first output terminal, so that the second voltage supply module 232 supplies the second voltage to the initialization signal line 110.
Thus, when the first voltage conversion module 220 receives the first level signal, the display driving module 200 outputs the first voltage to the initialization signal line 110, and the initialization signal line 110 can output the first voltage to other components; and the first voltage conversion module 220 is enabled to output the second voltage to the initialization signal line 110 by the display driving module 200 when receiving the second level signal, and the initialization signal line 110 is enabled to output the second voltage to other components.
In some examples, the first voltage supply module 231 is connected with the negative power supply input pin VGL or the analog negative power supply AVEE such that the first voltage supply module 231 can supply the initializing signal line 110 with a first voltage lower than zero volt; the second voltage supply module 232 is connected to the analog positive power AVDD so that the second voltage supply module 232 may supply the second voltage to the initialization signal line 110.
Preferably, the first voltage supply module 231 is connected to the negative power supply input pin VGL or the analog negative power supply AVEE through the low dropout linear stabilizer 233; the second voltage supply module 232 is connected to the analog positive power supply AVDD through a low dropout linear stabilizer 234.
Specifically, in the present embodiment, the first voltage supply module 231 is a first input voltage line VREFN, the first voltage supply module 231 is connected to the negative power supply input pin VGL through the low dropout linear stabilizer 233, the second voltage supply module 232 is a second input voltage line VREFP, and the second voltage supply module 232 is connected to the analog positive power supply AVDD through the low dropout linear stabilizer 234.
More preferably, the pixel driving circuit further includes: and a capacitor C2 and a capacitor C3, wherein one end of the capacitor C2 is connected to the first voltage supply module 231, the other end is grounded, and one end of the capacitor C3 is connected to the second voltage supply module 232, and the other end is grounded. In this way, the output of the first voltage supply module 231 and the output of the second voltage supply module 232 can be stabilized by the capacitor C2 and the capacitor C3, respectively.
Further, the first signal transmission module 210 is configured to receive the first level signal and the second level signal sent by the external control module, and is configured to transmit the first level signal and the second level signal to the first control terminal. Thus, the external control module can be used to control the first voltage conversion module 220 to output different voltages.
In this embodiment, the external control module is a logic board (timing controller, TCON), and the first level signal and the second level signal are data signals.
In some examples, the first voltage conversion module 220 includes a first transistor T8 and a second transistor T9, one of the first transistor T8 and the second transistor T9 is a PMOS transistor, and the other is an NMOS transistor; the grid electrode of the first transistor T8 is connected with the grid electrode of the second transistor T9, and a first control end is formed together; the first electrode of the first transistor T8 is a first connection terminal; the second electrode of the first transistor T8 is connected with the first electrode of the second transistor T9 and forms a first output end together; the second electrode of the second transistor T9 is a second connection terminal.
Specifically, in the embodiment, the first level signal is a high level signal, the second level signal is a low level signal, and at this time, the first transistor T8 is a PMOS transistor, the second transistor T9 is an NMOS transistor, that is, the first voltage conversion module 220 is a follower.
In another embodiment, the first level signal is a low level signal, the second level signal is a high level signal, and at this time, the first transistor T8 is an NMOS transistor, the second transistor T9 is a PMOS transistor, i.e. the first voltage conversion module 220 is an inverter.
Preferably, the display driving module 200 is further configured to ground the initialization module 120 when switching between the first period and the second period. In this way, the charges in the pixel driving circuit 100 can be discharged to the ground through the initialization signal line 110, thereby reducing the power consumption of the pixel driving circuit 100.
Specifically, in some examples, the display driving module 200 further includes a second signal transmission module 240 and a second voltage conversion module 250; the second voltage conversion module 250 has a second control end, a second output end, a third connection end and a fourth connection end, the second control end is connected with the second signal transmission module 240, the second output end is connected with the initialization module 120 through the initialization signal line 110, the third connection end is connected with the first output end, and the fourth connection end is grounded; the second signal transmitting module 240 is configured to transmit a third level signal to the second voltage converting module 250 when switching between the first time period and the second time period, so that the second voltage converting module 250 conducts the fourth connection terminal and the second output terminal, and the initialization module 120 is grounded; the second signal transmitting module 240 is configured to transmit a fourth level signal to the second voltage converting module 250 at other times except when switching between the first time period and the second time period, so that the second voltage converting module 250 conducts the third connection terminal and the second output terminal, and the first output terminal supplies a voltage to the initializing module 120 through the second voltage converting module 250.
In this way, when switching between the first period and the second period is performed, the initialization module 120 is grounded, so that the charges in the pixel driving circuit 100 can be discharged to the ground through the initialization signal line 110.
In this embodiment, the display driving module 200 further includes: and one end of the resistor R is connected with the fourth connecting end, and the other end of the resistor R is grounded. In this way, the fourth connection terminal is grounded, and the current between the fourth connection terminal and the ground terminal is reduced, so as to avoid the damage of the display driving module 200.
Furthermore, in an embodiment, the second signal transmitting module 240 may also be configured to send out the third level signal when switching between the second period and the next first period. In this way, the initialization signal line 110 can also be grounded at the time of switching between the second period and the next first period, thereby releasing the charge in the pixel driving circuit 100.
In this embodiment, the second signal transmission module 240 is configured to send out a third level signal when switching between the first time period and the second time period and when switching between the second time period and the next first time period. In this way, the initialization signal line 110 can be grounded to release the charge in the pixel driving circuit 100 both at the time of switching between the first period and the second period and at the time of switching between the second period and the next first period.
In addition, in the present embodiment, the first signal transmission module 210 and the second signal transmission module 240 are both signal lines.
In some examples, the second voltage conversion module 250 includes a third transistor T10 and a fourth transistor T11, one of the third transistor T10 and the fourth transistor T11 is a PMOS transistor, and the other is an NMOS transistor; the grid electrode of the third transistor T10 is connected with the grid electrode of the fourth transistor T11, and forms a second control end together; the first electrode of the third transistor T10 is a third connection terminal; the second electrode of the third transistor T10 is connected to the first electrode of the fourth transistor T11 and together form a second output terminal; the second electrode of the fourth transistor T11 is a fourth connection terminal.
Specifically, in the present embodiment, the third level signal is a high level signal, the fourth level signal is a low level signal, the third transistor T10 is a PMOS transistor, and the fourth transistor T11 is an NMOS transistor. Therefore, when the second control end receives the fourth level signal, the third connecting end is conducted with the second output end; when the second control end receives the third level signal, the fourth connecting end is conducted with the second output end.
In another embodiment, the third level signal is a low level signal, the fourth level signal is a high level signal, the third transistor T10 is an NMOS transistor, and the fourth transistor T11 is a PMOS transistor. In this way, when the second control end receives the fourth level signal, the third connection end is conducted with the second output end; when the second control end receives the third level signal, the fourth connecting end is conducted with the second output end.
In some embodiments, the display driving module 200 further includes a discharge control module 261; the discharge control module 261 has a third control end connected with the first signal transmission module 210 and a third output end connected with the second signal transmission module 240; the discharge control module 261 is configured to control the third output terminal to transmit a third level signal to the second signal transmission module 240 when the third control terminal receives the rising edge signal or the falling edge signal, so that the second signal transmission module 240 transmits the third level signal to the second voltage conversion module 250; the discharge control module 261 is configured to control the third output terminal to transmit the fourth level signal to the second signal transmission module 240 when the third control terminal receives the first level signal or the second level signal, so that the second signal transmission module 240 transmits the fourth level signal to the second voltage conversion module 250. In this way, the initialization signal line 110 can be ensured to be grounded when switching between the first period and the second period.
In this embodiment, since the first voltage conversion module 220 is a follower, the third control unit switches between the first time period and the second time period when receiving the rising edge signal; and when the third control end receives the falling edge signal, the third control end is switched between a second time period and a next first time period, wherein the rising edge signal is a signal when the low level signal is converted into the high level signal, and the falling edge signal is a signal when the high level signal is converted into the low level signal.
Specifically, when the third control end receives the rising edge signal and the falling edge signal, the discharge control module 261 provided in this embodiment outputs the third level signal at the third output end. In this way, the initialization signal line 110 can be grounded both when switching between the first period and the second period and when switching between the second period and the next first period.
In this embodiment, a specific embodiment is described in which the third output terminal outputs a high level signal to the second signal transmission module 240 when the third control terminal receives the rising edge signal and/or the falling edge signal of the first signal transmission module 210, so that the initialization signal line 110 is grounded.
With continued reference to FIG. 1 and with concurrent reference to FIG. 3, in particular, the display driver module 200 further includes a clock control module 262; the discharge control module 261 includes: d flip-flop 263 and exclusive or gate 264; the D flip-flop 263 has an enable input connected to the clock control module 262, a flip-flop input connected to the first signal delivery module 210, and a flip-flop output; the exclusive-or logic gate 264 has a first exclusive-or input connected to the first signal delivery module 210, a second exclusive-or input connected to the flip-flop output, and an exclusive-or output connected to the second signal delivery module 240. At this time, the trigger input terminal and the first exclusive or input terminal together form a third control terminal of the discharge control module 261.
Thus, when the third control end receives the rising edge signal and/or the falling edge signal of the first signal conveying module 210, the third output end outputs a high level signal to the second signal conveying module 240; when the third control terminal receives the second level signal or the third level signal of the first signal transmission module 210, the third output terminal outputs a low level signal to the second signal transmission module 240.
Specifically, the driving timing shown in fig. 4 can be applied to the circuit structures of the display driving modules shown in fig. 1 and 3. Taking the circuit structures of the display driving modules shown in fig. 1 and fig. 3 as an example, the working principle of the circuit structure of the display driving module provided in the embodiment of the present application is specifically described with reference to fig. 4.
The circuit structure of the display driving module provided in the embodiment of the present application includes a first period (i.e., s1 period in fig. 4), a period when switching between the first period and the second period (i.e., s2 period in fig. 4), and a second period (i.e., s3 period in fig. 4).
In the first period s1, the first signal transmission module 210 outputs a low level signal, so that no matter the clock control module 262 outputs any signal, the flip-flop output terminal outputs a low level signal, and at this time, the first xor input terminal and the second xor input terminal are both low level signals, so that the xor output terminal outputs a low level signal to the second signal transmission module 240, so that the second signal transmission module 240 outputs a low level signal to the second voltage conversion module 250.
In a period s2 when switching between the first period and the second period, the first signal transmission module 210 outputs a high level signal, and at this time, the clock control module 262 has not yet outputted a rising edge signal, and the output end of the trigger still outputs a low level signal, so that the first xor input end is the high level signal, the second xor input end is the low level signal, and the xor output end outputs the high level signal to the second signal transmission module 240, so that the second signal transmission module 240 outputs the high level signal to the second voltage conversion module 250, and the initialization signal line 110 is grounded.
After the clock control module 262 outputs the rising edge signal, a second period s3 begins; in the second period s3, the first signal transmission module 210 outputs a high level signal, and the clock control module 262 outputs a rising edge signal, so that the flip-flop output terminal outputs a high level signal, and at this time, the first xor input terminal is a high level signal, and the second xor input terminal is a high level signal, so that the xor output terminal outputs a low level signal to the second signal transmission module 240.
In addition, the display driving module 200 further includes: a clear module 265; the D flip-flop 263 also includes a clear end coupled to the clear module 265.
With continued reference to fig. 1 and 3, in some examples, the display driving module 200 further includes a power supply module 271 and a voltage detection module 272; the power supply module 271 is used for connecting with a power supply; the second signal transmission module 240 and the power supply module 271 are connected with the voltage detection module 272; the voltage detection module 272 is configured to detect a voltage supplied from the power supply module 271, and to send a third level signal to the second signal sending module 240 when the voltage supplied from the power supply module 271 is lower than a preset voltage. In this manner, when the voltage of the power supply module 271 is lower than the preset voltage, the third level signal may be output to the second signal transmission module 240, thereby grounding the initialization signal line 110.
In this embodiment, a specific embodiment in which the voltage detection module 272 outputs a high level signal to the second signal transmission module 240 when the voltage of the power supply module 271 is lower than the preset voltage so that the initialization signal line 110 is grounded is illustrated as an example. The display driving module 200 further includes a reference voltage supply module 273, the reference voltage supply module 273 being configured to supply a preset voltage; the voltage detection module 272 is a comparator, which has a positive input terminal connected to the power supply module 271, a negative input terminal connected to the reference voltage supply module 273, and a comparator output terminal connected to the second signal transmission module 240.
Referring to fig. 5, when the voltage of the power supply module 271 is lower than the preset voltage, the voltage detection module 272 outputs a high-level signal to the second signal transmission module 240, thereby grounding the initialization signal line 110 and releasing the charges in the pixel driving circuit 100.
Preferably, the comparator also has a comparator supply terminal connected to the analog positive power supply 274 and a comparator ground terminal connected to ground.
Specifically, in the embodiment, the voltage detection module 272 is indirectly connected to the second signal transmission module 240 through the discharging control module 261, at this time, the discharging control module 261 further includes an or gate logic gate 266, the or gate logic gate 266 has a first or gate input end, a second or gate input end, and an or gate output end, the exclusive or output end is connected to the first or gate input end, the or gate output end is connected to the second signal transmission module 240, and the voltage detection module 272 is connected to the second or gate input end and is indirectly connected to the second signal transmission module 240 through the or gate logic gate 266. In this way, when either the exclusive or output or the low voltage detection module 272 outputs a high level signal, the or gate 266 outputs a high level signal, thereby grounding the initialization signal line 110.
Referring to fig. 1 and fig. 6, an embodiment of the present application relates to a driving method, and a display device based on the above embodiment includes:
s110, the display driving module 200 outputs a first voltage to the initializing module 120 during the first period S1.
Specifically, in the present embodiment, the display driving module 200 includes a first signal transmission module 210, a first voltage conversion module 220, a first voltage supply module 231 for supplying a first voltage, and a second voltage supply module 232 for supplying a second voltage; the first voltage conversion module 220 includes a first transistor T8 and a second transistor T9, the first transistor T8 is a PMOS transistor, and the second transistor T9 is an NMOS transistor; the gate of the first transistor T8 is connected to the gate of the second transistor T9, and together form a first control terminal, which is connected to the first signal transmission module 210; the first electrode of the first transistor T8 is a first connection terminal and is connected to the first voltage supply module 231; the second electrode of the first transistor T8 is connected to the first electrode of the second transistor T9, and together form a first output terminal, which is connected to the initialization signal line 110; the second electrode of the second transistor T9 is a second connection terminal and is connected to the second voltage supply module 232.
In the first period s1, the first signal transmission module 210 sends a low level signal to the first control terminal, the second transistor T9 is turned on, and the first voltage supply module 231 supplies the first voltage to the initialization module 120 through the second transistor T9 and the initialization signal line 110.
In the initialization stage in the first period s1, the initialization module 120 is turned on, and the initialization signal line 110 is made to write the first voltage to the memory module 140, thereby initializing the memory module 140.
S120, when switching between the first period and the second period, S2, the initialization signal line 110 is grounded.
Specifically, in the present embodiment, the display driving module 200 further includes a second signal transmission module 240 and a second voltage conversion module 250, where the second signal transmission module 240 is configured to transmit a high-level signal to the second voltage conversion module 250 when switching between the first time period and the second time period; the second signal transmitting module 240 is configured to transmit a low level signal to the second voltage converting module 250 at other times than when switching between the first time period and the second time period; the second voltage conversion module 250 includes a third transistor T10 and a fourth transistor T11, wherein the third transistor T10 is a PMOS transistor, and the fourth transistor T11 is an NMOS transistor; the gate of the third transistor T10 is connected to the gate of the fourth transistor T11, and forms a second control terminal together, and the second control terminal is connected to the second signal transmission module 240; the first electrode of the third transistor T10 is a third connection terminal, and the third connection terminal is connected to the first output terminal; a second electrode of the third transistor T10 is connected to a first electrode of the fourth transistor T11, and forms a second output terminal in common, the second output terminal being connected to the initialization signal line 110; the second electrode of the fourth transistor T11 is a fourth connection terminal.
In this way, at the time s2 of switching between the first period and the second period, the second signal transmission module 240 transmits the low level signal to the second voltage conversion module 250, and at this time, the fourth transistor T11 is turned on, so that the initialization signal line 110 is grounded through the fourth transistor T11.
S130, the display driving module 200 outputs a second voltage to the initialization signal line 110 during a second period S3.
Specifically, during the second period s3, the first signal transmission module 210 sends a high level signal to the first control terminal, the second signal transmission module 240 transmits a low level signal to the second voltage conversion module 250, so that the first transistor T8 and the third transistor T10 are turned on, and the second voltage supply module 232 supplies the second voltage to the initialization signal line 110 through the first transistor T8 and the third transistor T10.
At this time, since the voltage value of the memory module 140 is the same as the voltage provided by the data writing module 130, and the absolute value of the difference between the second voltage and the data voltage is smaller than the absolute value of the difference between the first voltage and the data voltage, the difference between the voltage provided by the initialization signal line 110 and the voltage of the memory module 140 at this time can be reduced, that is, the voltage difference between the two ends of the transistor T1 is reduced, so as to improve the problem that the initialization module 120 generates electric leakage, and further improve the problem that the AMOLED easily generates picture flicker.
In this embodiment, the same structure as that of the first embodiment may be used to enable the second signal transmission module 240 to transmit the high-level signal to the second voltage conversion module 250 when switching between the first period and the second period, and enable the second signal transmission module 240 to transmit the low-level signal to the second voltage conversion module 250 at other times than when switching between the first period and the second period. That is, the same discharge control module 261 as in the first embodiment is used to transmit the level signal to the second signal transmission module 240.
In this embodiment, the same voltage detection module 272 as that in the first embodiment may be used to detect the voltage of the power supply module 271, and when the voltage of the power supply module 271 is lower than the preset voltage, the voltage detection module 272 directly outputs the third level signal to the second signal transmission module 240, or the voltage detection module 272 outputs the third level signal to the second signal transmission module 240 through the discharge control module 261, so as to ground the initialization signal line 110. And will not be described in detail herein.
It will be understood by those of ordinary skill in the art that the foregoing embodiments are specific examples of carrying out the invention and that various changes in form and details may be made therein without departing from the spirit and scope of the invention.
Claims (12)
1. A display device, comprising:
the display panel comprises a pixel circuit, wherein the pixel circuit comprises an initialization module, a data writing module and a storage module; the initialization module is used for initializing the storage module in an initialization stage; the data writing module is used for writing data voltage into the storage module in a data writing stage;
the display driving module is used for outputting a first voltage to the initializing module in a first time period and outputting a second voltage to the initializing module in a second time period; the first period of time includes the initialization phase, the second period of time is at least part of the other phases than the initialization phase, the first voltage is smaller than the data voltage, and an absolute value of a difference between the second voltage and the data voltage is smaller than an absolute value of a difference between the first voltage and the data voltage;
the display driving module comprises a first signal transmission module and a first voltage conversion module; the first voltage conversion module is provided with a first control end and a first output end, the first control end is connected with the first signal transmission module, and the first output end is connected with the initialization module through an initialization signal line;
The first signal transmission module is used for transmitting a first level signal to the first voltage conversion module in the first time period so that the first voltage conversion module outputs the first voltage to the initialization module; the first signal transmission module is further configured to transmit a second level signal to the first voltage conversion module in the second period of time, so that the first voltage conversion module outputs the second voltage to the initialization module.
2. The display device according to claim 1, wherein the display driving module further includes a first voltage supply module for supplying the first voltage, and a second voltage supply module for supplying the second voltage;
the first voltage conversion module is further provided with a first connecting end and a second connecting end, the first connecting end is connected with the first voltage supply module, and the second connecting end is connected with the second voltage supply module; the first voltage conversion module is used for conducting the first connection end and the first output end when the first control end receives the first level signal, so that the first voltage supply module supplies the first voltage to the initialization module; the first voltage conversion module is further configured to, when the first control end receives the second level signal, turn on the second connection end and the first output end, so that the second voltage supply module supplies the second voltage to the initialization module.
3. The display device according to claim 2, wherein the first voltage conversion module comprises a first transistor and a second transistor, one of the first transistor and the second transistor being a PMOS transistor and the other being an NMOS transistor; the grid electrode of the first transistor is connected with the grid electrode of the second transistor, and the first control end is formed together; the first electrode of the first transistor is the first connection terminal; the second electrode of the first transistor is connected with the first electrode of the second transistor, and the first electrode of the second transistor are formed into the first output end together; the second electrode of the second transistor is the second connection terminal.
4. The display device of claim 1, wherein the display drive module further comprises a second signal delivery module and a second voltage conversion module; the second voltage conversion module is provided with a second control end, a second output end, a third connection end and a fourth connection end, the second control end is connected with the second signal transmission module, the second output end is connected with the initialization module through the initialization signal line, the third connection end is connected with the first output end, and the fourth connection end is grounded;
The second signal transmission module is used for transmitting a third level signal to the second voltage conversion module when the first time period and the second time period are switched, so that the second voltage conversion module conducts the fourth connection end and the second output end, and the initialization module is grounded; the second signal transmission module is used for transmitting a fourth level signal to the second voltage conversion module at other times except when the first time period and the second time period are switched, so that the second voltage conversion module conducts the third connection end and the second output end, and the first output end supplies voltage to the initialization module through the second voltage conversion module.
5. The display device of claim 4, wherein the second voltage is greater than zero volts.
6. The display device according to claim 5, wherein a voltage value of the second voltage is the same as a voltage value of the data voltage.
7. The display device according to claim 4, wherein the second voltage conversion module comprises a third transistor and a fourth transistor, one of the third transistor and the fourth transistor being a PMOS transistor and the other being an NMOS transistor; the grid electrode of the third transistor is connected with the grid electrode of the fourth transistor, and the second control end is formed together; the first electrode of the third transistor is the third connection terminal; the second electrode of the third transistor is connected with the first electrode of the fourth transistor, and the second electrode and the first electrode of the fourth transistor are formed into a second output end together; the second electrode of the fourth transistor is the fourth connection terminal.
8. The display device of claim 4, wherein the display driving module further comprises a discharge control module; the discharging control module is provided with a third control end and a third output end, the third control end is connected with the first signal conveying module, and the third output end is connected with the second signal conveying module;
the discharging control module is used for controlling the third output end to convey the third level signal to the second signal conveying module when the third control end receives the rising edge signal or the falling edge signal, so that the second signal conveying module conveys the third level signal to the second voltage conversion module; and the discharge control module is used for controlling the third output end to convey the fourth level signal to the second signal conveying module when the third control end receives the first level signal or the second level signal, so that the second signal conveying module conveys the fourth level signal to the second voltage conversion module.
9. The display device of claim 8, wherein the display drive module further comprises a clock control module; the discharge control module includes: a D flip-flop and an exclusive OR gate; the D trigger is provided with an enabling input end, a trigger input end and a trigger output end, wherein the enabling input end is connected with the clock control module, and the trigger input end is connected with the first signal transmission module; the exclusive-or logic gate is provided with a first exclusive-or input end, a second exclusive-or input end and an exclusive-or output end, wherein the first exclusive-or input end is connected with the first signal transmission module, the second exclusive-or input end is connected with the trigger output end, and the exclusive-or output end is connected with the second signal transmission module.
10. The display device of claim 4, wherein the display driving module further comprises a power supply module and a voltage detection module; the power supply module is used for being connected with a power supply; the second signal transmission module and the power supply module are connected with the voltage detection module; the voltage detection module is used for detecting the voltage supplied by the power supply module and transmitting a third level signal to the second signal transmission module when the voltage supplied by the power supply module is lower than a preset voltage.
11. The display device according to claim 10, wherein the display driving module further comprises a reference voltage supply module for supplying a preset voltage; the voltage detection module is a comparator, the comparator is provided with a positive input end, a negative input end and a comparator output end, the positive input end is connected with the power supply module, the negative input end is connected with the reference voltage supply module, and the comparator output end is connected with the second signal transmission module.
12. A driving method, based on the display device according to any one of claims 1 to 11, comprising:
The display driving module outputs the first voltage to the initializing module in the first period; in an initialization stage in the first time period, the initialization module initializes the storage module;
the display driving module outputs the second voltage to the initializing module in the second period.
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