CN111261098B - Pixel driving circuit, driving method and display device - Google Patents

Pixel driving circuit, driving method and display device Download PDF

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Publication number
CN111261098B
CN111261098B CN202010187693.5A CN202010187693A CN111261098B CN 111261098 B CN111261098 B CN 111261098B CN 202010187693 A CN202010187693 A CN 202010187693A CN 111261098 B CN111261098 B CN 111261098B
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transistor
electrode
signal
control
control module
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CN111261098A (en
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岳晗
张粲
王灿
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BOE Technology Group Co Ltd
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BOE Technology Group Co Ltd
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    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)

Abstract

The invention provides a pixel driving circuit, a driving method and a display device, and belongs to the technical field of display. The pixel driving circuit of the present invention includes: the device comprises a current control module and a time control module; the current control module is configured to provide a driving current to the light emitting device; the time control module is configured to control the light emitting time of the light emitting device through a time modulation signal and a slope voltage signal in response to a time control signal; the pixel driving circuit further includes: a voltage control module; the voltage control module is configured to respond to a control voltage signal and input the control voltage signal to the time control module when the time control module is in a non-working state so as to control the time control module to be in the non-working state, wherein the amplitude of the control voltage signal is smaller than that of a non-working level signal of the time control module.

Description

Pixel driving circuit, driving method and display device
Technical Field
The invention belongs to the technical field of display, and particularly relates to a pixel driving circuit, a driving method and a display device.
Background
Light Emitting Diodes (LEDs) have been widely used in the display field due to their advantages of high brightness and high reliability. In the pixel driving circuit in the prior art, the full gray scale display of the light emitting diode is generally controlled by the current control module and the time control module together, and the transistor in the current control module and the transistor in the time control module need to be subjected to threshold compensation. In the light emitting stage, the control voltage in the time control module is linearly increased along with time to control the turn-on degree of the transistor, so that the control of the light emitting time of the light emitting diode is realized.
The inventor finds that at least the following problems exist in the prior art: due to the fact that the control voltage is continuously increased, even if the time control module is in a non-working state, the transistor in the time control module can be partially turned on, and therefore small driving current is provided for the light emitting diode, and the light emitting diode is weak in light emitting. Thus, it is easy to affect the precise control of each gray level, especially the low gray level. And the light emitting diode is easy to cause weak light emission under low current density for a long time, and problems such as color cast and the like can be caused.
Disclosure of Invention
The present invention is directed to at least one of the technical problems in the prior art, and provides a pixel driving circuit, a driving method and a display device.
The technical scheme adopted for solving the technical problem of the invention is a pixel driving circuit, which comprises: the device comprises a current control module and a time control module; the current control module is configured to provide a driving current to the light emitting device; the time control module is configured to control a light emitting time of the light emitting device by a time modulation signal and a slope voltage signal in response to a time control signal; the pixel driving circuit further includes: a voltage control module;
the voltage control module is configured to input a control voltage signal to the time control module in response to a control voltage signal to control the time control module to be in a non-operating state when the time control module is in the non-operating state, wherein an amplitude of the control voltage signal is smaller than an amplitude of a non-operating level signal that is the time control module.
Optionally, the voltage control module comprises: a fourteenth transistor;
and a control electrode of the fourteenth transistor is connected with a control voltage end, a first electrode of the fourteenth transistor is connected with the control voltage end, and a second electrode of the fourteenth transistor is connected with the time control module.
Optionally, the current control module comprises: a first transistor, a second transistor, a seventh transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a second capacitor;
the first transistor is configured to transmit a data signal in response to a scan signal;
the second transistor is configured to compensate for a threshold voltage of the seventh transistor in response to a scan signal;
the seventh transistor is configured to generate a driving current in response to the data signal transmitted by the first transistor;
the second capacitor is configured to store a data signal transmitted to the seventh transistor;
the ninth transistor is configured to reset the data signal stored to the second capacitance by a first initial signal in response to a first reset signal;
the tenth transistor is configured to supply a power supply voltage to the seventh transistor in response to a light emission control signal;
the eleventh transistor is configured to supply a driving current to the light emitting device in response to a light emission control signal.
Optionally, the control terminal of the first transistor is connected to a scan signal terminal, the first pole is connected to a data signal terminal, and the second pole is connected to the second pole of the tenth transistor and the first pole of the seventh transistor;
a control electrode of the second transistor is connected with a scanning signal end, a first electrode of the second transistor is connected with a second electrode of the seventh transistor, and a second electrode of the second transistor is connected with a second electrode of the ninth transistor, the other end of the second capacitor and a control electrode of the seventh transistor;
the seventh transistor has a control electrode connected to the second electrode of the second transistor, the second electrode of the ninth transistor, and the other end of the second capacitor, a first electrode connected to the second electrode of the first transistor and the second electrode of the tenth transistor, and a second electrode connected to the first electrode of the second transistor and the first electrode of the eleventh transistor;
a control electrode of the ninth transistor is connected with a first reset signal end, a first electrode of the ninth transistor is connected with an initial signal end, and a second electrode of the ninth transistor is connected with a second electrode of the second transistor, a control electrode of the seventh transistor and the other end of the second capacitor;
a control electrode of the tenth transistor is connected with a light-emitting control signal end, a first electrode of the tenth transistor is connected with a first power supply voltage end, and a second electrode of the tenth transistor is connected with a second electrode of the first transistor and a first electrode of the seventh transistor;
a control electrode of the eleventh transistor is connected with a light-emitting control signal end, a first electrode of the eleventh transistor is connected with a first electrode of the second transistor and a second electrode of the seventh transistor, and a second electrode of the eleventh transistor is connected with the time control module;
one end of the second capacitor is connected with a first power supply voltage end, and the other end of the second capacitor is connected with the second pole of the second transistor, the control pole of the seventh transistor and the second pole of the ninth transistor.
Optionally, the time control module includes: a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, an eighth transistor, a twelfth transistor, a thirteenth transistor, a fourteenth transistor, a fifteenth transistor, and a first capacitor;
the eighth transistor is configured to transmit a reference voltage signal in response to a time control signal;
the third transistor is configured to compensate for a threshold voltage of the fourth transistor in response to a time control signal;
the sixth transistor is configured to transmit a time modulation signal in response to a time control signal;
the fifteenth transistor is configured to transmit a slope voltage signal in response to a light emission control signal;
the fourth transistor is configured to control a light emitting time of the light emitting device in response to the time modulation signal transmitted by the sixth transistor and the slope voltage signal transmitted by the fifteenth transistor;
the first capacitor is configured to store a time modulated signal and a slope voltage signal transmitted to the fourth transistor;
the fifth transistor and the thirteenth transistor are configured to reset the time modulation signal and the slope voltage signal stored to the first capacitance by a second initial signal in response to a second reset signal;
the twelfth transistor is configured to supply a driving current to the light emitting device in response to the light emission control signal.
Optionally, a control electrode of the third transistor is connected to a time control signal terminal, a first electrode of the third transistor is connected to a second electrode of the fourth transistor and a first electrode of the twelfth transistor, and a second electrode of the third transistor is connected to a second electrode of the fifth transistor, the other end of the first capacitor, a control electrode of the fourth transistor, and the voltage control module;
a control electrode of the fourth transistor is connected with the voltage control module, the other end of the first capacitor, a second electrode of the third transistor and a second electrode of the fifth transistor, a first electrode of the fourth transistor is connected with the current control module and a second electrode of the eighth transistor, and a second electrode of the fourth transistor is connected with a first electrode of the third transistor and a first electrode of the twelfth transistor;
a control electrode of the fifth transistor is connected with a second reset signal end and a control electrode of the thirteenth transistor, a first electrode of the fifth transistor is connected with a second electrode of the thirteenth transistor, and a second electrode of the fifth transistor is connected with the second electrode of the third transistor, the other end of the first capacitor, a control electrode of the fourth transistor and the voltage control module;
the control of the sixth transistor is connected with a time control signal end, a first pole is connected with a time modulation signal end and a second pole of the fifteenth transistor, and the second pole is connected with one end of the first capacitor;
a control electrode of the eighth transistor is connected with a time control signal end, a first electrode of the eighth transistor is connected with a reference voltage signal end, and a second electrode of the eighth transistor is connected with the current control module and a first electrode of the fourth transistor;
a control electrode of the twelfth transistor is connected with a light-emitting control signal end, a first electrode of the twelfth transistor is connected with a first electrode of the third transistor and a second electrode of the fourth transistor, and the second electrode of the twelfth transistor is connected with the light-emitting device;
a control electrode of the thirteenth transistor is connected with a second reset signal end and a control electrode of the fifth transistor, a first electrode of the thirteenth transistor is connected with a second initial signal end, and a second electrode of the thirteenth transistor is connected with a first electrode of the fifth transistor;
and a control electrode of the fifteenth transistor is connected with a light-emitting control signal end, a first electrode of the fifteenth transistor is connected with a slope voltage signal end, and a second electrode of the fifteenth transistor is connected with a time modulation signal end and a first electrode of the sixth transistor.
Optionally, the light emitting device comprises a micro light emitting diode;
the first pole of the light emitting diode is connected with the time control module, and the second pole of the light emitting diode is connected with the second power supply voltage end.
Optionally, the polarity of the fourth transistor and the fourteenth transistor is opposite.
The technical solution to solve the technical problem of the present invention is a display device, including the pixel driving circuit provided as above.
The technical scheme adopted for solving the technical problem of the invention is a driving method of a pixel driving circuit, which comprises the following steps:
responding to the data signal, the current control module provides a driving current, and responding to the time modulation signal and the slope voltage signal, the time control module is in a working state, so that the light-emitting device emits light;
in response to the control voltage signal provided by the voltage control module, the time control module is in a non-working state, so that the light-emitting device stops emitting light.
Drawings
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention;
fig. 2 is a timing diagram of a pixel driving circuit according to an embodiment of the invention;
FIG. 3a is a schematic diagram illustrating a variation of a driving current in a pixel driving circuit in the prior art;
fig. 3b is a schematic diagram of a variation of a driving current in the pixel driving circuit according to the present invention;
fig. 4 is a flowchart illustrating a driving method of a pixel driving circuit according to an embodiment of the invention.
Detailed Description
In order to make the technical solutions of the present invention better understood, the present invention will be described in further detail with reference to the accompanying drawings and specific embodiments.
Unless otherwise defined, technical or scientific terms used herein shall have the ordinary meaning as understood by one of ordinary skill in the art to which this disclosure belongs. The use of "first," "second," and similar terms in this disclosure is not intended to indicate any order, quantity, or importance, but rather is used to distinguish one element from another. Also, the use of the terms "a," "an," or "the" and similar referents do not denote a limitation of quantity, but rather denote the presence of at least one. The word "comprising" or "comprises", and the like, means that the element or item listed before the word covers the element or item listed after the word and its equivalents, but does not exclude other elements or items. The terms "connected" or "coupled" and the like are not restricted to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "upper", "lower", "left", "right", and the like are used merely to indicate relative positional relationships, and when the absolute position of the object being described is changed, the relative positional relationships may also be changed accordingly.
The transistors used in the embodiments of the present invention may be thin film transistors or field effect transistors or other devices with the same characteristics, and since the source and the drain of the transistors used are symmetrical, there is no difference between the source and the drain. In the embodiment of the present invention, to distinguish the source and the drain of the transistor, one of the poles is referred to as a first pole, the other pole is referred to as a second pole, and the gate is referred to as a control pole. In addition, the transistors can be divided into N-type and P-type according to the characteristics of the transistors, in the following embodiment, the fourteenth transistor M14 is an N-type transistor, and other transistors are all P-type transistors, when a P-type transistor is adopted, the first transistor is the source of the P-type transistor, the second transistor is the drain of the P-type transistor, and when a low level is input to the gate, the source and drain are turned on; when an N-type transistor is adopted, the first electrode is the source electrode of the N-type transistor, the second electrode is the drain electrode of the N-type transistor, and when the grid electrode inputs a high level, the source electrode and the drain electrode are conducted.
It should be noted that, in the embodiment of the present invention, when the transistor is a P-type transistor, the operating level refers to an active level for turning on the P-type transistor, that is, a low level, and the non-operating level refers to a high level. When the transistor is an N-type transistor, the operating level is an active level for turning on the N-type transistor, i.e., a high level, and the non-operating level is a low level. The control voltage signal in the embodiment of the invention is a working level, namely a fixed high level signal.
In the embodiment of the present invention, the Light Emitting device D is a current type Light Emitting device, and further, may be a current type Light Emitting Diode, such as a Micro Light Emitting Diode (Micro LED) or a Mini Light Emitting Diode (Mini LED) or an Organic Light Emitting Diode (OLED). The first and second poles of the light emitting device D are the anode and cathode of the light emitting diode, respectively.
Example one
Fig. 1 is a schematic structural diagram of a pixel driving circuit according to an embodiment of the present invention, and as shown in fig. 1, the pixel driving circuit includes: a current control module 101 and a time control module 102; the current control module 101 is configured to supply a driving current to the light emitting device D; the time control module 102 is configured to control a light emitting time of the light emitting device D by a time modulation signal and a slope voltage signal in response to a time control signal; the pixel driving circuit further includes: a voltage control module 103; the voltage control module 103 is configured to input a control voltage signal to the time control module 102 in response to a control voltage signal to control the time control module 102 to be in a non-operating state when the time control module 102 is in the non-operating state, wherein the magnitude of the control voltage signal is smaller than that of a high level signal which is the time control module 102.
In the pixel driving circuit provided in the embodiment of the present invention, in the light emitting stage, the current control module 101 provides a driving current for the light emitting device D in response to the data signal, and the time control module 102 controls the light emitting time of the light emitting device D in response to the time modulation signal and the slope voltage signal. When the potential of the slope voltage signal reaches the first preset value, the transistor in the time control module 102 may be turned off, so that the time control module 102 is in a non-operating state, the light emitting device D stops emitting light, and the time for displaying a frame is not necessarily over. However, during the display time of one frame, the slope voltage signal may be continuously input even when the light emitting device D stops emitting light when the time control module 102 is in the non-operating state. When the potential of the slope voltage signal reaches the second preset value, the second preset value may be equal to or greater than the high-level potential for controlling the transistor to turn off, so that the transistor that should be in the off state may be partially turned on, which may cause the time control module 102 to be in the operating state, and further cause the light emitting device D to emit light weakly. At this time, the voltage control module 103 may input a control voltage with a fixed value to the time control module 102, where the amplitude of the control voltage with the fixed value is smaller than the amplitude of the high level signal of the time control module 102, so as to ensure that the time control module 102 is not affected by the slope voltage, and when the time control module should be in a non-operating state originally, each transistor therein may be in a completely turned-off state, thereby ensuring the normal operation of the pixel driving circuit. It can be seen that the pixel driving circuit provided by the embodiment of the invention can avoid the weak light emission of the light emitting device D, realize the accurate control of each gray scale, especially the low gray scale, and avoid the weak light emission of the light emitting device D under the low current density for a long time, thereby avoiding the problems of color cast and the like.
In some embodiments, the voltage control module 103 includes: a fourteenth transistor M14; the gate of the fourteenth transistor M14 is connected to the control voltage terminal VDD3, the source is connected to the control voltage terminal VDD3, and the drain is connected to the time control module 102.
It should be noted that, when the transistors in the timing control block 102 are in the partially turned-on state, the fourteenth transistor M14 may input the control voltage of the control voltage terminal VDD3 with a fixed value into the timing control block 102. The amplitude of the control voltage with a fixed value is smaller than the amplitude of the high level signal of the time control module 102, so that the time control module 102 is not affected by the slope voltage, and when the time control module is originally in a non-working state, each transistor in the time control module can be in a completely closed state, thereby ensuring the normal operation of the pixel driving circuit.
In some embodiments, current control module 101 comprises: a first transistor M1, a second transistor M2, a seventh transistor M7, a ninth transistor M9, a tenth transistor M10, an eleventh transistor M11, and a second capacitor C2. The first transistor M1 is configured to transmit a data signal in response to a scan signal. The second transistor M2 is configured to compensate for a threshold voltage of the seventh transistor M7 in response to the scan signal. The seventh transistor M7 is configured to generate a driving current in response to the data signal transmitted by the first transistor M1. The second capacitor M2 is configured to store a data signal transmitted to the seventh transistor M7. The ninth transistor M9 is configured to reset the data signal stored to the second capacitor C2 by a first initialization signal in response to a first reset signal. The tenth transistor M10 is configured to supply a power supply voltage to the seventh transistor M7 in response to a light emission control signal. The eleventh transistor M11 is configured to supply a driving current to the light emitting device D in response to a light emission control signal.
Specifically, the first transistor M1 has its control connected to the scan signal terminal Gate-I, its source connected to the Data signal terminal Data-I, and its drain connected to the drain of the tenth transistor M10 and the source of the seventh transistor M7. The Gate of the second transistor M2 is connected to the scan signal terminal Gate-I, the source is connected to the drain of the seventh transistor M7, and the drain is connected to the drain of the ninth transistor M9, the other end of the second capacitor C2, and the Gate of the seventh transistor M7. The seventh transistor M7 has a gate connected to the drain of the second transistor M2, the drain of the ninth transistor M9, and the other end of the second capacitor C2, a source connected to the drain of the first transistor M1 and the drain of the tenth transistor M10, and a drain connected to the source of the second transistor M2 and the source of the eleventh transistor M11. The ninth transistor M9 has a gate connected to the first reset signal terminal RST-I, a source connected to the first initialization signal terminal Init-I, and a drain connected to the drain of the second transistor M2, the gate of the seventh transistor M7, and the other end of the second capacitor C2. The tenth transistor M10 has a gate connected to the light emission control signal terminal EMC, a source connected to the first power voltage terminal VDD, and a drain connected to the drain of the first transistor M1 and the source of the seventh transistor M7. The gate of the eleventh transistor M11 is connected to the emission control signal terminal EMC, the source is connected to the source of the second transistor M2 and the drain of the seventh transistor M7, and the drain is connected to the time control module 102. One end of the second capacitor C2 is connected to the first power voltage terminal VDD, and the other end is connected to the drain of the second transistor M2, the gate of the seventh transistor M7, and the drain of the ninth transistor M9.
It should be noted that, the above only provides a specific structure of the current control module 101, and it should be understood that the current control module 101 in the embodiment of the present invention is not limited to the above structure, and may be any current control module 101 capable of generating a driving current of the light emitting device D. The specific operation of the current control module 101 will be described later in the implementation principle with reference to fig. 2.
In some embodiments, the time control module 102 includes: a third transistor M3, a fourth transistor M4, a fifth transistor M5, a sixth transistor M6, an eighth transistor M8, a twelfth transistor M12, a thirteenth transistor M13, a fourteenth transistor M14, a fifteenth transistor M15, and a first capacitor C1. The eighth transistor M8 is configured to transmit a reference voltage signal in response to the time control signal. The third transistor M3 is configured to compensate for a threshold voltage of the fourth transistor M4 in response to a time control signal. The sixth transistor M6 is configured to transmit a time modulation signal in response to the time control signal. The fifteenth transistor M15 is configured to transmit a slope voltage signal in response to a light emission control signal. The fourth transistor M4 is configured to control the light emitting time of the light emitting device D in response to the time modulation signal transmitted by the sixth transistor M6 and the slope voltage signal transmitted by the fifteenth transistor M15. The first capacitor C1 is configured to store the time modulated signal and the slope voltage signal transmitted to the fourth transistor. The fifth transistor M5 and the thirteenth transistor M13 are configured to reset the time modulation signal and the slope voltage signal stored to the first capacitor C1 by the second initialization signal Init-T in response to the second reset signal RST-T. The twelfth transistor T12 is configured to supply a driving current to the light emitting device D in response to the light emission control signal.
Specifically, the Gate of the third transistor M3 is connected to the time control signal terminal Gate-T, the source is connected to the drain of the fourth transistor M4 and the source of the twelfth transistor M12, and the drain is connected to the drain of the fifth transistor M5, the other end of the first capacitor C1, the Gate of the fourth transistor M4, and the voltage control module 103. The gate of the fourth transistor M4 is connected to the voltage control module 103, the other end of the first capacitor C1, the drain of the third transistor M3, and the drain of the fifth transistor M5, the source is connected to the current control module 101 and the drain of the eighth transistor M8, and the drain is connected to the source of the third transistor M3 and the source of the twelfth transistor M12. The gate of the fifth transistor M5 is connected to the second reset signal terminal RST-T and the gate of the thirteenth transistor M13, the source is connected to the drain of the thirteenth transistor M13, and the drain is connected to the drain of the third transistor M3, the other end of the first capacitor C1, the gate of the fourth transistor M4, and the voltage control module 103. The control of the sixth transistor M6 is connected to the time control signal terminal Gate-T, the source is connected to the time modulation signal terminal Data-T and the drain of the fifteenth transistor M15, and the drain is connected to one end of the first capacitor C1. The eighth transistor M8 has a Gate connected to the time control signal terminal Gate-T, a source connected to the reference voltage signal terminal Ref, and a drain connected to the current control module 101 and the source of the fourth transistor M4. The twelfth transistor M12 has a gate connected to the emission control signal terminal EMC, a source connected to the source of the third transistor M3 and the drain of the fourth transistor M4, and a drain connected to the light emitting device D. The thirteenth transistor M13 has a gate connected to the second reset signal terminal RST-T and the gate of the fifth transistor M5, a source connected to the second initial signal terminal Init-T, and a drain connected to the source of the fifth transistor M5. The gate of the fifteenth transistor M15 is connected to the emission control signal terminal EMC, the source is connected to the slope voltage signal terminal Ramp, and the drain is connected to the time modulation signal terminal Data-T and the source of the sixth transistor M6.
It should be noted that, only a specific structure of the time control module 102 is provided above, and it should be understood that the time control module 102 in the embodiment of the present invention is not limited to the above structure, and may be any time control module 102 capable of controlling the light emitting duration of the light emitting device D. The specific operation of the time control module 102 will be described later in the implementation principle with reference to fig. 2.
In some embodiments, the light emitting device D may include a micro light emitting diode; the anode of the led is connected to the time control module 102, and the cathode is connected to the second power voltage terminal VSS.
The micro light emitting diode may emit light by being driven by the driving current supplied from the current control module 101. And may be under the control of the time control module 102 to adjust the light emitting time.
In some embodiments, the polarity of the fourth transistor M4 and the fourteenth transistor M14 are opposite.
It is understood that the control voltage signal with a fixed value is required to ensure that the other transistors are in the off state while the fourth transistor M4 is controlled to be turned on to input the control voltage signal, and therefore, the fourth transistor M4 needs to have a polarity opposite to that of the fourteenth transistor M14, that is, opposite to that of the other transistors except for the fourth transistor M4. Specifically, the fourth transistor M4 may be an N-type transistor, and the fourteenth transistor M14 and the other transistors are P-type transistors.
Fig. 2 is a timing diagram of a pixel driving circuit according to an embodiment of the present invention, and details of a specific implementation process of the pixel driving circuit according to the embodiment of the present invention will be described with reference to fig. 2. A connection point among the second capacitor C2, the second transistor M2, the seventh transistor M7 and the ninth transistor M9 in the current control module 101 is a second node N-I; in the time control module 102, a connection point between the first capacitor C1, the third transistor M3, the fourth transistor M4 and the fifth transistor M5 is a second node N-T; a connection point between the second capacitor C2 and the sixth transistor M6 is a third node M.
In the stage S1, i.e., the reset stage of the current control module 101, the first reset signal terminal RST-I outputs a low level signal, the ninth transistor M9 is turned on, and the first node N-I is written with the initial signal to reset, so as to prepare for turning on the seventh transistor M7, which is the driving transistor in the compensation stage of the current control module 101.
In the S2 phase, i.e. the compensation phase of the current control module 101, the time control signal terminal Gate-I outputs a low level signal, the first transistor M1 and the second transistor M2 are turned on, the Data signal of the Data signal terminal Data-I is read into the pixel, and the threshold voltage Vth1 of the seventh transistor is read out. At this time, the first node N-I has the ideal potential Vdata + Vth1 and is stored in the second capacitor C2.
At the stage S3, the timing control module 102 resets the stage, the second reset signal terminal RST-T outputs a low level signal, the fifth transistor M5 and the thirteenth transistor M13 are turned on, and the second node N-T is written into the second initial signal to reset, so as to prepare for turning on the fourth transistor M4 at the compensation stage of the timing control module 102.
In the S4 stage, the time control module 102 compensates the stage, the time control signal terminal Gate-T outputs a low level signal, the third transistor M3, the sixth transistor M6 and the eighth transistor M8 are turned on, the second node N-T writes a reference voltage signal and reads the threshold voltage Vth2 of the fourth transistor, the potential of the second node N-T is Vref + Vth2, the third node M writes a time modulation signal, and the potential of the third node M is Data-T. In this way, the potentials at the second node N-T and the third node M at the two points hold the voltage difference to be constant by the charge retention principle, and V (N-T) -V (M) ═ Vref + Vth2- (Data-T), that is, V (N-T) ═ V (M) + Vref + Vth2- (Data-T).
In the S5 phase, i.e., the write phase, all data signals are written to the first node N-I and all time modulated signals are written to the second node N-T.
In a stage S6, i.e., a light emitting stage, the light emission control signal terminal EMC outputs a low level signal, the tenth transistor M10, the eleventh transistor M11, and the twelfth transistor M12 are turned on, and the light emitting device D emits light normally. The potential of the second node N-T increases as the slope voltage signal input from the slope voltage terminal Ramp increases. When V (N-T) -Vth2 is 0, Vth2 is the threshold voltage of the fourth transistor M4, the potential of the second node N-T controls the off time of the fourth transistor M4, the driving current is turned on to off, and the light emitting device D is turned on to off. That is, V (N-T) + Vref + Vth2- (Data-T) -Vth2 ═ V (m) + Vref (Data-T). This timing is not related to the threshold voltage Vth2 of the fourth transistor M4, but is related only to the potential Data-T of the Data signal. And the voltage difference between the two ends of the first capacitor C1 is different due to the difference of the potentials Data-T of the Data signals, as shown in fig. 2, the difference of the two differences of the delta v1 and the delta v2 causes the difference of the light emitting time T1 and T2, thereby controlling the difference of the light emitting time and realizing the display of different gray scales. In this control mode, the emission control signal terminal EMC outputs a low level signal, and when the light emitting device D is controlled to emit light, the time modulation signal terminal Gate-T outputs a high level signal, and the third transistor M3 is turned off. However, when the potential of the second node N-T increases to be equal to the high level signal of the timing control signal, the third transistor M3 starts to turn on, causing the driving current to increase to N amperes (a) here and the light emitting device D to emit light weakly. At this time, the light emitting device D should be in the off state, and the on of the third transistor M3 may result in the dark state not being dark. Particularly, when the light emission time is short, the potential of the second node N-T is high. At this time, when the potential of the second node N-T is higher than VDD3-Vth2, the fourteenth transistor M14 is turned on, and the control voltage VDD3 having a fixed value is written into the second node N-T. Therefore, the potential of the second node N-T can be kept at VDD3-Vth 2. And VDD3 is less than the high level output from the time control signal terminal so that the potential of the second node N-T is not higher than the turn-on voltage of the third transistor M3. The third transistor M3 will not be turned on, ensuring the normal operation of the pixel driving circuit.
Fig. 3a is a schematic diagram of a change in a driving current in a pixel driving circuit in the prior art, and fig. 3b is a schematic diagram of a change in a driving current in a pixel driving circuit provided by the present invention, as shown in fig. 3a and fig. 3b, it can be seen that, in a pixel driving circuit provided by an embodiment of the present invention, a potential of a second node N-T can be maintained at VDD3-Vth2 by a fourteenth transistor M14. And VDD3 is less than the high level output from the time control signal terminal so that the potential of the second node N-T is not higher than the turn-on voltage of the third transistor M3. The third transistor M3 can not be opened, the drive current can not tilt, and the normal operation of the pixel drive circuit is ensured, so that the accurate control of gray scale is ensured, the display contrast can be improved, and the display effect is improved.
Example two
Based on the same inventive concept, embodiments of the present invention provide a display device including the pixel driving circuit provided as the above embodiments. The display device can be a mobile phone, an intelligent television, a tablet personal computer and other equipment. The implementation principle of the pixel driving circuit is similar to that of the pixel driving circuit provided in the above embodiments, and is not described herein again.
EXAMPLE III
Fig. 4 is a schematic flowchart of a driving method of a pixel driving circuit according to an embodiment of the present invention, and as shown in fig. 4, the driving method of the pixel driving circuit includes the following steps:
s401, responding to the data signal, the current control module provides a driving current, and responding to the time modulation signal and the slope voltage signal, the time control module is in a working state, so that the light-emitting device emits light.
And S402, responding to the control voltage signal provided by the voltage control module, and enabling the time control module to be in a non-working state, so that the light-emitting device stops emitting light.
In the driving method of the pixel driving circuit provided by the embodiment of the invention, the voltage control module can be used for inputting the control voltage signal with a fixed value to the time control module, and the time control module is controlled to be in a non-working state, so that the driving current cannot tilt, the normal operation of the pixel driving circuit is ensured, the accurate control of the gray scale is ensured, the display contrast is improved, and the display effect is improved.
It will be understood that the above embodiments are merely exemplary embodiments taken to illustrate the principles of the present invention, which is not limited thereto. It will be apparent to those skilled in the art that various modifications and improvements can be made without departing from the spirit and substance of the invention, and these modifications and improvements are also considered to be within the scope of the invention.

Claims (10)

1. A pixel driving circuit, the pixel driving circuit comprising: the device comprises a current control module and a time control module; the current control module is configured to provide a driving current to the light emitting device; the time control module is configured to control a light emitting time of the light emitting device by a time modulation signal and a slope voltage signal in response to a time control signal; characterized in that, the pixel driving circuit further comprises: a voltage control module;
the voltage control module is configured to respond to a control voltage signal when the time control module is in a non-working state so as to input the control voltage signal to the time control module to control the time control module to be in the non-working state, wherein the amplitude of the control voltage signal is smaller than that of a non-working level signal of the time control module.
2. The pixel driving circuit according to claim 1, wherein the voltage control module comprises: a fourteenth transistor;
and a control electrode of the fourteenth transistor is connected with a control voltage end, a first electrode of the fourteenth transistor is connected with the control voltage end, and a second electrode of the fourteenth transistor is connected with the time control module.
3. The pixel driving circuit according to claim 1, wherein the current control module comprises: a first transistor, a second transistor, a seventh transistor, a ninth transistor, a tenth transistor, an eleventh transistor, and a second capacitor;
the first transistor is configured to transmit a data signal in response to a scan signal;
the second transistor is configured to compensate for a threshold voltage of the seventh transistor in response to a scan signal;
the seventh transistor is configured to generate a driving current in response to the data signal transmitted by the first transistor;
the second capacitor is configured to store a data signal transmitted to the seventh transistor;
the ninth transistor is configured to reset the data signal stored to the second capacitance by a first initial signal in response to a first reset signal;
the tenth transistor is configured to supply a power supply voltage to the seventh transistor in response to a light emission control signal;
the eleventh transistor is configured to supply a driving current to the light emitting device in response to a light emission control signal.
4. The pixel driving circuit according to claim 3, wherein the control terminal of the first transistor is connected to a scan signal terminal, the first terminal thereof is connected to a data signal terminal, and the second terminal thereof is connected to the second terminal of the tenth transistor and the first terminal of the seventh transistor;
a control electrode of the second transistor is connected with a scanning signal end, a first electrode of the second transistor is connected with a second electrode of the seventh transistor, and a second electrode of the second transistor is connected with a second electrode of the ninth transistor, the other end of the second capacitor and a control electrode of the seventh transistor;
the seventh transistor has a control electrode connected to the second electrode of the second transistor, the second electrode of the ninth transistor, and the other end of the second capacitor, a first electrode connected to the second electrode of the first transistor and the second electrode of the tenth transistor, and a second electrode connected to the first electrode of the second transistor and the first electrode of the eleventh transistor;
a control electrode of the ninth transistor is connected with a first reset signal end, a first electrode of the ninth transistor is connected with an initial signal end, and a second electrode of the ninth transistor is connected with a second electrode of the second transistor, a control electrode of the seventh transistor and the other end of the second capacitor;
a control electrode of the tenth transistor is connected with a light-emitting control signal end, a first electrode of the tenth transistor is connected with a first power supply voltage end, and a second electrode of the tenth transistor is connected with a second electrode of the first transistor and a first electrode of the seventh transistor;
a control electrode of the eleventh transistor is connected with a light-emitting control signal end, a first electrode of the eleventh transistor is connected with a first electrode of the second transistor and a second electrode of the seventh transistor, and a second electrode of the eleventh transistor is connected with the time control module;
one end of the second capacitor is connected with a first power supply voltage end, and the other end of the second capacitor is connected with the second pole of the second transistor, the control pole of the seventh transistor and the second pole of the ninth transistor.
5. The pixel driving circuit according to claim 2, wherein the time control module comprises: a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, an eighth transistor, a twelfth transistor, a thirteenth transistor, a fifteenth transistor, and a first capacitor;
the eighth transistor is configured to transmit a reference voltage signal in response to a time control signal;
the third transistor is configured to compensate for a threshold voltage of the fourth transistor in response to a time control signal;
the sixth transistor is configured to transmit a time modulation signal in response to a time control signal;
the fifteenth transistor is configured to transmit a slope voltage signal in response to a light emission control signal;
the fourth transistor is configured to control a light emitting time of the light emitting device in response to the time modulation signal transmitted by the sixth transistor and the slope voltage signal transmitted by the fifteenth transistor;
the first capacitor is configured to store a time modulated signal and a slope voltage signal transmitted to the fourth transistor;
the fifth transistor and the thirteenth transistor are configured to reset the time modulation signal and the slope voltage signal stored to the first capacitance by a second initial signal in response to a second reset signal;
the twelfth transistor is configured to supply a driving current to the light emitting device in response to the light emission control signal.
6. The pixel driving circuit according to claim 5,
a control electrode of the third transistor is connected with a time control signal end, a first electrode of the third transistor is connected with a second electrode of the fourth transistor and a first electrode of the twelfth transistor, and a second electrode of the third transistor is connected with a second electrode of the fifth transistor, the other end of the first capacitor, a control electrode of the fourth transistor and the voltage control module;
a control electrode of the fourth transistor is connected with the voltage control module, the other end of the first capacitor, a second electrode of the third transistor and a second electrode of the fifth transistor, a first electrode of the fourth transistor is connected with the current control module and a second electrode of the eighth transistor, and a second electrode of the fourth transistor is connected with a first electrode of the third transistor and a first electrode of the twelfth transistor;
a control electrode of the fifth transistor is connected with a second reset signal end and a control electrode of the thirteenth transistor, a first electrode of the fifth transistor is connected with a second electrode of the thirteenth transistor, and a second electrode of the fifth transistor is connected with the second electrode of the third transistor, the other end of the first capacitor, a control electrode of the fourth transistor and the voltage control module;
the control of the sixth transistor is connected with a time control signal end, a first pole is connected with a time modulation signal end and a second pole of the fifteenth transistor, and the second pole is connected with one end of the first capacitor;
a control electrode of the eighth transistor is connected with a time control signal end, a first electrode of the eighth transistor is connected with a reference voltage signal end, and a second electrode of the eighth transistor is connected with the current control module and a first electrode of the fourth transistor;
a control electrode of the twelfth transistor is connected with a light-emitting control signal end, a first electrode of the twelfth transistor is connected with a first electrode of the third transistor and a second electrode of the fourth transistor, and the second electrode of the twelfth transistor is connected with the light-emitting device;
a control electrode of the thirteenth transistor is connected with a second reset signal end and a control electrode of the fifth transistor, a first electrode of the thirteenth transistor is connected with a second initial signal end, and a second electrode of the thirteenth transistor is connected with a first electrode of the fifth transistor;
and a control electrode of the fifteenth transistor is connected with a light-emitting control signal end, a first electrode of the fifteenth transistor is connected with a slope voltage signal end, and a second electrode of the fifteenth transistor is connected with a time modulation signal end and a first electrode of the sixth transistor.
7. The pixel driving circuit according to claim 1, wherein the light emitting device comprises a micro light emitting diode;
the first pole of the light emitting diode is connected with the time control module, and the second pole of the light emitting diode is connected with the second power supply voltage end.
8. The pixel driving circuit according to claim 6, wherein the polarity of the fourth transistor is opposite to that of the fourteenth transistor.
9. A display device comprising the pixel drive circuit according to any one of claims 1 to 8.
10. A driving method of a pixel driving circuit, comprising:
responding to the data signal, the current control module provides a driving current, and responding to the time modulation signal and the slope voltage signal, the time control module is in a working state, so that the light-emitting device emits light;
in response to the control voltage signal provided by the voltage control module, the time control module is in a non-working state, so that the light-emitting device stops emitting light.
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