CN109903727B - Digital drive pixel circuit, display panel and display device - Google Patents
Digital drive pixel circuit, display panel and display device Download PDFInfo
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- CN109903727B CN109903727B CN201910324220.2A CN201910324220A CN109903727B CN 109903727 B CN109903727 B CN 109903727B CN 201910324220 A CN201910324220 A CN 201910324220A CN 109903727 B CN109903727 B CN 109903727B
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Abstract
The embodiment of the invention discloses a digital driving pixel circuit, a display panel and a display device, wherein the digital driving pixel circuit comprises: the device comprises a data writing module, a storage module, a driving module, a light emitting module and a false light emitting suppression module; the driving module is used for being switched on or switched off according to the voltage of the control end of the driving module and driving the light-emitting module to emit light when the driving module is switched on; the false light emission suppression module comprises a control end, a first end and a second end, the first end of the false light emission suppression module is electrically connected with the first end of the light emitting module, the second end of the false light emission suppression module is electrically connected with the second end of the light emitting module, and the control end of the false light emission suppression module is used for inputting a control signal, so that the first end and the second end of the false light emission suppression module are conducted when the driving module is turned off, and further, when the driving module is turned off, the potentials at the two ends of the light emitting device are the same, so that the light emitting device is completely turned off, therefore, the light emitting time corresponding to each display gray scale can be accurately controlled, and a good display effect is ensured.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a digital driving pixel circuit, a display panel and a display device.
Background
In recent years, the development of display technology is rapid, and the driving of display devices is a hot issue in research and development.
In the related art, driving of the display device includes analog driving and digital driving. Compared with analog driving, digital driving has the advantages of low power consumption, difficult signal interference, high tolerance on the consistency of driving devices and the like. However, in the digital driving pixel circuit, the light emitting device emits light when the pixel is in an off state, which affects the display effect of the display device.
Disclosure of Invention
The invention provides a digital driving pixel circuit, a display panel and a display device, which are used for keeping a light-emitting device not to emit light when a pixel is in a closed state and ensuring a good display effect of the display device.
In a first aspect, an embodiment of the present invention provides a digitally driven pixel circuit, including: the device comprises a data writing module, a storage module, a driving module, a light emitting module and a false light emitting suppression module;
the data writing module is used for writing data voltage into the control end of the driving module; the storage module is used for storing the voltage of the control end of the drive module;
the driving module is used for being switched on or switched off according to the voltage of the control end of the driving module and driving the light-emitting module to emit light when the driving module is switched on;
the false light emission suppression module comprises a control end, a first end and a second end, the first end of the false light emission suppression module is electrically connected with the first end of the light emitting module, the second end of the false light emission suppression module is electrically connected with the second end of the light emitting module, and the control end of the false light emission suppression module is used for inputting a control signal, so that the first end and the second end of the false light emission suppression module are conducted when the driving module is turned off, and further, when the driving module is turned off, the potentials at the two ends of the light emitting device are the same, so that the light emitting device is completely turned off, therefore, the light emitting time corresponding to each display gray scale can be accurately controlled, and a good display effect is ensured.
The control end of the data writing module is electrically connected with the scanning signal input end of the digital driving pixel circuit, the first end of the data writing module is electrically connected with the data signal input end of the digital driving pixel circuit, and the second end of the data writing module is electrically connected with the control end of the driving module;
the first end of the driving module is electrically connected with the first voltage signal input end of the digital driving pixel circuit, the second end of the driving module is electrically connected with the first end of the light-emitting module, and the second end of the light-emitting module is electrically connected with the second voltage signal input end of the pixel circuit;
the first end of the storage module is electrically connected with the control end of the driving module, and the second end of the storage module is electrically connected with the first end of the driving module.
The data writing module comprises a first transistor, the driving module comprises a second transistor, the false light emission suppression module comprises a third transistor, the storage module comprises a first capacitor, and the light emitting module comprises an organic light emitting device;
the grid electrode of the first transistor is used as the control end of the data writing module, the first pole of the first transistor is used as the first end of the data writing module, and the second pole of the first transistor is used as the second end of the data writing module;
the grid electrode of the second transistor is used as the control end of the driving module, the first pole of the second transistor is used as the first end of the driving module, and the second pole of the second transistor is used as the second end of the driving module;
the grid electrode of the third transistor is used as the control end of the false light emission suppression module, the first pole of the third transistor is used as the first end of the false light emission suppression module, and the second pole of the third transistor is used as the second end of the false light emission suppression module;
two pole plates of the first capacitor are respectively used as a first end and a second end of the storage module;
the anode of the organic light emitting device serves as a first end of the light emitting module, and the cathode of the organic light emitting device serves as a second end of the light emitting module.
The channel types of the second transistor and the third transistor are different; the grid electrode of the third transistor is electrically connected with the grid electrode of the second transistor, so that the grid electrode of the third transistor does not need to be connected with a separate control line, the number of wiring lines is not increased for a display panel comprising the digital driving pixel circuit, and the high pixel density is favorably realized.
The grid electrode of the third transistor is electrically connected with the first control signal input end of the digital driving pixel circuit, so that the third transistor can be controlled more conveniently and effectively.
The channel types of the second transistor and the third transistor are the same, so that the preparation process is simplified when the thin film transistor in the digital driving pixel circuit is prepared.
The digital driving pixel circuit further comprises a light emitting control module, the light emitting control module comprises a control end, a first end and a second end, the control end of the light emitting control module is used for inputting light emitting control signals, the first end of the light emitting control module is electrically connected with the second end of the driving module, the second end of the light emitting control module is electrically connected with the first end of the light emitting module, and therefore control over the light emitting module is facilitated.
The light-emitting control module comprises a fourth transistor, a grid electrode of the fourth transistor is used as a control end of the light-emitting control module, a first pole of the fourth transistor is used as a first end of the light-emitting control module, and a second pole of the fourth transistor is used as a second end of the light-emitting control module.
In a second aspect, an embodiment of the present invention further provides a display panel, including the digital driving pixel circuit provided in the first aspect, where the digital driving pixel circuit includes a scan signal input terminal and a data signal input terminal, the display panel further includes a scan driving circuit, a data driving circuit, a plurality of scan lines, and a plurality of data lines, a port of the scan driving circuit is electrically connected to the plurality of scan lines, a scan signal input terminal of the digital driving pixel circuit is electrically connected to one scan line, and a data signal input terminal of the digital driving pixel circuit is electrically connected to one data line. The display panel comprises a digital driving pixel circuit provided by the first aspect, wherein the digital driving pixel circuit comprises a data writing module, a storage module, a driving module, a light emitting module and a false light emission suppression module, the false light emission suppression module comprises a control end, a first end and a second end, the first end of the false light emission suppression module is electrically connected with the first end of the light emitting module, the second end of the false light emission suppression module is electrically connected with the second end of the light emitting module, and a control signal is input through the control end of the false light emission suppression module, so that the first end and the second end of the false light emission suppression module are conducted when the driving module is turned off, the potentials at the two ends of the light emitting device are the same when the driving module is turned off, the light emitting device is completely turned off, the light emitting duration corresponding to each display gray scale can be accurately controlled, and a good display effect is ensured.
In a third aspect, an embodiment of the present invention further provides a display device, including the display panel provided in the second aspect.
The embodiment provides a digital driving pixel circuit, a display panel and a display device, wherein the digital driving pixel circuit comprises a false light emission suppression module, the false light emission suppression module comprises a control end, a first end and a second end, the first end of the false light emission suppression module is electrically connected with the first end of a light emitting module, the second end of the false light emission suppression module is electrically connected with the second end of the light emitting module, a control signal is input through the control end of the false light emission suppression module, so that the first end and the second end of the false light emission suppression module are conducted when the driving module is turned off, potentials at two ends of a light emitting device are the same when the driving module is turned off, the light emitting device is completely turned off, light emission cannot be caused by leakage current in the pixel circuit, and further, the light emission duration of the light emitting device can be accurately controlled, and therefore, the light emission duration corresponding to each display gray scale can be accurately, and ensuring good display effect.
Drawings
FIG. 1 is a schematic diagram of a digitally driven pixel circuit according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of another digitally driven pixel circuit according to an embodiment of the present invention;
FIG. 3 is a timing diagram illustrating operation of the digitally driven pixel circuit within a sub-frame, according to an embodiment of the present invention;
FIG. 4 is a timing diagram illustrating another operation of the digitally driven pixel circuit within a sub-frame according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention;
FIG. 6 is a timing diagram illustrating another operation of the digitally driven pixel circuit within a sub-frame, according to an embodiment of the present invention;
FIG. 7 is a timing diagram illustrating another operation of the digitally driven pixel circuit within a sub-frame, according to an embodiment of the present invention;
FIG. 8 is a schematic diagram of another digitally driven pixel circuit according to an embodiment of the present invention;
FIG. 9 is a schematic diagram of another digitally driven pixel circuit according to an embodiment of the present invention;
FIG. 10 is a schematic diagram of another digitally driven pixel circuit according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a display panel according to an embodiment of the present invention;
fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
As described in the background art, the digital driving pixel circuit has a problem that the display effect is affected by the light emission of the light emitting device when the pixel is in the off state. The inventor has found that the reason for such a problem is that, in the conventional digital driving pixel circuit, the driving transistor and the switching transistor are usually manufactured by LTPS process, and the leakage current is large, so that the light emitting device cannot be completely turned off to emit light when the driving transistor is in an off state. The digital driving pixel circuit controls the display gray scale by controlling the light emitting time of the light emitting device, the light emitting time is controlled by the on and off time of the driving transistor, and the light emitting time of the light emitting device cannot be accurately controlled due to the fact that the light emitting device cannot be completely turned off and emits light due to large leakage current when the driving transistor is in an off state, so that the light emitting time corresponding to each display gray scale cannot be accurately controlled, and the display effect is poor.
To solve the above problem, an embodiment of the present invention provides a digitally driven pixel circuit, and fig. 1 is a schematic structural diagram of the digitally driven pixel circuit provided by the embodiment of the present invention, and referring to fig. 1, the digitally driven pixel circuit includes: the data writing module 110, the storage module 120, the driving module 130, the light emitting module 140 and the false light emission suppressing module 150;
the data writing module 110 is configured to write a data voltage to the control terminal G2 of the driving module 130; the storage module 120 is used for storing the voltage of the control terminal G2 of the driving module 130;
the driving module 130 is used for being turned on or off according to the voltage of the control terminal G2 of the driving module 130, and driving the light emitting module 140 to emit light when being turned on;
the false light emission suppression module 150 includes a control terminal G3, a first terminal and a second terminal, the first terminal of the false light emission suppression module 150 is electrically connected to the first terminal of the light emitting module 140, the second terminal of the false light emission suppression module 150 is electrically connected to the second terminal of the light emitting module 140, and the control terminal G3 of the false light emission suppression module 150 is used for inputting a control signal, so that the first terminal and the second terminal of the false light emission suppression module 150 are turned on when the driving module 130 is turned off.
Compared with the analog driving, each gray scale corresponds to one data voltage, namely one data voltage corresponds to one light emitting brightness of the light emitting module. The working state of the light-emitting device in the digital driving pixel circuit only comprises a bright state and a dark state, and the light-emitting brightness in the bright state is consistent. The working time sequence of the digital driving pixel circuit comprises a digital 1 state time sequence and a digital 0 state time sequence, wherein the digital 1 state time sequence corresponds to a bright state of the light-emitting module, and the digital 0 state time sequence corresponds to a dark state of the light-emitting module. The digitally driven pixel circuit controls the duration of the light emission (i.e., the duration of the bright state and the dark state) of the light emitting module 140 to achieve gray scale control.
In the digital driving pixel circuit provided in this embodiment, the first end and the second end of the mis-emission suppression module 150 are electrically connected to the first end and the second end of the light emitting module 140, respectively, the mis-emission suppression module 150 is turned on when the driving module 130 is turned off under the control of the control signal input by the control terminal G3, so that when the driving module 130 is turned off, the potentials of the first end and the second end of the light emitting module 140 are equal, so that the light emitting module 140 is completely turned off and does not emit light, thereby achieving reliable control of the light emitting module 140, and ensuring that when the driving module 130 is turned off, the light emitting module 140 does not emit light due to the existence of the leakage current in the pixel circuit, thereby precisely controlling the light emitting duration corresponding to each display gray scale, and ensuring a good display effect.
The digital driving pixel circuit provided by the embodiment comprises a data writing module, a storage module, a driving module, a light emitting module and a false light emission suppression module, wherein the false light emission suppression module comprises a control end, a first end and a second end, the first end of the false light emission suppression module is electrically connected with the first end of the light emitting module, the second end of the false light emission suppression module is electrically connected with the second end of the light emitting module, a control signal is input through the control end of the false light emission suppression module, so that the first end and the second end of the false light emission suppression module are conducted when the driving module is turned off, potentials at two ends of the light emitting device are the same when the driving module is turned off, and the light emitting device is completely turned off, so that the light emitting time corresponding to each display gray scale can be accurately controlled, and a good display effect is ensured.
The technical solutions in the embodiments of the present invention are clearly and completely described below with reference to the drawings in the embodiments, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the protection scope of the present invention.
With continued reference to fig. 1, the control terminal G1 of the Data writing module 110 is electrically connected to the Scan signal input terminal Scan of the digitally driven pixel circuit, the first terminal of the Data writing module 110 is electrically connected to the Data signal input terminal Data of the digitally driven pixel circuit, and the second terminal of the Data writing module 110 is electrically connected to the control terminal G2 of the driving module 130;
a first end of the driving module 130 is electrically connected to a first voltage signal input terminal Vdd of the digital driving pixel circuit, a second end of the driving module 130 is electrically connected to a first end of the light emitting module 140, and a second end of the light emitting module 140 is electrically connected to a second voltage signal input terminal Vss of the pixel circuit;
the first terminal of the memory module 120 is electrically connected to the control terminal G2 of the driving module 130, and the second terminal of the memory module 120 is electrically connected to the first terminal of the driving module 130.
As described in the above embodiment, the operation timing of the digital pixel circuit includes the digital 0 state timing and the digital 1 state timing, and a frame is divided into a plurality of subframes in time, wherein the digital 0 state timing corresponds to the subframe state of the Data signal input terminal Data input high level, and the digital 1 state corresponds to the subframe state of the Data signal input terminal Data input low level; or the digital 0 state corresponds to the subframe state of low level input by the Data signal input end Data, and the digital 1 state corresponds to the subframe state of high level input by the Data signal input end Data. For example, for the LTPS backplane, the driving module 130 is a P-type thin film transistor, the digital 0 state corresponds to a subframe state in which the Data signal input terminal Data inputs a high level (the driving module 130 is turned off, corresponding to a dark state of the light emitting module 140), and the digital 1 state corresponds to a state in which the Data signal input terminal Data inputs a low level (the driving module 130 is turned on, corresponding to a bright state of the light emitting module 140).
For the sub-frame of the digital 0 state timing sequence and the sub-frame of the digital 1 state timing sequence, the operation timing sequence of the digital driving pixel circuit may include a Data writing phase and a light emitting phase, in the Data writing phase, the Data writing module 110 is turned on, and the Data signal input end Data writes a Data signal into the control end G2 of the driving module 130 through the turned-on Data writing module 110;
the storage module 120 can store the potential of the control terminal G2 of the driving module 130;
in the light emitting stage, the driving module 130 is turned on or off according to the potential of the control terminal thereof, for example, when the control terminal G2 of the driving module 130 is at a high potential, the driving module 130 is turned off, and at this time, the false light emission suppressing module 150 is turned on by inputting a first control signal to the control terminal G3 of the false light emission suppressing module 150, so that the potentials at the two ends of the light emitting module 140 are consistent, and the light emitting module 140 keeps the off state; when the control terminal G2 of the driving module 130 is at a low voltage level, the driving module 130 is turned on, and at this time, the second control signal is input to the control terminal G3 of the light emission suppressing module 150, so that the light emission suppressing module 150 is turned off, and the driving module 130 drives the light emitting module 140 to emit light.
It should be noted that, in order to ensure that the Data signal can be completely written into the control terminal G2 of the driving module 130, the Data writing phase (the set duration of the pulse of the Data signal input from the Data signal input terminal Data and the set duration of the turn-on of the Data writing module 110) is usually longer; since the data signal includes only a high potential (e.g., +5V) and a low potential (e.g., -5V), the time period required for writing to the control terminal G2 of the driving module 130 is usually short (the embodiment of the present invention ignores this), and therefore, in the data writing phase, the driving module 130 is turned on or off according to the potential of the control terminal G2, and the mis-light-emission suppressing module 150 is turned on when the driving module 130 is turned off, so that the light-emitting module 140 can be completely turned off, and the display failure caused by mis-light emission of the light-emitting module 140 is prevented.
The pixel circuit that this embodiment provided, through when drive module switches off, make the control module of mistake luminous switch on, can prevent that the light emitting module mistake from giving out light, and then make the light emitting module just can give out light when drive module switches on, avoid drive module under the off-state, the existence of electric leakage current leads to the luminous demonstration that arouses of luminescent device among the digital drive pixel circuit bad, make each show that the luminous time that the grey level corresponds can be controlled by the accuracy, guarantee good display effect.
Fig. 2 is a schematic structural diagram of another pixel circuit according to an embodiment of the present invention, and based on the above scheme, optionally, the data writing module 110 includes a first transistor T1, the driving module 130 includes a second transistor T2, the mis-emission suppression module 150 includes a third transistor T3, the storage module 120 includes a first capacitor C1, and the light emitting module 140 includes an organic light emitting device D1;
the gate of the first transistor T1 is used as the control terminal G1 of the data writing module 110, the first pole of the first transistor T1 is used as the first terminal of the data writing module 110, and the second pole of the first transistor T1 is used as the second terminal of the data writing module 110;
the gate of the second transistor T2 is used as the control terminal G2 of the driving module 130, the first pole of the second transistor T2 is used as the first terminal of the driving module 130, and the second pole of the second transistor T2 is used as the second terminal of the driving module 130;
a gate of the third transistor T3 is used as the control terminal G3 of the false light emission suppression module 150, a first pole of the third transistor T3 is used as the first terminal of the false light emission suppression module 150, and a second pole of the third transistor T3 is used as the second terminal of the false light emission suppression module 150;
two plates of the first capacitor C1 are respectively used as a first terminal and a second terminal of the memory module 120;
the anode of the organic light emitting device D1 serves as a first terminal of the light emitting module 140, and the cathode of the organic light emitting device D1 serves as a second terminal of the light emitting module 140.
In the digital driving pixel circuit, a common scanning method includes a subfield scanning method, in which a frame is temporally divided into a plurality of subframes, and the light emitting duration of the organic light emitting device D1 is controlled by controlling the time of each subframe and data written to the control terminal G2 of the driving module 130 (i.e., the second transistor T2 in fig. 2) in each subframe, thereby controlling the display gray scale of the organic light emitting device D1. For example, for 16-gray-scale display, a frame can be divided into 4 sub-frames in time, and the time ratio of each sub-frame is 1: 2: 4: 8. as described above, in each subframe, the data written to the gate of the second transistor T2 may be a high potential data signal or a low potential data signal to control the bright and dark states of the organic light emitting device D1 in the subframe, so as to control the light emitting duration of the organic light emitting device D1. FIG. 3 is a timing diagram illustrating operation of the digitally driven pixel circuit within a sub-frame, according to an embodiment of the present invention; fig. 4 is another operation timing diagram of the digitally driven pixel circuit provided by the embodiment of the present invention within one sub-frame. The timing of the operation of the digitally driven pixel circuits of fig. 3 and 4 may correspond to the pixel circuit of fig. 2.
The first transistor T1, the second transistor T2, and the third transistor T3 are P-type transistors, and N-type transistors, respectively. The operation timing of the digitally driven pixel circuit shown in fig. 3 corresponds to a digital 1 state (the bright state of the organic light emitting device), and in this subframe, a low potential Data signal (for example, -5V) is input to the Data signal input terminal Data; the operation timing of the digital driving pixel circuit shown in fig. 4 corresponds to a digital 0 state (a dark state of the organic light emitting device) in which a high potential Data signal (e.g., +5V) is input to the Data signal input terminal Data in the subframe.
Referring to fig. 2 and 3, in the subframe corresponding to fig. 3, in the Data writing phase T1, a low level signal is input to the Scan signal input terminal Scan, the first transistor T1 is turned on, and a low level Data signal input to the Data signal input terminal Data is written to the gate of the second transistor T2 through the turned-on first transistor T1;
after a low-potential Data signal inputted from the Data signal input terminal Data is written to the gate of the second transistor T2 through the turned-on first transistor T1, the first capacitor C1 stores and holds the Data signal.
In the light emitting period T2, the second transistor T2 is turned on according to the low potential of the gate thereof; a low level signal is input to the gate of the third transistor T3, and the third transistor T3 is turned off; the second transistor T2 drives the organic light emitting device D1 to emit light. That is, when a low potential Data signal is inputted to the Data signal input terminal Data in the sub-frame, the second transistor T2 is turned on, the third transistor T3 is turned off, and the organic light emitting device D1 emits light.
Referring to fig. 2 and 3, it should be noted that, in order to ensure that the Data signal can be completely written into the gate of the second transistor T2, the Data writing phase (the set duration of the pulse of the Data signal input from the Data signal input terminal Data and the set duration of the turn-on of the first transistor T1) is usually longer; since the data signal includes only a high potential (e.g., +5V) and a low potential (e.g., -5V), the time period required for writing to the gate of the second transistor T2 is usually short (the embodiment of the present invention ignores this), and therefore, during the data writing period T1, the potential at the gate of the second transistor T2 is the written low potential data signal, the second transistor T2 is turned on, and the gate of the third transistor T3 inputs a low level, so that the third transistor T3 is turned off, and the organic light emitting device D1 emits light.
Referring to fig. 2 and 4, in the subframe corresponding to fig. 4, in the Data writing phase T1, the Scan signal input terminal Scan inputs a low level signal, the first transistor T1 is turned on, and a high level Data signal input from the Data signal input terminal Data is written to the gate of the second transistor T2 through the turned-on first transistor T1;
after a high-potential Data signal inputted from the Data signal input terminal Data is written to the gate of the second transistor T2 through the turned-on first transistor T1, the first capacitor C1 stores and holds the Data signal.
In the light emitting period T2, the second transistor T2 is turned off according to the high potential of the gate thereof; the gate of the third transistor T3 is inputted with a high level signal, and the third transistor T3 is turned on, so that the anode potential and the cathode potential of the organic light emitting device D1 are equal to each other and are the voltage inputted from the second voltage signal input terminal Vss, so that the organic light emitting device D1 is completely turned off and the organic light emitting device D1 does not emit light. That is, when a high potential Data signal is inputted to the Data signal input terminal Data in the sub-frame, the second transistor T2 is turned off, the third transistor T3 is turned on, and the organic light emitting device D1 does not emit light.
Referring to fig. 2 and 4, it should be noted that, in order to ensure that the Data signal can be completely written into the gate of the second transistor T2, the Data writing phase (the pulse setting time length of the Data signal input terminal Data inputting the Data signal and the setting time length of the first transistor T1 being turned on) is generally longer, and the Data signal only includes a high potential (for example +5V) and a low potential (for example-5V), so the time length required for writing into the gate of the second transistor T2 is generally shorter (neglected by the embodiment of the present invention), therefore, in the Data writing phase T1, the potential of the gate of the second transistor T2 is the written high potential Data signal, the second transistor T2 is turned off, and the gate of the third transistor T3 is inputted with a high level, so that the third transistor T3 is turned on, and the organic light emitting device D1 does not emit light.
By controlling the time of writing the sub-frame corresponding to the digital 0 state timing sequence and the time of the sub-frame corresponding to the digital 1 state timing sequence, the display of different gray scales can be realized. For example, for 16-gray-scale display, one frame of picture is divided into 4 subframes, namely a first subframe, a second subframe, a third subframe and a fourth subframe, in time, and the time ratio of each subframe is 1: 2: 4: 8. for example, when a 7-gray scale display is to be implemented, the first sub-frame, the second sub-frame, and the third sub-frame correspond to a digital 1 state timing sequence, so that the second transistor T2 is turned on in the first sub-frame, the second sub-frame, and the third transistor T3 is turned off in the first sub-frame, the second sub-frame, and the third sub-frame, so that the organic light emitting device emits light in the first sub-frame, the second sub-frame, and the third sub-frame; the fourth sub-frame corresponds to the digital 0 state timing sequence, so that the second transistor T2 is turned off in the fourth sub-frame, and the third transistor T3 is turned on in the fourth sub-frame, so that the organic light emitting device does not emit light in the light emitting stage of the fourth sub-frame, thereby realizing 7-gray scale display. For other gray scales, the display principle is the same as that of the 7 gray scale, and the description is omitted here.
Fig. 5 is a schematic structural diagram of another pixel circuit provided in an embodiment of the present invention, and referring to fig. 5, alternatively, the channel types of the second transistor T2 and the third transistor T3 are different; the gate of the third transistor T3 is electrically connected to the gate of the second transistor T2.
In the embodiment of the invention, the mis-emission suppressing module 150 is turned on when the driving module 130 is turned off, that is, the third transistor T3 is turned on when the second transistor T2 is turned off. The third transistor T3 and the second transistor T2 are transistors with different channel types, and the gate of the third transistor T3 is electrically connected to the gate of the second transistor T2, so that when the gate of the third transistor T3 and the gate of the second transistor T2 input the same control signal, the on/off states of the second transistor T2 and the third transistor T3 are opposite, and it can be ensured that when the second transistor T2 is turned off, the third transistor T3 is turned on, so that when the second transistor T2 is turned off, the potentials at the two ends of the organic light emitting device D1 are the same, so that the light emitting device is completely turned off, and light emission due to leakage current in the pixel circuit is avoided, and further, the light emission duration of the light emitting device can be accurately controlled, and therefore, the light emission duration corresponding to each display gray scale can be accurately controlled, and a good display effect is ensured. In addition, the gates of the third transistor T3 and the second transistor T2 are electrically connected, so that the gate of the third transistor T3 does not need to be connected to a separate control line, and the number of wirings is not increased for a display panel including the digital driving pixel circuit, which is advantageous for achieving higher pixel density.
FIG. 6 is a timing diagram illustrating another operation of the digitally driven pixel circuit within a sub-frame, according to an embodiment of the present invention; fig. 7 is another operation timing diagram of the digitally driven pixel circuit in one sub-frame according to the embodiment of the present invention. The timing of the operation of the digitally driven pixel circuits of fig. 6 and 7 may correspond to the pixel circuit of fig. 5. The first transistor T1, the second transistor T2, and the third transistor T3 are also exemplified as P-type transistors, and N-type transistors. The operation timing of the digital driving pixel circuit shown in fig. 6 corresponds to a digital 1 state timing (a bright state of the organic light emitting device) in which a low potential Data signal is input at the Data signal input terminal Data within the subframe; the operation timing of the digital driving pixel circuit shown in fig. 7 corresponds to a digital 0 state timing (a dark state of the organic light emitting device) in which a high potential Data signal is input to the Data signal input terminal Data in the subframe.
Referring to fig. 5 and 6, in the subframe corresponding to fig. 6, in the Data writing phase T1, the Scan signal input terminal Scan inputs a low level signal, the first transistor T1 is turned on, and a low level Data signal input by the Data signal input terminal Data is written into the gate of the second transistor T2 through the turned-on first transistor T1;
after a low-potential Data signal inputted from the Data signal input terminal Data is written to the gate of the second transistor T2 through the turned-on first transistor T1, the first capacitor C1 stores and holds the Data signal.
In the light emitting period T2, the second transistor T2 is turned on according to the low potential of the gate thereof; the gate potential of the third transistor T3 is also low, and the third transistor T3 is turned off; the second transistor T2 drives the organic light emitting device D1 to emit light. That is, when a low potential Data signal is inputted to the Data signal input terminal Data in the sub-frame, the second transistor T2 is turned on, the third transistor T3 is turned off, and the organic light emitting device D1 emits light.
Referring to fig. 5 and 7, in the subframe corresponding to fig. 7, in the Data writing phase T1, the Scan signal input terminal Scan inputs a low level signal, the first transistor T1 is turned on, and a high level Data signal input from the Data signal input terminal Data is written to the gate of the second transistor T2 through the turned-on first transistor T1;
after a high-potential Data signal inputted from the Data signal input terminal Data is written to the gate of the second transistor T2 through the turned-on first transistor T1, the first capacitor C1 stores and holds the Data signal.
In the light emitting period T2, the second transistor T2 is turned off according to its gate high data signal; the gate potential of the third transistor T3 is also high, and the third transistor T3 is turned on so that the anode potential and the cathode potential of the organic light emitting device D1 are equal to each other, and are both the voltage inputted from the second voltage signal input terminal Vss, so that the organic light emitting device D1 is completely turned off and the organic light emitting device D1 does not emit light. That is, when a high potential Data signal is inputted to the Data signal input terminal Data in the sub-frame, the second transistor T2 is turned off, the third transistor T3 is turned on, and the organic light emitting device D1 does not emit light.
Fig. 8 is a schematic structural diagram of another digitally driven pixel circuit according to an embodiment of the present invention, and referring to fig. 8, optionally, the gate of the third transistor T3 is electrically connected to the first control signal input Ctrl of the digitally driven pixel circuit.
The gate of the third transistor T3 is connected to the first control signal input terminal Ctrl, so that the control of the third transistor T3 is more convenient and efficient, at this time, the third transistor T3 may be a P-type transistor or an N-type transistor, fig. 6 is a schematic diagram of a digital driving pixel circuit when the third transistor T3 is a P-type transistor, and fig. 3 is a schematic diagram of a digital driving pixel circuit when the third transistor T3 is an N-type transistor.
On the basis of the above scheme, optionally, the channel types of the second transistor T2 and the third transistor T3 are the same, so that the manufacturing process is simplified when the thin film transistor in the digital driving pixel circuit is manufactured. Optionally, the channel types of the first transistor T1, the second transistor T2, and the third transistor T3 are all the same, thereby further simplifying the manufacturing process.
It should be noted that the timing of the first control input Ctrl of the pixel circuit provided in fig. 8 is opposite to the signal of the first control input Ctrl of the pixel circuit in fig. 2, and the timing of other signals is the same as that in fig. 3 and 4, which is not repeated herein.
Fig. 9 is a schematic structural diagram of another digital driving pixel circuit according to an embodiment of the present invention, referring to fig. 9, the digital driving pixel circuit further includes a light-emitting control module 160, the light-emitting control module 160 includes a control terminal, a first terminal and a second terminal, the control terminal of the light-emitting control module 160 is used for inputting a light-emitting control signal, the first terminal of the light-emitting control module 160 is electrically connected to the second terminal of the driving module 130, and the second terminal of the light-emitting control module 160 is electrically connected to the first terminal of the light-emitting module 140.
Specifically, a first end of the light-emitting control module 160 is electrically connected to a second end of the driving module 130, a second end of the light-emitting control module 160 is electrically connected to a common end of the first end of the light-emitting module 140 and the first end of the mis-light-emission suppressing module 150, a control end G4 of the light-emitting control module 160 may be electrically connected to a light-emitting control signal input end EM of the digital driving pixel circuit, and the light-emitting control signal EM is used for inputting a light-emitting control signal to the control end of the light-emitting control module 160. The addition of the light emitting control module 160 to the digitally driven pixel circuit further facilitates the control of the light emitting module 140. For example, after the light-emitting control module 160 is added, after data is written into all pixels in the display panel including the digitally-driven pixel circuits, all pixels in the display panel are turned on together by inputting a control signal to the input terminal of the light-emitting control module 160 in all the digitally-driven pixel circuits, and all the light-emitting modules 140 emit light together, so that the display effect is better.
It should be noted that the light-emitting control module 160 may be further disposed between the first terminal of the driving module 130 and the first voltage signal input terminal Vdd of the digital driving pixel circuit, and may be further disposed between the second terminal of the light-emitting module 140 and the second voltage signal input terminal Vss of the digital driving pixel circuit. It should be further noted that, when the light-emitting control module 160 is disposed between the second voltage signal input terminal Vss of the digital driving pixel circuit at the second end of the light-emitting module 140, the first end of the light-emitting control module 160 is electrically connected to the common terminal of the second end of the light-emitting module 140 and the second end of the light-emitting control module 160, and the second end of the light-emitting control module 160 is electrically connected to the second voltage signal input terminal Vss.
Fig. 10 is a schematic structural diagram of another digital driving pixel circuit according to an embodiment of the present invention, and based on the above scheme, optionally, the light emission control module 160 includes a fourth transistor T4, a gate of the fourth transistor T4 is used as the control terminal G4 of the light emission control module 160, a first pole of the fourth transistor T4 is used as the first terminal of the light emission control module 160, and a second pole of the fourth transistor T4 is used as the second terminal of the light emission control module 160.
Taking the fourth transistor T4 as an example of a P-type transistor, in the data writing phase, a high level signal is input to the gate of the fourth transistor T4, and the fourth transistor T4 is turned off;
in the light emitting period, a low level signal is input to the gate of the fourth transistor T4, and the fourth transistor T4 is turned on.
By adding the fourth transistor T4 to the digital driving pixel circuit, more effective control of light emission of the organic light emitting device D1 can be achieved.
Referring to fig. 11, the display panel includes a digital driving pixel circuit provided in any embodiment of the present invention, the digital driving pixel circuit includes a Scan signal input terminal Scan and a Data signal input terminal Data, the display panel further includes a Scan driving circuit 210, a Data driving circuit 220, a plurality of Scan lines (S1, S2, S3, S4 … …) and a plurality of Data lines (D1, D2, D3, D4 … …), ports of the Scan driving circuit are electrically connected to the plurality of Scan lines, the Scan signal input terminal Scan of the digital driving pixel circuit is electrically connected to one Scan line, and the Data signal input terminal Data of the digital driving pixel circuit is electrically connected to one Data line. It should be noted that the Data signal input terminal Data and the Scan signal input terminal Scan of the pixel circuit for driving one sub-pixel are only schematically illustrated in the figure, and the ports of the pixel circuits for driving the other sub-pixels are similar to the sub-pixel and are not illustrated one by one here.
The display panel provided by the embodiment comprises the digital driving pixel circuit provided by any embodiment of the invention, wherein the digital driving pixel circuit comprises a data writing module, a storage module, a driving module, a light emitting module and a false light emission suppression module, the false light emission suppression module comprises a control end, a first end and a second end, the first end of the false light emission suppression module is electrically connected with the first end of the light emitting module, the second end of the false light emission suppression module is electrically connected with the second end of the light emitting module, the control signal is input through the control end of the false light emission suppression module, so that the first end and the second end of the false light emission suppression module are conducted when the driving module is switched off, so that the potentials at both ends of the light emitting device are the same when the driving module is turned off, so that the light emitting device is completely turned off, therefore, the luminous duration corresponding to each display gray scale can be accurately controlled, and a good display effect is ensured.
Fig. 12 is a schematic structural diagram of a display device according to an embodiment of the present invention, and the display device may include a display panel according to any embodiment of the present invention. The display device may be a mobile phone as shown in fig. 12, or may be a computer, a television, an intelligent wearable display device, and the like, which is not particularly limited in this embodiment of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (8)
1. A digitally driven pixel circuit, comprising: the device comprises a data writing module, a storage module, a driving module, a light emitting module and a false light emitting suppression module;
the data writing module is used for writing data voltage into the control end of the driving module; the storage module is used for storing the voltage of the control end of the driving module;
the driving module is used for being switched on or switched off according to the voltage of the control end of the driving module and driving the light-emitting module to emit light when the driving module is switched on;
the false light emission suppression module comprises a control end, a first end and a second end, the first end of the false light emission suppression module is electrically connected with the first end of the light emitting module, the second end of the false light emission suppression module is electrically connected with the second end of the light emitting module, and the control end of the false light emission suppression module is used for inputting a control signal so that the first end and the second end of the false light emission suppression module are conducted when the driving module is turned off;
the working time sequence of the digital driving pixel circuit comprises a digital 0 state time sequence and a digital 1 state time sequence, and the driving module is turned off in the digital 0 state and corresponds to the dark state of the light emitting module; in the digital 1 state, the driving module is conducted and corresponds to the bright state of the light emitting module; the working sequence of the digital driving pixel circuit can comprise a data writing phase and a light-emitting phase for a sub-frame of a digital 0 state sequence and a sub-frame of a digital 1 state sequence; the control end of the data writing module is electrically connected with the scanning signal input end of the digital driving pixel circuit, the first end of the data writing module is electrically connected with the data signal input end of the digital driving pixel circuit, and the second end of the data writing module is electrically connected with the control end of the driving module;
the first end of the driving module is electrically connected with the first voltage signal input end of the digital driving pixel circuit, the second end of the driving module is electrically connected with the first end of the light-emitting module, and the second end of the light-emitting module is electrically connected with the second voltage signal input end of the pixel circuit;
the first end of the storage module is electrically connected with the control end of the driving module, and the second end of the storage module is electrically connected with the first end of the driving module; the data writing module comprises a first transistor, the driving module comprises a second transistor, the false light emission suppression module comprises a third transistor, the storage module comprises a first capacitor, and the light emitting module comprises an organic light emitting device;
a gate of the first transistor is used as a control terminal of the data writing module, a first pole of the first transistor is used as a first terminal of the data writing module, and a second pole of the first transistor is used as a second terminal of the data writing module;
a gate of the second transistor is used as a control end of the driving module, a first pole of the second transistor is used as a first end of the driving module, and a second pole of the second transistor is used as a second end of the driving module;
a gate of the third transistor is used as a control end of the false light emission suppression module, a first pole of the third transistor is used as a first end of the false light emission suppression module, and a second pole of the third transistor is used as a second end of the false light emission suppression module;
two pole plates of the first capacitor are respectively used as a first end and a second end of the storage module;
the anode of the organic light-emitting device is used as the first end of the light-emitting module, and the cathode of the organic light-emitting device is used as the second end of the light-emitting module;
in a digital 1 state, in the data writing stage, the second transistor is turned on, and the third transistor is turned off; in the light emitting stage, the second transistor is turned on, and the third transistor is turned off;
in a digital 0 state, in the data writing stage, the second transistor is turned off, and the third transistor is turned on; in the light emitting stage, the second transistor is turned off, and the third transistor is turned on.
2. The digitally driven pixel circuit of claim 1, wherein the second transistor and the third transistor are of different channel types; a gate of the third transistor is electrically connected to a gate of the second transistor.
3. The digitally driven pixel circuit of claim 1, wherein a gate of the third transistor is electrically connected to a first control signal input of the digitally driven pixel circuit.
4. The digitally driven pixel circuit of claim 3, wherein the channel type of the second transistor and the third transistor are the same.
5. The digitally driven pixel circuit according to claim 1, further comprising a light emission control module, wherein the light emission control module comprises a control terminal, a first terminal and a second terminal, the control terminal of the light emission control module is used for inputting a light emission control signal, the first terminal of the light emission control module is electrically connected to the second terminal of the driving module, and the second terminal of the light emission control module is electrically connected to the first terminal of the light emission module.
6. The digitally driven pixel circuit according to claim 5, wherein the light emission control module comprises a fourth transistor, a gate of the fourth transistor is used as a control terminal of the light emission control module, a first pole of the fourth transistor is used as a first terminal of the light emission control module, and a second pole of the fourth transistor is used as a second terminal of the light emission control module.
7. A display panel comprising the digitally driven pixel circuit of any one of claims 1 to 6, wherein the digitally driven pixel circuit comprises a scan signal input terminal and a data signal input terminal, the display panel further comprises a scan driving circuit, a data driving circuit, a plurality of scan lines and a plurality of data lines, wherein a port of the scan driving circuit is electrically connected to the plurality of scan lines, a scan signal input terminal of the digitally driven pixel circuit is electrically connected to one scan line, and a data signal input terminal of the digitally driven pixel circuit is electrically connected to one data line.
8. A display device characterized by comprising the display panel according to claim 7.
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| CN112908247B (en) * | 2021-03-01 | 2022-04-15 | 成都辰显光电有限公司 | Pixel circuit, driving method thereof and display panel |
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