CN114265550A - Solid state disk power failure protection method and system - Google Patents
Solid state disk power failure protection method and system Download PDFInfo
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Abstract
The application relates to the technical field of solid state disks, in particular to a solid state disk power failure protection method and a solid state disk power failure protection system, wherein the method comprises the following steps: detecting the power supply state of a PC host connected with the solid state disk; when the PC host is detected to be in a power-down state, disconnecting the signal connection with the PC host, starting a power-down protection mechanism of the solid state disk, and storing the cache data in the solid state disk; after the cache data is stored, detecting the power supply state of the PC host again and generating a detection result; and establishing the connection between the solid state disk and the PC host based on the detection result. The solid state disk power-down protection method and system have the effect of reducing data loss in the solid state disk under the condition that a PC host is powered down.
Description
Technical Field
The application relates to the technical field of solid state disks, in particular to a solid state disk power failure protection method and system.
Background
The solid state disk is a permanent memory, has the advantages of high reading and writing speed, low power consumption, no noise, vibration resistance, low heat, small volume and large working range, and is widely applied to the fields of military affairs, vehicle-mounted, industrial control, video monitoring, network monitoring and the like. In order to improve performance during reading and writing, the solid state disk usually uses SDRAM or SRAM as data buffer.
In view of the above related technologies, the inventor believes that, when a PC host supplying power to a solid state disk is powered off abnormally, if data transmission between the solid state disk and the PC host is not completed yet, since data in an SDRAM or an SRAM cannot be written back to a NAND flash memory in time and stored in the NAND flash memory, part or all of cache data may be lost.
Disclosure of Invention
In order to reduce the possibility of data loss in the solid state disk when the PC host computer is abnormally powered down, the application provides a solid state disk power-down protection method and a solid state disk power-down protection system.
In a first aspect, the present application provides a method for power failure protection of a solid state disk, which adopts the following technical scheme:
a power failure protection method for a solid state disk comprises the following steps:
detecting the power supply state of a PC host connected with the solid state disk;
when the PC host is detected to be in a power-down state, disconnecting the signal connection with the PC host, starting a power-down protection mechanism of the solid state disk, and storing the cache data in the solid state disk;
after the cache data is stored, detecting the power supply state of the PC host again and generating a detection result;
and establishing the connection between the solid state disk and the PC host based on the detection result.
By adopting the technical scheme, the power supply state of the PC host is detected, when the PC host is in the power-off state, the power-down protection mechanism is triggered to supply power to the solid state disk, the cache data in the solid state disk are stored, and after the cache data are stored, the connection between the solid state disk and the PC host is established according to the detection result of detecting the power supply state of the PC host again. When the PC host is powered off, the solid state disk can still be powered on, the cache data can be stored, and the possibility of data loss caused by power failure in the solid state disk is reduced.
Optionally, the solid state disk is powered by an energy storage capacitor module in the solid state disk;
and writing back and storing the cached data in the solid state disk.
By adopting the technical scheme, the energy storage capacitor module can provide power for the solid state disk, so that the solid state disk can store the cache data under the condition that the PC host is powered off.
Optionally, detecting a power supply state of the PC host;
if the PC host is in a power failure state, determining that the power supply of the solid state disk is not recovered;
and if the PC host is in a power supply state, determining that the solid state disk is restored to be powered on.
Optionally, establishing a connection between the solid state disk and the PC host according to whether the solid state disk resumes power supply;
if the power supply of the solid state disk is not recovered, continuing waiting until the power supply of the solid state disk is recovered;
and if the power supply of the solid state disk is recovered, reestablishing the connection between the solid state disk and the PC host.
Optionally, restarting and initializing the solid state disk;
and establishing the connection between the solid state disk and the PC host.
By adopting the technical scheme, the power supply state of the PC host is recovered before the power failure protection mechanism is completely discharged, and the state of the solid state disk is recovered again by restarting the solid state disk, so that the connection with the PC host can be established.
In a second aspect, the present application further provides a solid state disk power failure protection system, which adopts the following technical scheme:
a solid state disk power-down protection system comprises: the PC host is used for supplying power to the solid state disk and transmitting data;
the solid state disk comprises:
the data storage module is used for storing data of the PC host;
the CPU module is used for detecting the power supply state of the PC host and controlling the cache data of the data storage module to be stored when the PC host is in a power failure state;
the energy storage capacitor module is used for supplying power to the solid state disk when the PC host is in a power failure state;
and the power management module is used for controlling the energy storage capacitor module to supply power to the solid state disk when the PC host is in a power failure state.
By adopting the technical scheme, when the CPU module detects that the PC host is in a power-down state, the power management module controls the energy storage capacitor module to supply power to the solid state disk, and the CPU module controls the data storage module to store the cache data, so that the possibility of cache data loss in the solid state disk caused by power-down of the PC host is reduced.
Optionally, the cache unit is configured to cache data of the PC host;
and the flash memory unit is used for writing back the data cached in the cache storage unit.
By adopting the technical scheme, the cache unit can cache the data of the PC host under the condition that the PC host is in normal power supply; the flash memory unit can write back and store the cache data of the cache unit under the condition that the PC host is in abnormal power failure, so that the possibility of cache data loss caused by power failure of the solid state disk is reduced.
Optionally, the detection unit is configured to detect a power supply state of the PC host;
and the control unit is used for controlling the data storage module to store the cache data when the PC host is in a power-off state.
By adopting the technical scheme, when the PC host is in power failure, the data in the data storage module can be stored in time, so that the possibility of partial or total loss of the data is reduced.
Optionally, when the detection unit detects that the PC host is in a power-down state, the power management module controls the energy storage capacitor module to supply power to the solid state disk, and the cache data in the cache unit is written back to the flash memory unit through the control unit and is stored in the flash memory unit.
Optionally, after the cache data in the cache unit is stored in the flash memory unit, the detection unit detects the power supply state of the PC host again;
if the PC host is in a power failure state, determining that the power supply of the solid state disk is not recovered, and continuing waiting until the power supply of the solid state disk is recovered and the solid state disk is connected with the PC host;
and if the PC host is in a power supply state, determining that the solid state disk is powered up again, and reestablishing the connection between the solid state disk and the PC host.
By adopting the technical scheme, the problem that the solid state disk cannot be identified with the PC host is effectively solved.
Drawings
Fig. 1 is a schematic diagram of an overall structure of a solid state disk power-down protection system according to the present application.
Fig. 2 is a schematic structural diagram of a data storage module and a CPU module in the power failure protection system for a solid state disk according to the present application.
Fig. 3 is an overall flowchart of a solid state disk power-down protection method according to the present application.
Fig. 4 is a schematic flowchart of step S2 in the power down protection method for a solid state disk according to the present application.
Fig. 5 is a schematic flowchart of step S3 in the method for power-down protection of a solid state disk according to the present application.
Fig. 6 is a schematic flowchart of step S4 in the method for power-down protection of a solid state disk according to the present application.
Fig. 7 is a schematic flowchart of step S43 in the method for power-down protection of a solid state disk according to the present application.
Description of reference numerals:
1. a PC host; 2. a solid state disk; 21. a data storage module; 22. a CPU module; 221. a detection unit; 222. a control unit; 23. an energy storage capacitor module; 231. a buffer unit; 232. a flash memory unit; 24. and a power management module.
Detailed Description
The present application is described in further detail below with reference to figures 1-7.
The embodiment of the application discloses solid state disk power-down protection system, as shown in fig. 1, a solid state disk power-down protection system includes: the solid state drive comprises a PC host 1 and a solid state disk 2, wherein the PC host 1 is used for supplying power to the solid state disk 2 and transmitting data, and the solid state disk 2 is used for storing the data of the PC host 1.
As shown in fig. 2, the solid state disk 2 includes a data storage module 21, a CPU module 22, an energy storage capacitor module 23, and a power management module 24. The data storage module 21 is connected to the CPU module 22, and the CPU module 22 is configured to drive the data storage module 21 to store data of the PC host 1, read and write data of the PC host 1 through the CPU module 22, and store data of the PC host 1 in the data storage module 21. The energy storage capacitor module 23 is used for supplying power to the solid state disk 2 when the PC host 1 is powered off. The power management module 24 is configured to detect a power supply state of the PC host 1, and control the energy storage capacitor module 23 to supply power to the data storage module 21 and the CPU module 22 based on the power supply state of the PC host 1, so as to store data in the data storage module 21.
As shown in fig. 2, the data storage module 21 includes a cache unit 231 and a flash memory unit 232, the cache unit 231 and the flash memory unit 232 are respectively connected to the CPU module 22, the cache unit 231 is used for caching data of the PC host 1, and when the PC host 1 is powered off, the flash memory unit 232 writes back the cached data in the cache unit 231 through the CPU module 22.
Specifically, in this embodiment, the cache unit 231 may be set to be an SDRAM (synchronous dynamic random access memory), which is an upgraded version of an RAM (random access memory), and the SDRAM has a fast storage speed, and does not need to be matched with a memory refresh circuit, so that the overall working efficiency may be improved, but cache data in the SDRAM is easily lost when the solid state disk 2 is powered off; the flash memory unit 232 may be configured as a NAND flash memory, which is a non-volatile storage technology, i.e., data in the NAND flash memory is not lost after power is turned off.
More specifically, since the SDRAM itself is a volatile memory, when the PC host 1 is in a power-down state, data transmission between the solid state disk 2 and the PC host 1 is not completed, which may result in partial or complete loss of cache data, and therefore, the cache data in the SDRAM needs to be written back and stored in the NAND flash memory in time, so that the possibility of partial or complete loss of cache data can be reduced.
In this embodiment, the energy storage capacitor module 24 may be set as an energy storage capacitor array, the power management module 24 is connected to the energy storage capacitor module 23, the CPU module 22, the cache unit 231, and the flash memory unit 232, and when the PC host 1 is in a power-down state, the power management module 24 controls the energy storage capacitor module 23 to discharge power, so as to supply power to the CPU module 22, the cache unit 231, and the flash memory unit 232. The solid state disks 2 with different capacities have different cache sizes, so the amount of write-back data is different, and the capacitance capacities required are different, and the capacitance capacity of the energy storage capacitor array in this embodiment is enough for write-back storage of the cache data in the cache unit 231 to the flash memory unit 232.
As shown in fig. 2, the CPU module 22 includes a detection unit 221 and a control unit 222, and the detection unit 221 is configured to detect a power supply state of the PC host 1. The control unit 222 is connected to the buffer unit 231 and the flash memory unit 232, respectively, and the control unit 222 controls the buffer unit 231 to perform read-write buffering on data of the PC host 1. In addition, when the detection unit 221 detects that the PC host 1 is in a power-down state, the cache data in the cache unit 231 may be write-back saved to the flash memory unit 232 by the control unit 222.
Specifically, in this embodiment, the control unit 222 is configured as a CPU main control chip, and in the process of data transmission between the solid state disk 2 and the PC host 1, the CPU main control chip controls the SDRAM to read, write and cache data of the PC host 1. When the PC host 1 is in power failure, the cache data in the SDRAM can be written back to the NAND flash memory through the CPU main control chip, so that the possibility of partial or total loss of the cache data in the SDRAM is reduced.
The detection unit 221 is a GPIO pin disposed on the CPU main control chip, and in order to detect the power supply state of the PC host 1, the voltage state of the power supplied to the solid state disk 2 by the PC host 1 is detected by the GPIO pin in this embodiment, so as to determine the power supply state of the PC host 1. The operating voltages required for different solid state disks 2 are different, for example, 2.5 inch Half slim requires 5V +/-5% power, and mSATA, M.2 requires 3.3V +/-5% power. When the PC host 1 is powered by 5V, if the GPIO pin detects that the voltage of the PC host 1 drops to 4V, the PC host 1 is considered to be in a power-down state, and a power-down protection mechanism is triggered immediately; if the GPIO pin detects that the voltage of the PC host 1 rises to 4.15V, the PC host 1 is considered to be in a power supply state. When the PC host 1 is in 3.3V power supply, if the GPIO pin detects that the voltage of the PC host 1 drops to 2.83V, the PC host 1 is considered to be in a power-down state, and a power-down protection mechanism is triggered immediately; when the voltage is detected to rise to 2.97V, the PC main unit 1 is considered to be restored to the power supply state.
When the GPIO pin detects that the PC host 1 is in a power-down state, the solid state disk 2 is actively disconnected from the signal connection with the PC host 1, the CPU main control chip sends a discharging signal to the power management module 24 based on the power-down information of the PC host 1 detected by the GPIO pin, the power management module 24 controls the energy storage capacitor array to discharge based on the discharging signal, and transmits electric energy sent by the energy storage capacitor array to the CPU main control chip, the SDRAM and the NAND, so that cache data in the SDRAM can be written back and stored to the NAND through the CPU main control chip.
If the detection unit 221 detects that the PC host 1 has recovered the power supply state before the energy storage capacitor module 23 is completely discharged, the solid state disk 2 is in the power supply state of the energy storage capacitor module 23 and is disconnected from the PC host 1 by a signal, so that the PC host 1 cannot be normally connected to the solid state disk 2, and at this time, the solid state disk 2 needs to be automatically restarted, and the PC host 1 supplies power and establishes a connection with the PC host 1. If the power supply of the PC host 1 is not normal before the energy storage capacitor array is completely discharged, the energy storage capacitor module 23 continues to discharge until the power supply of the PC host 1 is normal, and then the power supply is connected with the solid state disk 2.
Specifically, after the cache data in the SDRAM is written back and stored to the NAND by the CPU module 22, the power supply state of the PC host 1 is detected again by the GPIO detection pin, if the PC host 1 is in the power-down state, the solid state disk 2 continues to wait until the PC host 1 recovers power supply and establishes connection with the PC host 1, and if the power supply state of the PC host 1 has been recovered, the solid state disk 2 is automatically restarted, the state of the solid state disk 2 is reinitialized, and connection is reestablished with the PC host 1.
The working principle of the solid state disk power-down protection system in the embodiment is that the power supply state of the PC host 1 is detected through the detection unit 221, if the power supply state is in the power-down state, the energy storage capacitor module 23 is controlled to discharge power to supply power to the solid state disk 2, so that the cache data of the cache unit 231 is written back and stored in the flash memory unit 232, after the cache data is stored in the flash memory unit 232, the power supply state of the PC host 1 is detected again, if the PC host 1 is in the power-down state, the power supply of the PC host 1 is waited to be restored, then the solid state disk 2 is connected with the PC host 1 again, and if the power supply of the PC host 1 is restored to be normal, the firmware of the solid state disk 2 is automatically restarted, the state of the solid state disk 2 is reinitialized, and the connection with the PC host 1 is established again. The power supply state of the PC host 1 is detected through the GPIO pin, and the automatic restart of the power management module 24, the energy storage capacitor module 23 and the solid state disk 2 is matched, so that the cache data can be completely protected, and the problem that the power supply of the PC host 1 is recovered to be normally powered before the energy storage capacitor module 23 is not completely discharged, so that the disk can not be normally identified is solved; and the solid state disk 2 is completely operated intelligently without occupying extra hardware resources of the CPU of the solid state disk 2.
The embodiment of the present application further discloses a solid state disk power-down protection method, which is applied to the solid state disk power-down protection system, as shown in fig. 3, and includes the following steps:
s1, detecting the power supply state of the PC host connected with the solid state disk;
s2, when detecting that the PC host is in a power-down state, disconnecting the signal connection with the PC host, starting a power-down protection mechanism of the solid state disk, and storing the stored data in the solid state disk;
s3, detecting the power supply state of the PC host again after the storage data is stored, and generating a detection result;
and S4, establishing connection between the solid state disk and the PC host based on the detection result.
Specifically, in step S1, for convenience of describing the embodiment, the power supply state of the PC host power supply may be detected through the GPIO pin on the CPU main control chip. And judging the voltage condition of the CPU main control chip through the detection information of the GPIO pin so as to further determine the power supply state of the PC host.
Specifically, in step S2, PC host power down detection: detecting the state of the PC host supplying power to the solid state disk through the GPIO pin; the operating voltages required by different solid state disks are different, for example, 2.5 inches, Halfslim requires 5V +/-5% power, and mSATA, M.2 requires 3.3V +/-5% power. When the PC host is powered by 5V, if the GPIO detection pin detects that the voltage of the PC host falls to 4V, the PC host is considered to be in a power-down state, and a power-down protection mechanism is triggered immediately; if the detected voltage rises to 4.15V, the PC host is considered to be in a normal power supply state. When the PC host is powered by 3.3V, if the GPIO detection pin detects that the voltage of the PC host falls to 2.83V, the PC host is considered to be in a power-down state, and a power-down protection mechanism is triggered immediately; if the voltage of the PC host is detected to rise to 2.97V, the PC host is considered to recover normal power supply.
When the power failure protection mechanism is triggered, the solid state disk is actively disconnected from the signal connection with the PC host, so that the read-write influence of the PC host on the solid state disk in the process of writing back data by the solid state disk is reduced.
In the embodiment, an SDRAM (synchronous dynamic random access memory) is used as the cache of the solid state disk, the SDRAM is an upgraded version of an RAM (random access memory), the SDRAM has a high storage speed, and a memory refresh circuit is not needed, so that the overall working efficiency can be improved, but cache data in the SDRAM is easily lost when the solid state disk is powered off; NAND flash memory is adopted as a flash memory of a solid state disk, and is a nonvolatile storage technology, namely, data in the NAND flash memory cannot be lost after power failure.
Because the SDRAM is a volatile memory, when the PC host is in a power-down state, data transmission between the solid state disk and the PC host is not completed, which may cause partial or total loss of cache data in the SDRAM, and therefore, the cache data in the SDRAM needs to be written back and stored to the NAND flash memory in time, so that the possibility of partial or total loss of the cache data can be reduced.
As shown in fig. 4, step S2 includes the steps of:
s21, supplying power to the solid state disk through an energy storage capacitor module in the solid state disk;
and S22, writing back and storing the cache data in the solid state disk.
Specifically, in this embodiment, when the GPIO pin detects that the PC host is in a power-down state, the power-down detection information of the PC host is fed back to the power management module, and the power management module controls the energy storage capacitor array to discharge and transmits the electric energy emitted by the energy storage capacitor array to the CPU main control chip, the SDRAM, and the NAND, so that the cache data in the SDRAM is written back by the CPU main control chip and stored in the NAND, and the possibility of cache data loss is reduced. The capacitance of the energy storage capacitor array is enough to enable the buffered data in the DSRAM to be completely written back and stored in the NAND.
After the write-back and storage of the cache data of the SDRAM are completed, the power supply state of the PC host needs to be detected again, and a corresponding detection result is generated.
Referring to steps S31-S33 in fig. 5:
s31, detecting the power supply state of the PC host;
s32, if the PC host is in a power failure state, determining that the power supply of the solid state disk is not recovered;
and S33, if the PC host is in a power supply state, determining that the solid state disk is powered up again.
Specifically, the power supply state of the PC host is detected again through the GPIO pin, if the power supply of the PC host is recovered before the energy storage capacitor array is completely discharged, the GPIO pin generates a detection signal that the PC host is in the power supply state and sends the detection signal to the CPU main control chip, and if the power supply of the PC host is not recovered before the energy storage capacitor array is completely discharged, the GPIO detection pin generates a detection signal that the PC host is in the power failure state and sends the detection signal to the CPU main control chip.
As shown in fig. 6, step S4 includes the following steps:
s41, establishing the connection between the solid state disk and the PC host according to whether the solid state disk recovers power supply;
s42, if the power supply of the solid state disk is not recovered, continuing waiting until the power supply of the solid state disk is recovered;
and S43, if the power supply of the solid state disk is recovered, reestablishing the connection between the solid state disk and the PC host.
Specifically, if the PC host recovers power supply, because the energy storage capacitor array is not completely discharged, the CPU module of the solid state disk is still in an on-state operating state, and only no data is read and written, and at this time, the PC host has recovered to operate normally, so that the solid state disk needs to be connected with the PC host again to perform normal read and write operations on the solid state disk; however, when the energy storage capacitor array is triggered to discharge, the solid state disk is actively disconnected from the signal connection with the PC host, so that the solid state disk needs to be restarted at the moment, and then the solid state disk is connected with the PC host again. And if the PC host power supply does not recover to be normal before the energy storage capacitor array completely discharges, the energy storage capacitor module continues to discharge until the PC host power supply recovers to be normal, and then the PC host power supply is connected with the solid state disk.
As shown in fig. 7, step S43 includes the following steps:
s431, restarting and initializing the solid state disk;
and S432, establishing the connection between the solid state disk and the PC host.
Specifically, after the cache data in the SDRAM is written back and stored to the NAND through the CPU module, the power supply state of the PC host is detected again through the GPIO detection pin, if the PC host is in the power failure state, the solid state disk continues to wait until the PC host recovers power supply and establishes connection with the PC host, and if the power supply state of the PC host is recovered, the solid state disk automatically restarts, the state of the solid state disk is reinitialized, and the connection with the host is reestablished.
In summary, the implementation principle of the solid state disk power-down protection method in this embodiment is that by detecting the power supply state of the PC host, if the PC host is in the power-down state, the energy storage capacitor array is triggered to discharge to provide power to the solid state disk, so that the cache data is written back and stored in the NAND, after the NAND stores the cache data, the power supply state of the PC host is detected again, if the PC host is in the power-down state, no operation is performed, the energy storage capacitor array continues to discharge, if the host recovers normal power supply, the solid state disk firmware is automatically started, the solid state disk state is reinitialized, the host is reconnected, and disk authentication is performed normally. The power supply state of the PC host is detected through the GPIO pin, and the automatic restart of the power management module, the energy storage capacitor module and the solid state disk is matched, so that the cache data can be completely protected, and the problem that the PC host cannot normally recognize the disk because the power supply of the PC host is recovered to be normally powered before the energy storage capacitor array is not completely discharged is solved; and the solid state disk is completely intelligently operated without additionally occupying hardware resources of a CPU (central processing unit) of the solid state disk.
The above embodiments are preferred embodiments of the present application, and the protection scope of the present application is not limited by the above embodiments, so: all equivalent changes made according to the structure, shape and principle of the present application shall be covered by the protection scope of the present application.
Claims (10)
1. A power failure protection method for a solid state disk is characterized by comprising the following steps:
detecting the power supply state of a PC host connected with the solid state disk;
when the PC host is detected to be in a power-down state, disconnecting the signal connection with the PC host, starting a power-down protection mechanism of the solid state disk, and storing the cache data in the solid state disk;
after the cache data is stored, detecting the power supply state of the PC host again and generating a detection result;
and establishing the connection between the solid state disk and the PC host based on the detection result.
2. The method for power-down protection of the solid state disk according to claim 1, wherein the step of starting the power-down protection mechanism of the solid state disk to store the stored data in the solid state disk comprises the following steps:
the solid state disk is powered by an energy storage capacitor module in the solid state disk;
and writing back and storing the cached data in the solid state disk.
3. The method for power-down protection of the solid state disk according to claim 1, wherein the step of detecting the power supply state of the PC host again and generating the detection result comprises the steps of:
detecting the power supply state of the PC host;
if the PC host is in a power failure state, determining that the power supply of the solid state disk is not recovered;
and if the PC host is in a power supply state, determining that the solid state disk is restored to be powered on.
4. The method for power-fail protection of the solid state disk according to claim 3, wherein the step of establishing the connection between the solid state disk and the PC host based on the detection result comprises the following steps:
establishing connection between the solid state disk and a PC host according to whether the solid state disk recovers power supply;
if the power supply of the solid state disk is not recovered, continuing waiting until the power supply of the solid state disk is recovered;
and if the power supply of the solid state disk is recovered, reestablishing the connection between the solid state disk and the PC host.
5. The method according to claim 4, wherein the step of reestablishing the connection between the solid state disk and the PC host comprises the following steps:
restarting and initializing the solid state disk;
and establishing the connection between the solid state disk and the PC host.
6. The utility model provides a solid state hard drives power fail safe system which characterized in that includes:
the system comprises a PC host (1) and a solid state disk (2), wherein the PC host (1) is used for supplying power to the solid state disk (2) and transmitting data;
the solid state disk (2) comprises:
the data storage module (21), the said data storage module (21) is used for storing the data of PC host computer (1);
the CPU module (22), the said CPU module (22) is used for detecting the power supply state of the said PC host computer (1), and when the PC host computer (1) is in the power-down state, control the said data storage module (21) to keep the buffer memory data;
the energy storage capacitor module (23), the energy storage capacitor module (23) is used for supplying power to the solid state disk (2) when the PC host (1) is in a power-down state;
and the power management module (24), the power management module (24) is used for controlling the energy storage capacitor module (23) to supply power to the solid state disk (2) when the PC host (1) is in a power-down state.
7. The solid state disk power-fail protection system of claim 6, wherein the data storage module (23) comprises:
a cache unit (231), wherein the cache unit (231) is used for caching data of the PC host (1);
and a flash memory unit (232), wherein the flash memory unit (232) is used for writing back the data cached in the saving cache unit (231).
8. The solid state disk power-fail protection system of claim 6, wherein the CPU module (22) comprises:
a detection unit (221), the detection unit (221) being used for detecting the power supply state of the PC host (1);
and the control unit (222) is used for controlling the data storage module (23) to store the cache data when the PC host (1) is in a power-off state.
9. The system according to claim 8, wherein when the detection unit (221) detects that the PC host (1) is in a power-down state, the power management module (24) controls the energy storage capacitor module (23) to supply power to the solid state disk (2), and the cached data in the cache unit (231) is written back by the control unit (222) and stored in the flash memory unit (232).
10. The system according to claim 9, wherein after the cache data in the cache unit (231) is stored in the flash memory unit (232), the detection unit (221) detects the power supply state of the PC host (1) again;
if the PC host (1) is in a power failure state, determining that the solid state disk (2) does not recover power supply, and continuing to wait until the solid state disk (2) recovers power supply and establishes connection with the PC host (1);
and if the PC host (1) is in a power supply state, determining that the solid state disk (2) is powered up again, and reestablishing the connection between the solid state disk (2) and the PC host (1).
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN116932303A (en) * | 2023-09-14 | 2023-10-24 | 合肥康芯威存储技术有限公司 | Storage test equipment and test method thereof |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116932303A (en) * | 2023-09-14 | 2023-10-24 | 合肥康芯威存储技术有限公司 | Storage test equipment and test method thereof |
| CN116932303B (en) * | 2023-09-14 | 2023-12-29 | 合肥康芯威存储技术有限公司 | Storage test equipment and test method thereof |
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