CN114265334B - Automatic analog loop impedance matching detection method - Google Patents
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Abstract
The invention discloses an automatic analog loop impedance matching detection method, which comprises the following steps: an impedance automatic matching system formed by the interaction of a DSP processing system based on a CPU and an SLIC chip is adopted to automatically perform impedance matching between a subscriber loop transmission line and a signal source so as to obtain an optimal matching impedance signal; the best matching impedance value is set into the SLIC so that the quality is optimal when the signal is transmitted to the private branch exchange. The invention can reduce the manual test intensity, reduce the test time and improve the matching accuracy, thereby improving the communication quality, improving the tone quality level of the call, reducing the noise and improving the communication quality and the communication success rate of the communication equipment such as fax, pos machine and the like of the data terminal.
Description
Technical Field
The invention relates to the field of communication, in particular to an automatic analog loop impedance matching detection method for telephone line automatic impedance matching by using reflected signal intensity.
Background
The current voip analog gateway adopts a special interface chip to realize the BORSCH function of the analog subscriber loop, and the slic interface chip of the analog telephone is utilized; in practical engineering application, because of the path of the line, the material of the line, the thickness of the line, the length of the line, the subscriber loop impedance of the local side switch where the line is in butt joint, and the like, the impedance of the gateway configuration is mismatched, so that the voice tone quality is poor, noise is generated, the fax effect is poor, and errors occur in modem communication.
In this case, a single register is provided for impedance matching to improve the communication effect, but even in the same country and city, the same item is not matched due to the characteristics of the lines, and the communication effect is reduced.
In the prior art, the parameters of the matching register are configured by manpower, and are tested continuously to achieve a relatively good effect, so that the processing is time-consuming and labor-consuming, and the final result is not necessarily the best; the invention optimizes the situation, and achieves better impedance matching through automatic impedance detection, thereby improving the use effect of users.
Disclosure of Invention
The invention aims to provide an automatic analog loop impedance matching detection method, which aims to solve the problems that the parameter of a matching register is manually configured and the continuous test is time-consuming and labor-consuming in the background technology.
In order to achieve the above purpose, the present invention provides the following technical solutions:
an automatic analog loop impedance match detection method, the automatic impedance match method comprising the steps of:
an impedance automatic matching system formed by the interaction of a CPU-based DSP processing system and an SLIC chip is adopted to automatically perform impedance matching between a subscriber loop transmission line and a signal source so as to obtain an optimal matching impedance signal, wherein the CPU-based DSP processing system comprises a CPU and a DSP which are mutually connected;
the best matching impedance value is set to the telephone interface chip of the device, and the SPC exchange receives the best signal and improves the communication quality.
Further, the impedance automatic matching system judges the impedance matching degree in an echo detection mode, and the impedance matching method of the impedance automatic matching system is as follows:
s1, a CPU sends an instruction to set an impedance signal value;
s2, sending DTMF signals to a user loop by adopting a DSP, and transmitting the DTMF signals to an SLIC chip by utilizing a PCM data bus; judging whether the DTMF signal exists or not according to the output signal, if yes, executing the step S3, and if not, executing the step S1;
s3, detecting a reflected DTMF signal on a PCM data bus by a DSP processor, and performing signal matching when the DSP detects a reflected echo;
s4, detecting the amplitude of the signal after the signal is matched, and recording the impedance and the reflected signal amplitude by measuring the echo amplitude to finish one-time test;
s5, using a CPU to send an instruction to continuously reduce impedance on the SLIC chip, performing similar test, repeating the steps S1-S4, detecting DTMF signals, measuring echo amplitude, and obtaining more than two groups of impedance and reflected DTMF signal data; if the detection counting is completed, executing step S6, and if the counting is not completed, executing step S1;
s6, obtaining the lowest echo amplitude from the plurality of groups of test data, automatically searching the impedance with the lowest echo amplitude as the best matched impedance signal value based on the cooperation of the DSP processing system of the CPU and the SLIC chip, setting the best impedance signal value, ending the test and completing the automatic impedance matching work.
Further, the CPU and the SLIC chip are connected through a local data bus, and the local data bus is used for transmitting a CPU control signal.
Further, the PCM data bus is a digital voice path to the CPU for transmitting voice data signals.
Further, the SLIC chip adopts a chip of the core science and technology brand SI3215 type, is used for providing an analog subscriber loop interface to realize the integration of a gateway of the communication equipment and an impedance data network, and comprises a control interface, a PCM interface, a tone generator, an analog-to-digital conversion circuit, a hybrid circuit, two wires of TIP and RING, and a discrete line driving circuit formed by discrete elements.
Further, the DTMF signal transmitted to the SLIC chip is decoded by the SLIC chip and then transmitted to the TIP and RING lines.
Further, a dual-port RAM is arranged between the CPU and the DSP, and the dual-port RAM is used for realizing data conversion between the CPU and the DSP, wherein the data conversion comprises voice data conversion and control data conversion.
The beneficial effects of the invention are as follows:
the automatic analog loop impedance matching detection method provided by the invention is used for automatically detecting the user loop impedance, so that better impedance matching is achieved, noise, manual test strength and test time are reduced, matching accuracy is improved, communication quality and conversation tone quality level are improved, user use effect is improved, and communication quality and communication success rate of communication equipment such as fax machines and pos machines are improved.
Drawings
FIG. 1 is a schematic diagram of an automatic impedance matching application of the present invention;
FIG. 2 is a flow chart of automatic impedance matching according to the present invention;
fig. 3 is a functional block diagram of a subscriber loop interface circuit of the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is evident that the embodiments described are only some embodiments of the present invention and are for explanation of the present invention, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1-3, the present invention provides a technical solution: an automatic analog loop impedance matching detection method comprises the following steps:
an impedance automatic matching system formed by the mutual interaction of a CPU-based DSP processing system and an SLIC chip is adopted to automatically perform impedance matching between a subscriber loop transmission line and a signal source so as to obtain an optimal matching impedance signal, and the CPU-based DSP processing system comprises a CPU and a DSP which are mutually connected in an interactive way;
the best matching impedance value is set to the telephone interface chip of the device, and the SPC exchange receives the best signal and improves the communication quality.
Specifically, the impedance automatic matching system judges the impedance matching degree in an echo detection mode, wherein the higher the echo amplitude of the echo detection mode is, the lower the impedance matching degree is, and conversely, the higher the impedance matching degree is, the lower the echo amplitude is.
The impedance matching method of the impedance automatic matching system is as follows:
s1, sending an instruction through a CPU to set an impedance signal value;
s2, sending DTMF signals to a user loop by adopting a DSP, and transmitting the DTMF signals to an SLIC chip by utilizing a PCM data bus; judging whether the DTMF signal exists or not according to the output signal, if yes, executing the step S3, and if not, executing the step S1;
s3, detecting a reflected DTMF signal on a PCM data bus by a DSP processor, and performing signal matching when the DSP detects a reflected echo; the DTMF signal transmitted to the SLIC chip is decoded by the SLIC chip and then transmitted to the TIP and RING wires;
s4, detecting the amplitude of the signal after the signal is matched, and recording the impedance and the reflected signal amplitude by measuring the echo amplitude to finish one-time test;
s5, using a CPU to send an instruction to continuously reduce impedance on the SLIC chip, performing similar test, repeating the steps S1-S4, detecting DTMF signals, measuring echo amplitude, and obtaining more than two groups of impedance and reflected DTMF signal data; if the detection counting is completed, executing step S6, and if the counting is not completed, executing step S1;
s6, obtaining the lowest echo amplitude from the plurality of groups of test data, automatically searching the impedance with the lowest echo amplitude as the best matched impedance signal value based on the cooperation of the DSP processing system of the CPU and the SLIC chip, setting the best impedance signal value, ending the test and completing the automatic impedance matching work.
It should be noted that, the DSP processing system based on the CPU provided in this embodiment is a control system integrating the CPU and the DSP, so as to greatly improve the sending speed of the instruction, and facilitate the automatic control of the impedance matching system, and realize automatic impedance matching.
Specifically, the CPU and the SLIC chip are connected through a local data bus, and the local data bus is used for transmitting a CPU control signal; the PCM data bus is a digital voice path to the CPU for transmitting voice data signals; the dual-port RAM is used for realizing data conversion between the CPU and the DSP, and the data conversion comprises voice data conversion and control data conversion.
It should be noted that, the DSP provided in this embodiment adopts a 32bit ADSP21020 type or TMS320C3X type digital signal processor; the CPU adopts a 32-bit MIPS4kc-RISC core-based processor for buffering instructions and data to complete the control of the impedance automatic matching system, and has the I-cache of 4K-byte, the D-cache of 4K-byte and the support of MMU.
Specifically, the SLIC chip adopts a core science and technology brand SI3215 type chip, the SLIC chip is used for providing an analog subscriber loop interface to realize the integration of a gateway of a communication device and an impedance data network, and comprises a control interface, a PCM interface, a tone generator, an analog-to-digital conversion circuit, a hybrid circuit, two wires of TIP and RING and a discrete line driving circuit formed by discrete elements; the SLIC chip comprises, but is not limited to, a chip of the chip science and technology brand SI3215 type, other brands such as Nissan chemical, cree company, crystal electric, light epitaxy, siwhiskey, sanan brand series and SLIC chips of various types are also suitable for the impedance matching method of the invention; the structure and principle of the SLIC chip are known in the market, and the control interface, the PCM interface, the tone generator, the analog-to-digital conversion circuit, the hybrid circuit, the TIP and RING two lines, the discrete line driving circuit formed by discrete components, and the like are all conventional circuit technologies in the conventional SLIC chip, so that the description thereof is omitted herein.
It should be noted that, the DSP provided in this embodiment is an english abbreviation of a digital signal processor, and is a fast powerful microprocessor, and the DSP can perform fast mathematical operations on a digital signal stream, and the mathematical operations are the impedance matching control algorithms for computing the impedance signal values matched between the subscriber loop transmission line and the signal source, where the mathematical operations include simple addition, subtraction, multiplication, complex filtering, and signal analysis functions, such as fast fourier transform and discrete cosine transform, and the DSP is embedded in an impedance automatic matching system.
The working principle of the DSP is to receive an analog signal, convert the analog signal into a digital signal of 0 or 1, modify, delete and strengthen the digital signal, and interpret the digital data back into an analog data or actual environment format in the SLIC system chip.
Wherein DTMF is an abbreviation for dual tone multi frequency english; SLIC is an english abbreviation for subscriber loop interface circuit, SLIC chip is an analog phone line interface circuit chip; the CPU is an English abbreviation of a central processing unit, and mainly comprises an arithmetic unit, a controller, a register group, an internal bus and the like.
In summary, in the impedance matching detection method provided in this embodiment, the reflected echo is detected by the DTMF signal sent by the DSP, the lowest amplitude is obtained in the multiple sets of test data by measuring the echo amplitude, the impedance is defined as the impedance that is finally matched, the impedance is transmitted to the SLIC chip through the PCM data bus, the signal is sent to the two lines of TIP and RING through the decoding of the SLIC chip, at this time, the DSP monitors the reflected DTMF signal on the PCM data bus, and if the signal is matched, the amplitude is detected; by continuously setting the impedance on the SLIC chip and performing similar tests, a group of impedance and data of the reflected DTMF signals are finally obtained, and the impedance with the lowest amplitude of the reflected signals is selected as the optimal matching impedance.
The automatic analog loop impedance matching detection method provided by the invention is used for carrying out automatic user loop impedance matching, reducing the manual test intensity, reducing the test time, improving the matching accuracy, greatly improving the call tone quality of the gateway after impedance matching, reducing noise and improving the fax/pos reliability.
Although embodiments of the present invention have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (6)
1. An automatic analog loop impedance matching detection method is characterized by comprising the following steps:
an impedance automatic matching system formed by the interaction of a CPU-based DSP processing system and an SLIC chip is adopted to automatically perform impedance matching between a subscriber loop transmission line and a signal source so as to obtain an optimal matching impedance signal, wherein the CPU-based DSP processing system comprises a CPU and a DSP which are mutually connected;
transmitting the test signal to the traditional analog transmission line, wherein when the impedance is not matched, the transmission system reflects the signal, and the reflected signal is checked to automatically match the optimal impedance value of the transmission system formed by the transmission line and the program-controlled exchanger;
the impedance automatic matching system judges the impedance matching degree in an echo detection mode, and the impedance matching method of the impedance automatic matching system comprises the following steps:
s1, a CPU sends an instruction to set an impedance signal value;
s2, sending DTMF signals to a user loop by adopting a DSP, and transmitting the DTMF signals to an SLIC chip by utilizing a PCM data bus; judging whether the DTMF signal exists or not according to the output signal, if yes, executing the step S3, and if not, executing the step S1;
s3, detecting a reflected DTMF signal on a PCM data bus by a DSP processor, and performing signal matching when the DSP detects a reflected echo;
s4, detecting the amplitude of the signal after the signal is matched, and recording the impedance and the reflected signal amplitude by measuring the echo amplitude to finish one-time test;
s5, continuously adjusting impedance on the SLIC chip by utilizing a CPU to send an instruction, performing similar test, repeating the steps S1-S4, detecting DTMF signals, measuring echo amplitude, and obtaining more than two groups of impedance and reflected DTMF signal data; if the detection counting is completed, executing step S6, and if the counting is not completed, executing step S1;
s6, obtaining the lowest echo amplitude from the plurality of groups of test data, automatically searching the impedance with the lowest echo amplitude as the best matched impedance signal value based on the cooperation of the DSP processing system of the CPU and the SLIC chip, setting the best impedance signal value, ending the test and completing the automatic impedance matching work.
2. The method for automatic analog loop impedance match detection of claim 1, wherein: the automatic matching of the impedance of the SLIC is performed by means of the intensity of the reflected signal between the detection device and the transmission system.
3. The method for automatic analog loop impedance match detection of claim 1, wherein: the PCM data bus is a digital voice path to the CPU for transmitting voice data signals.
4. The method for automatic analog loop impedance match detection of claim 1, wherein: the SLIC chip adopts a chip of a core science and technology brand SI3215 type, is used for providing an analog subscriber loop interface to realize the integration of a gateway of the communication equipment and an impedance data network, and comprises a control interface, a PCM interface, a tone generator, an analog-to-digital conversion circuit, a hybrid circuit, a TIP and RING two wires and a discrete circuit driving circuit formed by discrete elements.
5. The method for automatic analog loop impedance match detection of claim 1, wherein: the DTMF signal transmitted to the SLIC chip is decoded by the SLIC chip and then transmitted to the TIP and RING wires.
6. The method for automatic analog loop impedance match detection of claim 1, wherein: and a dual-port RAM is arranged between the CPU and the DSP and is used for realizing data conversion between the CPU and the DSP, wherein the data conversion comprises voice data conversion and control data conversion.
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Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10163889A (en) * | 1996-12-03 | 1998-06-19 | Kokusai Electric Co Ltd | Automatic impedance matching system |
| WO2000079693A1 (en) * | 1999-06-18 | 2000-12-28 | 2Wire, Inc. | Active hybrid with dynamic impedance matching against different loop conditions and related method |
| US6377681B1 (en) * | 1998-04-01 | 2002-04-23 | National Semiconductor Corporation | Signal line driving circuit with self-controlled power dissipation |
| CN1389853A (en) * | 2001-06-01 | 2003-01-08 | 华为技术有限公司 | Phonetic codec chip capable of realizing impedance matching and mixed balance |
| CN1575559A (en) * | 2001-10-24 | 2005-02-02 | 卡提纳网络公司 | Method and apparatus for transient suppression in an integrated pots/dsl line card |
| CN1694422A (en) * | 2005-05-11 | 2005-11-09 | 港湾网络有限公司 | Method for testing network transmission line using time-domain signal |
| WO2006022132A1 (en) * | 2004-08-23 | 2006-03-02 | Nec Corporation | High-frequency circuit, and communication device using the same |
| CN101202566A (en) * | 2006-11-17 | 2008-06-18 | 深圳市业通达实业有限公司 | Transmit-receive common frequency power line carrier system |
| CN103151853A (en) * | 2013-04-03 | 2013-06-12 | 天津工业大学 | Wireless power transmission impedance automatic matching device |
| CN106488071A (en) * | 2015-08-26 | 2017-03-08 | 日本冲信息株式会社 | Communication equipment |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050089604A (en) * | 2004-03-05 | 2005-09-08 | 주식회사 팬택앤큐리텔 | Radio frequency signal characteristic compensating apparatus in a mobile communication terminal |
-
2020
- 2020-09-16 CN CN202010972219.3A patent/CN114265334B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH10163889A (en) * | 1996-12-03 | 1998-06-19 | Kokusai Electric Co Ltd | Automatic impedance matching system |
| US6377681B1 (en) * | 1998-04-01 | 2002-04-23 | National Semiconductor Corporation | Signal line driving circuit with self-controlled power dissipation |
| WO2000079693A1 (en) * | 1999-06-18 | 2000-12-28 | 2Wire, Inc. | Active hybrid with dynamic impedance matching against different loop conditions and related method |
| CN1389853A (en) * | 2001-06-01 | 2003-01-08 | 华为技术有限公司 | Phonetic codec chip capable of realizing impedance matching and mixed balance |
| CN1575559A (en) * | 2001-10-24 | 2005-02-02 | 卡提纳网络公司 | Method and apparatus for transient suppression in an integrated pots/dsl line card |
| WO2006022132A1 (en) * | 2004-08-23 | 2006-03-02 | Nec Corporation | High-frequency circuit, and communication device using the same |
| CN1694422A (en) * | 2005-05-11 | 2005-11-09 | 港湾网络有限公司 | Method for testing network transmission line using time-domain signal |
| CN101202566A (en) * | 2006-11-17 | 2008-06-18 | 深圳市业通达实业有限公司 | Transmit-receive common frequency power line carrier system |
| CN103151853A (en) * | 2013-04-03 | 2013-06-12 | 天津工业大学 | Wireless power transmission impedance automatic matching device |
| CN106488071A (en) * | 2015-08-26 | 2017-03-08 | 日本冲信息株式会社 | Communication equipment |
Non-Patent Citations (2)
| Title |
|---|
| 回波损耗测量法在高频通道故障处理中的应用;张海华;;电力信息与通信技术;20131015;第11卷(第10期);第34-38页 * |
| 基于Si32261的FXS接口设计与应用;周胡净等;微处理机;20170615(第03期);第79-82页 * |
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