CN114258580A - 制造和钝化管芯的方法 - Google Patents

制造和钝化管芯的方法 Download PDF

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Publication number
CN114258580A
CN114258580A CN202180005096.9A CN202180005096A CN114258580A CN 114258580 A CN114258580 A CN 114258580A CN 202180005096 A CN202180005096 A CN 202180005096A CN 114258580 A CN114258580 A CN 114258580A
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Prior art keywords
die
passivation
layer
passivation layer
wafer
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CN202180005096.9A
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M·谢甘普尔
G·阿弗伦泽
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TDK Corp
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TDK Corp
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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
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Abstract

公开了一种制造和钝化管芯（101）的方法。所述方法包括若干个步骤。在一个步骤中，提供管芯（101），所述管芯（101）包括具有突起部的有源正面（103），所述突起部被布置用于电气接触管芯。在进一步的步骤中，由覆盖构件来覆盖突起部的一部分。除了覆盖构件所覆盖的该部分之外，在一个单个过程步骤中在管芯的所有面上沉积钝化层（801），所述所有面包括正面（103）及其突起部。在以下步骤中，使覆盖构件从突起部的被覆盖部分脱离，以暴露突起部。由于没有钝化层（801）覆盖该部分，因此其被定义为电气接触区域（904）。

Description

制造和钝化管芯的方法
本发明涉及一种制造和钝化管芯的方法，该管芯包括具有导电突起部的有源正面。
用于密封管芯的常用方法包括具有若干个步骤的模制过程，这些步骤需要预处理和后处理以将一个或多个保护层应用到半导体管芯。
用于制造和钝化半导体的进一步的现有技术方法通常基于晶圆级封装方法并且包括多个步骤。制造半导体晶圆，包括在若干个步骤中在晶圆的若干个面上应用两个或更多个不同的钝化层。通常，钝化层通过化学气相沉积（CVD）来沉积。然后，将晶圆单颗化（singulate）成管芯。US 2014/0091482 A1或US 2008/0318396 A1中公开了这样的方法的示例。
美国专利申请2005/0167799 A1描述了一种制造方法，包括：在半导体晶圆的背面上应用钝化层，利用粘合带来层压背面，以及将晶圆切块。随后，作为预处理步骤，将粘合带扩展以扩大单个半导体管芯之间的间隙，随后是在半导体管芯的正面和侧面上应用钝化层。
所有这些方法包括多个技术广泛的步骤，包括用于钝化管芯的若干个钝化步骤以及预处理和后处理步骤，并且因此耗时且成本高昂。
鉴于现有技术方法的缺点，本发明的目的是公开一种用于制造和钝化管芯的改进的且不太昂贵和耗时的方法。
该目的通过根据权利要求1的制造和钝化方法来解决。
所述方法包括以下步骤：
- 提供管芯，所述管芯包括具有突起部的有源正面，所述突起部被布置用于电气接触管芯。
- 由覆盖构件来覆盖突起部的一部分。
- 除了在覆盖构件所覆盖的该部分上之外，在一个单个过程步骤中在管芯的所有面上应用钝化层，所述所有面包括正面及其突起部。
- 在应用钝化层之后使覆盖构件从突起部的被覆盖部分脱离，以暴露突起部的所述部分。没有任何钝化层覆盖该部分，该部分因此被定义为电气接触区域。
这些步骤优选地以所公开的次序来完成。
通过在单个过程步骤中在所有面上应用钝化层，可以避免若干个耗时的钝化步骤。
突起区域可以是焊料凸块或厚膜金属化。
覆盖构件可以是钝化带。
在一个方法中，覆盖构件可以是钝化带，所述钝化带包括其上具有第一粘合层的第一基层。
所述方法可以包括以下步骤：
- 提供管芯，所述管芯包括具有突起部的有源正面。
- 由钝化带来覆盖突起部的一部分。
- 除了在钝化带所覆盖的该部分上之外，在单个过程步骤中在管芯的所有面上应用钝化层。
- 使钝化带从被覆盖部分脱层，以暴露突起部的所述部分。该部分没有被钝化层所覆盖。因此，该部分被定义为电气接触区域。
这些步骤优选地以所公开的次序来完成。
在使钝化带脱层之后，不必需进行后处理步骤。特别地，不必需比如蚀刻的化学后处理步骤以从电气接触区域去除钝化层，这在常用方法中将是必需的。通过避免该步骤，可以节省成本和时间。
管芯可以包括半导体材料。半导体材料可以包括硅（Si）材料。基于半导体材料的管芯可以用于不同应用的微机电系统（MEMS）设备。替代地，管芯可以由矿物材料组成。矿物材料可以包括陶瓷。管芯可以用作电容器、变阻器或热敏电阻。
通过原子层沉积（ALD）来应用钝化层是可能的。一般而言，半导体管芯和其它管芯上的钝化层通常通过CVD来应用。原则上，在CVD过程中，活性物质在受控的大气和升高的温度下以气相进行反应，以沉积层。CVD过程通常在相对高的温度下施行，这可能潜在地将来自气体大气的杂质引入沉积材料层中。在技术上，对于CVD过程所需的这样的高沉积温度限制了该过程中所涉及的材料（包括带）的选择以及因此其功能。
在另一方面，ALD过程具有的主要优点是能够在低温状态（regime）下以高均匀性和高质量来沉积各层。一般而言，作为CVD过程的变体，ALD涉及任何目标衬底上的单层的沉积。可以通过系统地重复循环来沉积多个单层，所述循环包括将气态前体的剂量加入沉积室中，使其与目标的表面反应，并且利用惰性气体来冲洗该室以清除未化学吸附的前体。在本方法中，考虑到引入的带和特定的所需钝化材料，由于钝化层的所需关键性质（电气、机械等），ALD过程是优选的。
本发明进一步包括在晶圆级处施行的方法，并且因此提供了一种晶圆级封装方法。在所述方法中，可以通过进行以下步骤来从晶圆制造管芯：
a）提供晶圆，所述晶圆包括有源正面以及背面，所述有源正面具有若干个突起部，所述突起部被布置用于电气接触管芯。在有源正面上，可以提供用于多个单个设备的多个设备结构。
b）将晶圆单颗化成单个管芯。然后，每个管芯包括实现单个电气设备的设备结构。每个管芯进一步包括由导电材料制成的至少一个突起部。
c）由覆盖构件来覆盖每个突起部的一部分。对于该方法而言重要的是，覆盖构件至少部分地覆盖每个管芯上的至少一个突起部。
d）除了在覆盖构件所覆盖的形成电气接触区域的部分上之外，在一个步骤中在单颗化管芯的所有面上应用钝化层，所述所有面包括正面、背面和所有侧面。
e）在应用钝化层之后使覆盖构件从突起部的被覆盖部分脱离，以暴露突起部的所述部分。没有钝化层覆盖这些部分，这些部分因此被定义为电气接触区域。
这些步骤优选地以所公开的次序来完成。
覆盖构件包括钝化带。
在一方法中，覆盖构件包括钝化带，所述钝化带包括其上具有第一粘合层的第一基层。钝化带被层压在每个突起部的部分上。
在优选的方法中，在步骤b）中对晶圆进行单颗化包括以下步骤：
i）从正面将晶圆部分切割式切块成管芯，每个管芯具有至少一个突起部。
ii）将包括其上具有第二粘合层的第二基层的研磨带层压到晶圆的正面。在该步骤之后，所述带完全地覆盖管芯的正面。
iii）通过从背面研磨晶圆来对管芯进行单颗化。在该步骤中，部分切割式切块步骤之后残留的晶圆的背面处的连续晶圆层被完全去除。
iv）使研磨带从单颗化管芯脱离。
所引入的小写字母和罗马数字示出了所公开过程的若干个步骤的明显顺序。它们可以被视为参考符号，标示指定的过程。
由于切块步骤在研磨之前执行，因此在本方法中，最小化了背面碎裂（chipping）和管芯损坏的风险。因此，与研磨之后进行切块的方法相比，该方法允许处理更薄的管芯。
晶圆可以包括比如硅的半导体材料或比如陶瓷的矿物材料。从晶圆单颗化的单个管芯可以像上面描述的单个管芯一样被使用。因此，晶圆级封装方法使得能够同时制造若干个微电子设备。
由于上面描述的优点，优选地通过ALD过程来应用钝化层。作为ALD过程的进一步优点，即使钝化层被沉积在具有高纵横比的沟槽或孔中、诸如例如被沉积在切块道（dicingstreet）处，也可以容易地控制层厚度。因此，也可以通过ALD过程来良好地定义切块道的纵横比，即切块深度与切块道宽度的比率。
在一个实施例中，考虑正面的表面形貌以及其上突起部的形状以用于选择研磨带。
例如，研磨带上的第二粘合层可以比钝化带上的第一粘合层更厚。这允许研磨带粘合到正面的整个表面，而与表面形貌以及其上突起部的形状无关。厚的粘合层可以覆盖在正面表面上突出的所有结构和形状。
通过使用ALD过程，有可能使在步骤d）中应用钝化层期间的两个相邻管芯之间的距离保持等于在步骤i）中的切块期间产生的切块道的宽度。在对管芯进行单颗化之后和应用钝化层之前，不采取或不需要进一步的步骤来增加管芯之间的距离。在常规过程中，个体管芯被安装在适当的带上。该带被扩展以将它们的相互距离增加到所需的最小值。在所公开的实施例中，可以省略该附加步骤，从而节省了时间和成本。
在步骤i）中的切块之前在晶圆的正面上应用保护层是可能的。所述保护层钝化层的正面。此外，它允许通过在所述保护层中蚀刻通孔的开口以暴露接触点的期望区域来确切定义正面上的电气接触点。导电突起部定位在这些接触点上。它们可以通过在接触点上焊接金属来形成。
在一个方法中，在从正面将晶圆部分切割式切块成管芯期间，背面可以被覆盖有切块带，所述切块带包括其上具有第三粘合层的第三基层，以便机械地保护背面免受比如晶圆裂纹以及诸如此类的可能的损坏。
第一、第二和第三基层以及粘合层的命名并不指代这些层在所描述的过程期间以其被使用的次序。该命名仅用于区分。这些层是不同带的组件，可以包括不同的材料，并且可以具有不同的性质。
在一个方法中，钝化、研磨和切块带中的一个或多个可以通过物理方法被脱离，所述物理方法包括UV暴露（如果粘合剂是UV可释放的）或加热（如果粘合剂是热可释放的）中的至少一个。这样的物理方法削弱带的粘合力，并且因此使释放步骤更容易。
在将钝化带层压或粘合到晶圆的正面之前，在正面上应用用于电互连的焊料凸块是可能的。在这种情况下，所述突起部是焊料凸块。
替代地，可以在晶圆的正面上应用用于电互连的厚膜金属化。在这种情况下，所述突起部是厚膜金属化。
在步骤c）中，焊料凸块或厚膜金属化可能仅被钝化带部分地覆盖。因此，在步骤d）期间，钝化层将被部分地应用到突起部（例如凸块或金属化）的未被覆盖且仍然暴露的区域上。电气接触区域的大小可以由被钝化带覆盖的突起部的表面的大小来定义。因此，可以确切地定义该大小。
本发明进一步包括一种管芯，它可以通过上面描述的方法来制造。管芯具有钝化层，所述钝化层覆盖除了电气接触区域之外的管芯的所有面和边缘。此外，钝化层在每一个面上是均匀、连续且均质的。在一个实施例中，它在每一个面上还具有相同的厚度。这些性质简化了管芯上的进一步处理步骤。
在一实施例中，管芯可以是半导体。半导体可以包括硅（Si）或碳化硅（SiC）材料。半导体可以用于微机电系统（MEMS）设备。替代地，管芯可以由矿物材料组成。矿物材料可以包括陶瓷。管芯的电气设备可以体现为电容器、变阻器或热敏电阻。
在一实施例中，应用焊料凸块作为晶圆的正面上的突起部，以用于电气互连。焊料凸块被钝化层部分地覆盖。替代地，在正面上应用厚膜金属化以用于电气互连，所述厚膜金属化也可以被钝化层部分地覆盖。突起部的未覆盖部分用作例如与外部电路环境（比如PCB或诸如此类）互连的电气接触区域。
管芯的正面可以具有两个层。保护层密封正面。通过该保护层中的凹槽，可以定义电气接触点。本文中，词语“点”没有其数学意义。而是，它描述了小的定义区域。
全部围绕管芯的钝化层被层压到保护层上。两个层的材料可能彼此不同。钝化层保护管芯免受潜在的环境影响，包括后续组装步骤中的湿气、化学污染或物理损坏。
在一个实施例中，钝化层可以是电气绝缘的。通过ALD沉积的钝化层可以包括任何金属氮化物或氧化物。特别地，钝化层可以包括Al2O3、AlN和TiO2中的一个或多个。Al2O3具有高电阻和高热导率。
具体实施方式
在下文中，将参考随附附图来更详细地解释本发明。附图示出了：
图1：具有有源表面的晶圆的正面和具有无源表面的晶圆的背面，
图2A：在应用钝化层之前，具有用于电气互连的焊料凸块的单个管芯的横截面视图，
图2B：在应用钝化层之前，具有用于电气互连的厚膜金属化的单个管芯的横截面视图，
图3：在部分切割式切块之后，在背面处附着到由框架保持的切块带的晶圆的俯视图，
图4：在部分切割式切块之后，利用背面附着到切块带的晶圆的横截面视图，
图5：在背面研磨之前，利用正面附着到研磨带的晶圆的横截面视图，
图6：在背面研磨之后，利用正面附着到研磨带的晶圆的单个管芯的横截面视图，
图7：在应用钝化层之前，利用厚膜金属化的上表面附着到钝化带的单个管芯的横截面视图，
图8：在应用钝化层之后，利用厚膜金属化的上表面附着到钝化带的单个管芯的横截面视图，
图9A：在应用钝化层之后，具有用于电气互连的焊料凸块的单个管芯的横截面视图，以及
图9B：在应用钝化层之后，具有用于电气互连的厚膜金属化的单个管芯的横截面视图。
各图中相似或明显相同的元件利用相同的参考符号来标记。各图以及各图中的比例是不可缩放的。
图1示出了晶圆100的实施例，所述晶圆100是由Si组成的半导体，并且具有可以具有任何大小的圆形形状。半导体晶圆100包括半导体管芯101的阵列。管芯边界102由虚拟线来指示。电路层或其它电气设备结构被应用在晶圆的正面103上，或者被集成在靠近正面的管芯内。因此，正面103被指定为有源表面。
接合焊盘104形成在连接到设备结构的有源表面上。所述接合焊盘用作晶圆与任何连接的电路之间的电气接触点。用于电气互连的突起部被应用在所述接合焊盘上。
该图的底部部分处示出的晶圆的背面105没有电路。因此，晶圆的背面可以被指定为无源表面。无源表面106可以包括晶圆的材料。
图2a和2b示出了晶圆100的一个单个管芯101的截面视图。在半导体衬底上，应用了保护层201和中间层202。保护层201可以由SiO2或Si3N4组成。保护层201可以通过比如溅射或CVD的常规方法来沉积。介电保护层201定义了半导体与晶圆的正面上所应用的突起部（例如焊料凸块、厚膜金属化）之间的电气接触点的大小和位置，该突起部是导电的。对于该过程，在本实施例中使用蚀刻过程来形成开口，该开口在其底部处通过保护层201来暴露接合焊盘104。将凸块下金属化（UBM）203应用到该开口中。在其上形成导电焊料凸块204。可以通过丝网印刷、球凸块化或喷射过程来沉积焊料凸块204。
替代地，可以利用通过常规溅射和后续的电镀过程沉积的厚膜金属化205来填充该开口。焊料凸块204和厚膜金属化205二者使得能够实现半导体管芯101与由该管芯中或该管芯上的设备结构以及外部电路（比如印刷电路板（PCB））实现的电气设备之间的电气互连。
在示例性方法的步骤a）中，提供了如图1中所示出的半导体晶圆。框架301用于保持带303，如图3中所示出的。带303由诸如聚乙烯或类似弹性材料之类的材料形成。可以通过应用压力、真空和/或热来支持带303的粘合。带303的粘合层可以包括UV可释放粘合剂、或允许带303的稍后释放的任何其它粘合剂。因此，带303粘合到晶圆100的背面105，而不形成永久接合。
当带303附着到晶圆100的背面105时，从正面103通过锯割切块道302将晶圆100切块成单个管芯101。单个管芯101通过切块步骤i）仅被部分地分割，如图4中所示出的。切块道302仅被部分切割。在晶圆的背面105上，保留了晶圆材料的连续层401。
在图5中所图示的第三步骤ii）中，将研磨带501层压在晶圆100的正面上。研磨带501也可以由框架301来保持。带501由基层501A和粘合层501B组成。粘合层501B的厚度取决于焊料凸块204、厚膜金属化205、或用于电气互连的任何其它突起部的厚度。该层应当以这样的方式来执行，使得粘合层501B覆盖晶圆100的整个正面103，包括保护层201、突起部和稍后的电气接触区域。
接下来，使背面105上的带303的粘合层从晶圆100脱离。取决于粘合剂的性质，可以通过机械压力、加热、UV暴露或不同的方法来执行释放。
在步骤iii）中，通过研磨将晶圆100分割成单颗化管芯101，这是由于背面401上的连续层被研磨（ground），直到其被完全去除为止，如图6中所示出的。因此，已经通过管芯101的切块道302暴露的侧面602和经研磨的背面601被完全地暴露，并且从背面可接近，并且因此准备好应用钝化。
所描述的研磨前切块（DBG）过程允许更好地控制切块过程、最小化背面碎裂以及最小化管芯损坏的风险。研磨带501保护正面103上的有源表面在背面研磨期间免受损坏。
一旦晶圆100被研磨并且管芯101被单颗化，就需要特定的脱层和层压过程来使研磨带501脱层（步骤iv）并且将钝化带701层压（步骤c）在管芯101的正面103上，如图7中所示出的。取决于粘合剂的性质，研磨带501的释放可以通过加热、UV暴露、或不同方法来执行。钝化带701可以由框架301来保持，并且由基层701A和粘合层701B组成。该钝化带701仅覆盖稍后的电气接触区域，这些电气接触区域在以下步骤中将不会被钝化。因此，钝化带701的粘合层701B比研磨带501的粘合层501B更薄。作为示例，与20µm至60µm的研磨带501的粘合层501B的厚度相比，钝化带701的粘合层701B的厚度是大约8µm至10µm。
在稍后的电气接触区域被带701所覆盖之后，通过ALD来沉积钝化层801，如图8中所图示的（步骤d）。通过ALD过程，每个管芯的所有六个面（正面103、背面105和四个侧面602）被同时钝化。
与其它方法形成对照，在所描述的方法中，不需要为了扩大管芯101的侧面602之间的距离而扩展带501或701。这里，这样的步骤是多余的，这是因为通过ALD过程的钝化允许以纳米尺度来沉积单个钝化层。通过重复应用这样的单层，可以实现多达µm尺度的层厚度。因此，在面对的侧面602之间的小距离（其等于切块道302的宽度）以及管芯的正面103与带701之间的小间隙都不会妨碍钝化的均匀沉积。
此外，ALD过程具有的主要优点是能够在低温状态下以高均匀性和高质量来沉积各层，并且能够以小于1nm的最小变化来覆盖高纵横比形貌。仅ALD过程允许基于金属氮化物或金属氧化物（比如氧化铝）来进行钝化层的薄膜沉积，这是因为CVD过程中所需的温度将会高于大多数聚合物的分解温度。与CVD形成对照，ALD可以在低温（即在室温左右）下施行。用于钝化过程的CVD是在高于150℃的升高的温度下施行的。
当钝化层801的沉积完成时，使钝化带701从管芯101脱离（步骤e）。取决于粘合剂的性质，可以通过加热、UV暴露或不同方法来迫使进行释放。钝化带701的第一粘合层701B的通常疲劳强度是大约6至8N/mm2。当从管芯101释放带701时，也沉积到带701的底部表面的钝化层801在突起部与带701之间的上边缘处脱层，这是因为该边缘是所述层的弱点。
例如，钝化层801在厚膜金属化205和带701的上边缘处、或在焊料凸块204与带701之间的边缘处脱层。钝化层801的确切边界线可以由带701的粘合层701B的厚度来定义。厚粘合层701B覆盖焊料凸块204或厚膜金属化205的大区域。因此，在焊料凸块204或厚膜金属化205的大区域上，不可以沉积钝化层。边界线接近管芯的表面延伸。
另一方面，薄粘合层701B覆盖焊料凸块204或厚膜金属化205的相对较小的部分。因此，钝化层801可以沉积在焊料凸块204或厚膜金属化205的较大部分上。以这样的方式，可以定义未被钝化层801覆盖的电气接触区域的大小。因此，可以确切地定义该大小。
图9A和9B中示出了具有钝化层801的所得到的管芯901和902，其中突起部是图9A中的焊料凸块204（管芯901）或图9B中的厚膜金属化205（管芯902）。钝化层801被层压在管芯101的所有面上，并且终止于突起部204或205的上边缘903A或903B处。未被钝化层801覆盖的区域定义了电气接触区域904。
钝化层801可以由诸如氧化铝（Al2O3）之类的介电材料组成，该介电材料允许高电气绝缘性。其它可能的材料是AlN、或Al2O3和TiO2的混合物。钝化层材料的确切组成取决于外部影响、所需的材料质量（诸如电阻、热导率和耐温性）以及材料成本。
钝化层801保护半导体管芯101在以下过程步骤中免受外部影响，诸如湿气、化学污染或机械损坏。
在各图中未示出的一个实施例中，半导体管芯可以用于形成用于诸如感测、保护、功率电子器件等之类的各种应用的微机电系统（MEMS）设备。
在各图中未示出的另一个实施例中，管芯可以包括矿物材料。矿物材料可以包括陶瓷。管芯的电气设备可以体现为电容器、变阻器或热敏电阻。
在各图中未示出的另一个实施例中，晶圆可以包括矿物材料。晶圆可以可分割成单颗化管芯。矿物材料可以包括陶瓷。管芯的电气设备可以体现为电容器、变阻器或热敏电阻。
参考符号列表
100 晶圆
101 管芯
102 管芯边界
103 正面
104 接合焊盘
105 背面
106 晶圆的无源表面
201 保护层
202 中间层
203 凸块下金属化（UBM）
204 焊料凸块
205 厚膜金属化
301 框架
302 切块道
303 在切块时用于保护的聚合物带
401 背面上的连续层
501 在研磨时用于保护的聚合物带
501A 聚合物带501的基层
501B 聚合物带501的粘合层
601 管芯的经研磨的背面
602 管芯的侧面
701 在应用钝化层时用于保护的聚合物带
701A 聚合物带701的基层
701B 聚合物带701的粘合层
801 钝化层
901 具有钝化层和焊料凸块的管芯
902 具有钝化层和厚膜金属化的管芯
903A 焊料凸块上的钝化层的上边缘
903B 厚金属化上的钝化层的上边缘
904 电气接触区域

Claims (21)

1.一种制造和钝化管芯（101）的方法，包括：
- 提供管芯（101），所述管芯（101）包括具有突起部的有源正面（103），所述突起部被布置用于电气接触管芯，
- 在应用钝化层（801）之前，由钝化带（701）来覆盖突起部的一部分，
- 除了在钝化带（701）所覆盖的该部分上之外，在一个单个过程步骤中在管芯（101）的所有面上应用钝化层（801），所述所有面包括正面（103）及其突起部，
- 在应用钝化层（801）之后使钝化带（701）从突起部的被覆盖部分脱离，以暴露突起部的所述部分，所述部分形成了电气接触区域。
2.根据权利要求1所述的方法，其中所述钝化带（701）包括其上具有第一粘合层（701B）的第一基层（701A）。
3.根据一个权利要求1或2所述的方法，其中所述管芯包括半导体材料。
4.根据权利要求1至3中的一项所述的方法，其中所述钝化层（801）通过原子层沉积ALD来沉积。
5.一种晶圆级封装方法，包括以下步骤：
a）提供晶圆（100），所述晶圆（100）包括有源正面（103）和无源背面（105），所述有源正面（103）具有若干个突起部，所述突起部被布置用于电气接触管芯，
b）将晶圆（100）单颗化成单个管芯（101），每个管芯（101）具有至少一个突起部，
c）在应用钝化层（801）之前，由钝化带（701）来覆盖每个突起部的一部分，
d）除了在钝化带（701）所覆盖的部分上之外，在一个单个过程步骤中在单颗化管芯的所有面上应用钝化层（801），所述所有面包括正面（103）、背面（105）和所有侧面（602），
e）在应用钝化层（801）之后使钝化带（701）从突起部的被覆盖部分脱离，以暴露突起部的所述部分，所述部分形成了电气接触区域。
6.根据权利要求5所述的方法，其中所述钝化带（701）包括其上具有第一粘合层（701B）的第一基层（701A）。
7.根据权利要求5或6所述的方法，其中所述晶圆包括半导体材料。
8.根据权利要求5至7中的一项所述的方法，其中所述钝化层（801）通过原子层沉积ALD来沉积。
9.根据权利要求5至8中的一项所述的方法，其中在步骤b）中对晶圆（100）进行单颗化包括：
i）从正面（103）将晶圆（100）部分切割式切块成管芯（101），每个管芯（101）具有至少一个突起部，
ii）将包括其上具有第二粘合层（501B）的第二基层（501A）的研磨带（501）层压到晶圆的正面（103），
iii）通过从背面（105）研磨晶圆来对管芯（101）进行单颗化，
iv）使研磨带（501）从单颗化管芯（101）释放。
10.根据权利要求9所述的方法，其中研磨带（501）上的第二粘合层（501B）比钝化带（701）上的第一粘合层（701B）更厚。
11.根据权利要求9或10所述的方法，其中在应用钝化层（801）期间的两个相邻管芯（101）之间的距离保持等于在步骤i）中形成的切块道（302）的宽度。
12.根据权利要求9至11中的一项所述的方法，其中在步骤i）中的切块之前，在晶圆的正面（103）上应用保护层（201）。
13.根据权利要求9至12中的一项所述的方法，其中在从正面（103）将晶圆（100）部分切割式切块成管芯（101）期间，背面（105）被覆盖有切块带（303）。
14.根据权利要求13所述的方法，其中所述带（303、501、701）通过物理方法被脱离，所述物理方法包括UV暴露或加热中的至少一个。
15.根据权利要求5至14中的一项所述的方法，其中所述突起部是应用在管芯（101）上的焊料凸块（204），其中所述焊料凸块在步骤d）期间被钝化层（801）部分地覆盖。
16.根据权利要求5至15中的一项所述的方法，其中所述突起部是应用在管芯（101）上的厚膜金属化（205），其中所述厚膜金属化在步骤d）期间被钝化层（801）部分地覆盖。
17.一种管芯（101），具有钝化层（801），所述钝化层（801）覆盖除了突起部上的电气接触区域之外的管芯的所有面和边缘，其中所述钝化层在每一个面上是均匀、连续且均质的。
18.根据权利要求17所述的管芯（101），其中所述管芯（101）包括形成在半导体管芯上的MEMS。
19.根据权利要求17或18所述的管芯（101），其中管芯的正面（103）包括管芯的正面上的保护层（201）和全部围绕管芯的钝化层（801），由此钝化层被沉积到保护层（201）上，并且其中两个层的材料彼此不同。
20.根据权利要求15至19中的一项所述的管芯（101），其中所述钝化层（801）是电气绝缘的。
21.根据权利要求17至20中的一项所述的管芯（101），其中所述钝化层（801）包括Al2O3、AlN和TiO2中的一个或多个。
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