CN114257207A

CN114257207A - Method for starting up a crystal oscillator by means of external clock injection, crystal oscillator and monitoring circuit

Info

Publication number: CN114257207A
Application number: CN202110527116.0A
Authority: CN
Inventors: 陈建玮; 薛育理; 黄柏钧
Original assignee: MediaTek Inc
Current assignee: MediaTek Inc
Priority date: 2020-09-20
Filing date: 2021-05-14
Publication date: 2022-03-29
Also published as: TWI746412B; TW202213944A

Abstract

The invention provides a method of starting up a crystal oscillator XO by means of external clock injection, XO and a monitoring circuit. The XO includes an XO core circuit, an external oscillator and an injection switch, wherein a quality factor of the external oscillator is lower than a quality factor of the XO core circuit. The method comprises the following steps: generating an injection signal using an external oscillator; and turning on the injection switch to inject energy of the injection signal into the XO core circuit, and generating an amplitude-modulated signal according to a combination of the injection signal and a natural oscillation signal from the XO core circuit; and controlling an external oscillator according to the amplitude modulation signal to selectively change the injection frequency of the injection signal. By using the technical scheme of the invention, the total starting time of the XO can be reduced.

Description

Method for starting up a crystal oscillator by means of external clock injection, crystal oscillator and monitoring circuit

Technical Field

The present invention relates to fast start-up of crystal oscillators (XOs), and more particularly to a method of starting up an XO by means of external clock injection, an associated XO and a monitoring circuit.

Background

For future communication applications (e.g., duty-cycled wireless/wired systems), when there is no data to send or receive, a crystal oscillator (XO) within the communication device may enter a sleep mode (e.g., inhibit oscillation of the XO) to conserve power; when there is data to send or receive, the XO may enter a wake-up mode to start oscillation and then enter a listen (listen) mode with stable oscillation so that the communication device may send or receive data normally.

For example, the time period corresponding to the listening mode may be 1 millisecond (ms), and the time period corresponding to the awake mode (which may be referred to as the start time T)_START) May be 5ms, where the awake mode may consume power (e.g., consume 42.7% of the total power). Therefore, the start-up time of the XO may become a bottleneck to reduce the average power. Designers may attempt to reduce the start-up time by controlling the negative resistance within the XO, but this may introduce additional power consumption. Therefore, a novel starting method of the XO and related architecture are needed to solve the problems of the related art.

Disclosure of Invention

It is an object of the present invention to provide a method of starting up a crystal oscillator (XO) by means of external clock injection, an associated XO and a monitoring circuit to speed up the start-up of the XO without significantly increasing the additional power consumption.

At least one embodiment of the present invention provides a method of starting up an XO by means of external clock injection. The method can comprise the following steps: the injection signal is generated using an external oscillator external to an XO core circuit within the XO, where the XO includes the XO core circuit, the external oscillator external to the XO core circuit, and at least one injection switch. The at least one injection switch is coupled between an injection node of the XO and an output of the XO core circuit, the external oscillator is coupled to the injection node, and a quality factor of the external oscillator is lower than a quality factor of the XO core circuit; turning on at least one injection switch to inject energy of an injection signal into the XO core circuit to increase energy of a natural oscillation signal of the XO core circuit during start-up of the XO, wherein a modulation signal is generated at the injection node based on a combination of the injection signal and the natural oscillation signal; and controlling an external oscillator according to the modulation signal to selectively change the injection frequency of the injection signal. More particularly, the at least one injection switch is turned on when the external oscillator selectively changes an injection frequency of the injection signal.

At least one embodiment of the present invention provides an XO. The XO may include an XO core circuit, an external oscillator coupled to an injection node of the XO, at least one injection switch coupled between the injection node of the XO and an output of the XO core circuit, and a frequency controller coupled to the external oscillator. The XO core circuit may be configured to generate a natural oscillation signal within the XO core circuit. The external oscillator may be configured to generate the injection signal within the external oscillator, wherein a quality factor of the external oscillator is lower than a quality factor of the XO core circuit. For example, when at least one injection switch is turned on, energy of the injection signal is injected into the XO core circuit to increase the energy of the natural oscillation signal during start-up of the XO and a modulation signal is generated at the injection node according to the combination of the injection signal and the natural oscillation signal. The frequency controller may be configured to receive the modulation signal and control the external oscillator to selectively change an injection frequency of the injection signal according to the modulation signal. More particularly, the at least one injection switch is turned on when the external oscillator selectively changes an injection frequency of the injection signal.

At least one embodiment of the present invention provides a monitor circuit for generating a continuous comparison result of a demodulation voltage sequence that carries information of a relative phase between an injection signal and a natural oscillation signal of an XO. The monitoring circuit may include an amplifier, a capacitor, and a loop switch. The amplifier may be configured to receive a sequence of demodulation voltages through a first input of the amplifier, wherein the sequence of demodulation voltages comprises a first voltage and a second voltage following the first voltage. A capacitor is coupled to the second input of the amplifier, and the capacitor may be configured to sequentially store the sequence of demodulation voltages. The loop switch is coupled between the second input and the output of the amplifier, and the loop switch is configured to control the configuration of the amplifier. For example, when the loop switch is turned on, the amplifier is configured as a unity gain buffer to transfer the first voltage from the first input of the amplifier to the capacitor. When the loop switch is open, the amplifier is configured as a comparator for comparing a second voltage at the first input of the amplifier with the first voltage stored on the capacitor and generating a comparison result of the successive comparison results, wherein the comparison result carries information of a relative phase between the injection signal and a natural oscillation signal of the XO for controlling an injection frequency of the injection signal.

The start-up method and related XO provided by the embodiments of the present invention may utilize an external oscillator to inject energy into the XO core circuit to accelerate the XO start-up process. Advantageously, the injection switch coupled between the external oscillator and the XO core circuit may be turned on at all times during start-up, so that the efficiency of clock injection may be optimized. In some embodiments, the injection switch may be always on, at least for a period of time, or alternately on and off to optimize or improve clock injection efficiency when adjusting the injection frequency (locked to the natural frequency of the XO core circuit). The overall start-up time of the XO may be greatly reduced compared to the prior art. Therefore, the present invention can optimize the overall performance of the XO without causing any side effects, or in such a manner as to be less likely to cause side effects.

These and other objects of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various drawing figures and drawings.

Drawings

Fig. 1 is a schematic diagram illustrating a concept related to starting up a crystal oscillator (XO) by means of external clock injection according to an embodiment of the present invention.

Fig. 2 is a schematic diagram illustrating an XO according to an embodiment of the present invention.

Figure 3 is a flow diagram of a method of starting up the XO of figure 2 with external clock injection in accordance with an embodiment of the present invention.

Fig. 4 is a schematic diagram illustrating waveform patterns of some signals having varying relative phases in accordance with an embodiment of the present invention.

Fig. 5 shows a relationship between a growth rate and a relative phase of an intrinsic (inrinsic) oscillation signal according to an embodiment of the present invention.

Fig. 6 is a schematic diagram illustrating a detailed implementation of generating a series of demodulation voltages by a demodulation circuit according to an embodiment of the invention.

Fig. 7 shows some details of the relationship between relative phase and distortion according to an embodiment of the invention.

Fig. 8 shows some details of the relationship between relative phase and demodulation voltage according to an embodiment of the invention.

Fig. 9 shows some details of the relationship between relative phase and distortion according to an embodiment of the invention.

Fig. 10 shows some details of the relationship between relative phase and demodulation voltage according to an embodiment of the invention.

Figure 11 is a schematic diagram illustrating a detailed implementation of the XO shown in figure 2 in accordance with an embodiment of the present invention.

Fig. 12 shows the operation of the monitoring circuit shown in fig. 11 during a preset phase.

Fig. 13 shows the operation of the monitoring circuit shown in fig. 11 in the evaluation phase.

Figure 14 shows a schematic diagram of a detailed implementation of the XO shown in figure 2 in accordance with an embodiment of the present invention.

Figure 15 shows a schematic diagram of a detailed implementation of the XO shown in figure 2 according to another embodiment of the present invention.

Fig. 16 is a timing diagram of some signals within the implementation shown in fig. 15, according to an embodiment of the invention.

Fig. 17 is a schematic diagram illustrating a detailed implementation of the XO shown in fig. 2 according to another embodiment of the present invention.

Fig. 18 shows some details related to controlling the injection frequency according to an embodiment of the invention.

Fig. 19 shows some details related to controlling the injection frequency according to another embodiment of the invention.

Detailed Description

Certain terms that are used throughout the following description and claims to refer to particular components. As one skilled in the art will appreciate, electronic device manufacturers may refer to components by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and claims, the terms "include" and "comprise" are used in an open-ended fashion, and thus should be interpreted to mean "include, but not limited to. Likewise, the term "coupled" is intended to mean either an indirect or direct electrical connection. Thus, if one device couples to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.

Fig. 1 is a schematic diagram illustrating a concept regarding start-up (e.g., fast start-up) of a crystal oscillator 10(XO) injected by means of an external clock according to an embodiment of the present invention. For oscillators with a high quality factor (which may be referred to as high-Q oscillators), the performance associated with noise (e.g., phase noise) is much better than for oscillators with a low quality factor (which may be referred to as low-Q oscillators), but the start-up time required for high-Q oscillators may be much longer than for low-Q oscillators. Examples of high Q oscillators may include, but are not limited to: pierce XO and Colpitts XO. Examples of low Q oscillators may include, but are not limited to: ring oscillators and resistor-capacitor (RC) oscillators. The rapid start technique shown in FIG. 1 may be for a period of time T_INJDuring which an injection switch coupled between a low-Q oscillator and a high-Q oscillator is switched on and an injection signal V of the low-Q oscillator is injected_INJIncludes an active device (active device)11 (having a transconductance (transconductance) Gm and a load capacitor C therein)_L) Capacitor C_mAnd C_oAn electrical resistor R_mAnd an inductance L_m) Thereby increasing the energy (e.g., V) of the intrinsic oscillation signal (i.e., the high-Q oscillator) of the high-Q oscillator during the start-up of the XO_m,ssAnd I_m,ss) To speed up the start-up of the XO and to allow the XO to output a natural oscillation signal.

In practice, at the beginning of the start-up process, the injection frequency of the low Q oscillator is usually different from the natural frequency (intrinsic frequency) of the high Q oscillator, for example ± 6000ppm (parts per mileon), so that the phase error between the injection signal and the natural oscillation signal may gradually accumulate. In some embodiments, the fast start technique shown in fig. 1 may also utilize a feedback control mechanism that detects the natural frequency and modifies the low-Q oscillator accordingly to bring the injection frequency close to the natural frequency. In detail, the injection switch may be turned on during the first injection period, and the energy of the natural oscillation signal may be increased, wherein the injection signal may dominate an overall waveform (e.g., a combination of the injection signal and the natural oscillation signal) on a connection node of the low-Q oscillator and the high-Q oscillator since the natural oscillation signal is not strong enough at the beginning. To detect the natural frequency (intrinsic frequency), the injection switch is then opened during the lock/sync period after the first injection period to allow detection of the natural frequency to control the low Q oscillator. After the injection frequency approaches the natural frequency, the injection switch is turned on again during a second injection period after the lock/sync period, and the clock injection continues.

Fig. 2 is a schematic diagram illustrating XO 20 according to an embodiment of the present invention. As shown in fig. 2, XO 20 may include XO core circuit 100, an external oscillator 200 of XO core circuit 100 (in particular, external oscillator 200 is external to XO core circuit 100), at least one injection switch (e.g., one or more, collectively referred to as signal INJ)_ENControlled injection switch) coupled to injection node N of XO 20 and frequency controller 300_INJAnd the output terminal N of the XO core circuit_OUTAn external oscillator is coupled to the injection node N_INJAnd the frequency controller 300 is coupled to the external oscillator 200. In this embodiment, the quality factor of the external oscillator 200 is lower than the quality factor of the XO core circuit 100. Where XO core circuit 100 may be an example of a high Q oscillator and external oscillator 200 may be an example of a low Q oscillator. Figure 3 is a flow chart illustrating a method of quickly starting the XO 20 shown in figure 2 with external clock injection according to an embodiment of the present invention.It should be noted that the workflow shown in fig. 3 is for illustrative purposes only and is not limiting to the present invention. In the workflow shown in fig. 3, one or more steps may be added, deleted or modified. Furthermore, if the same results are obtained, the steps do not have to be performed in the exact order shown in fig. 3. For a better understanding, please refer to fig. 3 in conjunction with fig. 2.

In step S310, the external oscillator 200 may generate an injection signal (e.g., a low Q signal) within the external oscillator 200. In this embodiment, the operating frequency of the frequency controller 300 is controlled by an external oscillator (for example, the operating frequency of the frequency controller 300 may be equal to the injection frequency of the injection signal), but the present invention is not limited thereto.

In step S320, a system (e.g., duty cycle wireless/wired system) including XO 20 may utilize signal INJ_ENThe injection switch is turned on to inject the energy of the injection signal into the XO core circuit 100, thereby increasing the energy of the natural oscillation signal of the XO core circuit 100 (for example, the energy im (t) of the resonator) during the start-up of the XO 20. When the injection switch is turned on, the output terminal N_OUTCoupled to the injection node N_INJThe injection signal and the natural oscillation signal exist in the injection node N_INJAnd at an injection node N according to a combination of the injection signal and the natural oscillation signal_INJGenerates an Amplitude Modulation (AM) signal. For example, the injection signal (e.g., the output square wave) may be modulated by the natural oscillation signal to generate an AM signal, such as signal V shown in fig. 4_GATEThe waveform of (t) is shown.

In step S330, the frequency controller 300 may receive the AM signal and may be based on, for example, the signal V_GATEThe AM signal of the waveform of (t) controls the external oscillator 200 to selectively change the injection frequency of the injection signal. More specifically, during start-up, the injection switch is always on (e.g., not off) or at least on for a period of time when the external oscillator selectively changes the injection frequency of the injection signal.

It should be noted that different relative phases (e.g., phase error) between the injected signal and the natural oscillation signal) May result in the signal V shown in fig. 4_GATE(t) different waveform patterns of which the energy I of the resonators within XO core circuit 100 is also shown_m(t) of (d). For example, when the injection frequency (e.g. F)_INJ) Not equal to the natural frequency (e.g. F)_XO) In time, phase errors may accumulate over time and a beating behaviour (beating behavior) may occur, wherein the envelope period T of the beating behaviour may be calculated_envelopeThe following were used:

Δ f may represent the frequency difference between the injection frequency and the natural frequency. In this embodiment, the signal V_GATEThe waveform of (t) may be considered as the square wave from the external oscillator 200 being driven by the natural oscillation signal (which may be represented by I) from the XO core circuit 100_m(t) denotes) distortion, and different distortions (e.g., envelope of jitter) may correspond to different relative phases between the injection signal and the natural oscillation signal. Therefore, information on the relative phase between the injection signal and the natural oscillation signal is represented by a signal such as signal V_GATEThe AM signal of (t) carries.

Fig. 5 shows a relationship between the growth rate and the relative phase of the natural oscillation signal according to the embodiment of the present invention. As shown in fig. 5, when the relative phase falls in the interval between +90 degrees and-90 degrees, the rate of increase of the natural oscillation signal may be positive in response to the external clock injection. When the relative phase falls outside this interval (e.g., relative phase > +90 ° or relative phase < -90 °), the growth rate may be negative in response to the external clock injection, which means that the low-Q oscillator may impede the start-up of the XO when the relative phase falls outside the interval between +90 ° and-90 °.

Based on this, in the embodiment shown in fig. 2, after the start-up process of XO 20 is enabled (e.g., after the injection switch is turned on), the injection switch does not turn off until the start-up process is complete. Although the present invention does not interrupt the XO 20 clock injection during the required lock/sync period, the slave signal V may be distorted_GATETo extract information about the relative phase to control the injection frequency. In addition, the frequency controller 300 may utilize a control mechanism to ensure that the relative phase always falls in the interval between +90 ° and-90 °, thereby preventing the injection signal from impeding the start-up process. Therefore, the efficiency of clock injection is improved, and the start-up time can be greatly reduced.

In one embodiment, the frequency controller 300 shown in fig. 2 may include: a demodulation circuit, wherein the demodulation circuit can be configured to receive an AM signal and generate a sequence of demodulation voltages from the AM signal. Fig. 6 is a schematic diagram illustrating a detailed implementation of generating a demodulation voltage sequence by the demodulation circuit 310 according to an embodiment of the present invention, wherein the demodulation circuit 310 may be an example of the above-described demodulation circuit. In this embodiment, the external oscillator 200 shown in fig. 2 may include the low-Q oscillator 210 (e.g., a ring oscillator or an RC oscillator) shown in fig. 6 and at least one output buffer (e.g., one or more output buffers, which are collectively referred to as output buffers 220), wherein the buffers 220 may be coupled between the low-Q oscillator 210 and the injection node N_INJIn the meantime. In some embodiments, buffer 220 may be omitted.

In this embodiment, the demodulation circuit 310 may be implemented by using a diode with a sample and hold mechanism, as shown in FIG. 6, from, for example, the signal V_GATE(t) extracts information about the relative phase (e.g., the beat envelope). In detail, the demodulation circuit 310 may include a diode D0, a reset (reset) switch controlled by a signal RST, a sampling switch controlled by a signal RSTB, and a sampling capacitor C_SWherein, the cathode (cathode) of the diode D0 is coupled to the sampling node of the demodulation circuit 310. In the demodulation circuit 310, a reset switch is coupled between a sampling node and a reference terminal (e.g., a ground voltage terminal) of the demodulation circuit 310, and the sampling switch is coupled between an anode (anode) of the diode D0 and the injection node N_INJCoupled between the anode of diode D0 and the output N of XO core circuit 100 (or in other embodiments_OUTIn between), and a sampling capacitor C_SCoupled between the sampling node and the reference terminal. For example, during the reset period of the demodulation circuit 310,when the reset switch is turned on and the sampling switch is turned off, the voltage level of the sampling node is reset to the reference level of the reference terminal. When the reset switch is off and the sampling switch is on in the sampling period, charge is accumulated on the sampling node in response to the voltage level of the AM signal exceeding a threshold corresponding to the diode D0 (e.g., in response to the signal V_GATEThe voltage level of (t) is such that the voltage difference between the cathode and anode of diode D0 is greater than the threshold voltage of diode D0) to generate the demodulation voltages in the sequence of demodulation voltages on the sampling node. The demodulation circuit 310 operates like an integrator, so that the distortion-related information may correspond to a demodulation voltage sequence, which may be represented by the signal V_De-MODAnd (4) showing. Note that each demodulation voltage in the demodulation voltage sequence is generated by the same diode (i.e., diode D0), and no mismatch problem is introduced in the demodulation voltage sequence.

Fig. 7 shows some details of the relationship between relative phase and distortion (e.g., jitter envelope) according to an embodiment of the present invention. For better understanding, assume for example a signal V_XOOf the natural oscillation signal (e.g. signal V)_XOAmplitude of) is constant. With different relative phases

The beat envelope of (c) may be calculated as follows:

according to this equation, when

Respectively-90 deg., -45 deg., 0 deg., +45 deg. and 90 deg., respectively, of

The represented jitter envelope may be 0,

-2A₀,

and 0, wherein A₀Can represent a signal V_XOOf the amplitude of (c). Based on this, a jitter envelope is induced

Minimum relative phase

May be 0. Therefore, as shown in FIG. 8, when the relative phase is changed

When, e.g. signal V_De-MODThe demodulation voltage sequence of (a) may have a minimum voltage.

In practice, as shown in FIG. 9, such as signal V_XOOf the natural oscillation signal (e.g. signal V)_XOAmplitude of) may increase over time. With different relative phases

The beat envelope may be modified as follows:

with signal V_XOThe jitter envelope of increased amplitude may be determined by

And (4) showing. According to this equation, when

Run-out envelopes at-90 °, -45 °, 0 °, +45 ° and +90 °, respectively

It may be a number of 0's,

and 0, where k may represent the signal V_XOThe rate of increase in amplitude. Based on this, when the relative phase

When accumulated in the positive direction, when A₀And k is positive, resulting in a jitter envelope

Minimum relative phase

Possibly falling within the interval between 0 deg. and 90 deg.. Therefore, as shown in FIG. 10, when

When, e.g. signal V_De-MODThe demodulation voltage sequence of (a) may have a minimum voltage. Similarly, when relative phase

When accumulated in the negative direction, when A₀And k is positive, resulting in a jitter envelope

Minimum relative phase

Possibly falling within the interval between 0 deg. and-90 deg.. From the above description, it can be known that the relative phase between the injection signal and the natural oscillation signal, which causes the occurrence of the minimum voltage (more specifically, the local minimum voltage) in the demodulation voltage series, falls within the interval between +90 ° and-90 °. The local minimum voltage may be a voltage at which a trend of change in the demodulation voltage decrease in the demodulation voltage sequence is reversed.

FIG. 11 isA schematic diagram illustrating a detailed implementation of XO 20 according to an embodiment of the present invention is shown. Note that the injection switch is on during start-up and is omitted from fig. 11 for simplicity. In addition to the demodulation circuit 310 shown in fig. 6, the frequency controller 300 shown in fig. 3 may further include: a monitor circuit 320 coupled to the demodulation circuit, and a Finite State Machine (FSM) 330 (FSM with counter) coupled to the monitor circuit 320 and the external oscillator 200 (e.g., the low Q oscillator 210). In this embodiment, FSM 330 may utilize the injected signals as a count clock (e.g., CLK) for the FSM_counting) However, the present invention is not limited thereto. In this embodiment, monitoring circuit 320 may be configured to generate monitoring results from the demodulation voltage sequence, and FSM 330 may be configured to pass signal V_controlThe external oscillator 200 (e.g., low Q oscillator 210) is controlled to selectively vary the injection frequency based on the monitoring results to ensure that the relative phase falls in the interval between +90 degrees and-90 degrees. In the embodiment of FIG. 11, the monitoring circuit 320 may include an amplifier AMP_COMPCapacitor C_COMPAnd by the signal LOOP_ENControlled loop switch, in which the amplifier AMP_COMPFirst input terminal (amplifier AMP shown in fig. 11)_COMPLabeled "+" above) may be coupled to demodulation circuit 310 (e.g., a sampling node therein), capacitor C_COMPMay be coupled between the reference terminal and the amplifier AMP_COMPSecond input terminal (amplifier AMP shown in fig. 11)_COMPIs marked "-") and a loop switch may be coupled to the amplifier AMP_COMPBetween the second input terminal and the output terminal. In this embodiment, the signal LOOP_ENA controlled D flip-flop (DFF) 322 may be included in the monitoring circuit 320, where the DFF is coupled to the amplifier AMP_COMPSuch that FSM 330 receives only digital results, FSM 330, although the invention is not limited thereto.

In detail, the amplifier AMP_COMPCan be configured to receive a demodulation voltage sequence through its first input, a capacitor C_COMPCan be configured to sequentially store the demodulation voltage sequencesAnd the loop switch is configured to control the configuration of the monitoring circuit 320. For a better understanding, please refer to fig. 12 and 13, wherein fig. 12 illustrates the operation of the monitoring circuit 320 illustrated in fig. 11 during the preset phase. Fig. 13 illustrates the operation of the monitoring circuit 320 shown in fig. 11 during an evaluation phase. During a preset phase of the monitoring circuit 320, the loop switch is turned on, the monitoring circuit 320 being configured as a unity gain buffer to slave the amplifier AMP_COMPTo the capacitor C_COMP(for example, Amplifier AMP_COMPSecond input of) the first demodulation voltage within the sequence of demodulation voltages. In the evaluation phase, the loop switch is opened, and the monitoring circuit 320 is configured as a comparator to switch the amplifier AMP_COMPAnd the first demodulation voltage stored on the capacitor (amplifier AMP)_COMPOn the second input) and generates a comparison result, wherein the monitoring result comprises the comparison result. By analogy, successive comparison results of the demodulation voltage sequence may be generated, wherein these successive comparison results may represent the monitoring result.

It is assumed that a comparison result of "0" by the monitoring circuit 320 indicates that a previous demodulation voltage (e.g., the above-mentioned first demodulation voltage) of two consecutive demodulation voltages within the demodulation voltage sequence is greater than a following demodulation voltage (e.g., the above-mentioned second demodulation voltage) of the two consecutive demodulation voltages within the demodulation voltage sequence, and that a comparison result of "1" by the monitoring circuit 320 indicates that the previous demodulation voltage of the two consecutive demodulation voltages is less than the following demodulation voltage. Therefore, when the comparison result changes from "0" to "1", it means that a local minimum of the demodulation voltage sequence is detected.

In practice, there may be an AMP by the amplifier_COMPIs caused by a mismatch of the first input terminal and the second input terminal_OS. Based on the operations shown in fig. 12 and 13, the offset V from the inherent offset can be removed from the comparison result_OSThe influence of (c). For example, when the first demodulation voltage is set to the preset stage (may be set to "V [ n ]]"means) slave amplifier AMP_COMPIs transmitted to the amplifier AMP_COMPSecond input ofAt the input end, the inherent offset V_OSCan be stored in the capacitor C together with the first voltage_COMPThus capacitor C_COMPCan store a voltage V [ n ]]-V_OS(ii) a In the evaluation phase, the second demodulation voltage (may be represented by V [ n +1 ]]Representation) can be offset from the inherent offset V_OSExist together in the amplifier AMP_COMPOn the first end of (a). Due to the amplifier AMP_COMPHas an inherent offset, so the comparison results (e.g., AD shown in fig. 13)_RESULT) Will not be affected by the inherent offset.

It should be noted that the monitor circuit 320 is not limited to use in the XO 20 shown in fig. 11. Any system that requires a continuous comparison operation (e.g., generating comparison results with respect to adjacent data (or voltages) within a sequence of data (or voltages)) may be implemented by the monitoring circuit 320.

In another embodiment, the diode D0 in the demodulation circuit 310 may be replaced by a transistor M0 (e.g., an N-type transistor) as shown in fig. 14, wherein a gate terminal of the transistor M0 is coupled to a drain terminal of the transistor M0 so that the transistor functions as a diode, but the invention is not limited thereto. Note that the injection switch is on during start-up and is omitted in fig. 11 for simplicity.

In another embodiment, monitor circuit 320 may be replaced by monitor circuit 320A, as shown by XO 30 shown in fig. 15, where monitor circuit 320A may include comparator COMP, a first sampling switch controlled by signal SH, a second sampling switch controlled by signal SHB, a first sampling capacitor C₁And a second sampling capacitor C₂. Note that the injection switch is on during start-up and is omitted from fig. 11 for simplicity. As shown in fig. 15, the first sampling switch and the first sampling capacitor C₁Forming a first sample and hold circuit coupled to a first input of a comparator COMP (marked on comparator COMP as "+"), a second sampling switch and a second sampling capacitor C₂Forming a second sample and hold circuit coupled to a second input terminal of the comparator COMP (labeled "-") where the signals VA and VB represent the voltages at the first and second input terminals of the comparator COMP.

Figure 16 is a diagram illustrating some of the signals (e.g., count clock CLK) within XO 20 of figure 15 according to an embodiment of the present invention_countingSignals RST, RSTB, SH, SHB and signals VA and VB). In the present embodiment, the signals RST, RSTB, SH, and SHB may be generated by a timing controller (not shown) according to the counting clock CLKcounting, but the present invention is not limited thereto. According to the timing shown in fig. 16, the demodulation voltages of the demodulation voltage sequence may be sampled alternately on the sampling capacitors C1 and C2, and the respective monitoring results of the demodulation voltage sequence may be output from the comparator COMP. For example, the sampling capacitor C1 samples the first demodulation voltage, the sampling capacitor C2 samples the second demodulation voltage, the sampling capacitor C1 samples the third demodulation voltage, and the sampling capacitor C2 samples the fourth demodulation voltage.

In another embodiment, the monitor circuit 320 may be replaced with an analog-to-digital converter (ADC) 320B, as shown by XO 40 in fig. 17. Note that the injection switch is on during start-up and is omitted from fig. 17 for simplicity. For example, ADC 320B may sequentially convert the demodulation voltage sequences into digital codes, wherein the digital codes may represent the aforementioned monitoring results, and FSM 330 may control low-Q oscillator 210 to selectively change the injection frequency according to the digital codes.

Fig. 18 shows some details related to the control of the injection frequency according to an embodiment of the invention. As shown in fig. 18, the FSM 330 may control the external oscillator (e.g., the low-Q oscillator 210) to alternately switch the injection frequency to one or more target frequencies among a plurality of candidate frequencies according to the monitoring result to make the injection frequency gradually (stepwise) approach the natural frequency of the natural oscillation signal, wherein the plurality of candidate frequencies respectively correspond to a plurality of states of the FSM 330. In this embodiment, it is assumed that the natural frequency (which may be regarded as a target frequency) is equal to a center frequency (for example, with a frequency error of 0ppm with respect to the center frequency) of the plurality of candidate frequencies. When the injection frequency is initially at a first frequency having a frequency error of-5000 ppm with respect to a center frequency of the plurality of candidate frequencies, a relative phase (e.g., phase error) between the natural oscillation signal and the injection signal may begin to accumulate in a positive direction, wherein the energy of the natural oscillation signal is increasing, while the demodulation voltage sequence (e.g., signal V) is_De-MOD) Is decreasing, the comparison result of the monitoring circuit 320 is held at "0" at the beginning. When the monitoring result indicates that the following demodulation voltage is greater than the previous demodulation voltage at the time point t1 (for example, the comparison result from the monitoring circuit 320 changes from "0" to "1"), this means that the local minimum voltage of the demodulation voltage sequence (for example, the signal V) is detected_De-MOD) Wherein FSM 330 may determine that a candidate frequency less than the first frequency is unavailable and control external oscillator 200 (e.g., a low-Q oscillator) to switch the injection frequency from the first frequency to a second frequency having a frequency error of +5000ppm with respect to the center frequency, and then return the comparison result to "0". Similarly, when the monitoring result indicates that the comparison result changes from "0" to "1" at time point t2, FSM 330 may determine that a candidate frequency greater than the second frequency is unavailable and control external oscillator 200 (e.g., a low-Q oscillator) to switch the injection frequency from the second frequency to a third frequency having a-4000 ppm frequency error with respect to the center frequency. By analogy, the injection frequency may be switched to the fourth frequency, the fifth frequency, the sixth frequency and the seventh frequency at time points t3, t4, t5 and t6, respectively. For the sake of brevity, similar descriptions are not repeated here. Accordingly, the injection frequency can be appropriately adjusted whenever the demodulation voltage within the demodulation voltage sequence reaches a minimum value, so that the relative phase can be accumulated in alternate directions, thereby ensuring that the relative phase is limited to within ± 90 ° (typically within ± 40 ° or less), and thus the energy of the natural oscillation signal is always increased.

Fig. 19 shows some details relating to the control of the injection frequency according to another embodiment of the invention. In this example, it is assumed that the natural frequency (which can be considered as the target frequency) has a frequency error of +4500ppm with respect to the center frequency. As shown in fig. 19, the monitoring result indicates that the comparison result changes from "0" to "1" at time point t7 (i.e., the demodulation voltage V1 is less than the demodulation voltage V2), the FSM 330 may determine that a candidate frequency less than the third frequency (having a frequency error of-4000 ppm) is unavailable, and control the external oscillator 200 (e.g., a low-Q oscillator) to switch the injection frequency from the third frequency to a fourth frequency having a frequency error of +4000ppm with respect to the center frequency. However, since the demodulation voltage V3 is greater than the demodulation voltage V2, the comparison result remains "1" at the time point t8, which means that switching from the third frequency to the fourth frequency cannot change the accumulation direction of the relative phase. Thus, FSM 330 may control external oscillator 200 (e.g., a low-Q oscillator) to further switch the injection frequency from the fourth frequency to an eighth frequency (having a frequency error of +4500 ppm) that is greater than the fourth frequency (having a frequency error of +4000 ppm) to change the cumulative direction of the relative phases. Similarly, if the comparison result remains at "1" after the injection frequency is switched from the ninth frequency to the tenth frequency that is less than the ninth frequency, FSM 330 may control external oscillator 200 (e.g., a low-Q oscillator) to further switch the injection frequency from the tenth frequency to an eleventh frequency that is less than the tenth frequency.

In some embodiments, FSM 330 may control external oscillator 200 (e.g., low-Q oscillator 210) to alternately switch the injection frequency to a first candidate frequency (e.g., the first frequency has a frequency error of-5000 ppm) or a second candidate frequency (e.g., the second frequency has a frequency error of +5000 ppm) depending on the monitoring results. Note that the first frequency is greater than the natural frequency of the natural oscillation signal, and the second frequency is less than the natural frequency, and therefore, each switching between the first candidate frequency and the second candidate frequency can surely change the accumulation direction of the relative phase. Thus, the relative phase can still be limited to within ± 90 °, and it can be ensured that the energy of the natural oscillation signal increases all the time during the start-up process by means of only two candidate frequencies.

In some embodiments, the injection switch may be turned on for a predetermined period of time. That is, a point of time at which the injection switch is turned off (or a time at which the start-up process is completed) may be predetermined. In other embodiments, a system including XO 20 may monitor at least one signal within XO 20 to trigger the system to complete a start-up process (e.g., open the injection switch) in response to the at least one signal satisfying certain conditions. In one embodiment, assuming that the initial demodulation voltage represents a first demodulation voltage of the demodulation voltage sequence at the start of the startup process, when a target demodulation voltage of the demodulation voltage sequence is detected, the system may determine that the startup process is completed, and the injection switch may be turned off (turned off), wherein a voltage difference between the target demodulation voltage and the initial demodulation voltage is greater than or equal to a predetermined value. Therefore, when the energy of the natural oscillation signal increases to a certain value that causes the target demodulation voltage to appear, it can be considered that the start-up process has been completed and the injection switch is turned off.

The start-up method and related XO architecture provided by embodiments of the present invention may control the switching of the injection frequency based on distorted square waves caused by the amplitude modulation of the injection signal and the natural oscillation signal such that the relative phase between the injection signal and the natural oscillation signal is limited to within a desired interval (e.g., ± 90 °). Based on this, there is no need to turn off the injection switch in the aforementioned lock/synchronization period, and it is further ensured that the energy of the natural oscillation signal is always increased. It is assumed that a reference time period is required for the start-up process when the injection frequency of the injection signal is the same as the natural frequency of the XO core circuit. With respect to the method of temporarily interrupting the clock injection during the previous lock/sync period, 17.4 times to 90.6 times the reference time period may be required for the start-up procedure. With regard to the start-up method, in which the injection is not turned off until the start-up process is completed, a reference time period of 1.05 to 1.5 times may be required, which means that the present invention does greatly improve the clock injection efficiency and the start-up time can be greatly reduced.

Those skilled in the art will readily observe that numerous modifications and alterations of the apparatus and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.

Claims

1. A method for starting a crystal oscillator, XO, by means of external clock injection, characterized in that the method comprises:

generating an injection signal with an external oscillator external to an XO core circuit of the XO, wherein the XO comprises an XO core circuit, the external oscillator external to the XO core circuit, and at least one injection switch coupled between an injection node of the XO and an output of the XO core circuit, the external oscillator is coupled to the injection node, and a quality factor of the external oscillator is lower than a quality factor of the XO core circuit;

turning on the at least one injection switch to cause energy of the injection signal to be injected into the XO core circuit, thereby increasing energy of a natural oscillation signal of the XO core circuit, wherein a modulation signal is generated at the injection node based on a combination of the injection signal and the natural oscillation signal; and

controlling the external oscillator to selectively change the injection frequency of the injection signal according to the modulation signal; wherein the at least one injection switch is turned on when the external oscillator selectively changes an injection frequency of the injection signal.

2. The method of claim 1, wherein the step of controlling the external oscillator to selectively vary the injection frequency of the injection signal in accordance with the modulation signal comprises:

generating, with a demodulation circuit of the XO, a demodulation voltage sequence from the modulation signal, the demodulation voltage sequence carrying information of a relative phase between the injection signal and the natural oscillation signal;

generating a monitoring result from the demodulation voltage sequence using a monitoring circuit of the XO; and

controlling the external oscillator to selectively change the injection frequency according to the monitoring result.

3. The method of claim 2, wherein controlling the external oscillator to selectively change the injection frequency based on the monitoring comprises:

alternately switching the injection frequency to a first frequency or a second frequency according to the monitoring result so that the relative phase falls in an interval between +90 degrees and-90 degrees, wherein the first frequency is greater than a natural frequency of the natural oscillation signal and the second frequency is less than the natural frequency;

alternatively, the injection frequency is alternately switched to a frequency in a first group of frequencies or a frequency in a second group of frequencies according to the monitoring result, wherein the first group of frequencies is greater than the natural frequency of the natural oscillation signal, and the second group of frequencies is less than the natural frequency.

4. The method of claim 2, wherein controlling the external oscillator to selectively change the injection frequency based on the monitoring comprises:

switching the injection frequency among a plurality of candidate frequencies to approximate the injection frequency to a natural frequency of the natural oscillation signal according to the monitoring result, wherein the plurality of candidate frequencies respectively correspond to a plurality of states of a Finite State Machine (FSM).

5. The method of claim 2,

the demodulation voltage sequence includes a first demodulation voltage and a second demodulation voltage following the first demodulation voltage, and the step of controlling the external oscillator to selectively change the injection frequency according to the monitoring result includes:

switching the injection frequency from a first frequency to a second frequency in response to the monitoring result indicating that the second demodulation voltage is greater than the first demodulation voltage.

6. The method of claim 5,

the demodulation voltage sequence further includes a third demodulation voltage following the second demodulation voltage, and the step of controlling the external oscillator to selectively change the injection frequency according to the monitoring result further includes:

switching the injection frequency from the second frequency to the third frequency in response to the monitoring result indicating that the third demodulation voltage is greater than the second demodulation voltage;

wherein the first frequency is greater than the second frequency, which is greater than the third frequency; or, the first frequency is smaller than the second frequency, and the second frequency is smaller than the third frequency.

7. The method of claim 2, wherein the sequence of demodulation voltages includes a first demodulation voltage and a second demodulation voltage that follows the first demodulation voltage, the monitoring circuit includes an amplifier and a capacitor, and the step of generating a monitoring result from the sequence of demodulation voltages with the monitoring circuit includes:

configuring the monitoring circuit as a unity gain buffer by turning on a loop switch coupled between the second input and the output of the amplifier to transfer the first demodulation voltage from the first input of the amplifier to a capacitor coupled to the second input of the amplifier; and

configuring the monitoring circuit as a comparator to compare a second demodulation voltage on the first input of the amplifier with a first demodulation voltage stored on the capacitor by opening the loop switch and to generate a comparison result accordingly, wherein the monitoring result comprises: and comparing the results.

8. The method of claim 2, wherein generating the sequence of demodulation voltages from the modulated signal using the demodulation circuit comprises:

turning on a reset switch of the demodulation circuit and turning off a sampling switch of the demodulation circuit to reset a voltage level of a sampling node of the demodulation circuit to a reference level within a reset period; and

in response to the voltage level of the modulated signal exceeding a threshold corresponding to a diode of the demodulation circuit, turning off the reset switch and turning on the sampling switch to accumulate charge on the sampling node to generate a demodulation voltage of the sequence of demodulation voltages on the sampling node during a sampling period.

9. The method of claim 2, wherein an initial demodulation voltage represents a first demodulation voltage in the sequence of demodulation voltages, and further comprising:

in response to detecting a target demodulation voltage in a sequence of demodulation voltages to indicate completion of a startup process, opening at least one injection switch, wherein a voltage difference between the target demodulation voltage and the initial demodulation voltage is greater than or equal to a predetermined value.

10. A crystal oscillator XO, comprising:

an XO core circuit for generating a natural oscillation signal;

an external oscillator coupled to an injection node of the XO for generating an injection signal, wherein a quality factor of the external oscillator is lower than a quality factor of the XO core circuit;

at least one injection switch coupled between the injection node and an output of the XO core circuit, wherein when the at least one injection switch is turned on, energy of the injection signal is injected into the XO core circuit to increase energy of a natural oscillation signal, a modulation signal being generated at the injection node based on a combination of the injection signal and the natural oscillation signal; and

a frequency controller coupled to the external oscillator for controlling the external oscillator to selectively change an injection frequency of the injection signal according to the modulation signal;

wherein the at least one injection switch is turned on when the external oscillator selectively changes an injection frequency of the injection signal.

11. The XO of claim 10, wherein the frequency controller comprises:

the demodulation circuit is used for receiving a modulation signal and generating a demodulation voltage sequence according to the modulation signal, wherein the demodulation voltage sequence carries information of a relative phase between the injection signal and the inherent oscillation signal;

a monitoring circuit coupled to the demodulation circuit for generating a monitoring result according to the demodulation voltage sequence; and

a finite state machine FSM coupled to the monitoring circuit and the external oscillator configured to control the external oscillator to selectively change the injection frequency according to the monitoring result.

12. An XO according to claim 11, characterized in that the FSM controls the external oscillator to alternately switch the injection frequency to a first frequency, which is greater than the natural frequency of the natural oscillation signal, or to a second frequency, which is less than the natural frequency, according to the monitoring result, so that the relative phase falls within an interval between +90 degrees and-90 degrees.

13. The XO of claim 11, wherein the FSM controls the external oscillator to switch the injection frequency among a plurality of candidate frequencies according to the monitoring result to approximate the injection frequency to a natural frequency of the natural oscillation signal, wherein the plurality of candidate frequencies respectively correspond to a plurality of states of the FSM.

14. The XO of claim 11, wherein the sequence of demodulation voltages comprises a first demodulation voltage and a second demodulation voltage following the first demodulation voltage; and when the monitoring result indicates that the second demodulation voltage is greater than the first demodulation voltage, the FSM controls the external oscillator to switch the injection frequency from a first frequency to a second frequency.

15. The XO of claim 14, wherein the sequence of demodulation voltages further comprises a third demodulation voltage following the second demodulation voltage, the FSM controlling an external oscillator to switch the injection frequency from a second frequency to a third frequency when the monitoring indicates that the third demodulation voltage is greater than the second demodulation voltage, wherein the first frequency is greater than the second frequency, and wherein the second frequency is greater than the third frequency; or, the first frequency is less than the second frequency, and the second frequency is less than the third frequency.

16. The XO of claim 11, wherein the sequence of demodulation voltages includes a first demodulation voltage and a second demodulation voltage that follows the first demodulation voltage, the monitor circuit comprising:

an amplifier coupled to the demodulation circuit for receiving the demodulated voltage sequence through a first input of the amplifier;

a capacitor coupled to the second input of the amplifier for sequentially storing the sequence of demodulation voltages; and

a loop switch coupled between the second input terminal and an output terminal of the amplifier for controlling the configuration of the monitoring circuit;

wherein the monitoring circuit is configured as a unity gain buffer to transfer the first demodulation voltage from the first input of the amplifier to the capacitor when the loop switch is turned on; and when the loop switch is open, the monitoring circuit is configured as a comparator for comparing a second demodulation voltage on the first input of the amplifier with a first demodulation voltage stored on the capacitor and generating a comparison result, wherein the monitoring result comprises the comparison result.

17. The XO of claim 11, wherein the demodulation circuit comprises:

a diode having a cathode coupled to a sampling node of the demodulation circuit;

a reset switch coupled between the sampling node and a reference terminal of the demodulation circuit;

a sampling switch coupled to an anode of the diode; and

a sampling capacitor coupled to the sampling node;

wherein when the reset switch is turned on and the sampling switch is turned off in a reset period, a voltage level of the sampling node is reset to a reference level of the reference terminal; and when the reset switch is off and the sampling switch is on for a sampling period, charge is accumulated on the sampling node in response to the voltage level of the modulation signal exceeding a threshold value corresponding to the diode, producing a demodulation voltage of the demodulation voltage sequence on the sampling node.

18. The XO of claim 11, wherein an initial demodulation voltage represents a first demodulation voltage in the sequence of demodulation voltages; the at least one injection switch is turned off when a target demodulation voltage in the sequence of demodulation voltages is detected to indicate completion of a start-up process, wherein a voltage difference between the target demodulation voltage and the initial demodulation voltage is greater than or equal to a predetermined value.

19. A monitoring circuit for producing a result of successive comparisons of a demodulation voltage sequence that carries information on a relative phase between an injection signal and a natural oscillation signal of an XO, the monitoring circuit comprising:

an amplifier for receiving the demodulation voltage sequence through a first input of the amplifier, wherein the demodulation voltage sequence comprises a first voltage and a second voltage following the first voltage;

a capacitor coupled to the second input of the amplifier for sequentially storing the demodulation voltage sequence; and

a loop switch coupled between the second input terminal and the output terminal of the amplifier for controlling the configuration of the monitoring circuit;

wherein the monitoring circuit is configured as a unity gain buffer for transferring the first voltage from the first input of the amplifier to the capacitor when the loop switch is turned on; when the loop switch is open, the monitoring circuit is configured as a comparator for comparing a second voltage on the first input of the amplifier with a first voltage stored on the capacitor and generating a comparison result of the successive comparison results; wherein the comparison result carries information of a relative phase between the injection signal and a natural oscillation signal of the XO for controlling an injection frequency of the injection signal.

20. The monitoring circuit of claim 19, wherein when the loop switch is turned on, an intrinsic offset caused by a mismatch of the first and second inputs of the amplifier is stored on the capacitor with the first voltage, thereby preventing the comparison result from being affected by the intrinsic offset.