TW202213944A - Method for startup of crystal oscillator with aid of external clock injection, crystal oscillator and monitoring circuit - Google Patents

Abstract

A method for startup of a crystal oscillator (XO) with aid of external clock injection, XO and a monitoring circuit therein are provided. The XO includes an XO core circuit, an external oscillator, and an injection switch, where a quality factor of the external oscillator is lower than a quality factor of the XO core circuit. The method includes: utilizing the external oscillator to generate an injected signal; turning on the injection switch to make energy of the injected signal be injected into the XO core circuit, where an amplitude modulation (AM) signal is generated according to combination of the injected signal and an intrinsic oscillation signal from the XO core circuit; and controlling the external oscillator to selectively change an injection frequency of the injected signal according to the AM signal. More particularly, the injection switch is not turned off until the startup process is completed.

Description

Method for starting crystal oscillator by external clock injection, crystal oscillator and monitoring circuit

The present invention relates to fast start-up of a crystal oscillator (XO), and more particularly, to a method of starting an XO by means of external clock injection, an associated XO and a monitoring circuit.

For future communication applications (e.g. duty-cycled wireless/wired systems), the crystal oscillator (XO) within the communication device may enter a sleep mode when there is no data to transmit or receive ( For example, disable the XO's oscillation) to save power; when there is data to send or receive, the XO can enter the wake-up mode to start the oscillation, and then enter the listen mode with stable oscillation, so that the communication device can send or receive data normally .

For example, the period of time corresponding to the listen mode may be 1 millisecond (ms), and the period of time corresponding to the wake-up mode (which may be referred to as the start-up time TSTART) may be 5ms, where the wake-up mode consumes power (eg, consumes total power) 42.7%). Therefore, the startup time of the XO can become a bottleneck for reducing the average power. Designers can try to reduce startup time by controlling the negative resistance within the XO, but this may introduce additional power dissipation. Therefore, a novel XO startup method and related architecture are required to solve the problems of related technologies.

It is an object of the present invention to provide a method of starting a crystal oscillator (XO) by means of external clock injection, the associated XO and monitoring circuits, to speed up the start-up of the XO without greatly increasing the additional power consumption.

At least one embodiment of the present invention provides a method of enabling an XO by means of external clock injection. The method may include generating the injection signal using an external oscillator external to the XO core circuit within the XO, wherein the XO includes the XO core circuit, the external oscillator external to the XO core circuit, and at least one injection switch. The at least one injection switch is coupled between the injection node of the XO and the output terminal of the XO core circuit, the external oscillator is coupled to the injection node, and the quality factor of the external oscillator is low It depends on the quality factor of the XO core circuit; at least one injection switch is turned on to inject the energy of the injection signal into the XO core circuit, thereby increasing the energy of the natural oscillation signal of the XO core circuit during the startup process of the XO, wherein according to the injection signal and The combination of natural oscillation signals generates a modulation signal on the injection node; according to the modulation signal, the external oscillator is controlled to selectively change the injection frequency of the injection signal. More particularly, when the external oscillator selectively changes the injection frequency of the injection signal, at least one injection switch is turned on.

At least one embodiment of the present invention provides an XO. The XO may include an XO core circuit, an external oscillator, at least one injection switch, and a frequency controller, wherein the external oscillator is coupled to the injection node of the XO, and the at least one injection switch is coupled to the injection node of the XO and the output of the XO core circuit In between, the frequency controller is coupled to the external oscillator. The XO core circuit may be configured to generate a natural oscillation signal within the XO core circuit. The external oscillator may be configured to generate the injection signal within the external oscillator, wherein the external oscillator has a lower quality factor than the XO core circuit. For example, when at least one injection switch is turned on, the energy of the injection signal is injected into the XO core circuit to increase the energy of the natural oscillation signal during the startup process of the XO, and according to the combination of the injection signal and the natural oscillation signal, the injection A modulated signal is generated on the node. The frequency controller may be configured to receive the modulation signal and control the external oscillator to selectively vary the injection frequency of the injection signal according to the modulation signal. More particularly, when the external oscillator selectively changes the injection frequency of the injection signal, at least one injection switch is turned on.

At least one embodiment of the present invention provides a monitoring circuit for generating successive comparisons of demodulated voltage sequences that carry information on the relative phase between an injected signal of XO and a natural oscillation signal . The monitoring circuit may include amplifiers, capacitors and loop switches. The amplifier may be configured to receive, through a first input of the amplifier, a sequence of demodulated voltages, wherein the sequence of demodulated voltages includes a first voltage and a second voltage following the first voltage. A capacitor is coupled to the second input of the amplifier, and the capacitor may be configured to sequentially store the sequence of demodulated voltages. A loop switch is coupled between the second input terminal and the output terminal of the amplifier, and the loop switch is configured to control the configuration of the amplifier. For example, when the loop switch is turned on, the amplifier is configured as a unity gain buffer to transfer the first voltage from the first input of the amplifier to the capacitor. When the loop switch is open, the amplifier is configured as a comparator for comparing the second voltage on the first input of the amplifier with the first voltage stored on the capacitor and generating the resulting The comparison result of the continuous comparison results, wherein the comparison result carries the information of the relative phase between the injection signal and the natural oscillation signal of the XO, and is used to control the injection frequency of the injection signal.

The startup method and the related XO provided by the embodiments of the present invention can use an external oscillator to inject energy into the XO core circuit, so as to speed up the XO startup process. Advantageously, during the startup process, the injection switch coupled between the external oscillator and the XO core circuit can always be turned on, so that the efficiency of clock injection can be optimized. In some embodiments, when adjusting the injection frequency (locked to the natural frequency of the XO core circuit), the injection switch may be always on, at least for a period of time, or alternately on and off to optimize or improve clock injection efficiency . The overall startup time of the XO can be greatly reduced compared to the prior art. Therefore, the present invention can optimize the overall performance of the XO without causing any side effects, or optimize the overall performance of the XO in a way that is less likely to cause side effects.

These and other objects of the present invention will no doubt become apparent to those of ordinary skill in the art after reading the various drawings and the following detailed description of the preferred embodiments shown in the accompanying drawings.

Certain terms referring to specific components are used throughout the following description and claims. As will be understood by those of ordinary skill in the art, electronic device manufacturers may refer to components by different names. This document does not intend to distinguish between components with different names but the same function. In the following description and claims, the terms "including" and "comprising" are used in an open-ended fashion and should therefore be interpreted to mean "including but not limited to...". Likewise, the term "coupled" is intended to mean an indirect or direct electrical connection. Thus, if one device is coupled to another device, the connection may be through a direct electrical connection, or through an indirect electrical connection via the other device and connection.

FIG. 1 is a schematic diagram illustrating a concept regarding start-up (eg, fast start-up) of a crystal oscillator 10 (XO) by means of external clock injection, according to an embodiment of the present invention. For oscillators with a high quality factor (which may be called high-Q oscillators), performance related to noise (eg phase noise) is much better than for oscillators with a low quality factor (which may be called low-Q oscillators) many, but the startup time required for a high-Q oscillator may be much longer than that required for a low-Q oscillator. Examples of high-Q oscillators may include, but are not limited to: Pierce XOs and Colpitts XOs. Examples of low-Q oscillators may include, but are not limited to, ring oscillators and resistor-capacitor (RC) oscillators. The fast-start technique shown in Figure 1 may turn on the injection switch coupled between the low-Q oscillator and the high-Q oscillator during time period T _INJ and inject the energy of the low-Q oscillator's injection signal V _INJ A high-Q oscillator (eg, comprising active device 11 (with transconductance Gm and load capacitor _CL therein), capacitors _Cm and _Co , resistor _Rm and inductance _Lm ), thereby The energy of the intrinsic oscillation signal of the high-Q oscillator (eg, V _m,ss and _Im,ss ) is increased during the startup of the XO to accelerate the startup of the XO and allow the XO to output the intrinsic oscillation signal.

In fact, at the beginning of the start-up process, the injection frequency of the low-Q oscillator is usually different from the intrinsic frequency of the high-Q oscillator, eg ±6000 ppm (parts per million), so the difference between the injected signal and the intrinsic oscillation signal is The phase error of , may gradually accumulate. In some embodiments, the fast-start technique shown in Figure 1 may also utilize a feedback control mechanism that detects the natural frequency and modifies the low-Q oscillator accordingly to bring the injection frequency close to the natural frequency. In detail, the injection switch may be turned on during the first injection period, and the energy of the natural oscillation signal may increase, wherein since the natural oscillation signal is not strong enough at the beginning, the injection signal may dominate the low-Q oscillator and the high-Q oscillator. The overall waveform at the connection node (for example, the combination of the injected signal and the natural oscillation signal). To detect the intrinsic frequency, the injection switch is then opened during the lock/sync period following the first injection period to allow detection of the intrinsic frequency to control the low-Q oscillator. After the injection frequency approaches the natural frequency, the injection switch is turned on again during the second injection period after the lock/synchronization period, and the clock injection continues.

FIG. 2 is a schematic diagram illustrating an XO 20 according to an embodiment of the present invention. As shown in FIG. 2, the XO 20 may include the XO core circuit 100, an external oscillator 200 of the XO core circuit 100 (in particular, the external oscillator 200 is located outside the XO core circuit 100), at least one injection switch (eg, an or multiple, which are collectively referred to as the injection switch controlled by the signal INJ _EN ) and the frequency controller 300, wherein the injection switch is coupled between the injection node N _INJ of the XO 20 and the output terminal N _OUT of the XO core circuit, the external oscillator is coupled to the injection node N _INJ , and the frequency controller 300 is coupled to the external oscillator 200 . In this embodiment, the quality factor of the external oscillator 200 is lower than that of the XO core circuit 100 . Among them, the XO core circuit 100 may be an example of a high-Q oscillator, and the external oscillator 200 may be an example of a low-Q oscillator. FIG. 3 is a flow chart illustrating a method of quickly starting the XO 20 shown in FIG. 2 by means of external clock injection, according to an embodiment of the present invention. It should be noted that the workflow shown in Figure 3 is for illustrative purposes only, and is not a limitation of the present invention. In the workflow shown in Figure 3, one or more steps can be added, deleted or modified. Furthermore, the steps do not have to be performed in the exact order shown in Figure 3 if the same result can be obtained. For better understanding, please refer to Figure 3 in conjunction with Figure 2.

In step S310 , the external oscillator 200 may generate an injection signal (eg, a low-Q signal) within the external oscillator 200 . In this embodiment, the operating frequency of the frequency controller 300 is controlled by an external oscillator (eg, the operating frequency of the frequency controller 300 may be equal to the injection frequency of the injection signal), but the present invention is not limited thereto.

In step S320 , the system including the XO 20 (eg, duty cycle wireless/wired system) may use the signal INJ _EN to turn on the injection switch, so that the energy of the injection signal is injected into the XO core circuit 100 , so as to start the XO 20 The energy of the natural oscillation signal of the XO core circuit 100 (eg, the energy Im(t) of the resonator) is increased in the process. When the injection switch is turned on, the output terminal N _OUT is coupled to the injection node N _INJ , and both the injection signal and the natural oscillation signal are present at the injection node N _INJ and at the injection node N _INJ according to the combination of the injection signal and the natural oscillation signal to generate an amplitude modulation (AM) signal. For example, the injected signal (eg, the output square wave) may be modulated by the natural oscillation signal to generate an AM signal, as shown by the waveform of the signal V _GATE (t) shown in FIG. 4 .

In step S330, the frequency controller 300 may receive the AM signal and control the external oscillator 200 to selectively change the injection frequency of the injection signal according to the AM signal such as the waveform of the signal V _GATE (t). More specifically, during startup, when the external oscillator selectively changes the injection frequency of the injection signal, the injection switch is always turned on (eg, not turned off) or at least for a period of time.

It should be noted that different relative phases (eg, phase errors) between the injected signal and the natural oscillation signal may result in different waveform patterns for the signal V _GATE (t) shown in Figure 4, which also shows the XO core circuit 100 The energy _Im (t) of the resonator inside. For example, when the injection frequency (eg, F _INJ ) is not equal to the natural frequency (eg, F _XO ), the phase error may accumulate over time and a beating behavior may occur, where the envelope period T _envelope of the beating behavior can be calculated as follows :

Δf can represent the frequency difference between the injected frequency and the natural frequency. In this embodiment, the waveform of the signal V _GATE (t) can be considered as the square wave from the external oscillator 200 is distorted by the natural oscillation signal from the XO core circuit 100 (which can be represented by _Im (t)), and is different Distortions of (eg, bouncing envelopes) may correspond to different relative phases between the injected signal and the intrinsic oscillatory signal. Therefore, information about the relative phase between the injected signal and the natural oscillation signal is carried by the AM signal such as the signal V _GATE (t).

FIG. 5 shows the relationship between the growth rate and the relative phase of the natural oscillation signal according to an embodiment of the present invention. As shown in Figure 5, when the relative phase falls within the interval between +90 degrees and -90 degrees, the growth rate of the natural oscillation signal may be positive in response to external clock injection. When the relative phase falls outside this interval (e.g. relative phase > +90° or relative phase < -90°), the growth rate may be negative in response to external clock injection, meaning that when relative phase falls +90 Outside the interval between ° and -90°, the low-Q oscillator prevents the XO from starting.

Based on this, in the embodiment shown in FIG. 2, after the start-up process of the XO 20 is enabled (eg, after the injection switch is turned on), the injection switch is not turned off until the start-up process is completed. Although the present invention does not interrupt the clock injection of the XO 20 during the desired lock/sync period, relative phase-related information can be extracted from the signal V _GATE based on distortion to control the injection frequency. Additionally, the frequency controller 300 may utilize a control mechanism to ensure that the relative phase always falls within the interval between +90° and -90°, thereby preventing the injected signal from hindering the start-up process. Therefore, the efficiency of clock injection is improved, and the startup time can be greatly reduced.

In one embodiment, the frequency controller 300 shown in FIG. 2 may include a demodulation circuit, wherein the demodulation circuit may be configured to receive an AM signal and generate a sequence of demodulation voltages based on the AM signal. FIG. 6 is a schematic diagram illustrating a detailed implementation of a demodulation voltage sequence generated by a demodulation circuit 310 according to an embodiment of the present invention, wherein the demodulation circuit 310 may be an example of the above-mentioned demodulation circuit. In this embodiment, the external oscillator 200 shown in Figure 2 may include the low-Q oscillator 210 shown in Figure 6 (eg, a ring oscillator or RC oscillator) and at least one output buffer (eg, , one or more output buffers, collectively referred to as output buffers 220), where buffer 220 may be coupled between low-Q oscillator 210 and injection node N _INJ . In some embodiments, buffer 220 may be omitted.

In this embodiment, the demodulation circuit 310 can be implemented by using a diode with a sample and hold mechanism, as shown in FIG. 6, to extract relative phase dependent signals from an AM signal such as signal V _GATE (t) Information (eg, beating envelope). In detail, the demodulation circuit 310 may include a diode D0, a reset switch controlled by the signal RST, a sampling switch controlled by the signal RSTB, and a sampling capacitor _CS , wherein the cathode of the diode D0 is coupled to the sampling node of the demodulation circuit 310 . In the demodulation circuit 310 , the reset switch is coupled between the sampling node and the reference terminal (eg, the ground voltage terminal) of the demodulation circuit 310 , and the sampling switch is coupled between the anode of the diode D0 and the injection node N Between _INJ (or in other embodiments, it is coupled between the anode of diode D0 and the output terminal _{N OUT} of XO core circuit 100 ), and the sampling capacitor CS is coupled between the sampling node and the reference terminal . For example, in the reset period of the demodulation circuit 310, when the reset switch is turned on and the sampling switch is turned off, the voltage level of the sampling node is reset to the reference terminal reference level. When the reset switch is off and the sampling switch is on during the sampling period, in response to the voltage level of the AM signal exceeding the threshold corresponding to diode D0, charge accumulates on the sampling node (eg, in response to the signal V _GATE ( t) such that the voltage difference between the cathode and anode of diode D0 is greater than the threshold voltage of diode D0) to generate the demodulated voltages in the demodulated voltage sequence on the sampling node. The demodulation circuit 310 operates like an integrator, so the distortion-related information can correspond to a sequence of demodulated voltages, which can be represented by the signal V _De-MOD . Note that each demodulation voltage in the sequence of demodulation voltages is generated by the same diode (ie, diode D0), and no mismatch problem is introduced in the sequence of demodulation voltages.

的跳動包絡可以如下計算：

Figure 7 shows some details of the relationship between relative phase and distortion (eg, jitter envelope) according to an embodiment of the present invention. For better understanding, assume that the energy of a natural oscillation signal such as signal _VXO (eg, the amplitude of signal _VXO ) does not change. have different relative phases

The beating envelope of can be calculated as follows:

分別為-90°，-45°，0°，+45°和90°時，由

表示的跳動包絡可以為0,

,

,

和0，其中A ₀可以代表信號V _XO的幅度。基於此，導致跳動包絡

最小的相對相位

可以是0°。因此，如第8圖所示，當相對相位

時，諸如信號V _De-MOD的解調電壓序列可以具有最小電壓。 According to this equation, when

at -90°, -45°, 0°, +45° and 90°, respectively, by

The represented beating envelope can be 0,

,

,

and 0, where A ₀ can represent the amplitude of the signal V _XO . Based on this, resulting in a bouncing envelope

minimum relative phase

Can be 0°. Therefore, as shown in Figure 8, when the relative phase

, a demodulated voltage sequence such as signal V _De-MOD may have a minimum voltage.

的跳動包絡可作如下修改：

In fact, as shown in Figure 9, the energy of a natural oscillation signal such as signal _VXO (eg, the amplitude of signal _VXO ) may increase over time. with different relative phases

The beating envelope of can be modified as follows:

表示。根據此等式，當

分別為-90°，-45°，0°，+ 45°和+ 90°時，跳動包絡

可以為0,

,

,

和0，其中k可以代表信號V _XO幅度的增長率。基於此，當相對相位

在正方向上累積時，當A ₀和k為正值時，導致跳動包絡

最小的相對相位

可能落在0°至90°之間的間隔內。因此，如第10圖所示，當

時，諸如信號V _De-MOD的解調電壓序列可以具有最小電壓。類似地，當相對相位

在負方向上累積時，當A ₀和k為正值時，導致跳動包絡

最小的相對相位

可能落在0°至-90°之間的間隔內。根據以上描述，可以知道，導致出現了解調電壓序列中的最小電壓（更具體地，局部最小電壓）出現的注入信號與固有振盪信號之間的相對相位，落入+ 90°和-90°之間的間隔。其中，局部最小電壓可以是在解調電壓序列中解調電壓降低的變化趨勢出現反轉時的電壓。 The bouncing envelope with increased amplitude of the signal V _XO can be given by

express. According to this equation, when

Runout envelope at -90°, -45°, 0°, +45° and +90° respectively

can be 0,

,

,

and 0, where k can represent the growth rate of the amplitude of the signal V _XO . Based on this, when the relative phase

When accumulating in the positive direction, when _A0 and k are positive, resulting in a jumpy envelope

minimum relative phase

May fall within the interval between 0° and 90°. Therefore, as shown in Figure 10, when

, a demodulated voltage sequence such as signal V _De-MOD may have a minimum voltage. Similarly, when the relative phase

When accumulating in the negative direction, when _A0 and k are positive, resulting in a bouncing envelope

minimum relative phase

May fall within the interval between 0° and -90°. From the above description, it can be known that the relative phase between the injected signal and the natural oscillation signal, which leads to the occurrence of the minimum voltage (more specifically, the local minimum voltage) in the demodulated voltage sequence, falls between +90° and -90° interval between. Wherein, the local minimum voltage may be the voltage when the variation trend of demodulation voltage reduction in the demodulation voltage sequence is reversed.

FIG. 11 is a schematic diagram illustrating a detailed implementation of an XO 20 according to an embodiment of the present invention. Note that the injection switch is turned on during start-up and is omitted in Figure 11 for brevity. In addition to the demodulation circuit 310 shown in FIG. 6, the frequency controller 300 shown in FIG. 3 may further include: a monitoring circuit 320 coupled to the demodulation circuit, and coupled to the monitoring circuit 320 and an external oscillator A finite state machine (FSM) 330 (FSM with counter) of the oscillator 200 (eg, the low-Q oscillator 210 ). In this embodiment, the FSM 330 may utilize the injected signal as a counting clock (eg, CLK _counting ) for the FSM, but the present invention is not limited thereto. In this embodiment, monitoring circuit 320 may be configured to generate monitoring results from the demodulated voltage sequence, and FSM 330 may be configured to control external oscillator 200 (eg, low-Q oscillator 210 ) via signal V _control , In order to selectively change the injection frequency according to the monitoring results to ensure that the relative phase falls within the interval between +90 degrees and -90 degrees. In the embodiment of FIG. 11, the monitoring circuit 320 may include an amplifier AMP _COMP , a capacitor C _COMP , and a loop switch controlled by a signal LOOP _EN , wherein the first input of the amplifier AMP _COMP (in the amplifier shown in FIG. 11) AMP _COMP labeled "+") may be coupled to demodulation circuit 310 (eg, a sampling node therein), capacitor C _COMP may be coupled at the reference terminal and a second input of amplifier AMP _COMP (shown in Figure 11) output amplifier AMP _COMP marked with "-"), and a loop switch may be coupled between a second input terminal and an output terminal of the amplifier AMP _COMP . In this embodiment, a D flip-flop (DFF) 322 controlled by the signal LOOP _EN may be included in the monitoring circuit 320, wherein the DFF is coupled between the output of the amplifier AMP _COMP and the FSM 330, so that the FSM 330 only receives digital results, but the invention is not so limited.

In detail, the amplifier AMP _COMP may be configured to receive the demodulated voltage sequence through its first input, the capacitor C _COMP may be configured to sequentially store the demodulated voltage sequence, and the loop switch may be configured to control the configuration of the monitoring circuit 320 . For a better understanding, please refer to FIGS. 12 and 13, wherein FIG. 12 shows the operation of the monitoring circuit 320 shown in FIG. 11 in the preset stage. Figure 13 illustrates the operation of the monitoring circuit 320 shown in Figure 11 during the evaluation phase. During the pre-setup phase of the monitoring circuit 320, the loop switch is turned on, and the monitoring circuit 320 is configured as a unity gain buffer to connect from the first input of the amplifier AMP _COMP to the capacitor C _COMP (eg, the second input of the amplifier AMP _COMP ). input terminal) transmits the first demodulated voltage within the sequence of demodulated voltages. During the evaluation phase, the loop switch is opened and the monitoring circuit 320 is configured as a comparator to compare the second demodulated voltage on the first input of the amplifier AMP _COMP with the first demodulated voltage stored on the capacitor (amplifier AMP _COMP ) on the second input terminal of , and generate a comparison result, wherein the monitoring result includes the comparison result. By analogy, successive comparisons of demodulated voltage sequences can be generated, where these successive comparisons can represent monitoring results.

Assuming that the comparison result of the monitoring circuit 320 is "0", it means that the previous demodulation voltage (eg, the first demodulation voltage described above) of the two consecutive demodulation voltages in the demodulation voltage sequence is greater than the two consecutive demodulation voltages in the demodulation voltage sequence. The demodulation voltage following the demodulation voltage (eg, the second demodulation voltage described above), and the comparison result of the monitoring circuit 320 being "1" indicates that the former demodulation voltage of the two consecutive demodulation voltages is smaller than the latter demodulation voltage. Adjust the voltage. Therefore, when the comparison result changes from "0" to "1", it means that a local minimum of the demodulated voltage sequence is detected.

In practice, there may be an inherent offset _VOS caused by the mismatch of the first and second inputs of the amplifier AMP _COMP . Based on the operations shown in Figures 12 and 13, the influence from the inherent offset V _OS can be removed from the comparison results. For example, when the first demodulation voltage (which may be denoted by "V[n]") is transferred from the first input of the amplifier AMP _COMP to the second input of the amplifier AMP _COMP in the pre-set stage, the inherent offset V _OS can be stored on capacitor C _COMP together with the first voltage, so capacitor C _COMP can store the voltage V[n] - V _OS ; in the evaluation phase, the second demodulation voltage (which can be represented by V[n+1]) can be Present on the first terminal of amplifier AMP _COMP together with the intrinsic offset V _OS . Since both the first and second inputs of amplifier AMP _COMP have inherent offsets on their respective terminals, the comparison results (eg AD _RESULT shown in Figure 13) will not be affected by the inherent offset.

It should be noted that the monitoring circuit 320 is not limited to use in the XO 20 shown in FIG. 11 . Any system that requires continuous comparison operations (eg, generating comparison results with respect to adjacent data (or voltages) within a sequence of data (or voltages)) may be implemented by monitoring circuit 320 .

In another embodiment, the diode D0 in the demodulation circuit 310 may be replaced with a transistor M0 (eg, an N-type transistor) as shown in FIG. 14, wherein the gate terminal of the transistor M0 is coupled to the transistor The drain terminal of M0 makes the transistor function as a diode, but the present invention is not limited thereto. Note that the injection switch is on during start-up and is omitted in Figure 11 for brevity.

In another embodiment, monitoring circuit 320 may be replaced by monitoring circuit 320A, as indicated by XO 30 shown in FIG. 15, wherein monitoring circuit 320A may include a comparator COMP, a first sampling switch controlled by signal SH, A second sampling switch controlled by the signal SHB, the first sampling capacitor C ₁ and the second sampling capacitor C ₂ . Note that the injection switch is on during start-up and is omitted in Figure 11 for brevity. As shown in Figure 15, the first sampling switch and the first sampling capacitor _C1 form a first sample and hold circuit, which is coupled to the first input terminal of the comparator COMP (on the comparator COMP marked "+"), the second sampling switch and the second sampling capacitor C2 form a _second sample and hold circuit which is coupled to the second input of the comparator COMP (on the comparator COMP marked "-"), where the signals VA and VB represent the voltages on the first and second inputs of the comparator COMP.

FIG. 16 is a timing diagram of some signals (eg, counting clock CLK _counting , signals RST, RSTB, SH, SHB, and signals VA and VB) in the XO 20 shown in FIG. 15 according to an embodiment of the present invention. In this embodiment, the signals RST, RSTB, SH and SHB may be generated by a timing controller (not shown) according to the counting clock CLKcounting, but the present invention is not limited thereto. According to the timing shown in FIG. 16, the demodulated voltages of the demodulated voltage sequence can be sampled alternately/alternately on the sampling capacitors C1 and C2, and the corresponding monitoring result of the demodulated voltage sequence can be output from the comparator COMP. For example, the sampling capacitor C1 samples the first demodulated voltage, the sampling capacitor C2 samples the second demodulated voltage, the sampling capacitor C1 samples the third demodulated voltage, and the sampling capacitor C2 samples the fourth demodulated voltage.

In another embodiment, the monitoring circuit 320 may be replaced by an analog-to-digital converter (ADC) 320B, as shown by XO 40 in FIG. 17 . Note that the injection switch is turned on during start-up and is omitted in Figure 17 for brevity. For example, ADC 320B may sequentially convert the sequence of demodulated voltages into digital codes, which may represent the aforementioned monitoring results, and FSM 330 may control low-Q oscillator 210 to selectively vary the injection frequency according to these digital codes.

Figure 18 shows some details related to the control of the injection frequency according to an embodiment of the present invention. As shown in Figure 18, the FSM 330 may control an external oscillator (eg, the low-Q oscillator 210) to alternately/alternately switch the injection frequency to one or more target frequencies among a plurality of candidate frequencies based on the monitoring results to The injection frequency is made stepwise close to the natural frequency of the natural oscillation signal, where the plurality of candidate frequencies respectively correspond to the plurality of states of the FSM 330 . In this embodiment, it is assumed that the natural frequency (which can be considered the target frequency) is equal to the center frequency (eg, with a frequency error of 0 ppm relative to the center frequency) among the plurality of candidate frequencies. When the injected frequency is initially at the first frequency, which has a frequency error of -5000 ppm with respect to the center frequency of the plurality of candidate frequencies, the relative phase (eg, phase error) between the natural oscillation signal and the injected signal can start at Accumulates in the positive direction, where the energy of the natural oscillation signal is increasing and the level of the demodulation voltage sequence (eg, signal V _De-MOD ) is decreasing, so the comparison result of the monitoring circuit 320 initially remains "0". When the monitoring result indicates that the subsequent demodulation voltage is greater than the previous demodulation voltage at time point t1 (eg, the comparison result from the monitoring circuit 320 changes from "0" to "1"), it means that the demodulation voltage is detected A sequence of local minimum voltages (eg, signal V _De-MOD ) where FSM 330 can determine that candidate frequencies less than the first frequency are unavailable and control external oscillator 200 (eg, a low-Q oscillator) to inject frequencies from the first A frequency is switched to a second frequency that has a frequency error of +5000ppm relative to the center frequency, and the comparison returns to "0". Similarly, when the monitoring result indicates that the comparison result changes from "0" to "1" at time point t2, the FSM 330 may determine that a candidate frequency greater than the second frequency is unavailable, and control the external oscillator 200 (eg, a low-Q oscillator) ) switches the injection frequency from a second frequency to a third frequency with a -4000ppm frequency error relative to the center frequency. By analogy, the injection frequency can be switched to the fourth frequency, the fifth frequency, the sixth frequency and the seventh frequency at time points t3, t4, t5 and t6, respectively. For the sake of brevity, similar descriptions are not repeated here. Accordingly, whenever the demodulation voltage within the demodulation voltage sequence reaches the minimum value, the injection frequency can be adjusted appropriately so that the relative phase can be accumulated in alternating directions, thus ensuring that the relative phase is limited to within ±90°, (usually in the range of ±40° or less), so the energy of the inherent oscillatory signal always increases.

Figure 19 shows some details related to the control of the injection frequency according to another embodiment of the present invention. In this example, it is assumed that the natural frequency (which can be considered the target frequency) has a frequency error of +4500ppm with respect to the center frequency. As shown in FIG. 19, the monitoring result indicates that the comparison result changes from "0" to "1" at time point t7 (ie, the demodulation voltage V1 is less than the demodulation voltage V2), the FSM 330 may determine that the third frequency (with A candidate frequency of -4000ppm frequency error) is not available, and an external oscillator 200 (eg, a low-Q oscillator) is controlled to switch the injection frequency from a third frequency to a fourth frequency with a +4000ppm frequency error relative to the center frequency. However, because the demodulation voltage V3 is greater than the demodulation voltage V2, the comparison result remains "1" at time point t8, which means that switching from the third frequency to the fourth frequency cannot change the accumulation direction of the relative phases. Therefore, the FSM 330 can control the external oscillator 200 (eg, a low-Q oscillator) to further switch the injection frequency from the fourth frequency to an eighth frequency (with a +4500ppm frequency error) greater than the fourth frequency (with a +4000ppm frequency error) , to change the accumulation direction of the relative phase. Similarly, if the comparison result remains at "1" after the injection frequency is switched from the ninth frequency to a tenth frequency less than the ninth frequency, the FSM 330 may control the external oscillator 200 (eg, a low-Q oscillator) to further set the The injection frequency is switched from the tenth frequency to an eleventh frequency which is smaller than the tenth frequency.

In some embodiments, based on the monitoring results, the FSM 330 may control the external oscillator 200 (eg, the low-Q oscillator 210 ) to alternately switch the injection frequency to a first candidate frequency (eg, the first frequency has a -5000ppm frequency error) or a second candidate frequency (eg, the second frequency has a frequency error of +5000ppm). Note that the first frequency is greater than the natural frequency of the natural oscillation signal, and the second frequency is smaller than the natural frequency, so each switch between the first candidate frequency and the second candidate frequency can indeed change the accumulation direction of the relative phase. Therefore, the relative phase can still be limited to within ±90°, and it can be ensured that the energy of the natural oscillation signal only increases at all times during the start-up process by means of only two candidate frequencies.

In some embodiments, the injection switch may be turned on for a predetermined period of time. That is, the point of time at which the injection switch is turned off (or the time at which the start-up process is completed) can be predetermined. In other embodiments, the system including the XO 20 may monitor at least one signal within the XO 20 to trigger the system to complete the startup process (eg, open the injection switch) in response to the at least one signal satisfying a certain condition. In one embodiment, the system may determine that the startup process is complete when the target demodulation voltage of the sequence of demodulation voltages is detected, assuming that the initial demodulation voltage represents the first demodulation voltage of the sequence of demodulation voltages at the beginning of the startup process , and the injection switch may be turned off, wherein the voltage difference between the target demodulation voltage and the initial demodulation voltage is greater than or equal to a predetermined value. Therefore, when the energy of the natural oscillation signal grows to a certain value that causes the target demodulation voltage to appear, it can be considered that the start-up process has been completed and the injection switch is turned off.

The startup method and the related XO architecture provided by the embodiments of the present invention can control the switching of the injection frequency according to the distorted square wave caused by the amplitude modulation of the injection signal and the natural oscillation signal, so that the relative phase between the injection signal and the natural oscillation signal is Confine to the desired interval (eg, ±90°). Based on this, it is not necessary to open the injection switch during the aforementioned lock/synchronization period, and it is further ensured that the energy of the natural oscillation signal always increases. It is assumed that when the injection frequency of the injection signal is the same as the natural frequency of the XO core circuit, a reference time period is required for the start-up process. Regarding the method of temporarily interrupting the clock injection during the previous lock/sync period, 17.4 times to 90.6 times the reference period may be required for the start-up process. Regarding the start-up method of not disconnecting injection until the start-up process is completed, 1.05 to 1.5 times the reference time period may be required, which means that the present invention does greatly improve the clock injection efficiency, and the start-up time can be greatly reduced.

Those of ordinary skill in the art will readily observe that various modifications and variations can be made in the apparatus and method while maintaining the teachings of the present invention. Accordingly, the above disclosure should be construed as being limited only by the bounds of the appended claims. The above descriptions are only preferred embodiments of the present invention, and all equivalent changes and modifications made according to the scope of the patent application of the present invention shall fall within the scope of the present invention.

10: XO 11: Active device 20: XO 200: External oscillator 100: XO core circuit 300: Frequency controller S310, S320, S330: Step 210: Low Q oscillator 220: Output buffer 310: Demodulation circuit D0: Diode C _S : Sampling Capacitor 330: Finite State Machine 320: Monitoring Circuit 322: D flip-flop AMP _COMP : Amplifier C _COMP : Capacitor 30: XO COMP: Comparator 320A: Monitoring Circuit RST, RSTB, SH, SHB, VA , VB: signal CLK _counting : counting clock 40: XO 320B: ADC

FIG. 1 is a schematic diagram illustrating a concept regarding starting a crystal oscillator (XO) by means of external clock injection, according to an embodiment of the present invention. FIG. 2 is a schematic diagram illustrating an XO according to an embodiment of the present invention. FIG. 3 is a flowchart of a method of enabling the XO shown in FIG. 2 by means of external clock injection according to an embodiment of the present invention. FIG. 4 is a schematic diagram illustrating waveform patterns of some signals with varying relative phases according to an embodiment of the present invention. FIG. 5 shows the relationship between the growth rate and the relative phase of an intrinsic oscillation signal according to an embodiment of the present invention. FIG. 6 is a schematic diagram illustrating a detailed implementation of generating a series of demodulated voltages by a demodulation circuit according to an embodiment of the present invention. Figure 7 shows some details of the relationship between relative phase and distortion according to an embodiment of the invention. Figure 8 shows some details of the relationship between relative phase and demodulation voltage according to an embodiment of the present invention. Figure 9 shows some details of the relationship between relative phase and distortion according to an embodiment of the present invention. Figure 10 shows some details of the relationship between relative phase and demodulation voltage according to an embodiment of the present invention. FIG. 11 is a schematic diagram illustrating a detailed implementation of the XO shown in FIG. 2 according to an embodiment of the present invention. Fig. 12 shows the operation of the monitoring circuit shown in Fig. 11 in a preset phase. Fig. 13 shows the operation of the monitoring circuit shown in Fig. 11 during the evaluation phase. Figure 14 shows a schematic diagram of a detailed implementation of the XO shown in Figure 2 according to an embodiment of the present invention. Figure 15 shows a schematic diagram of a detailed implementation of the XO shown in Figure 2 according to another embodiment of the present invention. Figure 16 is a timing diagram of some of the signals within the implementation shown in Figure 15 in accordance with an embodiment of the present invention. Fig. 17 is a schematic diagram showing a detailed implementation of the XO shown in Fig. 2 according to another embodiment of the present invention. Figure 18 illustrates some details related to controlling the injection frequency in accordance with an embodiment of the present invention. Figure 19 shows some details related to controlling the injection frequency according to another embodiment of the present invention.

S310, S320, S330: Steps

Claims (20)

A method of starting a crystal oscillator (XO) by means of external clock injection, the method comprising: The injection signal is generated using an external oscillator external to the crystal oscillator core circuit of the crystal oscillator, wherein the crystal oscillator includes a crystal oscillator core circuit, the external oscillator external to the crystal oscillator core circuit , and at least one injection switch coupled between an injection node of the crystal oscillator and an output of the crystal oscillator core circuit to which the external oscillator is coupled , and the quality factor of the external oscillator is lower than the quality factor of the crystal oscillator core circuit; Turning on the at least one injection switch, so that the energy of the injection signal is injected into the crystal oscillator core circuit, thereby increasing the energy of the natural oscillation signal of the crystal oscillator core circuit, wherein according to the injection signal and the natural oscillation signal in combination to produce a modulated signal at the injection node; and The external oscillator is controlled to selectively change the injection frequency of the injection signal according to the modulation signal; wherein, when the external oscillator selectively changes the injection frequency of the injection signal, the at least one injection switch connected. The method of claim 1, wherein the step of controlling the external oscillator to selectively change the injection frequency of the injection signal according to the modulation signal comprises: Using the demodulation circuit of the crystal oscillator to generate a demodulation voltage sequence according to the modulation signal, the demodulation voltage sequence carrying information about the relative phase between the injection signal and the natural oscillation signal; generating a monitoring result from the demodulated voltage sequence using a monitoring circuit of the crystal oscillator; and The external oscillator is controlled to selectively change the injection frequency according to the monitoring result. The method of claim 2, wherein the step of controlling the external oscillator to selectively change the injection frequency according to the monitoring result comprises: The injection frequency is alternately switched to a first frequency or a second frequency according to the monitoring result, so that the relative phase falls within an interval between +90 degrees and -90 degrees, wherein the first frequency is greater than the natural frequency of the natural oscillation signal, and the second frequency is smaller than the natural frequency; Alternatively, the injection frequency is alternately switched to a frequency in a first group of frequencies or a frequency in a second group of frequencies according to the monitoring result, wherein the first group of frequencies is greater than the natural frequency of the natural oscillation signal, and the second set of frequencies is less than the natural frequency. The method of claim 2, wherein the step of controlling the external oscillator to selectively change the injection frequency according to the monitoring result comprises: According to the monitoring result, the injection frequency is switched among a plurality of candidate frequencies, so that the injection frequency is close to the natural frequency of the natural oscillation signal, wherein the plurality of candidate frequencies respectively correspond to multiple frequencies of the finite state machine FSM. a state. The method of claim 2, wherein the demodulation voltage sequence includes a first demodulation voltage and a second demodulation voltage following the first demodulation voltage, and the external oscillation is controlled according to the monitoring result The step of selectively changing the injection frequency includes: The injection frequency is switched from a first frequency to a second frequency in response to the monitoring result indicating that the second demodulation voltage is greater than the first demodulation voltage. The method of claim 5, wherein the demodulation voltage sequence further includes a third demodulation voltage following the second demodulation voltage, and the external oscillator is controlled to selectively vary according to the monitoring result The step of injecting frequency also includes: in response to the monitoring result indicating that the third demodulation voltage is greater than the second demodulation voltage, switching the injection frequency from the second frequency to the third frequency; Wherein, the first frequency is greater than the second frequency, and the second frequency is greater than the third frequency; or, the first frequency is less than the second frequency, and the second frequency is less than the third frequency frequency. The method of claim 2, wherein the sequence of demodulation voltages includes a first demodulation voltage and a second demodulation voltage following the first demodulation voltage, the monitoring circuit includes an amplifier and a capacitor, and utilizing The step of the monitoring circuit generating a monitoring result according to the demodulated voltage sequence includes: The monitoring circuit is configured as a unity gain buffer by turning on a loop switch coupled between a second input and an output of the amplifier to convert the first demodulated voltage from the amplifier's second input an input is transmitted to a capacitor coupled to a second input of the amplifier; and configuring the monitoring circuit as a comparator to compare a second demodulated voltage on the first input of the amplifier with a first demodulated voltage stored on the capacitor by opening the loop switch A comparison is made, and a comparison result is generated accordingly, wherein the monitoring result includes: the comparison result. The method of claim 2, wherein the step of using the demodulation circuit to generate the demodulation voltage sequence according to the modulation signal comprises: turning on a reset switch of the demodulation circuit and turning off a sampling switch of the demodulation circuit to reset the voltage level of the sampling node of the demodulation circuit to a reference level within a reset period; and During the sampling period, in response to the voltage level of the modulated signal exceeding a threshold value corresponding to the diode of the demodulation circuit, the reset switch is turned off and the sampling switch is turned on to Charges are accumulated on the sampling nodes to generate demodulated voltages of the sequence of demodulated voltages on the sampling nodes. The method of claim 2, wherein the initial demodulation voltage represents a first demodulation voltage in the sequence of demodulation voltages, and the method further comprises: in response to detecting a target demodulation voltage in the sequence of demodulation voltages to indicate completion of the start-up process, opening at least one injection switch, wherein the voltage difference between the target demodulation voltage and the initial demodulation voltage is greater than or equal to a predetermined value . A crystal oscillator (XO) comprising: The core circuit of crystal oscillator is used to generate natural oscillation signal; an external oscillator, coupled to the injection node of the crystal oscillator, for generating an injection signal, wherein the quality factor of the external oscillator is lower than the quality factor of the crystal oscillator core circuit; at least one injection switch, coupled between the injection node and the output terminal of the crystal oscillator core circuit, wherein when the at least one injection switch is turned on, the energy of the injection signal is injected into the crystal oscillator core a circuit to increase the energy of the natural oscillation signal to generate a modulation signal at the injection node based on the combination of the injected signal and the natural oscillation signal; and a frequency controller, coupled to the external oscillator, for controlling the external oscillator to selectively change the injection frequency of the injection signal according to the modulation signal; Wherein, when the external oscillator selectively changes the injection frequency of the injection signal, the at least one injection switch is turned on. The crystal oscillator of claim 10, wherein the frequency controller comprises: a demodulation circuit, configured to receive a modulation signal and generate a demodulation voltage sequence according to the modulation signal, where the demodulation voltage sequence carries information about the relative phase between the injection signal and the natural oscillation signal; a monitoring circuit, coupled to the demodulation circuit, for generating a monitoring result according to the demodulated voltage sequence; and A finite state machine (FSM), coupled to the monitoring circuit and the external oscillator, is configured to control the external oscillator to selectively vary the injection frequency according to the monitoring results. The crystal oscillator of claim 11, wherein the finite state machine controls the external oscillator to alternately switch the injection frequency to the first frequency or the second frequency according to the monitoring result, so that the The relative phase falls within the interval between +90 degrees and -90 degrees, wherein the first frequency is greater than the natural frequency of the natural oscillation signal and the second frequency is less than the natural frequency. The crystal oscillator of claim 11, wherein the finite state machine controls the external oscillator to switch the injection frequency among a plurality of candidate frequencies according to the monitoring result so that the injection frequency is close to the injection frequency The natural frequency of the natural oscillation signal, wherein the plurality of candidate frequencies respectively correspond to the plurality of states of the finite state machine. The crystal oscillator of claim 11, wherein the demodulation voltage sequence includes a first demodulation voltage and a second demodulation voltage following the first demodulation voltage; and when the monitoring result indicates the When the second demodulation voltage is greater than the first demodulation voltage, the finite state machine controls the external oscillator to switch the injection frequency from the first frequency to the second frequency. The crystal oscillator of claim 14, wherein the demodulation voltage sequence further includes a third demodulation voltage following the second demodulation voltage, when the monitoring result indicates that the third demodulation voltage is greater than the second demodulation voltage voltage, the finite state machine controls an external oscillator to switch the injection frequency from a second frequency to a third frequency, wherein the first frequency is greater than the second frequency, and the second frequency is greater than the third frequency or, the first frequency is smaller than the second frequency, and the second frequency is smaller than the third frequency. The crystal oscillator of claim 11, wherein the demodulation voltage sequence includes a first demodulation voltage and a second demodulation voltage following the first demodulation voltage, and the monitoring circuit includes: an amplifier, coupled to the demodulation circuit, for receiving the demodulated voltage sequence through a first input of the amplifier; a capacitor coupled to the second input of the amplifier for sequentially storing the sequence of demodulated voltages; and a loop switch, coupled between the second input terminal and the output terminal of the amplifier, for controlling the configuration of the monitoring circuit; wherein, when the loop switch is turned on, the monitoring circuit is configured as a unity gain buffer to transmit the first demodulated voltage from the first input of the amplifier to the capacitor; and when all the when the loop switch is open, the monitoring circuit is configured as a comparator for comparing the second demodulated voltage on the first input of the amplifier with the first demodulated voltage stored on the capacitor, and generate a comparison result, wherein the monitoring result includes the comparison result. The crystal oscillator of claim 11, wherein the demodulation circuit comprises: A diode, the cathode of the diode is coupled to the sampling node of the demodulation circuit; a reset switch, coupled between the sampling node and the reference terminal of the demodulation circuit; a sampling switch coupled to the anode of the diode; and a sampling capacitor coupled to the sampling node; Wherein, when the reset switch is turned on and the sampling switch is turned off in the reset period, the voltage level of the sampling node is reset to the reference level of the reference terminal; and when the reset switch is in the sampling period When the set switch is off and the sampling switch is on, in response to the voltage level of the modulating signal exceeding the threshold corresponding to the diode, a charge is accumulated on the sampling node, which is generated at the sampling node The demodulation voltage of the sequence of demodulation voltages. The crystal oscillator of claim 11, wherein an initial demodulation voltage represents a first demodulation voltage in the sequence of demodulation voltages; when a target demodulation voltage in the sequence of demodulation voltages is detected to indicate start-up When the process is complete, the at least one injection switch is turned off, wherein the voltage difference between the target demodulation voltage and the initial demodulation voltage is greater than or equal to a predetermined value. A monitoring circuit for generating successive comparison results of demodulated voltage sequences carrying information on the relative phase between an injected signal and a natural oscillation signal of a crystal oscillator, the monitoring circuit comprising: an amplifier for receiving the demodulated voltage sequence through a first input terminal of the amplifier, wherein the demodulated voltage sequence includes a first voltage and a second voltage following the first voltage; a capacitor, coupled to the second input of the amplifier, for sequentially storing the sequence of demodulated voltages; and a loop switch, coupled between the second input terminal and the output terminal of the amplifier, for controlling the configuration of the monitoring circuit; Wherein, when the loop switch is turned on, the monitoring circuit is configured as a unity gain buffer for transmitting the first voltage from the first input terminal of the amplifier to the capacitor; when the loop When the switch is open, the monitoring circuit is configured as a comparator for comparing the second voltage on the first input of the amplifier with the first voltage stored on the capacitor and generating the continuous comparison The comparison result in the result; wherein, the comparison result carries the information of the relative phase between the injection signal and the natural oscillation signal of the crystal oscillator, and is used to control the injection frequency of the injection signal. The monitoring circuit of claim 19, wherein an inherent offset caused by a mismatch of the first and second inputs of the amplifier is stored with the first voltage when the loop switch is turned on on the capacitor, thereby preventing the comparison result from being affected by an inherent offset.

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