CN114242833A - Silicon wafer processing method of heterojunction solar cell - Google Patents
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 124
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- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
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- H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
- H01L31/072—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type
- H01L31/0745—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells
- H01L31/0747—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN heterojunction type comprising a AIVBIV heterojunction, e.g. Si/Ge, SiGe/Si or Si/SiC solar cells comprising a heterojunction of crystalline and amorphous materials, e.g. heterojunction with intrinsic thin layer
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Abstract
The invention discloses a silicon wafer processing method of a heterojunction solar cell, which comprises the steps of providing a silicon wafer, preprocessing the silicon wafer, and removing an original damaged layer, impurities and an oxide layer on the surface of the silicon wafer; and placing the silicon wafer in a reaction cavity of plasma enhanced chemical vapor deposition equipment, controlling the substrate temperature of the plasma enhanced chemical vapor deposition equipment at 200-600 ℃, and carrying out low-temperature hydrogen treatment on the silicon wafer. The silicon wafer processing method of the heterojunction solar cell can effectively prolong the service life of the silicon wafer body, is beneficial to improving the open circuit of the cell and improving the efficiency of the heterojunction solar cell; the fluctuation phenomenon of the terminal cell efficiency caused by the fluctuation of the quality of the silicon wafer source is improved, and the cell efficiency concentration is improved.
Description
Technical Field
The invention relates to the technical field of solar cells, in particular to a silicon wafer processing method of a heterojunction solar cell.
Background
With the change of global environment, energy transformation is a great trend, and the traditional fossil energy cannot meet the requirement of continuous development, so that various countries develop new energy technology capable of continuous development, wherein solar energy is favored in various new energy sources due to the unique advantage. Currently, solar cells with various structures are on the market, and among them, a crystalline silicon Heterojunction (HJT) solar cell is more and more favored by photovoltaic due to its excellent properties such as high conversion efficiency, simple process steps, low process temperature, and no Light Induced Degradation (LID).
From the aspect of the silicon heterojunction solar cell preparation process, cleaning and texturing and PECVD (plasma enhanced chemical vapor deposition) deposition of amorphous silicon are two key steps influencing the passivation effect of the cell. The cleaning and texturing are to carry out a plurality of chemical wet processes on the silicon wafer before amorphous silicon deposition so as to remove surface defects and pollution such as a mechanical damage layer, a surface metal ion pollution source, organic pollutants and the like on the surface of the silicon wafer. The PECVD deposition of the intrinsic amorphous silicon is to perform saturated passivation on dangling bonds on the surface of a silicon wafer by utilizing H atoms in the hydrogenated amorphous silicon film, and the recombination rate of the surface of the silicon wafer can be reduced to below 10cm/s, so that the intrinsic amorphous silicon is an important reason for obtaining high open-circuit voltage of a cell. However, both the cleaning texturing and the intrinsic amorphous silicon passivation only act on the surface of the silicon wafer, and have no effect on dislocations, oxygen defects, metal impurities, and the like in the silicon wafer body. In the related art, the open-circuit voltage of the silicon heterojunction battery can reach more than 745mV, the surface passivation capability is nearly perfect, and in this case, the defects of the silicon wafer body become the main factors for limiting the increase of the open-circuit voltage of the battery.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art.
Therefore, the embodiment of the invention provides a silicon wafer processing method of a heterojunction solar cell, which can prolong the service life of a silicon wafer body
The silicon wafer processing method of the heterojunction solar cell comprises the steps of providing a silicon wafer, preprocessing the silicon wafer, and removing an original damaged layer, impurities and an oxide layer on the surface of the silicon wafer; and placing the silicon wafer in a reaction cavity of plasma enhanced chemical vapor deposition equipment, controlling the substrate temperature of the plasma enhanced chemical vapor deposition equipment at 200-600 ℃, and carrying out low-temperature hydrogen treatment on the silicon wafer.
According to the silicon wafer processing method of the heterojunction solar cell, disclosed by the embodiment of the invention, under the low-temperature condition of 200-600 ℃, hydrogen atoms are excited by utilizing a plasma enhanced chemical vapor deposition (PCVD) hydrogen processing process to passivate defects in a silicon wafer body, so that the purpose of prolonging the minority carrier lifetime of a silicon wafer body is achieved, the service life of the silicon wafer body is prolonged, on one hand, the open-circuit voltage of the cell is further improved, and the efficiency of the heterojunction solar cell is finally improved; on the other hand, the fluctuation phenomenon of the terminal cell efficiency caused by the fluctuation of the quality of the silicon wafer source is improved, so that the cell efficiency concentration is improved.
In some embodiments, the plasma enhanced chemical vapor deposition apparatus has a power density of 300-2。
In some embodiments, the pressure in the reaction chamber of the plasma enhanced chemical vapor deposition apparatus is 200-.
In some embodiments, the flow rate of hydrogen in the reaction chamber of the PECVD apparatus is 2000-20000 sccm.
In some embodiments, the treatment time of the low temperature hydrogen treatment is 10-40 min.
In some embodiments, the step of pre-treating the silicon wafer comprises:
polishing the surface of the silicon wafer by adopting a potassium hydroxide solution or a sodium hydroxide solution to remove a surface mechanical damage layer;
cleaning the surface of the silicon wafer by adopting a mixed solution of ammonia water and hydrogen peroxide and a mixed solution of hydrochloric acid and hydrogen peroxide to remove metal impurities and organic matters on the surface of the silicon wafer;
and soaking the silicon wafer by adopting a hydrofluoric acid solution to remove an oxide layer on the surface of the silicon wafer.
In some embodiments, the temperature of the potassium hydroxide solution or the sodium hydroxide solution used in the pretreatment step is 60 to 80 ℃ and the mass ratio is 0.5 to 10%.
In some embodiments, the hydrofluoric acid solution used in the pre-treatment step is 0.5-2% by volume.
In some embodiments, the silicon wafer is soaked in the hydrofluoric acid solution for 1min in the pretreatment step.
In some embodiments, the silicon wafer processing method further comprises: after the low-temperature hydrogen treatment is carried out on the silicon wafer, a damage layer on the surface of the silicon wafer, which is generated due to the hydrogen treatment, is removed by adopting a mixed aqueous solution of nitric acid and hydrofluoric acid.
Drawings
Fig. 1 is a flow chart of a silicon wafer processing method of a heterojunction solar cell according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
The silicon wafer processing method of the heterojunction solar cell according to the embodiment of the invention is described below with reference to the accompanying drawings.
As shown in fig. 1, the silicon wafer processing method of the heterojunction solar cell according to the embodiment of the invention includes:
1) providing a silicon wafer, and pretreating the silicon wafer to remove an original damaged layer, impurities and an oxide layer on the surface of the silicon wafer.
2) Placing the silicon wafer in a reaction cavity of plasma enhanced chemical vapor deposition equipment, controlling the substrate temperature of the plasma enhanced chemical vapor deposition equipment at 200-600 ℃, and carrying out low-temperature hydrogen treatment on the silicon wafer, wherein the substrate temperature can be within the interval of 300 ℃, 400 ℃ or 500 ℃ and the like;
3) after the low-temperature hydrogen treatment is carried out on the silicon wafer, a damage layer generated on the surface of the silicon wafer due to the hydrogen treatment is removed by adopting a mixed aqueous solution of nitric acid and hydrofluoric acid.
Under the action of a radio frequency field generated by plasma enhanced chemical vapor deposition equipment, hydrogen is excited into high-energy plasma, so that high-density hydrogen atoms on the surface of the silicon wafer diffuse into the silicon wafer along a concentration gradient and form bonds with defects such as dangling bonds at dislocation positions in the silicon wafer body and active metal ions, and the like, so that the silicon wafer body loses activity, and the purposes of reducing the defects of the silicon wafer body and prolonging the minority carrier lifetime of the silicon wafer body are achieved.
It should be noted that, in the related art, the methods for reducing defects of the silicon wafer body and improving the quality of the silicon wafer are mainly high-temperature diffusion/gettering processes, including two related technologies, but both schemes have disadvantages.
The related art is to use phosphorus oxychloride (POCl)3) Forming SiO on the surface of the silicon wafer as a diffusion source2And P2O3Is commonly known as phosphosilicate glass, then in N2And O2The silicon wafer is annealed at the temperature of 700-900 ℃, the metal impurities in the silicon wafer body move to the surface of the silicon wafer under the thermal drive by utilizing the principle that the condensation coefficients of the metal impurities in different substances are different, and finally the surface phosphorosilicate glass layer enriched with the metal impurities is removed by a chemical wet method, so that the purposes of reducing the metal impurities in the silicon wafer body and prolonging the minority carrier lifetime of the silicon wafer are achieved.
In the first related art, oxygen atoms are diffused into the wafer body to form oxygen precipitates or oxygen donors in the diffusion process due to the presence of oxygen elements, thereby causing new defects; meanwhile, dislocation and the like in the silicon wafer cannot be well repaired and passivated, so that the minority carrier lifetime improving effect of the related technology on the silicon wafer is limited. In addition, the diffusion and annealing processes of the first related art are performed at high temperature, and are compatible with high-temperature diffusion and high-temperature curing processes in conventional PERC cells (Passivated emitter and reactor cells) or TOPCon cells, but cannot be implemented in the existing low-temperature equipment configuration of silicon heterojunction cells.
The second related technology is that the silicon wafer is placed in a tubular annealing furnace after the surface of the silicon wafer is cleaned by a wet process, and high-temperature heat treatment is carried out at the temperature of 800-1000 ℃ in the mixed atmosphere of N2 and H2, so that H2 is decomposed into H atoms at high temperature and diffused into the silicon wafer body for passivation.
The second related art has the disadvantages that the treatment process needs high temperature of 800-; secondly, new dislocation defects are generated in the silicon wafer at high temperature, and partial inactive oxygen precipitates, metal impurities and the like in the silicon wafer body can be activated to become new defect centers, so that the minority carrier lifetime of the silicon wafer can be reduced.
When the temperature of the substrate is lower than 300 ℃, hydrogen can not diffuse into the silicon wafer body, or the diffusion depth is not enough; when the temperature is too high, hydrogen atoms diffused into the silicon wafer body can be re-diffused out of the silicon wafer at high temperature, so that the hydrogen concentration in the silicon wafer body is reduced, and the defect of the silicon wafer body is not easy to passivate.
The silicon wafer processing method of the heterojunction solar cell in the embodiment of the invention utilizes the plasma enhanced chemical vapor deposition (PCVD) hydrogen processing technology to excite hydrogen atoms to passivate defects in the silicon wafer body at the low temperature of 200-600 ℃, thereby achieving the purpose of prolonging the minority carrier lifetime of the silicon wafer body, solving the problem that the existing equipment of the silicon heterojunction solar cell in the related technology cannot complete diffusion and annealing, and solving the problem that new defects are possibly generated due to high temperature in the related technology II.
Furthermore, the service life of the silicon wafer body is prolonged, on one hand, the open circuit voltage of the battery is further improved, and the efficiency of the heterojunction battery is finally improved; on the other hand, the fluctuation phenomenon of the terminal cell efficiency caused by the fluctuation of the quality of the silicon wafer source is improved, so that the cell efficiency concentration is improved.
At one endIn some embodiments, the power density of the PECVD apparatus is 300-500mW/cm2For example, the power density may be 350mW/cm2、400mW/cm2Or 450mW/cm2. When the power is too low, high-concentration hydrogen plasma is difficult to generate, and hydrogen is not favorably diffused into the silicon wafer body; when the power is too high, the energy of the hydrogen plasma is too large, a plurality of micro defects are generated on the surface of the silicon wafer and even the silicon wafer is influenced in the body, and the high power has higher requirements on the silicon wafer and is not beneficial to reducing the equipment cost.
The pressure in the reaction chamber of the plasma enhanced chemical vapor deposition device is 200-2000mtorr, for example, the pressure in the reaction chamber can be 500mtorr, 1000mtorr or 1500 mtorr.
The flow rate of hydrogen in the reaction chamber of the PECVD apparatus is 2000-20000sccm, for example, the flow rate of hydrogen in the reaction chamber can be 5000sccm, 10000sccm or 15000 sccm.
In some embodiments, the low-temperature hydrogen treatment of the silicon wafer using the plasma enhanced chemical vapor deposition apparatus may be performed for a treatment time of 10 to 40min, for example, the treatment time may be 15min, 20min, 25min, 30min, or 35 min.
The step of pretreating the silicon wafer comprises the following steps:
1. polishing the surface of the silicon wafer by adopting a potassium hydroxide solution or a sodium hydroxide solution to remove a surface mechanical damage layer;
2. cleaning the surface of the silicon wafer by adopting a mixed solution of ammonia water and hydrogen peroxide and a mixed solution of hydrochloric acid and hydrogen peroxide to remove metal impurities and organic matters on the surface of the silicon wafer;
3. and soaking the silicon wafer by adopting a hydrofluoric acid solution to remove an oxide layer on the surface of the silicon wafer.
In some embodiments, the temperature of the potassium hydroxide solution or sodium hydroxide solution used in the pretreatment step is 60 to 80 ℃ and the mass ratio is 0.5 to 10%, for example, the temperature of the solution may be 65 ℃, 70 ℃, 75 ℃, and the mass ratio of the solution may be 2%, 4%, 6%, 8%.
The hydrofluoric acid solution used in the pretreatment step may be in a volume ratio of 0.5 to 2%, for example, 1% or 1.5%.
In the pretreatment step, the silicon wafer is soaked in hydrofluoric acid solution for 1 min.
In the description of the present invention, it is to be understood that the terms "central," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," "circumferential," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the invention and to simplify the description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are therefore not to be considered limiting of the invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; may be mechanically coupled, may be electrically coupled or may be in communication with each other; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the present disclosure, the terms "one embodiment," "some embodiments," "an example," "a specific example," or "some examples" and the like mean that a specific feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the present disclosure. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A silicon wafer processing method of a heterojunction solar cell is characterized by comprising the following steps:
providing a silicon wafer, and pretreating the silicon wafer to remove an original damaged layer, impurities and an oxide layer on the surface of the silicon wafer;
and placing the silicon wafer in a reaction cavity of plasma enhanced chemical vapor deposition equipment, controlling the substrate temperature of the plasma enhanced chemical vapor deposition equipment at 200-600 ℃, and carrying out low-temperature hydrogen treatment on the silicon wafer.
2. The silicon wafer treatment method as defined in claim 1, wherein the power density of the PECVD apparatus is 300 mW/cm2。
3. The silicon wafer processing method as claimed in claim 1, wherein the pressure in the reaction chamber of the plasma enhanced chemical vapor deposition device is 200-.
4. The silicon wafer processing method as claimed in claim 1, wherein the flow rate of hydrogen in the reaction chamber of the PECVD apparatus is 2000-20000 sccm.
5. The silicon wafer processing method according to claim 1, wherein the processing time of the low-temperature hydrogen treatment is 10 to 40 min.
6. The method of processing a silicon wafer according to claim 1, wherein the step of pretreating the silicon wafer comprises:
polishing the surface of the silicon wafer by adopting a potassium hydroxide solution or a sodium hydroxide solution to remove a surface mechanical damage layer;
cleaning the surface of the silicon wafer by adopting a mixed solution of ammonia water and hydrogen peroxide and a mixed solution of hydrochloric acid and hydrogen peroxide to remove metal impurities and organic matters on the surface of the silicon wafer;
and soaking the silicon wafer by adopting a hydrofluoric acid solution to remove an oxide layer on the surface of the silicon wafer.
7. The method for treating silicon wafers as set forth in claim 6, wherein the temperature of the potassium hydroxide solution or sodium hydroxide solution used in the pretreatment step is 60 to 80 ℃ and the mass ratio is 0.5 to 10%.
8. The method for treating silicon wafers as claimed in claim 6, wherein the hydrofluoric acid solution is used in the pretreatment step in a volume ratio of 0.5 to 2%.
9. The method for treating silicon wafers as claimed in claim 6, wherein the time for soaking the silicon wafers with the hydrofluoric acid solution in the pretreatment step is 1 min.
10. The silicon wafer processing method according to any one of claims 1 to 9, further comprising: after the low-temperature hydrogen treatment is carried out on the silicon wafer, a damage layer on the surface of the silicon wafer, which is generated due to the hydrogen treatment, is removed by adopting a mixed aqueous solution of nitric acid and hydrofluoric acid.
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