CN114239462A - Parameter determination method, performance verification method, device and related equipment - Google Patents
Parameter determination method, performance verification method, device and related equipment Download PDFInfo
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- CN114239462A CN114239462A CN202111504894.4A CN202111504894A CN114239462A CN 114239462 A CN114239462 A CN 114239462A CN 202111504894 A CN202111504894 A CN 202111504894A CN 114239462 A CN114239462 A CN 114239462A
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- G06F30/36—Circuit design at the analogue level
- G06F30/367—Design verification, e.g. using simulation, simulation program with integrated circuit emphasis [SPICE], direct methods or relaxation methods
Abstract
The embodiment of the invention provides a parameter determination method, a performance verification method, a device and related equipment, wherein the method comprises the following steps: acquiring basic data, wherein the basic data comprises designed function verification data, acquiring target performance data in the basic data, and analyzing and processing the target performance data to obtain designed target performance parameters. The target performance data can represent the target performance state designed in the functional verification process, so that the designed target performance parameters can be obtained after the target performance data is analyzed and processed, and the designed target performance can be verified based on the target performance parameters.
Description
Technical Field
The embodiment of the invention relates to the technical field of integrated circuit design, in particular to a parameter determination method, a performance verification device and related equipment.
Background
In an integrated circuit design, it is not only verified whether the designed function is consistent with the expected function, but also verified whether the performance of the design is expected. However, the performance verification methods designed at present are not mature, and the verification of the design performance is limited.
Disclosure of Invention
In view of this, embodiments of the present invention provide a parameter determining method, a performance verifying method, an apparatus and a related device, so as to verify performance of a design.
In order to solve the above problems, embodiments of the present invention provide the following technical solutions:
the first aspect of the present invention provides a parameter determining method, including:
acquiring basic data, wherein the basic data comprises designed functional verification data;
acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
and analyzing and processing the target performance data to obtain the designed target performance parameters.
A second aspect of the present invention provides a parameter determining apparatus, including:
the system comprises a first acquisition module, a second acquisition module and a third acquisition module, wherein the first acquisition module is used for acquiring basic data, and the basic data comprises designed functional verification data;
the second acquisition module is used for acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
and the performance analysis module is used for analyzing and processing the target performance data to obtain the designed target performance parameters.
The third aspect of the present invention provides a performance verification method, including:
acquiring basic data, wherein the basic data comprises designed functional verification data;
acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
analyzing and processing the target performance data to obtain the designed target performance parameters;
comparing the target performance parameter to an expected performance parameter to verify whether the performance of the design is as expected.
A fourth aspect of the present invention provides a performance verification apparatus, including:
the system comprises a first acquisition module, a second acquisition module and a third acquisition module, wherein the first acquisition module is used for acquiring basic data, and the basic data comprises designed functional verification data;
the second acquisition module is used for acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
the performance analysis module is used for analyzing and processing the target performance data to obtain the designed target performance parameters;
and the performance verification module is used for comparing the target performance parameter with an expected performance parameter so as to verify whether the performance of the design reaches an expected performance.
A fifth aspect of the present invention provides a computer apparatus comprising:
a memory storing at least one set of instructions;
a processor executing the at least one set of instructions to perform the parameter determination method as described in any one of the above, or the performance verification method as described above.
A sixth aspect of the invention provides a readable storage medium storing at least one set of instructions for causing a processor to perform a parameter determination method as described in any one of the above, or a performance verification method as described above.
The parameter determination method, the performance verification device and the related equipment provided by the embodiment of the invention are used for acquiring basic data, wherein the basic data comprises designed function verification data, and then acquiring target performance data in the basic data.
That is to say, in the embodiment of the present invention, the designed performance is verified by analyzing and processing the designed functional verification data to obtain the designed target performance parameter, so that a performance verification platform does not need to be separately developed, the development amount of the verification platform is reduced, the human resources and the time resources are saved, and the designed performance verification cost is reduced. In addition, in the embodiment of the invention, the functional verification data is analyzed and processed after the existing functional verification data is obtained, so that the designed functional verification is not influenced.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, it is obvious that the drawings in the following description are only embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a schematic diagram of a functional verification process for an integrated circuit design;
FIG. 2 is a flow chart of a method for determining parameters according to an embodiment of the present invention;
fig. 3 is a flowchart of a parameter determination method according to another embodiment of the present invention;
fig. 4 is a schematic structural diagram of a parameter determining apparatus according to an embodiment of the present invention;
fig. 5 is a schematic structural diagram of a parameter determining apparatus according to another embodiment of the present invention;
FIG. 6 is a flow chart of a performance verification method provided by one embodiment of the present invention;
fig. 7 is a schematic structural diagram of a performance verification apparatus according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
FIG. 1 is a schematic diagram of a functional verification process for an integrated circuit design. After the integrated circuit design (hereinafter referred to as design) is realized by using a hardware description language, such as a System Verilog language, a functional verification platform is established by using the same hardware description language, and a test case (test case) is written to perform simulation test on the design, so as to verify whether the designed function is consistent with the expected function.
Since the verification function is a basic requirement of the integrated circuit design, various functional verification and simulation techniques, standards, tools, methodologies, and the like have been developed and developed, and are continuously perfected. In contrast, the performance verification of a design is not very extensive, and the related art and the maturity of tools and the familiarity in the industry are far from the functional verification. However, with the increasing scale of chips and the higher performance requirements, the performance verification of chip design is receiving more and more attention.
Although it is possible to develop an independent performance verification platform as in functional verification, use a special performance verification framework to completely simulate the behavior of the integrated circuit design, run simulation programs and utilize statistical tools provided by the environment for performance analysis and verification. However, the development workload of the performance verification platform is large, the development time is long, and a large amount of manpower and material resources are required. For the condition of small-scale performance analysis or sudden performance analysis, the development of the platform cannot be completed in a short time, so that the performance analysis cannot be completed in time, the development cost is too high, and the input and output cannot be in direct proportion.
While it is also possible to integrate the performance verification program in the functional verification platform, the performance verification data is obtained at the same time as the functional verification data. However, integrating the performance verification program may not only result in a slow operation speed of the functional verification platform, but also result in a poor flexibility of debugging and verification of the functional verification platform. Moreover, once the code of the performance verification program has errors, the operation of the functional verification platform is greatly influenced.
The inventor researches and discovers that some data in the functional verification data can represent the performance state of the design in the functional verification process, and the performance of the design can be analyzed and verified based on the data. In addition, the development cost is not high, and the operation of the functional verification platform is not influenced.
Based on the above inventive concept, embodiments of the present invention provide a parameter determining method, which is used to determine a performance parameter of a design in a functional verification process, so as to verify the performance of the design by using the performance parameter.
As shown in fig. 2, fig. 2 is a flowchart of a parameter determining method according to an embodiment of the present invention, where the parameter determining method includes:
s201: acquiring basic data, wherein the basic data comprises designed functional verification data;
the design is functionally verified in any one of the ways, and after the data generated in the functional verification process of the design, i.e., the functional verification data, is obtained, the functional verification data can be obtained as the basic data. The process of performing functional verification on the design may be a process of performing simulation test on the design.
It should be noted that, in the process of performing functional verification on the design, it is preferable to select a test case that is close to the actual chip workload pressure, or select a test case that can best embody the performance state of the design, so as to perform better verification on the performance of the design based on the functional verification data. Of course, the present invention is not limited thereto, that is, in the embodiment of the present invention, the test case or the simulation environment is not particularly limited.
S202: acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state designed in a functional verification process;
obtaining basic data, for example, after obtaining the design functional verification data, analyzing the basic data, and finding out data capable of characterizing the target performance state of the design in the functional verification process from the basic data, so as to obtain corresponding target performance parameters based on the data of the target performance state.
S203: and analyzing and processing the target performance data to obtain the designed target performance parameters.
In the embodiment of the present invention, the target performance data may be data corresponding to one target performance parameter, or may be data corresponding to a plurality of target performance parameters. That is, in the embodiment of the present invention, after the target performance data is obtained and analyzed, one target performance parameter or multiple target performance parameters may be obtained.
The target performance parameter may be a direct performance parameter of the designed performance, such as a processing speed parameter, which characterizes the computing power per unit time of the design. Or may be an indirect performance parameter of the designed performance, such as a buffer characteristic parameter, a transmission characteristic parameter, a delay characteristic parameter, and the like.
It should be noted that, if the designed functions are different, the performances to be verified may also be different, and the obtained target performance parameters may also be different. That is, what kind of parameters are included in the obtained target performance parameters is determined according to specific design and verification requirements, which is not limited in the embodiment of the present invention. That is to say, in the embodiment of the present invention, the target performance parameter can be flexibly adjusted according to the designed function, and thus the performance of the design can be flexibly verified.
In the embodiment of the invention, the designed performance is verified by analyzing and processing the designed functional verification data to obtain the designed target performance parameters, so that a performance verification platform does not need to be developed independently, the development amount of the verification platform is reduced, the human resources and the time resources are saved, and the designed performance verification cost is reduced. In addition, in the embodiment of the invention, the functional verification data is analyzed and processed after the existing functional verification data is obtained, so that the designed functional verification is not influenced.
In some embodiments of the present invention, the functional verification data includes waveform data including a simulation waveform, and after the functional verification data is acquired, the waveform data may be further acquired from the functional verification data as basic data. Of course, the present invention is not limited to this, and in other embodiments, the text data may be further obtained from the functional verification data as the basic data, which is not described herein again.
On this basis, in some embodiments of the present invention, obtaining the base data includes: waveform data in the designed functional verification data is acquired. The waveform data is waveform data including a plurality of signals. On the basis, acquiring the target performance data in the basic data comprises the following steps: and acquiring waveform data of a target signal in the waveform data.
If the basic data is the waveform data in the functional verification data and the designed functional verification data of the initial simulation test includes the required waveform data, the waveform data may be obtained from the functional verification data of the initial simulation test, and if the functional verification data of the initial simulation test does not include or does not include the required waveform data, the design may be subjected to regression verification to generate the functional verification data including the required waveform data, and the waveform data may be obtained from the functional verification data.
After the waveform data in the functional verification data is acquired as the basic data, in some embodiments of the present invention, the waveform data of the target signal may be directly selected from the waveform data by using a program instruction, or the waveform data of the target signal may be flexibly selected from the waveform data by using a third-party tool.
That is, in some embodiments of the present invention, acquiring waveform data of a target signal in the waveform data includes: and acquiring a target data file generated by the waveform reading tool, wherein the target data file comprises waveform data of a target signal in the waveform data. The waveform reading tool is used for reading the waveform data so as to select the waveform data of the target signal from the waveform data and generate a target data file.
That is, in some embodiments of the present invention, the waveform reading tool may be used to read the waveform data and display the waveform data, so that the worker selects the waveform data of the target signal from the waveform data and generates the target data file. Of course, in other embodiments, the waveform data of the target signal may also be selected from the waveform data by the waveform reading tool, and a target data file is generated, which is not described herein again. Based on the method, the target performance data can be obtained by flexibly utilizing common third-party tools, so that a special program does not need to be developed to obtain the target performance data, and the development cost can be reduced.
Based on the foregoing embodiments, in some embodiments of the present invention, acquiring the target data file generated by the waveform reading tool includes: and acquiring a target data file in a text format generated by the waveform reading tool.
That is to say, in some embodiments of the present invention, after the target performance data is obtained by using a common waveform reading tool, the target performance data may be stored in a target data file in a text format, so that the target data file can be read very conveniently to obtain the target performance data therein.
Alternatively, the waveform reading tool is a waveform reading tool (nWave) of a debug automation platform (Verdi), i.e., a waveform data file containing waveform data in function verification data can be loaded or read by nWave, and the file format can be fsdb, vcd, and the like.
After opening the waveform data file with nWave, the target signal is selected. And if the File- > Report Selected Signals operation is used, the waveform data output of the Selected target Signals is saved as a designated File according to the prompt. The file records all selected target signals as they change arbitrarily, including the time at which any signal changes and the values of all signals before and after the time at which the change occurs. Optionally, the time information and the signal value are recorded in a plain text manner, which is very convenient for subsequent processing.
On the basis of any of the foregoing embodiments, in some embodiments of the present invention, after acquiring waveform data of a target signal in waveform data, if the target performance data includes waveform data of a cache signal, and the waveform data of the cache signal can represent a performance state of a cache (cache) designed in a function verification process, analyzing and processing the target performance data, and acquiring a designed target performance parameter includes: and analyzing and processing the waveform data of the cache signal to obtain the hit parameter of the cache.
According to the time information recorded in the waveform data, the performance parameters in unit time one by one can be counted, and the performance parameters accumulated along with the time can also be counted. The hit parameters include a cache hit rate per unit time, a cache hit rate varying with time, and the like. That is, the number of attempts to check the cache per unit time and the number of cache hits per unit time may be counted, or the total cache hit rate may be counted over time.
If the target performance data includes waveform data of the transmission signal, and the waveform data of the transmission signal can represent a signal transmission state designed in the function verification process, analyzing and processing the target performance data, and obtaining the designed target performance parameters includes: and analyzing and processing the waveform data of the transmission signal to obtain the designed transmission characteristic parameters. The transmission characteristic includes a bandwidth flow rate in data transmission, and the transmission characteristic parameter may be a bandwidth flow rate in a unit time, a total accumulated flow rate at different time, an average flow rate varying with time, or the like.
If the target performance data includes waveform data of the delay signal, and the waveform data of the delay signal can represent a delay characteristic state designed in the function verification process, analyzing and processing the target performance data, and obtaining the designed target performance parameters includes: and analyzing and processing the waveform data of the delay signal to obtain the designed delay characteristic parameter.
Generally, a time difference between each pair of signal change events is calculated by using a change time of a certain delayed signal as a start time point and another change time of the delayed signal as an end time point, and then an average delay, a maximum delay or a minimum delay in a unit time, or a total average delay, a maximum delay or a minimum delay varying with time is counted. That is, the delay characteristic parameters in the embodiment of the present invention include an average delay, a maximum delay, a minimum delay, a total average delay over time, a maximum delay, a minimum delay, or the like.
On the basis of any of the above embodiments, in some embodiments of the present invention, as shown in fig. 3, fig. 3 is a flowchart of a parameter determining method according to another embodiment of the present invention, where the parameter determining method includes:
s301: acquiring basic data, wherein the basic data comprises designed functional verification data;
s302: acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state designed in a functional verification process;
s303: analyzing and processing the target performance data to obtain designed target performance parameters;
s304: and generating a designed target performance file based on the target performance parameters.
Steps S301 to S303 are the same as steps S201 to S203, and are not described herein again. After the designed target performance parameters are obtained, the designed target performance parameters can be directly displayed in a text or diagram mode, and a target performance file can also be generated, so that a worker can read and display the target performance file by adopting other common tools, and the target performance parameters can be viewed more intuitively.
On this basis, in some embodiments of the present invention, generating a target performance file for the design includes:
and generating a target performance file in a designed table format, so that the target performance file in the table format is opened through a table display tool to obtain target performance parameters in the target performance file.
The generated target performance file may include, among other things, target performance parameter values and time values that vary over time. The target performance file in the table format may be a csv format file, which is a simple comma-separated table, where each row of data is comma-separated into cells in rows, and the cells between different rows are comma-bounded by aligners.
The table display tool can be excel software. After the excel software is used for opening the target performance file in the csv format, the data of the target performance parameters can be displayed in a tabular form, and can also be made into a curve graph so as to visually present a performance parameter curve and contrast performance.
It should be noted that, in other embodiments of the present invention, target performance files in other formats may also be generated, and after the target performance file is opened by other tools, data in the file may also be copied and pasted into excel for display and drawing. Or after the format of the target performance file is converted by other tools, the converted file is opened by using excel software.
Based on the same inventive concept, an embodiment of the present invention further provides a parameter determining apparatus, as shown in fig. 4, where fig. 4 is a schematic structural diagram of the parameter determining apparatus according to an embodiment of the present invention, and the parameter determining apparatus includes:
a first obtaining module 41, configured to obtain basic data, where the basic data includes designed functional verification data;
a second obtaining module 42, configured to obtain target performance data in the basic data; the target performance data is capable of characterizing a target performance state designed in a functional verification process;
and the performance analysis module 43 is configured to analyze the target performance data to obtain a designed target performance parameter.
In the embodiment of the invention, the designed performance is verified by the target performance parameter of the design obtained by analyzing and processing the designed functional verification data through the parameter determining device, so that a performance verification platform does not need to be developed independently, the development amount of the verification platform is reduced, the human resource and the time resource are saved, and the design performance verification cost is reduced.
In addition, in the embodiment of the present invention, the parameter determination device analyzes and processes the functional verification data after obtaining the existing functional verification data, so that the designed functional verification is not affected. That is to say, the parameter determination apparatus in the embodiment of the present invention is completely independent of the verification process of the integrated circuit design, and not only has a fast operation speed, but also has flexible debugging.
In some embodiments of the present invention, the first obtaining module 41 is configured to obtain waveform data in the designed functional verification data; the second obtaining module 42 is configured to obtain waveform data of a target signal in the waveform data.
On this basis, in some embodiments of the present invention, the second obtaining module 42 is configured to obtain a target data file generated by the waveform reading tool, where the target data file includes waveform data of the target signal;
the waveform reading tool is used for reading and displaying waveform data so as to select waveform data of a target signal from the waveform data and generate a target data file.
In some embodiments of the present invention, the obtaining of the target data file generated by the waveform reading tool by the second obtaining module 42 includes: and acquiring a target data file in a text format generated by the waveform reading tool.
In some embodiments of the present invention, if the target performance data includes waveform data of a cache signal, and the waveform data of the cache signal can represent a performance state of a cache designed in a functional verification process, the performance analysis module 43 performs analysis processing on the target performance data, and obtaining the designed target performance parameter includes: analyzing and processing waveform data of the cache signal to obtain a hit parameter of the cache;
if the target performance data includes waveform data of the transmission signal, and the waveform data of the transmission signal can represent a signal transmission state designed in the function verification process, the performance analysis module 43 performs analysis processing on the target performance data, and obtaining the designed target performance parameters includes: analyzing and processing waveform data of the transmission signal to obtain designed transmission characteristic parameters;
if the target performance data includes waveform data of the delay signal, and the waveform data of the delay signal can represent a delay characteristic state designed in the function verification process, the performance analysis module 43 performs analysis processing on the target performance data, and obtaining the designed target performance parameters includes: and analyzing and processing the waveform data of the delay signal to obtain the designed delay characteristic parameter.
On the basis of any one of the above embodiments, in some embodiments of the present invention, as shown in fig. 5, fig. 5 is a schematic structural diagram of a parameter determining apparatus according to another embodiment of the present invention, where the parameter determining apparatus further includes:
and a file generation module 44 for generating a designed target performance file based on the target performance parameters.
On this basis, in some embodiments of the present invention, the file generation module 44 is configured to generate the target performance file in the table format, so as to open the target performance file in the table format through the table display tool to obtain the target performance parameters in the target performance file.
Based on the same inventive concept, an embodiment of the present invention further provides a performance verification method, as shown in fig. 6, where fig. 6 is a flowchart of the performance verification method provided in an embodiment of the present invention, and the performance verification method includes:
s601: acquiring basic data, wherein the basic data comprises designed functional verification data;
s602: acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state designed in a functional verification process;
s603: analyzing and processing the target performance data to obtain designed target performance parameters;
s604: the target performance parameter is compared to the expected performance parameter to verify whether the performance of the design is as expected.
Steps S601 to S603 are the same as steps S301 to S303 or steps S201 to S203, and are not described herein again. And comparing the target performance parameter with the expected performance parameter to judge whether the target performance parameter is in the range of the expected performance parameter, if so, indicating that the designed performance reaches the expected performance, otherwise, indicating that the designed performance does not reach the expected performance, and needing to improve the design.
Based on the same inventive concept, an embodiment of the present invention further provides a performance verification apparatus, as shown in fig. 7, fig. 7 is a schematic structural diagram of the performance verification apparatus according to an embodiment of the present invention, where the performance verification apparatus includes:
a first obtaining module 71, configured to obtain basic data, where the basic data includes designed functional verification data;
a second obtaining module 72, configured to obtain target performance data in the basic data; the target performance data is capable of characterizing a target performance state designed in a functional verification process;
a performance analysis module 73, configured to analyze the target performance data to obtain a designed target performance parameter;
a performance verification module 74 for comparing the target performance parameter with the expected performance parameter to verify whether the performance of the design is expected.
The first obtaining module 71, the second obtaining module 72, and the performance analyzing module 73 are the same as the first obtaining module 41, the second obtaining module 42, and the performance analyzing module 43 in any of the above embodiments, and are not described herein again. The performance verification module 74 compares the target performance parameter with the expected performance parameter and then determines whether the target performance parameter is within the expected performance parameter, if so, the performance of the design is expected, and if not, the performance of the design is not expected, and the design needs to be improved.
In the embodiment of the invention, a special performance verification platform does not need to be developed, so the verification cost is lower. In addition, since the verification process in the embodiment of the invention is independent of other processes of the design, the performance of the design can be verified flexibly and efficiently.
Based on the same inventive concept, an embodiment of the present invention further provides a computer device, including:
a memory storing at least one set of instructions;
a processor executing at least one set of instructions to perform the parameter determination method as provided in any of the above embodiments, or the performance verification method as provided in any of the embodiments.
In an embodiment of the present invention, any compiling tool, such as perl, python, C/C + +, or the like, may be used to complete the compiling of the at least one set of instructions, so that when the processor executes the at least one set of instructions, the parameter determining method according to any embodiment above or the performance verifying method according to any embodiment above may be implemented.
Embodiments of the present invention also provide an electronic device, including but not limited to a mobile communication device, an ultra-mobile personal computer device, a portable entertainment device, a server and other electronic devices with data interaction functions, wherein the mobile communication device includes but not limited to a smart phone and a multimedia phone, the ultra-mobile personal computer device includes but not limited to a tablet computer, the portable entertainment device includes but not limited to an electronic book and a handheld game console, and the electronic devices such as the server include but not limited to the computer device as described above.
Based on the same inventive concept, embodiments of the present invention further provide a readable storage medium, where the readable storage medium stores at least one set of instructions, where the at least one set of instructions is configured to enable a processor to execute the parameter determination method provided in any of the above embodiments, or the performance verification method provided in any of the above embodiments.
Readable storage media, including both permanent and non-permanent, removable and non-removable media, of embodiments of the present invention may implement information storage by any method or technology. The information may be host-readable instructions, data structures, modules of a program, or other data. Examples of storage media for the host include, but are not limited to, phase change memory (PRAM), Static Random Access Memory (SRAM), Dynamic Random Access Memory (DRAM), other types of Random Access Memory (RAM), Read Only Memory (ROM), Electrically Erasable Programmable Read Only Memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), Digital Versatile Discs (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information that can be accessed by a computing device.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (16)
1. A method for parameter determination, comprising:
acquiring basic data, wherein the basic data comprises designed functional verification data;
acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
and analyzing and processing the target performance data to obtain the designed target performance parameters.
2. The parameter determination method of claim 1, wherein the obtaining the base data comprises: acquiring waveform data in the designed function verification data;
the acquiring target performance data in the basic data comprises:
and acquiring waveform data of a target signal in the waveform data.
3. The parameter determination method according to claim 2, wherein the acquiring waveform data of a target signal in the waveform data includes:
acquiring a target data file generated by a waveform reading tool, wherein the target data file comprises waveform data of a target signal in the waveform data;
the waveform reading tool is used for reading the waveform data so as to select the waveform data of the target signal from the waveform data and generate the target data file.
4. The parameter determination method of claim 3, wherein obtaining the target data file generated by the waveform reading tool comprises:
and acquiring a target data file in a text format generated by the waveform reading tool.
5. The method according to claim 2, wherein if the target performance data includes waveform data of a buffer signal, and the waveform data of the buffer signal can represent a performance state of the buffer of the design in a functional verification process, the analyzing the target performance data to obtain the target performance parameter of the design includes: analyzing and processing the waveform data of the cache signal to obtain a hit parameter of the cache;
if the target performance data includes waveform data of a transmission signal, and the waveform data of the transmission signal can represent a signal transmission state of the design in a function verification process, analyzing and processing the target performance data, and obtaining the target performance parameter of the design includes: analyzing and processing the waveform data of the transmission signal to obtain the designed transmission characteristic parameters;
if the target performance data includes waveform data of a delay signal, where the waveform data of the delay signal can represent a delay characteristic state of the design in a functional verification process, analyzing the target performance data, and obtaining the target performance parameter of the design includes: and analyzing and processing the waveform data of the delay signal to obtain the designed delay characteristic parameter.
6. The method of claim 1, wherein after obtaining the target performance parameter of the design, the method further comprises:
and generating a target performance file of the design based on the target performance parameters.
7. The parameter determination method of claim 6, wherein the generating the target performance file of the design comprises:
and generating the target performance file in a table format.
8. A parameter determination apparatus, comprising:
the system comprises a first acquisition module, a second acquisition module and a third acquisition module, wherein the first acquisition module is used for acquiring basic data, and the basic data comprises designed functional verification data;
the second acquisition module is used for acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
and the performance analysis module is used for analyzing and processing the target performance data to obtain the designed target performance parameters.
9. The parameter determination apparatus according to claim 8, wherein the first obtaining module is configured to obtain waveform data in the design functional verification data;
the second acquisition module is used for acquiring waveform data of a target signal in the waveform data.
10. The parameter determination apparatus according to claim 9, wherein the second obtaining module is configured to obtain a target data file generated by a waveform reading tool, the target data file including waveform data of the target signal;
the waveform reading tool is used for reading and displaying the waveform data so as to select the waveform data of the target signal from the waveform data and generate the target data file.
11. The parameter determination device of claim 8, further comprising:
and the file generation module is used for generating the designed target performance file based on the target performance parameters.
12. The apparatus of claim 11, wherein the file generation module is configured to generate a target performance file in a table format, so as to open the target performance file in the table format through a table display tool to obtain the target performance parameters in the target performance file.
13. A method of performance verification, comprising:
acquiring basic data, wherein the basic data comprises designed functional verification data;
acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
analyzing and processing the target performance data to obtain the designed target performance parameters;
comparing the target performance parameter to an expected performance parameter to verify whether the performance of the design is as expected.
14. A performance verification apparatus, comprising:
the system comprises a first acquisition module, a second acquisition module and a third acquisition module, wherein the first acquisition module is used for acquiring basic data, and the basic data comprises designed functional verification data;
the second acquisition module is used for acquiring target performance data in the basic data; the target performance data is capable of characterizing a target performance state of the design during a functional verification process;
the performance analysis module is used for analyzing and processing the target performance data to obtain the designed target performance parameters;
and the performance verification module is used for comparing the target performance parameter with an expected performance parameter so as to verify whether the performance of the design reaches an expected performance.
15. A computer device, comprising:
a memory storing at least one set of instructions;
a processor executing the at least one set of instructions to perform the parameter determination method of any of claims 1 to 7 or the performance verification method of claim 13.
16. A readable storage medium storing at least one set of instructions for causing a processor to perform the method of determining a parameter of any of claims 1 to 7 or the method of verifying performance of claim 13.
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