CN114236305B - Single-core cable on-line fault positioning device and method - Google Patents

Abstract

The invention provides an on-line fault positioning device and method for a single-core cable, comprising a first end current transformer, a second end current transformer, a first end current signal outgoing line, a second end current signal outgoing line and a range finder; after the single-core cable outer sheath of each phase passes through the cable terminal, the first end and the second end are led to the grounding box through the cable outgoing lines respectively; the first end current transformers of the phases are correspondingly connected in series in the first end cable sheath outgoing lines of the phases, and the second end current transformers of the phases are correspondingly connected in series in the second end cable sheath outgoing lines of the phases; the secondary side of the first end current transformer of each phase is connected to a range finder through a first end current signal outgoing line; the secondary side of the second section of current transformer of each phase is connected to the range finder through a second end current signal outgoing line; the range finder leads out a signal wire to an upper computer. The invention has accurate positioning, almost no time delay, can position the fault point within 0.67m and has high reliability.

Description

Single-core cable on-line fault positioning device and method

Technical Field

The invention relates to a single-core cable online fault positioning device and a cable online fault positioning method thereof, belonging to the field of electrical equipment diagnosis.

Background

The high-voltage cable gradually increases the operation quantity due to the advantages of small occupied area and flexible connection with electrical equipment, but the generated cable faults are increased. Because of the concealment of the cabling and the limitations of the test equipment, it is generally not easy to find the failure point directly. Therefore, how to quickly find the accurate position of the cable fault, reduce the fault repair time and repair cost, and pay more attention.

The invention patent CN202010896345.5 discloses a cable fault point positioning system, which is characterized in that a plurality of monitoring points are required to be arranged on a cable, and a plurality of sensing devices are arranged, so that the cable fault point positioning system is not suitable for buried cabling. The invention patent CN202010692477.6 discloses a fault point positioning device and a fault point positioning method for an ultrahigh voltage cable sheath, but the accuracy of the capacitance value of a capacitor in the current market is low due to the dependence on capacitance, so that the positioning accuracy is greatly affected. The invention patent CN201810789101.X discloses a method, a device and a system for positioning a short circuit fault of a high-voltage single-core cable, wherein the method is based on a cable sheath current signal, the precision can be caused by errors generated by inversion calculation, and the positioning precision is poor.

Disclosure of Invention

The invention aims to overcome the defects in the prior art and provide an on-line fault positioning device and method for a single-core cable, which improve positioning accuracy.

According to a first aspect of the object of the invention, the invention adopts the following technical scheme:

an on-line fault positioning device for a single-core cable is characterized in that: the device comprises a first end current transformer, a second end current transformer, a first end current signal outgoing line, a second end current signal outgoing line and a range finder; the single-core cable is provided with two ends, namely a first end and a second end; after the single-core cable outer sheath of each phase passes through the cable terminal, the first end and the second end are led to the grounding box through the cable outgoing lines respectively; the first end current transformers of the phases are correspondingly connected in series in the first end cable sheath outgoing lines of the phases, and the second end current transformers of the phases are correspondingly connected in series in the second end cable sheath outgoing lines of the phases; the secondary side of the first end current transformer of each phase is connected to a range finder through a first end current signal outgoing line; the secondary side of the second section of current transformer of each phase is connected to the range finder through a second end current signal outgoing line; and the range finder leads out a signal wire to an upper computer.

Further, the secondary side of the current transformer CT-A1 of the first end A phase is led to the range finder port A1 through a first end current signal outgoing line, and then is divided into two paths, wherein one path is connected with the positive electrode of the first operational amplifier through a resistor R4_A1+, the negative electrode of the first operational amplifier is led out and connected with the ground potential through a resistor R2_A1+, and is connected with the output end INA1+ of the first operational amplifier through a resistor R3_A1+; the other path is connected with the positive electrode of a second operational amplifier through a resistor R2_A1-, the negative electrode of the second operational amplifier is led out and connected with the ground potential through a resistor R4_A1-, and is connected with the output end INA 1-of the second operational amplifier through a resistor R3_A1-; the output ends of the first operational amplifier and the second operational amplifier are connected with the input port of the editable logic device of the range finder;

the secondary side of a current transformer CT-A2 of the second end A phase is led to an A2 port of the range finder through a second end current signal outgoing line, and then is divided into two paths, one path is connected with the positive electrode of a third operational amplifier through a resistor R4_A2+, the negative electrode of the third operational amplifier is led out and connected with the ground potential through a resistor R2_A2+, and is connected with the output end INA2+ of the third operational amplifier through a resistor R3_A2+; the other path is connected with the positive electrode of a fourth operational amplifier through a resistor R2_A2-, the negative electrode of the fourth operational amplifier is led out and connected with the ground potential through a resistor R4_A2-, and is connected with the output end INA 2-of the fourth operational amplifier through a resistor R3_A2-; the output ends of the third operational amplifier and the fourth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-B1 of a first end B phase is led to a B1 port of a range finder through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a fifth operational amplifier through a resistor R4_B1+, the negative electrode of the fifth operational amplifier is led out and connected with the ground potential through a resistor R2_B1+, and the negative electrode of the fifth operational amplifier is connected with the output end INB1+ of the fifth operational amplifier through a resistor R3_B1+; the other path is connected with the positive electrode of a sixth operational amplifier through a resistor R2_B1-, the negative electrode of the sixth operational amplifier is led out and connected with the ground potential through a resistor R4_B1-, and is connected with the output end INB1-of the sixth operational amplifier through a resistor R3_B1-; the output ends of the fifth operational amplifier and the sixth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-B2 of a second end B phase is led to a B2 port of the range finder through a second end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a seventh operational amplifier through a resistor R4_B2+, the negative electrode of the seventh operational amplifier is led out and connected with the ground potential through a resistor R2_B2+, and is connected with the output end INB2+ of the seventh operational amplifier through a resistor R3_B2+; the other path is connected with the positive electrode of an eighth operational amplifier through a resistor R2_B2-, the negative electrode of the eighth operational amplifier is led out and connected with the ground potential through a resistor R4_B2-, and is connected with the output end INB2-of the eighth operational amplifier through a resistor R3_B2-; the output ends of the seventh operational amplifier and the eighth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-C1 of a first end C phase is led to a C1 port of a range finder through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a ninth operational amplifier through a resistor R4_C1+, the negative electrode of the ninth operational amplifier is led out and connected with the ground potential through a resistor R2_C1+, and the negative electrode of the ninth operational amplifier is connected with the output end INC1+ of the ninth operational amplifier through a resistor R3_C1+; the other path is connected with the positive electrode of a tenth operational amplifier through a resistor R2_C1-, the negative electrode of the tenth operational amplifier is led out and connected with the ground potential through a resistor R4_C1-, and is connected with the output end INC 1-of the tenth operational amplifier through a resistor R3_C1-; the output ends of the ninth operational amplifier and the tenth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-C2 of the second end C phase is led to a C2 port of the range finder through a second end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of an eleventh operational amplifier through a resistor R4_C2+, the negative electrode of the eleventh operational amplifier is led out and connected with the ground potential through a resistor R2_C2+, and the negative electrode of the eleventh operational amplifier is connected with the output end INC2+ of the eleventh operational amplifier through a resistor R3_C2+; the other path is connected with the positive electrode of a twelfth operational amplifier through a resistor R2_C2-, and the negative electrode of the twelfth operational amplifier is led out and connected with the ground potential through a resistor R4_C2-; the positive electrode of the twelfth operational amplifier is connected with the output end INC 2-of the twelfth operational amplifier through a resistor R3_C2-; the output ends of the eleventh operational amplifier and the twelfth operational amplifier are connected with the input port of the editable logic device;

the programmable logic device is connected with the upper computer through a signal line.

The lengths of the current signal outgoing lines of each phase at the first end and the current signal outgoing lines of each phase at the second end are preferably equal.

According to a second aspect of the object of the present invention, the present invention adopts the following technical scheme:

a cable fault positioning method of a single-core cable on-line fault positioning device is characterized in that any single-core cable on-line fault positioning device is adopted;

when a single-phase grounding short-circuit fault occurs in the ith phase (I is any one of applicable A, B, C) of the single-core cable, starting a short-circuit current I1 from a short-circuit point to flow to the cable 1-end sheath, and starting a short-circuit current I2 to flow to the cable 2-end sheath; the current flows to the outgoing line of the cable sheath after passing through the cable terminal along the sheath, and after passing through the current transformer CT-i1 and the current transformer CT-i2, the current is induced on the secondary side of the current transformer, and is led to the port i1 and the port i2 of the range finder through the signal outgoing line.

When the current signal reaches the i1 port, the following steps are performed according to the working principle of the operational amplifier:

U _INi1+ ＝(1+Z _{R3_i1+} /Z _{R2_i1+} )*U _i1 and U is _INi1+ ≤3.3V

U _INi1- ＝-(Z _{R3_i1-} /Z _{R2_i1-} )*U _i1 And U is _INi1- ≤3.3V (1)

In U _INi1+ The voltage at the INi1+ port; z is Z _{R3_i1+} The resistance value of R3_i1+ is the same as the rest.

According to formula (1), when single-phase grounding short circuit does not occur on the single-core cable, the current transformer CT-i1 has no current output, and Ui1 voltage U _i1 Since the resistor R1_i1 is zero, the output voltages at ports INi1+ and INi1-are both 0. Select Z _{R3_i1+} Far greater than Z _{R2_i1+} ，Z _{R3_i1-} Far greater than Z _{R2_i1-} When the i phase is short-circuited, if the short-circuit moment is in a positive half cycle, ui1 is positive, and the INi1+ output voltage is 3.3V; when the i phase is shorted, if the short circuit time occurs in the negative half cycle, ui1 is negative and the INi 1-output voltage is 3.3V.

When the current signal reaches the i2 port, the following steps are performed according to the working principle of the operational amplifier:

U _INi2+ ＝(1+Z _{R3_i2+} /Z _{R2_i2+} )*U _i2 and U is _INi2+ ≤3.3V

U _INi2- ＝-(Z _{R3_i2-} /Z _{R2_i2-} )*U _i2 And U is _INi2- ≤3.3V (2)

In U _INi2+ The voltage at the INi2+ port; z is Z _{R3_i2+} A resistance value of r3_i2+; u (U) _INi2- The voltage of the INi 2-port; z is Z _{R3_i2-} The resistance value of R3_i2-.

According to formula (1), when the single-phase grounding short circuit does not occur in the single-core cable, the current transformer CT-i2 has no current output, and the Ui2 voltage U _i2 Since the resistor R1_i2 is zero, the output voltages at ports INi2+ and INi2-are both 0. Select Z _{R3_i2+} Far greater than Z _{R2_i2+} ，Z _{R3_i2-} Far greater than Z _{R2_i2-} When the i-phase is shorted, if the short circuit time occurs in the positive half cycle, ui2 is positive and ini2+ output voltage is 3.3V; when the i phase is shorted, if the short circuit time occurs in the negative half cycle, ui2 is negative and the INi 2-output voltage is 3.3V.

If the short circuit occurs in the positive half cycle, the input ends ini1+ and ini2+ of the programmable logic device will jump from 0 to 3.3V. Since the lengths of the first end current signal outgoing line and the second end current signal outgoing line are equal, the position of the short circuit generation point can be determined according to the time difference of jump of the INi1+ level and the INi2+ level. If the length of the single-core cable is L, the signal propagation speed is v, and the short-circuit point is deviated from the center of the cable by i1 end h, the moment when INi1+ occurs is: t1= (0.5L-h)/v, the moment in time when INi 1-occurs is: t2= (0.5l+h)/v; thus, h= (t 2-t 1) v/2 can be obtained, and the time difference of the jump of the t2-t1 and the INi1+ and INi2+ levels is equal, so that the fault point distance can be positioned.

If the short circuit time occurs in the negative half cycle, the input terminals INi 1-and INi 2-of the programmable logic device will jump from 0 to 3.3V. Since the lengths of the first end current signal outgoing line and the second end current signal outgoing line are equal, the position of the short circuit generation point can be determined according to the time difference of the jump of the INi 1-level and the INi 2-level. If the length of the single-core cable is L, the signal propagation speed is v, and the short-circuit point is deviated from the center of the cable by i1 end h, the moment when INi 1-occurs is as follows: t1= (0.5l+h)/v, the moment in time at which INi 1-occurs is: t2= (0.5L-h)/v; thus, h= (t 2-t 1) v/2 can be obtained, and the time difference of the jump of the t2-t1 and the INi 1-and the INi 2-levels is equal, so that the fault point distance can be positioned.

After the fault point distance is obtained, the data is uploaded to an upper computer, and the position can be displayed.

By adopting the fault locating device, fault location can be realized by measuring the time difference between fault point signals and two ends of the cable, and the crystal oscillation frequency of the programmable logic device adopted by the range finder can reach up to 3x10 ⁸ Hz, and the propagation speed of charges in the cable is 2x10 ⁸ m/s, the device does not need a logic device to carry out complex function transformation operation, only carries out simple comparison and addition and subtraction operation, has almost no time delay, can position a fault point within 0.67m, and has high reliability.

Drawings

FIG. 1 is a schematic diagram of the present invention.

Fig. 2 is a basic schematic of the rangefinder of fig. 1.

Detailed Description

The present invention will be described in further detail by way of examples with reference to the accompanying drawings, which are illustrative of the present invention and not limited to the following examples.

Referring to fig. 1, an on-line fault positioning device for a single-core cable is characterized in that: the device comprises a first end current transformer 1, a second end current transformer 2, a first end current signal outgoing line 3, a second end current signal outgoing line 4 and a range finder 5; the single-core cable is provided with two ends, namely a first end and a second end; after the single-core cable outer sheath of each phase passes through the cable terminal, the first end and the second end are led to the grounding box through the cable outgoing lines respectively; the first end current transformers of the phases are correspondingly connected in series in the first end cable sheath outgoing lines of the phases, and the second end current transformers of the phases are correspondingly connected in series in the second end cable sheath outgoing lines of the phases; the secondary side of the first end current transformer of each phase is connected to the range finder 5 through a first end current signal outgoing line; the secondary side of the second section of current transformer of each phase is connected to the range finder through a second end current signal outgoing line; and the range finder leads out a signal wire to an upper computer.

The secondary side of a current transformer CT-A1 of a first end A phase is led to a range finder port A1 through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a first operational amplifier through a resistor R4_A1+, the negative electrode of the first operational amplifier is led out and connected with the ground potential through a resistor R2_A1+, and is connected with the output end INA1+ of the first operational amplifier through a resistor R3_A1+; the other path is connected with the positive electrode of a second operational amplifier through a resistor R2_A1-, the negative electrode of the second operational amplifier is led out and connected with the ground potential through a resistor R4_A1-, and is connected with the output end INA 1-of the second operational amplifier through a resistor R3_A1-; the output ends of the first operational amplifier and the second operational amplifier are connected with the input port of the editable logic device of the range finder;

the secondary side of a current transformer CT-A2 of the second end A phase is led to an A2 port of the range finder through a second end current signal outgoing line, and then is divided into two paths, one path is connected with the positive electrode of a third operational amplifier through a resistor R4_A2+, the negative electrode of the third operational amplifier is led out and connected with the ground potential through a resistor R2_A2+, and is connected with the output end INA2+ of the third operational amplifier through a resistor R3_A2+; the other path is connected with the positive electrode of a fourth operational amplifier through a resistor R2_A2-, the negative electrode of the fourth operational amplifier is led out and connected with the ground potential through a resistor R4_A2-, and is connected with the output end INA 2-of the fourth operational amplifier through a resistor R3_A2-; the output ends of the third operational amplifier and the fourth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-B1 of a first end B phase is led to a B1 port of a range finder through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a fifth operational amplifier through a resistor R4_B1+, the negative electrode of the fifth operational amplifier is led out and connected with the ground potential through a resistor R2_B1+, and the negative electrode of the fifth operational amplifier is connected with the output end INB1+ of the fifth operational amplifier through a resistor R3_B1+; the other path is connected with the positive electrode of a sixth operational amplifier through a resistor R2_B1-, the negative electrode of the sixth operational amplifier is led out and connected with the ground potential through a resistor R4_B1-, and is connected with the output end INB1-of the sixth operational amplifier through a resistor R3_B1-; the output ends of the fifth operational amplifier and the sixth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-B2 of a second end B phase is led to a B2 port of the range finder through a second end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a seventh operational amplifier through a resistor R4_B2+, the negative electrode of the seventh operational amplifier is led out and connected with the ground potential through a resistor R2_B2+, and is connected with the output end INB2+ of the seventh operational amplifier through a resistor R3_B2+; the other path is connected with the positive electrode of an eighth operational amplifier through a resistor R2_B2-, the negative electrode of the eighth operational amplifier is led out and connected with the ground potential through a resistor R4_B2-, and is connected with the output end INB2-of the eighth operational amplifier through a resistor R3_B2-; the output ends of the seventh operational amplifier and the eighth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-C1 of a first end C phase is led to a C1 port of a range finder through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a ninth operational amplifier through a resistor R4_C1+, the negative electrode of the ninth operational amplifier is led out and connected with the ground potential through a resistor R2_C1+, and the negative electrode of the ninth operational amplifier is connected with the output end INC1+ of the ninth operational amplifier through a resistor R3_C1+; the other path is connected with the positive electrode of a tenth operational amplifier through a resistor R2_C1-, the negative electrode of the tenth operational amplifier is led out and connected with the ground potential through a resistor R4_C1-, and is connected with the output end INC 1-of the tenth operational amplifier through a resistor R3_C1-; the output ends of the ninth operational amplifier and the tenth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-C2 of the second end C phase is led to a C2 port of the range finder through a second end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of an eleventh operational amplifier through a resistor R4_C2+, the negative electrode of the eleventh operational amplifier is led out and connected with the ground potential through a resistor R2_C2+, and the negative electrode of the eleventh operational amplifier is connected with the output end INC2+ of the eleventh operational amplifier through a resistor R3_C2+; the other path is connected with the positive electrode of a twelfth operational amplifier through a resistor R2_C2-, and the negative electrode of the twelfth operational amplifier is led out and connected with the ground potential through a resistor R4_C2-; the positive electrode of the twelfth operational amplifier is connected with the output end INC 2-of the twelfth operational amplifier through a resistor R3_C2-; the output ends of the eleventh operational amplifier and the twelfth operational amplifier are connected with the input port of the editable logic device;

the programmable logic device is connected with the upper computer through a signal line.

The lengths of the outgoing lines of the current signals of each phase at the first end and the outgoing lines of the current signals of each phase at the second end are preferably equal, paths from the two ends of the cable to the range finder are completely symmetrical and consistent, and fault location can be realized more conveniently by measuring the time difference that fault point signals reach the two ends of the cable.

When single-phase grounding short-circuit fault occurs to the single-core cable (taking A-phase K-point short-circuit as an example), short-circuit current I1 flows to the outer sheath of the first-end single-core cable from the short-circuit point, and short-circuit current I2 flows to the outer sheath of the second-end single-core cable; the current flows to the outgoing line of the cable sheath after passing through the cable terminal along the outer sheath of the single-core cable, and after passing through the current transformer CT-A1 and the current transformer CT-A2, the current is induced on the secondary side of the current transformer, and is led to the port A1 and the port A2 of the range finder through the signal outgoing line.

When the current signal reaches the A1 port, the following steps are performed according to the working principle of the operational amplifier:

U _INA1+ ＝(1+Z _{R3_A1+} /Z _{R2_A1+} )*U _A1 and U is _INA1+ ≤3.3V

U _INA1- ＝-(Z _{R3_A1-} /Z _{R2_A1-} )*U _A1 And U is _INA1- ≤3.3V (1)

In U _INA1+ The voltage at INA1+ port; z is Z _{R3_A1+} The resistance value of R3_A1+ is the same as the rest.

According to formula (1), when single-phase grounding short circuit does not occur in the single-core cable, the current transformer CT-A1 does not have current output, and UA1 voltage U _A1 Since the resistor R1_A1 is zero, the output voltages of the ports INA1+ and INA1-are both 0. Select Z _{R3_A1+} Far greater than Z _{R2_A1+} ，Z _{R3_A1-} Far greater than Z _{R2_A1-} When the A phase is short-circuited, if the short-circuit time occurs in a positive half cycle, UA1 is positive, and INA1+ output voltage is 3.3V; when the A phase is short-circuited, if the short-circuit time occurs in the negative half cycle, UA1 is negative and INA 1-output voltage is 3.3V.

When the current signal reaches the A2 port, the following steps are performed according to the working principle of the operational amplifier:

U _INA2+ ＝(1+Z _{R3_A2+} /Z _{R2_A2+} )*U _A2 and U is _INA2+ ≤3.3V

U _INA2- ＝-(Z _{R3_A2-} /Z _{R2_A2-} )*U _A2 And U is _INA2- ≤3.3V (2)

In U _INA2+ The voltage at INA2+ port; z is Z _{R3_A2+} The resistance value of R3_A2+ is the same as the rest.

According to (2), when the single-phase grounding short circuit does not occur on the single-core cable, the current transformer CT-A2 has no current output, and the UA2 voltage U _A2 Since the resistor R1_A2 is zero, the output voltages of the ports INA2+ and INA2 are both 0. Select Z _{R3_A2+} ＝100Z _{R2_A2+} ，Z _{R3_A2-} ＝100Z _{R2_A2-} When the A phase is short-circuited, if the short-circuit time occurs in the positive directionHalf period, UA2 is positive and the ina2+ output voltage is 3.3V; when the A phase is short-circuited, if the short-circuit time occurs in the negative half cycle, UA2 is negative and INA 2-output voltage is 3.3V.

If the short circuit occurs in the positive half cycle, the input terminals INA1+ and INA2+ of the programmable logic device will jump from 0 to 3.3V. Since the lengths of the first terminal current signal outgoing line and the second terminal current signal outgoing line are equal, the position of the short circuit occurrence point can be determined according to the time difference of jump of INA1+ and INA2+ levels. For example, the single-core cable has a length of 2000m and a signal propagation speed of 2.5X10 ⁸ m/s, the short-circuit point is 500m away from the A1 end of the cable center, and the moment when INA1+ occurs is: t1= (1000-500)/2.5x10 ⁸ =2000 ns, ina1-time of occurrence is: t2= (1000+500)/2.5x10 ⁸ =6000 ns; if the programmable logic device adopts a crystal oscillator frequency of 100MHz, the identification accuracy of the programmable logic device to time is 10ns, and the positioning error is 10×500/4000=1.25m, so that the positioning requirement is completely met.

After the fault point distance is obtained, the data is uploaded to an upper computer, and the position can be displayed.

It should be noted that the foregoing describes embodiments of the present invention. However, it will be understood by those skilled in the art that the present invention is not limited to the above-described embodiments, which are described merely to illustrate the principles of the invention, and that various changes and modifications may be made therein without departing from the scope of the invention as claimed.

Claims (2)

1. The cable fault positioning method of the single-core cable online fault positioning device is characterized in that the single-core cable online fault positioning device comprises a first end current transformer (1), a second end current transformer (2), a first end current signal outgoing line (3), a second end current signal outgoing line (4) and a range finder (5); the single-core cable is provided with two ends, namely a first end and a second end; after the single-core cable outer sheath of each phase passes through the cable terminal, the first end and the second end are led to the grounding box through the cable outgoing lines respectively; the first end current transformers of the phases are correspondingly connected in series in the first end cable sheath outgoing lines of the phases, and the second end current transformers of the phases are correspondingly connected in series in the second end cable sheath outgoing lines of the phases; the secondary side of the first end current transformer of each phase is connected to a range finder (5) through a first end current signal outgoing line; the secondary side of the second end current transformer of each phase is connected to the range finder through a second end current signal outgoing line; the range finder leads out a signal wire to an upper computer;

when a single-phase grounding short circuit fault occurs in the single-core cable, short circuit current I1 positioned at the first end side of two sides from the short circuit point flows to the outer sheath of the first-end single-core cable, and short circuit current I2 positioned at the second end side flows to the outer sheath of the second-end single-core cable; the current flows to the outgoing line of the cable sheath after passing through the cable terminal along the outer sheath of the single-core cable, and after passing through the first end current transformer and the second end current transformer, the secondary side of the current transformer induces the current and leads to two interfaces of the same phase of the range finder through the signal outgoing line; after the current signal reaches the interface of the corresponding first end of the range finder, there will be according to the operational amplifier theory of operation:

U _INi1+ ＝(1+Z _{R3_i1+} /Z _{R2_i1+} )*U _i1 and U is _INi1+ ≤3.3V

U _INi1- ＝-(Z _{R3_i1-} / Z _{R2_i1-} )*U _i1 And U is _INi1- ≤3.3V (1)

In U _INi1+ The voltage at the INi1+ port; z is Z _{R3_i1+} A resistance value of R3_i1+; i is any one of A, B, C;

according to formula (1), when single-phase grounding short circuit does not occur on the single-core cable, the current transformer CT-i1 has no current output, and Ui1 voltage U _i1 Because the resistor R1_i1 is zero, the output voltages of the ports INi1+ and INi1-are both 0; select Z _{R3_i1+} Far greater than Z _{R2_i1+} ，Z _{R3_i1-} Far greater than Z _{R2_i1-} When the i phase is short-circuited, if the short-circuit moment is in a positive half cycle, ui1 is positive, and the INi1+ output voltage is 3.3V; when the i phase is short-circuited, if the short-circuited time occurs in a negative half cycle, ui1 is negative, and the INi 1-output voltage is 3.3V;

when the current signal reaches the i2 port, the following steps are performed according to the working principle of the operational amplifier:

U _INi2+ ＝(1+Z _{R3_i2+} /Z _{R2_i2+} )*U _i2 and U is _INi2+ ≤3.3V

U _INi2- ＝-(Z _{R3_i2-} / Z _{R2_i2-} )*U _i2 And U is _INi2- ≤3.3V (2)

In U _INi2+ The voltage at the INi2+ port; z is Z _{R3_i2+} The resistance value is R3_i2+, and the balance is the same;

according to formula (1), when the single-phase grounding short circuit does not occur in the single-core cable, the current transformer CT-i2 has no current output, and the Ui2 voltage U _i2 Because the resistor R1_i2 is zero, the output voltages of the ports INi2+ and INi2-are both 0; select Z _{R3_i2+} Far greater than Z _{R2_i2+} ，Z _{R3_i2-} Far greater than Z _{R2_i2-} When the i phase is short-circuited, if the short-circuit moment is in a positive half cycle, ui2 is positive, and the INi2+ output voltage is 3.3V; when the i phase is short-circuited, if the short-circuit moment occurs in a negative half cycle, ui2 is negative, and the INi 2-output voltage is 3.3V;

if the short circuit time occurs in the positive half period, the input ends ini1+ and ini2+ of the programmable logic device are hopped from 0 to 3.3V; because the lengths of the first end current signal outgoing line and the second end current signal outgoing line are equal, the position of a short circuit generation point can be determined according to the time difference of jump of the INi1+ level and the INi2+ level; if the length of the single-core cable is L, the signal propagation speed is v, and the short-circuit point is deviated from the center of the cable by i1 end h, the moment when INi1+ occurs is: t1= (0.5L-h)/v, the moment in time when INi 1-occurs is: t2= (0.5l+h)/v; thus, h= (t 2-t 1) v/2 can be obtained, and the time difference of jump between the t2-t1 and the INi1+ and the INi2+ levels is equal, so that the fault point distance can be positioned;

if the short circuit time occurs in the negative half period, the input ends INi 1-and INi 2-of the programmable logic device are jumped from 0 to 3.3V; because the lengths of the first end current signal outgoing line and the second end current signal outgoing line are equal, the position of a short circuit generation point can be determined according to the time difference of jump of the INi 1-level and the INi 2-level; if the length of the single-core cable is L, the signal propagation speed is v, and the short-circuit point is deviated from the center of the cable by i1 end h, the moment when INi 1-occurs is as follows: t1= (0.5l+h)/v, the moment in time at which INi 1-occurs is: t2= (0.5L-h)/v; thus, h= (t 2-t 1) v/2 can be obtained, and the time difference of the jump of the t2-t1 level and the INi1 level as well as the time difference of the jump of the INi2 level are equal, so that the fault point distance can be positioned;

after the fault point distance is obtained, the data is uploaded to an upper computer, and the position can be displayed.

2. The cable fault locating method as claimed in claim 1, wherein in the single-core cable on-line fault locating device:

the secondary side of a current transformer CT-A1 of a first end A phase is led to a range finder port A1 through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a first operational amplifier through a resistor R4_A1+, the negative electrode of the first operational amplifier is led out and connected with the ground potential through a resistor R2_A1+, and is connected with the output end INA1+ of the first operational amplifier through a resistor R3_A1+; the other path is connected with the positive electrode of a second operational amplifier through a resistor R2_A1-, the negative electrode of the second operational amplifier is led out and connected with the ground potential through a resistor R4_A1-, and is connected with the output end INA 1-of the second operational amplifier through a resistor R3_A1-; the output ends of the first operational amplifier and the second operational amplifier are connected with the input port of the editable logic device of the range finder;

the secondary side of a current transformer CT-A2 of the second end A phase is led to an A2 port of the range finder through a second end current signal outgoing line, and then is divided into two paths, one path is connected with the positive electrode of a third operational amplifier through a resistor R4_A2+, the negative electrode of the third operational amplifier is led out and connected with the ground potential through a resistor R2_A2+, and is connected with the output end INA2+ of the third operational amplifier through a resistor R3_A2+; the other path is connected with the positive electrode of a fourth operational amplifier through a resistor R2_A2-, the negative electrode of the fourth operational amplifier is led out and connected with the ground potential through a resistor R4_A2-, and is connected with the output end INA 2-of the fourth operational amplifier through a resistor R3_A2-; the output ends of the third operational amplifier and the fourth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-B1 of a first end B phase is led to a B1 port of a range finder through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a fifth operational amplifier through a resistor R4_B1+, the negative electrode of the fifth operational amplifier is led out and connected with the ground potential through a resistor R2_B1+, and the negative electrode of the fifth operational amplifier is connected with the output end INB1+ of the fifth operational amplifier through a resistor R3_B1+; the other path is connected with the positive electrode of a sixth operational amplifier through a resistor R2_B1-, the negative electrode of the sixth operational amplifier is led out and connected with the ground potential through a resistor R4_B1-, and is connected with the output end INB1-of the sixth operational amplifier through a resistor R3_B1-; the output ends of the fifth operational amplifier and the sixth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-B2 of a second end B phase is led to a B2 port of the range finder through a second end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a seventh operational amplifier through a resistor R4_B2+, the negative electrode of the seventh operational amplifier is led out and connected with the ground potential through a resistor R2_B2+, and is connected with the output end INB2+ of the seventh operational amplifier through a resistor R3_B2+; the other path is connected with the positive electrode of an eighth operational amplifier through a resistor R2_B2-, the negative electrode of the eighth operational amplifier is led out and connected with the ground potential through a resistor R4_B2-, and is connected with the output end INB2-of the eighth operational amplifier through a resistor R3_B2-; the output ends of the seventh operational amplifier and the eighth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-C1 of a first end C phase is led to a C1 port of a range finder through a first end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of a ninth operational amplifier through a resistor R4_C1+, the negative electrode of the ninth operational amplifier is led out and connected with the ground potential through a resistor R2_C1+, and the negative electrode of the ninth operational amplifier is connected with the output end INC1+ of the ninth operational amplifier through a resistor R3_C1+; the other path is connected with the positive electrode of a tenth operational amplifier through a resistor R2_C1-, the negative electrode of the tenth operational amplifier is led out and connected with the ground potential through a resistor R4_C1-, and is connected with the output end INC 1-of the tenth operational amplifier through a resistor R3_C1-; the output ends of the ninth operational amplifier and the tenth operational amplifier are connected with the input port of the editable logic device;

the secondary side of a current transformer CT-C2 of the second end C phase is led to a C2 port of the range finder through a second end current signal outgoing line and then is divided into two paths, one path is connected with the positive electrode of an eleventh operational amplifier through a resistor R4_C2+, the negative electrode of the eleventh operational amplifier is led out and connected with the ground potential through a resistor R2_C2+, and the negative electrode of the eleventh operational amplifier is connected with the output end INC2+ of the eleventh operational amplifier through a resistor R3_C2+; the other path is connected with the positive electrode of a twelfth operational amplifier through a resistor R2_C2-, and the negative electrode of the twelfth operational amplifier is led out and connected with the ground potential through a resistor R4_C2-; the positive electrode of the twelfth operational amplifier is connected with the output end INC 2-of the twelfth operational amplifier through a resistor R3_C2-; the output ends of the eleventh operational amplifier and the twelfth operational amplifier are connected with the input port of the editable logic device;

the programmable logic device is connected with the upper computer through a signal line.