CN114220785A - Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method - Google Patents

Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method Download PDF

Info

Publication number
CN114220785A
CN114220785A CN202111547331.3A CN202111547331A CN114220785A CN 114220785 A CN114220785 A CN 114220785A CN 202111547331 A CN202111547331 A CN 202111547331A CN 114220785 A CN114220785 A CN 114220785A
Authority
CN
China
Prior art keywords
chip
substrate
flip
heat dissipation
bonding pad
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111547331.3A
Other languages
Chinese (zh)
Inventor
汪民
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Huatian Technology Nanjing Co Ltd
Original Assignee
Huatian Technology Nanjing Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huatian Technology Nanjing Co Ltd filed Critical Huatian Technology Nanjing Co Ltd
Priority to CN202111547331.3A priority Critical patent/CN114220785A/en
Publication of CN114220785A publication Critical patent/CN114220785A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H01L23/49816—Spherical bumps on the substrate for external connection, e.g. ball grid arrays [BGA]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/4853—Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486—Via connections through the substrate with or without pins
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/54—Providing fillings in containers, e.g. gas fillings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • H01L23/367—Cooling facilitated by shape of device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H01L2224/13001—Core members of the bump connector
    • H01L2224/13075—Plural core members
    • H01L2224/1308—Plural core members being stacked
    • H01L2224/13082—Two-layer arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8119—Arrangement of the bump connectors prior to mounting
    • H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

The invention belongs to the technical field of integrated circuit chip packaging, and discloses a heat dissipation flip-chip packaging structure with a high-reliability welding spot structure and a method. The packaging structure comprises a substrate, a bonding pad, a chip and a radiating fin, wherein the substrate is arranged at the bottom of the packaging structure; the metal circuit layers arranged on the upper surface and the lower surface of the substrate are interconnected with the metal circuit vertically arranged in the substrate; the bonding pads are in a concave shape, are arranged above the substrate and are a plurality of, and the groove-shaped bonding pads are connected to the metal circuit layer of the substrate; the chip is arranged above the bonding pad, one side surface of the chip is provided with salient points with the number corresponding to that of the bonding pad, one side of each salient point is fixedly connected with the chip, and the other side of each salient point is arranged in the concave-shaped bonding pad; the radiating fin is arranged above the other side surface of the chip and is connected with the other side surface of the chip through the adhesive. The bumps on the chip can be better welded with the bonding pads, the welding firmness is guaranteed, the contact area between the bumps on the chip and the bonding pads is increased, and the bumps can be better contacted with the bonding pads.

Description

Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method
Technical Field
The invention belongs to the technical field of integrated circuit chip packaging, and particularly relates to a heat dissipation flip-chip packaging structure with a high-reliability welding spot structure and a method.
Background
The flip bump chip is characterized in that a chip bump and a metal pad surface are welded to achieve interconnection, but when the chip bump is interconnected with the pad surface, the pad does not play a role in fixing the bump, certain weakness exists in the firmness of the welded bump and the welded pad, and the heat dissipation performance of the whole chip packaging structure is poor.
Disclosure of Invention
The invention aims to provide a heat dissipation flip-chip packaging structure with a high-reliability welding spot structure and a method thereof, so as to solve the problems of insecure chip and poor heat dissipation.
In order to achieve the purpose, the invention provides the following technical scheme:
the utility model provides a heat dissipation flip-chip packaging structure with high reliability solder joint structure which characterized in that, includes base plate, pad, chip and fin, wherein:
the substrate is arranged at the bottom of the flip-chip packaging structure, the upper surface and the lower surface of the substrate are provided with metal circuit layers, and the metal circuit layers are interconnected with metal circuits vertically distributed in the substrate;
the bonding pads are in a concave shape, are arranged above the substrate and are a plurality of, and the groove-shaped bonding pads are connected to the metal circuit layers corresponding to the substrate;
the chip is arranged above the bonding pad, one side of the chip is provided with salient points with the number corresponding to that of the bonding pad, one side of each salient point is fixedly connected with the chip, and the other side of each salient point is arranged in the concave bonding pad;
the radiating fin is arranged above the other side face of the chip and connected with the other side face of the chip through a sticky matter.
Further, an ink protection layer is arranged on the substrate and surrounds the bonding pad on the substrate.
Further, the heat sink is a metal heat sink.
Further, the adhesive is an adhesive glue or an adhesive film.
Further, the bump includes a copper pillar and a tin cap, wherein:
one end of the copper column is connected to one side surface of the chip and fixedly connected with the chip;
the tin cap is arranged on the other end face of the copper column and is fixedly connected with the copper column.
Furthermore, the tin cap is arranged in the concave shape of the bonding pad and is fixedly connected with the bonding pad.
Furthermore, a solder ball is arranged below the substrate, and the tin is fixedly connected with the metal circuit layer on the substrate.
Furthermore, a plastic package material filling body is arranged between the ink protection layer and the radiating fin.
Further, the chip is a silicon chip.
An assembling method of a heat dissipation flip-chip packaging structure with a high-reliability welding spot structure is characterized by comprising the following steps:
step 1: preparing a concave-shaped bonding pad on a substrate;
step 2: arranging a salient point on one side surface of the substrate, and arranging the salient point on the substrate in the prepared concave-shaped bonding pad;
and step 3: sticking a radiating fin on the other side surface of the chip;
and 4, step 4: filling a plastic package material filling body between the substrate ink protection layer and the radiating fin, and arranging the metal radiating fin in the plastic package body;
and 5: and arranging solder balls on the other side surface of the packaging body substrate to complete the assembly of the inverted structure.
Compared with the prior art, the invention has the advantages that:
1. the bonding pad on the substrate is arranged to be of the concave structure, and the salient points on the chip are inversely arranged in the concave bonding pad, so that the salient points on the chip can be better welded with the bonding pad, the welding firmness is ensured, and the contact area between the salient points on the chip and the bonding pad is increased, so that the salient points on the chip can be better contacted with the bonding pad;
2. by arranging the radiating fin on one side surface of the chip without the bonding pad, on one hand, heat can be dissipated through the contact between the radiating fin and the chip, and on the other hand, a certain pressing effect can be achieved on the chip, so that the chip and the bonding pad can be better in welding contact;
3. the chip and the radiating fin can be better bonded through the adhesive glue or the adhesive substance of the adhesive film, the distance between the chip and the radiating fin is reduced, and the heat dissipation capacity of the radiating fin is further improved;
4. by the packaging method of the flip structure, the problems of small contact area and loose contact between the chip and the bonding pad are solved, and the problem of poor heat dissipation effect is solved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the invention and not to limit the invention. In the drawings:
FIG. 1 is a schematic structural diagram of a heat dissipation flip-chip package structure with a high-reliability solder joint structure according to the present invention;
FIG. 2 is a schematic view of another structure of a heat dissipation flip chip package structure with a high reliability solder joint structure according to the present invention;
FIG. 3 is a schematic diagram of a bump structure of a heat dissipation flip chip package structure with a high-reliability solder joint structure according to the present invention;
FIG. 4 is a schematic diagram of a heat dissipation flip chip package structure with a high reliability solder joint structure according to the present invention, wherein a metal circuit layer is disposed on a substrate;
FIG. 5 is a schematic structural diagram of a heat dissipation flip-chip package structure with a high-reliability solder joint structure according to the present invention, in which ink is disposed on a substrate;
FIG. 6 is a schematic diagram of a pad of a heat-dissipating flip-chip package structure with a highly reliable solder joint structure according to the present invention;
FIG. 7 is a schematic structural diagram of a heat dissipation flip chip package structure with a high reliability solder joint structure for removing ink in a solder pad according to the present invention;
FIG. 8 is a schematic structural diagram of a heat dissipation flip chip package structure with a high reliability solder joint structure according to the present invention, in which a chip is disposed in a pad;
FIG. 9 is a schematic structural diagram of a heat sink flip chip package structure with a high-reliability solder joint structure according to the present invention, in which a heat sink is disposed on a chip;
FIG. 10 is a schematic structural diagram of a plastic-encapsulated filler filled in a heat-dissipating flip-chip package structure with a highly reliable solder joint structure according to the present invention;
FIG. 11 is another schematic structural diagram of a plastic-encapsulated filler filled in a heat-dissipating flip-chip package structure with a highly reliable solder joint structure according to the present invention;
FIG. 12 is a schematic view of a solder ball configuration of a heat dissipating flip chip package with a highly reliable solder joint structure according to the present invention;
FIG. 13 is a schematic view of another structure of a heat dissipating flip chip package structure with high reliability solder joint structure configured with solder balls according to the present invention;
1-a substrate; 2-a pad; 3-ink protective layer; 4-chip; 5-salient points; 6-stickies; 7-a heat sink; 8-plastic packaging material filling body; 9-tin ball; 10-copper columns; 11-tin cap; 12-metal line layer.
Detailed Description
The present invention will be described in detail below with reference to the embodiments with reference to the attached drawings. It should be noted that the embodiments and features of the embodiments may be combined with each other without conflict.
The following detailed description is exemplary in nature and is intended to provide further details of the invention. Unless otherwise defined, all technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of exemplary embodiments according to the invention.
Example 1:
the invention discloses a heat dissipation flip-chip packaging structure with a high-reliability welding spot structure, which comprises a substrate 1, a bonding pad 2, a chip 4 and a heat radiating fin 7, wherein the substrate 1 is arranged at the bottommost part of the flip-chip packaging structure, a plurality of metal circuits for connecting the upper surface and the lower surface are arranged in the substrate 1, and a metal circuit layer 12 is arranged on the substrate 1; furthermore, the metal circuit layers 12 are preferably of an I-shaped structure, one I-shaped structure is transversely arranged on one side surface of the substrate 1, the other I-shaped structure is transversely arranged on the other side surface of the substrate 1, and the two metal circuit layers 12 of two horizontal structures positioned on the two sides of the substrate 1 are connected through one vertical I-shaped structure to form interconnection; that is, one or more metal circuit layers 12 are disposed on the upper side and the lower side of the substrate 1, so that the metal circuit layers 12 disposed on the upper side and the lower side of the substrate 1 can be connected with the metal circuits in the substrate 1 to form interconnection. Preferably, the metal circuit layers 12 are distributed on the substrate in a regular structure, such as in a horizontal, vertical or matrix manner, and are distributed on part or all of the upper and lower surfaces of the substrate 1. Preferably, the metal wiring layer 12 is embedded in the substrate 1 to be flush with the upper and lower surfaces of the substrate 1. A bonding pad 2 is disposed on the metal wiring layer 12, a chip 4 is disposed above the bonding pad 2, and a heat sink 7 is disposed above the chip 4.
Preferably, the bonding pad 2 is in a concave structure, a notch of the concave structure is in contact with the bump 5 on one side of the chip 4, the size of the notch of the concave structure is not smaller than the size of the bump 5 and/or the size of the tin cap 11 on the bump 5, that is, the size of the notch is not smaller than the size of the copper pillar 10 and the circumference of the copper pillar 10 or the size of the tin cap 11 on the copper pillar 10, and the copper pillar 10 provided with the tin cap 11 can be partially or completely placed in the bonding pad 2. Alternatively, the pad 2 may have a concave structure similar to or similar to the concave structure of the present invention, such as a rectangular groove or a right-angled groove, and the structure of the pad 2 that can embed the bump 5 partially or completely into the pad 2 is within the scope of the present invention.
More specifically, a plurality of bumps 5 are arranged on one side surface of the chip 4, and the plurality of bumps 5 are arranged in the bonding pad 2; and the number of the bumps 5 corresponds to the number of the pads 2, that is, the bumps 5 on the chip 4 correspond to the pads 2 on the substrate 1 one by one, that is, the bumps 5 on one side of the chip 4 can be correspondingly arranged in the pads 2 on the substrate 1. Preferably, the bump 5 is made of a copper pillar 10, one end of the copper pillar 10 is fixedly connected to the chip 4, a tin cap 11 is disposed at the other end of the copper pillar 10, the tin cap 11 is fixedly connected to the copper pillar 10, and one side of the copper pillar 10 containing the tin cap 11 is disposed in the pad 2. More specifically, the adhesive 6 is disposed on the other side of the chip 4 without the bumps 5, so as to attach the heat sink 7 to the chip 4, thereby performing a heat dissipation function, and also performing a function of pressing the chip 4 to ensure a better soldering contact between the bumps 5 of the chip 4 and the pads 2. Specifically, the adhesive 6 may be selected from other adhesive materials such as adhesive glue or adhesive film.
Furthermore, a plurality of solder balls 9 are arranged at the bottom of one side of the substrate 1 far away from the bonding pad 2, the number of the solder balls 9 is equal to that of the metal circuit layers 12 of the I-shaped structures, the solder balls 9 are in contact with one transverse side of the I-shaped structure and are fixedly connected in a welding mode and the like, and the purpose is to weld the chip 4 of the flip-chip packaging structure on other structures or the chip 4 through the solder balls 9. And the solder ball 9, the I-shaped structure on the substrate 1, the bump 5 formed by the solder cap 11 and the copper column 10 are interconnected with the chip 4 to transmit signals of the chip 4.
Furthermore, the heat dissipation flip-chip packaging structure with the high-reliability solder joint structure provided by the invention has at least two structures, and the two structures at least comprise the structure.
The first structure is that a concave metal bonding pad 2 is arranged on a substrate 1, a salient point 5 is arranged on one side surface of a chip 4, the salient point 5 can be a structure formed by a metal copper column 10 and a metal tin cap 11, the metal tin cap 11 of the salient point 5 is connected with the bonding pad 2, and the bonding pad 2 can play a role in fixing the salient point 5, so that higher welding firmness is ensured; meanwhile, the metal radiating fin 7 can be interconnected with the back of the chip 4 through adhesive glue or an adhesive film, and finally, a plastic package filling material is injected to complete a packaging structure for flip-chip mounting of the chip 4, wherein the packaging structure is that the metal radiating fin 7 is positioned outside a plastic package filling body 8, as shown in fig. 1.
The second structure is that a concave metal bonding pad 2 is arranged on the substrate 1, a salient point 5 is arranged on one side surface of the chip 4, the salient point 5 can be a structure formed by a metal copper column 10 and a metal tin cap 11, the metal tin cap 11 of the salient point 5 is connected with the bonding pad 2, and the bonding pad 2 can play a role in fixing the salient point 5, so that higher welding firmness is ensured; meanwhile, the metal radiating fin 7 can be interconnected with the back of the chip 4 through adhesive glue or an adhesive film, and finally, a plastic package filling material is injected to complete a packaging structure for flip-chip mounting of the chip 4, wherein the packaging structure is that the metal radiating fin 7 is positioned inside a plastic package filling body 8, as shown in fig. 2.
Example 2:
an assembling method of a heat dissipation flip-chip packaging structure with a high-reliability welding spot structure is characterized by comprising the following steps:
step 1: preparing a bonding pad 2 on a substrate 1;
step 2: arranging a salient point 5 on one side surface of the substrate 1, and arranging the salient point 5 on the substrate 1 in the prepared bonding pad 2;
and step 3: a radiating fin 7 is pasted on the other side surface of the chip 4;
and 4, step 4: a plastic packaging material filling body 8 is filled between the ink protection layer 3 of the substrate 1 and the radiating fin 7, and the metal radiating fin 7 is arranged in the plastic packaging body;
and 5: and arranging solder balls 9 on the other side surface of the packaging body substrate 1 to finish the assembly of the flip-chip structure.
Further specifically, step 1 is: as shown in fig. 3, the bump 5 is a chip 4, that is, the bump 5 is disposed on a side surface of the chip 4, and the bump 5 has a structure of a copper pillar 10 and a top tin cap 11;
the step 2 is as follows: as shown in fig. 4-7, a process for preparing a pad shaped like a Chinese character 'ao' on a carrier of a substrate 1; after ink is coated on the substrate shown in FIG. 4, development and etching are carried out to obtain the substrate 1 structure shown in FIG. 5; in the position of the ink cavity in fig. 5, copper metal is electroplated to obtain the structure of the substrate 1 shown in fig. 6; etching off the ink layer in the middle of the concave-shaped bonding pad on the substrate 1 structure shown in FIG. 6 to obtain the substrate 1 structure with the concave-shaped metal bonding pad 2 shown in FIG. 7;
the step 3 is: as shown in fig. 8, in order to illustrate the structure after the flip chip 4 is placed on the carrier of the substrate 1, the bumps 5 of the flip chip 4 are first placed on the metal concave-shaped pads of the substrate 1, and the concave-shaped pads can play a role in fixing the position of the chip 4;
step 4 is as follows: as shown in fig. 9, in order to attach the metal heat sink 7 to the back surface of the flip chip 4 through the adhesive glue or the adhesive film, the metal heat sink 7 has a certain weight, which can play a role of pressing the chip 4 to a certain extent, so that the bumps 5 on the chip 4 can be better contacted in the metal concave grooves; finally, the tin cap 11 on the salient point 5 of the chip 4 is welded and fixed with the concave groove metal pad 2 through a reflow soldering process, and the concave groove metal pad 2 can better fix a soldering point and increase the contact surface of the soldering point, so that higher firmness of the soldering point is ensured;
step 5 is as follows: as shown in fig. 10-11, a plastic package material is injected into the package body for filling and protecting the chip 4 through an injection molding process, fig. 10 shows that the metal heat sink 7 is disposed in the package body, fig. 11 shows that the metal heat sink 7 is disposed on the surface of the package body, and the metal heat sink 7 can play a role in improving the firmness of the solder joints and can ensure better heat dissipation performance of the whole package body; and as shown in fig. 12-13, after the ball is implanted on the package, the ball material may be tin, i.e., the solder ball 9, so as to obtain the final package structure.
The invention realizes a heat dissipation flip-chip packaging structure with a high-reliability solder joint structure as shown in figures 1-2. The substrate 1 is provided with a concave-shaped bonding pad, a chip 4 part with a salient point 5 is placed in the concave-shaped bonding pad of a substrate 1 carrier by adopting a flip-chip process, the concave-shaped bonding pad can play a role in fixing the chip 4 part with the salient point 5, and then a metal radiating fin 7 is attached to the back of the chip 4 through adhesive glue or adhesive film, so that the metal radiating fin 7 can play a certain pressing role on the chip 4 besides the radiating role, and the chip 4 is ensured to be in better welding contact with the metal bonding pad 2; bump 5 on chip 4 is copper post 10, or is formed by the copper post preparation, and the structure of the tin cap 11 of copper post 10 head, through reflow soldering, last tin cap 11 and the 2 welding forming of character cut in bas-relief shape metal pad of bump 5 head, pad 2 material can be copper, this character cut in bas-relief shape pad can ensure that bump 5 has higher welding firmness after the welding on chip 4, fin 7 has also played the effect of pressfitting chip 4 except heat dissipation function in whole packaging body simultaneously, thereby ensure bump 5 and the better welding contact of character cut in bas-relief shape pad on chip 4, it is insecure to have solved welding on pad 2 of chip 4, the poor problem of chip heat dispersion simultaneously.
It will be appreciated by those skilled in the art that the invention may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The embodiments disclosed above are therefore to be considered in all respects as illustrative and not restrictive. All changes which come within the scope of or equivalence to the invention are intended to be embraced therein.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting the same, and although the present invention is described in detail with reference to the above embodiments, those of ordinary skill in the art should understand that: modifications and equivalents may be made to the embodiments of the invention without departing from the spirit and scope of the invention, which is to be covered by the claims.

Claims (10)

1. The utility model provides a heat dissipation flip-chip packaging structure with high reliability solder joint structure which characterized in that, includes base plate (1), pad (2), chip (4) and fin (7), wherein:
the substrate (1) is arranged at the bottom of the flip-chip packaging structure, the upper surface and the lower surface of the substrate (1) are provided with metal circuit layers (12), and the metal circuit layers (12) are interconnected with metal circuits vertically distributed in the substrate (1);
the bonding pads (2) are in a concave shape, are arranged above the substrate (1), and are a plurality of in number, and the groove-shaped bonding pads (2) are connected to the metal circuit layer (12) of the substrate (1);
the chip (4) is arranged above the bonding pad (2), bumps (5) with the number corresponding to that of the bonding pad (2) are arranged on one side surface of the chip (4), one side of each bump (5) is fixedly connected with the chip (4), and the other side of each bump (5) is arranged in the corresponding concave bonding pad (2);
the radiating fin (7) is arranged above the other side surface of the chip (4) and is connected with the other side surface of the chip (4) through a sticky matter (6).
2. The heat dissipation flip-chip packaging structure with high reliability solder joint structure according to claim 1, wherein the substrate (1) is provided with an ink protection layer (3), and the ink protection layer (3) surrounds the solder pads (2) on the substrate (1).
3. The heat dissipating flip chip package structure with high reliability solder joint structure according to claim 1, wherein the heat sink (7) is a metal heat sink.
4. The heat dissipation flip-chip packaging structure with high reliability solder joint structure as claimed in claim 1, wherein the adhesive (6) is an adhesive glue or an adhesive film.
5. The heat dissipating flip chip package structure with high reliability solder joint structure of claim 1 wherein the bump (5) comprises a copper pillar (10) and a tin cap (11), wherein:
one end of the copper column (10) is connected to one side surface of the chip (4) and fixedly connected with the chip (4);
the tin cap (11) is arranged on the other end face of the copper column (10) and is fixedly connected with the copper column (10).
6. The heat dissipation flip-chip packaging structure with high reliability solder joint structure of claim 1, wherein the solder caps (11) are disposed in the concave shape of the solder pads (2) and fixedly connected to the solder pads (2).
7. The heat dissipation flip-chip package structure with high reliability solder joint structure as claimed in claim 1, wherein a solder ball (9) is disposed under the substrate (1), and the solder ball (9) is fixedly connected to the metal circuit layer (12) on the substrate (1).
8. The heat dissipation flip-chip packaging structure with high reliability solder joint structure according to claim 2, wherein a molding compound filling body (8) is disposed between the ink protection layer (3) and the heat sink (7).
9. The heat dissipating flip chip package structure with high reliability solder joint structure as claimed in claim 1, wherein the chip (4) is a silicon chip.
10. An assembling method of a heat dissipation flip-chip packaging structure with a high-reliability welding spot structure is characterized by comprising the following steps:
step 1: preparing a concave-shaped bonding pad (2) on a substrate (1);
step 2: arranging a salient point (5) on one side surface of the substrate (1), and arranging the salient point (5) on the substrate (1) in the prepared concave-shaped bonding pad (2);
and step 3: a radiating fin (7) is pasted on the other side surface of the chip (4);
and 4, step 4: a plastic packaging material filling body (8) is filled between the ink protection layer (3) and the radiating fin (7) of the substrate (1), and the metal radiating fin (7) is arranged in the plastic packaging body;
and 5: and arranging solder balls (9) on the other side surface of the packaging body substrate (1) to finish the assembly of the flip-chip structure.
CN202111547331.3A 2021-12-16 2021-12-16 Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method Pending CN114220785A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111547331.3A CN114220785A (en) 2021-12-16 2021-12-16 Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111547331.3A CN114220785A (en) 2021-12-16 2021-12-16 Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method

Publications (1)

Publication Number Publication Date
CN114220785A true CN114220785A (en) 2022-03-22

Family

ID=80703338

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111547331.3A Pending CN114220785A (en) 2021-12-16 2021-12-16 Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method

Country Status (1)

Country Link
CN (1) CN114220785A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114678335A (en) * 2022-05-27 2022-06-28 合肥矽迈微电子科技有限公司 Chip heat dissipation structure, process and semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114678335A (en) * 2022-05-27 2022-06-28 合肥矽迈微电子科技有限公司 Chip heat dissipation structure, process and semiconductor device
CN114678335B (en) * 2022-05-27 2022-08-16 合肥矽迈微电子科技有限公司 Chip heat dissipation structure, process and semiconductor device

Similar Documents

Publication Publication Date Title
US7880313B2 (en) Semiconductor flip chip package having substantially non-collapsible spacer
KR100299885B1 (en) Semiconductor device and method for producing the same
KR100856609B1 (en) A semiconductor device and a method of manufacturing the same
US7482199B2 (en) Self alignment features for an electronic assembly
KR101661442B1 (en) Stud bump structure for semiconductor package assemblies
TWI311352B (en) Fabricating process of leadframe-based bga packages and leadless leadframe utilized in the process
WO2002103793A1 (en) Semiconductor device and manufacturing method thereof
US6552267B2 (en) Microelectronic assembly with stiffening member
JPH09213749A (en) Semiconductor device and its manufacture
KR20070076084A (en) Stack package and manufacturing method thereof
CN114220785A (en) Heat dissipation flip-chip packaging structure with high-reliability welding spot structure and method
TWI469310B (en) Flip-chip stacked package structure and its package methodfabrication method of a photonic crystal structure
JP2001077294A (en) Semiconductor device
JP3857574B2 (en) Semiconductor device and manufacturing method thereof
JPH11111768A (en) Manufacture of semiconductor device
US6111309A (en) Semiconductor device
CN115881653A (en) Packaging structure and manufacturing method thereof
CN114864508A (en) Ceramic shell flip chip packaging laminated structure and assembling method
CN203839371U (en) DRAM (dynamic random access memory) double-chip stacked encapsulation structure
CN108231729B (en) Packaging substrate, chip packaging body and chip stacking and packaging method
KR20040037561A (en) Semiconductor package
CN221080001U (en) Flip BGA packaging structure
CN103943615A (en) DRAM (dynamic random access memory) double chip stacking packaging structure and method
CN108288608B (en) Chip package and preparation method thereof
CN115249679B (en) Chip packaging structure and manufacturing method thereof

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination