CN114203559A - Packaging process for embedding flip chip in packaging carrier plate - Google Patents
Packaging process for embedding flip chip in packaging carrier plate Download PDFInfo
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- CN114203559A CN114203559A CN202111301851.6A CN202111301851A CN114203559A CN 114203559 A CN114203559 A CN 114203559A CN 202111301851 A CN202111301851 A CN 202111301851A CN 114203559 A CN114203559 A CN 114203559A
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- 238000004806 packaging method and process Methods 0.000 title claims abstract description 48
- 238000012858 packaging process Methods 0.000 title claims abstract description 23
- 239000000758 substrate Substances 0.000 claims abstract description 92
- 229910000679 solder Inorganic materials 0.000 claims abstract description 45
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 20
- 238000005476 soldering Methods 0.000 claims abstract description 17
- 238000004140 cleaning Methods 0.000 claims abstract description 13
- 238000003466 welding Methods 0.000 claims abstract description 9
- 239000011248 coating agent Substances 0.000 claims abstract description 7
- 238000000576 coating method Methods 0.000 claims abstract description 7
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 16
- 238000003825 pressing Methods 0.000 claims description 11
- 239000005022 packaging material Substances 0.000 claims description 10
- 238000001746 injection moulding Methods 0.000 claims description 8
- 229910052757 nitrogen Inorganic materials 0.000 claims description 8
- 239000007789 gas Substances 0.000 claims description 6
- 239000006071 cream Substances 0.000 claims description 4
- 239000003344 environmental pollutant Substances 0.000 claims description 4
- 230000004907 flux Effects 0.000 claims description 4
- 231100000719 pollutant Toxicity 0.000 claims description 4
- 230000008859 change Effects 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 238000010992 reflux Methods 0.000 claims description 3
- 229920005989 resin Polymers 0.000 claims description 3
- 239000011347 resin Substances 0.000 claims description 3
- 230000000007 visual effect Effects 0.000 claims description 3
- 239000004593 Epoxy Substances 0.000 claims description 2
- 238000007788 roughening Methods 0.000 claims description 2
- 230000008569 process Effects 0.000 abstract description 13
- 239000000463 material Substances 0.000 description 12
- 230000007613 environmental effect Effects 0.000 description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 150000001875 compounds Chemical class 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 229920006336 epoxy molding compound Polymers 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 238000005493 welding type Methods 0.000 description 2
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 125000000524 functional group Chemical group 0.000 description 1
- 239000003292 glue Substances 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
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- 230000003071 parasitic effect Effects 0.000 description 1
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- 239000002904 solvent Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Chemical compound O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
- H01L2224/83815—Reflow soldering
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83909—Post-treatment of the layer connector or bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83909—Post-treatment of the layer connector or bonding area
- H01L2224/8391—Cleaning, e.g. oxide removal step, desmearing
- H01L2224/83913—Plasma cleaning
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
Abstract
The invention relates to a packaging process for embedding a flip chip in a packaging carrier plate, which comprises the following steps: placing the substrate with the groove cavity into a substrate box, and placing the substrate box into a hot air circulation oven for baking; fixing the baked substrate on a bracket of a tin dispensing machine, and coating a layer of tin paste on a welding disc at the bottom of the groove of the substrate by using the tin dispensing machine; the substrate with the solder paste is transferred to a chip mounting platform, a chip mounter mounts the chip into a groove cavity of the substrate, and a chip bonding pad is connected with a groove bottom bonding pad through the solder paste; and reflow soldering, plasma cleaning, plastic packaging, re-baking and printing processes to obtain the finished product packaging carrier plate. The chip is inversely arranged on the substrate by the packaging process, so that the chip is directly and electrically connected with the substrate through the solder paste, the packaging requirements of high-density and multi-I/O interface chips can be met, a lighter, thinner and smaller packaging carrier plate is obtained, and the market demand is met.
Description
Technical Field
The invention relates to a packaging process, in particular to a packaging process for embedding a flip chip in a packaging carrier plate.
Background
In the existing packaging process, as shown in fig. 1, a packaging substrate 1 is used as a base, a normally-mounted chip 2 is mounted on the substrate through special glue, the chip and the substrate are electrically connected in a gold wire 4 bonding mode, and finally the chip is packaged through a packaging shell 3, namely, the traditional process adopts a gold wire bonding and shell packaging mode. The traditional process has the following defects: under the conditions of more bonding points and more complexity, the risk of cross short circuit is easy to occur in lead bonding; mechanical damage such as lodging, deformation, distortion and the like often occurs to the lead wire in the production process, and the risk of open-circuit failure exists; the lead is bonded on the bottom metal of the gold plating layer, the bottom metal without the protection of the gold plating layer is easily oxidized and corroded under the conditions of high temperature, high humidity and the like, and the gold wire bonded at the position is easily subjected to open circuit failure; the air tightness in the packaging process is not strong, and the parts without filling inside are not effectively supported, so that the packaging method has no good environmental protection.
Disclosure of Invention
In order to overcome the defects, the invention provides a packaging process for embedding a flip chip in a packaging carrier plate, wherein the packaging process is used for inversely installing a chip on a substrate, so that the chip and the substrate are directly and electrically connected through solder paste, the packaging process can meet the packaging requirements of high-density and multi-I/O-interface chips, a lighter, thinner and smaller packaging carrier plate is obtained, and the market demand is met.
The technical scheme adopted by the invention for solving the technical problem is as follows:
a packaging process for embedding a flip chip in a package carrier comprises the following steps:
the method comprises the following steps: pre-baking the substrate: placing the substrate with the groove cavity into a substrate box, and placing the substrate box into a hot air circulation oven for baking;
step two: and (3) solder paste dotting: fixing the baked substrate on a bracket of a tin dispensing machine, and coating a layer of tin paste on a welding disc at the bottom of the groove of the substrate by using the tin dispensing machine;
step three: chip pasting: the substrate with the solder paste is transferred to a chip mounting platform, a chip mounter mounts the chip into a groove cavity of the substrate, and a chip bonding pad is connected with a groove bottom bonding pad through the solder paste;
step four: reflow soldering: placing the substrate with the mounted chip into a reflow device, and heating the substrate by the reflow device to solidify the solder paste so as to fixedly connect the chip and the substrate;
step five: plasma cleaning: sending the substrate subjected to reflow soldering into a plasma cleaning machine for cleaning, removing pollutants and residual soldering flux on the surfaces of the substrate and the chip, increasing the reliability of a soldering point and roughening the surface of the substrate;
step six: plastic packaging: putting the cleaned substrate on a film pressing machine, injecting a plastic package material into a groove cavity of the substrate by the film pressing machine, encapsulating the chip, and taking out the product after the plastic package material is hardened;
step seven: and (5) baking again: putting the product after plastic packaging into an oven for baking again;
step eight: printing: and marking characters on the baked product to obtain a finished product packaging carrier plate.
Preferably, in the step one, the atmosphere in the hot air circulation oven is nitrogen, and the baking conditions are as follows: the temperature is 150 ℃ and 180 ℃, and the baking time is 1-3 h.
Preferably, in the second step, when the solder is dispensed, the solder dispenser applies pressure to the solder paste in the syringe, the solder paste overflows from a solder dispensing head arranged at the front part of the syringe, and the solder dispensing head moves according to a path set by a program to coat a layer of solder paste on the bonding pad at the bottom of the groove of the substrate.
Preferably, the solder machine applies pressure to the solder paste in the needle cylinder, the solder paste overflows from a solder head at the front part of the needle cylinder, and the solder head runs according to a path specified by a program.
Preferably, in the third step, the chip mounting platform is heated to 100-.
Preferably, in step four, the reflux shielding gas is nitrogen.
Preferably, in the sixth step, the welded substrate is placed on a lower die of a film pressing machine to be preheated to 150 ℃ and then an upper die is pressed downwards, the preheated epoxy molding compound is put into a feeding tank from an injection molding port, after the epoxy molding compound is pressurized by an injection molding rod, the melted molding compound is injected into and fills the groove cavity, the chip is encapsulated, meanwhile, air in the groove cavity is exhausted, and the product is taken out after the molding compound is completely hardened.
Preferably, in step seven, the baking conditions are: the temperature is 150 ℃ and 200 ℃, and the time is 2-8 h.
Preferably, in step eight, a gap with a depth of 5-30 μm is carved on the surface of the product by using the energy of the laser, and light generated by the concave-convex is diffusely reflected, so that a visual light contrast is obtained on the surface of the product, and the heat generated by the processing causes the resin to change color, thereby distinguishing the color from the color of the unprocessed part, thereby completing the graphic printing.
The invention has the beneficial effects that: the invention carries out pre-baking, solder paste dispensing, chip pasting, reflow soldering, plasma cleaning, plastic packaging, re-baking and printing processes on a substrate to obtain a packaging carrier plate with a flip chip, innovatively adopts a high-precision solder paste dispenser to go deep into a groove bottom to finish the operation of coating solder paste on a groove bottom bonding pad, provides conditions for the flip chip, directly connects the chip bonding pad and the groove bottom bonding pad through solder paste in a welding way, realizes the electrical connection between the chip and the substrate, adopts the welding type electrical connection mode, has more simplified operation flow, high reliability and cost saving compared with the traditional lead connection, directly embeds the chip into the packaging carrier plate, completes the packaging of the chip through injection molding, fills plastic packaging materials around the chip, and has better signal shielding and anti-interference functions compared with the traditional packaging shell packaging mode, the dense filling improves stronger structural stability and better environmental protection function; the invention has the advantages of smaller packaging size, thinner packaging and stronger weight, and the short electrical interconnection reduces the parasitics of an inductor, a resistor and a capacitor, so that the signal integrity and the frequency characteristic are better, the reliability of the circuit is improved, the production efficiency is high, and the cost of batch packaging is effectively reduced; therefore, the packaging process can meet the packaging requirements of high-density and multi-I/O interface chips, and the obtained packaging carrier plate is lighter, thinner and smaller, so that the market demand is met.
Drawings
FIG. 1 is a diagram illustrating a package substrate according to the prior art;
FIG. 2 is a schematic view of a substrate according to the present invention;
FIG. 3 is a schematic structural diagram of the substrate coated with solder paste according to the present invention;
FIG. 4 is a state diagram of the chip attach process of the present invention;
FIG. 5 is a schematic structural view of a substrate after reflow soldering in accordance with the present invention;
FIG. 6 is a schematic structural view of the finished product of the present invention;
in the figure: 10-substrate, 11-groove cavity, 12-groove bottom pad, 20-tin paste, 30-chip, 31-chip pad and 40-plastic package material.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of this application and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the application described herein are, for example, capable of operation in sequences other than those illustrated or otherwise described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
Spatially relative terms, such as "above … …," "above … …," "above … …," "above," and the like, may be used herein for ease of description to describe one device or feature's spatial relationship to another device or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, devices described as "above" or "on" other devices or configurations would then be oriented "below" or "under" the other devices or configurations. Thus, the exemplary term "above … …" can include both an orientation of "above … …" and "below … …". The device may be otherwise variously oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein interpreted accordingly.
Example (b): as shown in fig. 2 to 6, a packaging process for embedding a flip chip in a package carrier includes the following steps:
the method comprises the following steps: pre-baking the substrate: placing the substrate 10 with the slot cavity 11 into a substrate box, and placing the substrate box into a hot air circulation oven for baking; as shown in fig. 2, a groove bottom pad 12 is provided on the substrate at the groove bottom of the groove cavity 11;
step two: and (3) solder paste dotting: fixing the baked substrate 10 on a bracket of a tin dotting machine, and coating a layer of tin paste 20 on a groove bottom bonding pad 12 of the substrate by using the tin dotting machine;
step three: chip pasting: as shown in fig. 4, the substrate after the solder paste dispensing is transferred to a chip mounting platform, and a chip 30 is mounted in the cavity 11 of the substrate by a chip mounter, so that the chip bonding pad 31 is connected with the groove bottom bonding pad 12 through the solder paste 20;
step four: reflow soldering: placing the substrate 10 with the chip mounted thereon into a reflow device, and heating the substrate by the reflow device to solidify the solder paste, so that the chip is fixedly connected with the substrate;
step five: plasma cleaning: the substrate 10 after reflow soldering is sent into a plasma cleaning machine for cleaning, so that pollutants and residual soldering flux on the surfaces of the substrate 10 and the chip 30 are removed, the reliability of soldering points is improved, and the surface of the substrate is roughened; the coarsened substrate can increase the bonding force of the plastic package material and improve the reliability of the product; the principle of plasma cleaning is to fill small amount of Ar and H in a closed vacuum2、O2One or more gases of (a) usingRadio frequency energy forms an electric field at the parallel plate electrode to enable electrons to oscillate back and forth, the electrons are excited and ionized to generate plasma, the plasma impacts the surfaces of the substrate and the chip and generates a physical and chemical reaction with pollutants, the plasma is removed by utilizing gas circulation, and the plasma is cleaned to enable a surface microstructure to generate functional groups or reach a certain roughness, so that the binding force of different materials is increased, the reliability of welding spots and the binding force between the substrate and a plastic package material are increased, the reliability of a product is improved, and the service life is prolonged;
step six: plastic packaging: putting the cleaned substrate 10 on a film pressing machine, injecting the plastic package material 40 into the groove cavity 11 of the substrate by the film pressing machine, encapsulating the chip 30, and taking out the product after the plastic package material 40 is hardened;
step seven: and (5) baking again: putting the product after plastic packaging into an oven for baking again;
step eight: printing: and marking characters on the baked product to obtain a finished product packaging carrier plate.
The invention carries out pre-baking, solder paste dispensing, chip pasting, reflow soldering, plasma cleaning, plastic packaging, re-baking and printing processes on a substrate to obtain a packaging carrier plate with a flip chip, innovatively adopts a high-precision solder paste dispenser to go deep into a groove bottom to finish the operation of coating solder paste on a groove bottom bonding pad, provides conditions for the flip chip, directly connects the chip bonding pad and the groove bottom bonding pad through solder paste in a welding way, realizes the electrical connection between the chip and the substrate, adopts the welding type electrical connection mode, has more simplified operation flow, high reliability and cost saving compared with the traditional lead connection, directly embeds the chip into the packaging carrier plate, completes the packaging of the chip through injection molding, fills plastic packaging materials around the chip, and has better signal shielding and anti-interference functions compared with the traditional packaging shell packaging mode, dense packing improves greater structural stability and better environmental protection.
In the first step, a nitrogen environment is adopted in the hot air circulation oven, and the baking conditions are as follows: the temperature is 150 ℃ and 180 ℃, and the baking time is 1-3 h. Preferably, the substrate is baked for 2 hours at 150 ℃, and the substrate is baked in a nitrogen environment to prevent the substrate from being oxidized in the baking process, so that the purpose of baking is to remove water vapor absorbed by the substrate and prepare for the subsequent processes; the stress of the substrate is eliminated, and the substrate is prevented from warping to influence subsequent assembly.
As shown in fig. 3, in the second step, when dispensing, the dispensing machine applies pressure to the solder paste in the syringe, so that the solder paste overflows from the dispensing head installed at the front part of the syringe, and the dispensing head moves according to the programmed path to coat a layer of solder paste 20 on the bottom land 12 of the substrate 10.
The tin point machine exerts pressure to the tin cream in the cylinder, and the tin cream can spill from the tin point head of some syringe anterior portion, and the route operation that the program appointed is followed to the tin point head simultaneously. The specific spot welding parameters are determined according to the sizes and the intervals of different chips and bonding pads, the tin paste layer with a specific shape and thickness is obtained by the process, and if the quantity of the tin paste is too small, poor welding between the chips and the substrate can be caused; if the amount is too large, a short circuit phenomenon tends to occur with the adjacent pad. The invention innovatively adopts a high-precision tin dotting machine to go deep into the groove bottom to finish the operation of coating tin paste on the welding pad at the groove bottom, thereby providing conditions for the flip chip.
In the third step, the chip mounting platform is heated to 100-. The pressure is determined according to the size and adsorbability of the chip, preferably, the chip mounting platform is heated to 120 ℃ to prevent the substrate from absorbing moisture, the chip bonding pad and the bottom bonding pad are directly connected through solder paste in the chip mounting process, so that the chip is electrically connected with the substrate.
In step four, the reflux shielding gas is nitrogen. When the solder paste enters the temperature rise region, the solvent and gas in the solder paste are evaporated, meanwhile, the soldering flux in the solder paste wets the bonding pad and the pins, the solder paste softens, collapses and covers the bonding pad to connect the chip and the substrate, the reflow process is in a nitrogen environment to prevent oxidation, and fig. 5 shows the substrate after reflow soldering.
And sixthly, placing the welded substrate on a lower die of a film pressing machine for preheating to 150 ℃ below zero, pressing the upper die downwards, putting the preheated epoxy plastic package material into a feeding tank from an injection molding port, pressurizing through an injection molding rod, injecting the melted plastic package material 40 into the groove cavity 11 to fill the groove cavity 11, encapsulating the chip, simultaneously discharging air in the groove cavity, and taking out the product after the plastic package material 40 is completely hardened. The preheating temperature is adjusted according to different materials, fig. 6 shows a finished product after plastic packaging, and the main purpose of the plastic packaging is to seal a chip by using a plastic packaging material so that the chip cannot be affected by the outside and loses efficacy; meanwhile, as the periphery of the chip is filled with the plastic packaging material, compared with the traditional packaging shell packaging mode, the chip packaging shell has better signal shielding and anti-interference functions, and the dense filling improves stronger structural stability and better environmental protection function.
In the seventh step, the baking conditions are as follows: the temperature is 150 ℃ and 200 ℃, and the time is 2-8 h. Preferably, the baking temperature is 175 ℃, the baking time is 5-6h, the baking aims to completely harden the plastic packaging material and eliminate the stress generated during plastic packaging.
In step eight, carving a gully with a depth of 5-30 μm on the surface of the product by using the energy of the laser, and diffusely reflecting the light generated by the concave-convex to obtain visual light contrast on the surface of the product, wherein the heat generated by processing causes the resin to change color, so as to distinguish the color from the color of the unprocessed part, thereby completing the graphic printing. The purpose of the printing is to mark the name, batch number, trademark, manufacturing information and the like of the product after plastic packaging, so that the product has traceability.
It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (9)
1. A packaging process for embedding a flip chip in a package carrier is characterized in that: the method comprises the following steps:
the method comprises the following steps: pre-baking the substrate: placing a substrate (10) with a slot cavity (11) into a substrate box, and placing the substrate box into a hot air circulation oven for baking;
step two: and (3) solder paste dotting: fixing the baked substrate (10) on a bracket of a tin dotting machine, and coating a layer of tin paste (20) on a groove bottom bonding pad (12) of the substrate by using the tin dotting machine;
step three: chip pasting: the substrate with the solder paste is conveyed to a chip mounting platform, a chip (30) is mounted in a groove cavity (11) of the substrate by a chip mounter, and a chip bonding pad (31) is connected with a groove bottom bonding pad (12) through the solder paste (20);
step four: reflow soldering: placing the substrate (10) on which the chip is mounted into a reflow device, and heating the substrate by the reflow device to solidify the solder paste so as to fixedly connect the chip and the substrate;
step five: plasma cleaning: sending the substrate (10) subjected to reflow soldering into a plasma cleaning machine for cleaning, removing pollutants and residual soldering flux on the surfaces of the substrate (10) and the chip (30), increasing the reliability of a welding spot and roughening the surface of the substrate;
step six: plastic packaging: putting the cleaned substrate (10) on a film pressing machine, injecting a plastic packaging material (40) into a groove cavity (11) of the substrate by the film pressing machine to encapsulate the chip (30), and taking out a product after the plastic packaging material (40) is hardened;
step seven: and (5) baking again: putting the product after plastic packaging into an oven for baking again;
step eight: printing: and marking characters on the baked product to obtain a finished product packaging carrier plate.
2. The packaging process of claim 1, wherein the flip chip is embedded in the package carrier: in the first step, a nitrogen environment is adopted in the hot air circulation oven, and the baking conditions are as follows: the temperature is 150 ℃ and 180 ℃, and the baking time is 1-3 h.
3. The packaging process of claim 1, wherein the flip chip is embedded in the package carrier: in the second step, when in tin dispensing, a tin dispensing machine applies pressure to the tin paste in the needle cylinder, the tin paste overflows from a tin dispensing head arranged at the front part of the needle cylinder, and the tin dispensing head moves according to a path set by a program at the same time, so that a layer of tin paste (20) is coated on a groove bottom bonding pad (12) of the substrate (10).
4. The packaging process of claim 3, wherein the flip chip is embedded in the package carrier: the tin point machine exerts pressure to the tin cream in the cylinder, and the tin cream can spill from the tin point head of some syringe anterior portion, and the route operation that the program appointed is followed to the tin point head simultaneously.
5. The packaging process of claim 1, wherein the flip chip is embedded in the package carrier: in the third step, the chip mounting platform is heated to 100-.
6. The packaging process of claim 1, wherein the flip chip is embedded in the package carrier: in step four, the reflux shielding gas is nitrogen.
7. The packaging process of claim 1, wherein the flip chip is embedded in the package carrier: and sixthly, placing the welded substrate on a lower die of a film pressing machine, preheating to 150 ℃ and pressing the upper die downwards, putting the preheated epoxy plastic packaging material into a feeding tank from an injection molding port, pressurizing through an injection molding rod, injecting the melted plastic packaging material (40) into and filling the groove cavity (11), encapsulating the chip, simultaneously exhausting air in the groove cavity, and taking out the product after the plastic packaging material (40) is completely hardened.
8. The packaging process of claim 1, wherein the flip chip is embedded in the package carrier: in the seventh step, the baking conditions are as follows: the temperature is 150 ℃ and 200 ℃, and the time is 2-8 h.
9. The packaging process of claim 1, wherein the flip chip is embedded in the package carrier: in step eight, carving a gully with a depth of 5-30 μm on the surface of the product by using the energy of the laser, and diffusely reflecting the light generated by the concave-convex to obtain visual light contrast on the surface of the product, wherein the heat generated by processing causes the resin to change color, so as to distinguish the color from the color of the unprocessed part, thereby completing the graphic printing.
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