CN114172539A - Detection method, detection circuit, computer device and storage medium - Google Patents
Detection method, detection circuit, computer device and storage medium Download PDFInfo
- Publication number
- CN114172539A CN114172539A CN202210123506.6A CN202210123506A CN114172539A CN 114172539 A CN114172539 A CN 114172539A CN 202210123506 A CN202210123506 A CN 202210123506A CN 114172539 A CN114172539 A CN 114172539A
- Authority
- CN
- China
- Prior art keywords
- circuit
- sub
- port
- signal
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000001514 detection method Methods 0.000 title claims abstract description 123
- 238000012360 testing method Methods 0.000 claims abstract description 65
- 238000000034 method Methods 0.000 claims abstract description 24
- 238000004590 computer program Methods 0.000 claims abstract description 19
- 230000005540 biological transmission Effects 0.000 claims description 14
- 238000005265 energy consumption Methods 0.000 abstract description 4
- 230000002829 reductive effect Effects 0.000 abstract description 3
- 238000010586 diagram Methods 0.000 description 10
- 230000008569 process Effects 0.000 description 5
- 230000000737 periodic effect Effects 0.000 description 3
- 238000012545 processing Methods 0.000 description 3
- 238000004891 communication Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000008054 signal transmission Effects 0.000 description 2
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- 101100352578 Nicotiana plumbaginifolia PMA3 gene Proteins 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000008859 change Effects 0.000 description 1
- 229910021389 graphene Inorganic materials 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 230000002452 interceptive effect Effects 0.000 description 1
- 230000000670 limiting effect Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000036961 partial effect Effects 0.000 description 1
- 230000003068 static effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/46—Monitoring; Testing
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/0272—Arrangements for coupling to multiple lines, e.g. for differential transmission
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Engineering (AREA)
- Dc Digital Transmission (AREA)
Abstract
The application relates to a detection method, a detection circuit, a computer device, a storage medium and a computer program product. The method comprises the following steps: sending a test signal through a first transmitting chip in the detection circuit, and sending a preset standard signal through a second transmitting chip; under the condition that a switch device in the detection circuit is conducted, collecting a first receiving signal in a first receiving circuit; if the first receiving signal does not meet the preset level condition, switching off a switching device in the detection circuit, and re-collecting a second receiving signal in the first receiving circuit; and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition. In the embodiment, the switching device is added in the circuit of the vehicle-mounted Ethernet, and the interface circuit of the vehicle-mounted Ethernet can be accurately and timely detected by controlling the on or off of the switching device under the condition of not adding an additional circuit, so that the energy consumption of the circuit is reduced, and the circuit cost is saved.
Description
Technical Field
The present application relates to the field of communications technologies, and in particular, to a detection method, a detection circuit, a computer device, and a storage medium.
Background
The vehicle-mounted Ethernet is a new vehicle-mounted communication technology, and the vehicle-mounted Ethernet adopts a single-pair five-type unshielded twisted pair line and can simultaneously receive and send data. Specifically, the interface circuit of the vehicle ethernet generally consists of a MAC (media access control), a PHY chip (physical interface transceiver), and a twisted pair socket, and bidirectional transmission of signals is realized through physical connection between the twisted pair socket and a twisted pair.
However, since the interface circuit of the on-board ethernet is unstable, a short circuit or an open circuit may occur, and it is necessary to detect the interface circuit of the on-board ethernet in order to ensure stable operation of the on-board ethernet. In the related art, an additional detection circuit needs to be added to an interface circuit of the vehicle-mounted ethernet, which results in a larger circuit scale and higher energy consumption.
Disclosure of Invention
In view of the above, it is desirable to provide a detection method, a detection circuit, a computer device, and a storage medium capable of solving the above-described technical problems without increasing the scale of an additional circuit.
In a first aspect, the present application provides a detection method. The method is applied to a detection circuit, the detection circuit comprises a first transmitting chip and a second transmitting chip, the first transmitting chip comprises a switch first transmitting circuit, a first echo cancellation circuit, a first receiving circuit and a port, and a first end of the first transmitting circuit is connected with a first end of the first echo cancellation circuit through the switch device;
the method comprises the following steps:
sending a test signal through a first sending chip in the detection circuit, sending a preset standard signal through a second sending chip, wherein the period of the test signal is greater than that of the preset standard signal;
under the condition that the switch device in the detection circuit is conducted, acquiring a first receiving signal in the first receiving circuit;
if the first receiving signal does not meet the preset level condition, the switch device in the detection circuit is disconnected, and a second receiving signal in the first receiving circuit is collected again;
and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
In one embodiment, the method further comprises:
under the condition that the first receiving signal meets a preset level condition, if the level number of the first receiving signal is consistent with the level number of a target signal, determining that one path of connection in the port is disconnected, wherein the target signal is the sum of the test signal and the preset standard signal;
and if the level number of the first receiving signal is consistent with the level number of the preset standard signal, determining that the port is normal.
In one embodiment, the turning off the switching device in the detection circuit if the first received signal does not satisfy a preset level condition includes:
if the level number of the first receiving signal is inconsistent with the level number of the target signal and inconsistent with the level number of the preset standard signal, switching off the switch device in the detection circuit;
the determining the circuit connection condition of the port corresponding to the second received signal according to the pre-stored correspondence between the received signal and the circuit connection condition includes:
determining that the port is shorted if the second received signal is a direct current;
and if the level number of the second receiving signals and the level number of the test signals are in a preset multiple relation, determining that two paths of the ports are disconnected.
In one embodiment, the switch device includes a first sub switch and a second sub switch, the ports include a first sub port and a second sub port, the circuits in the detection circuit are connected by two paths, the first sub switch and the first sub port are in one path, and the second sub switch and the second sub port are in the other path;
the acquiring a first receiving signal in the first receiving circuit under the condition that the switching device in the detecting circuit is turned on includes:
under the condition that the first sub-switch and the second sub-switch in the detection circuit are turned on, acquiring a first receiving signal in the first receiving circuit;
the reacquiring a second receive signal in the first receive circuit with the switching device in the detection circuit open includes:
reacquiring a second receive signal in the first receive circuit when the first sub-switch and the second sub-switch in the detection circuit are open.
In a second aspect, the present application provides a detection circuit comprising: controlling means, first transmission chip and second transmission chip, wherein:
the first transmitting chip comprises a first switching device, a first transmitting circuit, a first echo eliminating circuit, a first receiving circuit and a first port; the first transmitting circuit is connected with the first echo cancellation circuit through the first switch device, the first echo cancellation circuit is connected with the first receiving circuit, the first echo cancellation circuit is connected with the first port, the first transmitting circuit is connected with the first port, and the first transmitting chip is connected with the second transmitting chip through the first port;
the first transmitting circuit is used for transmitting a test signal;
the second transmitting chip is used for transmitting a preset standard signal;
the control device is used for acquiring a first receiving signal in the first receiving circuit under the condition that the first switch device in the detection circuit is conducted;
if the first receiving signal does not meet the preset level condition, the control device is also used for disconnecting the first switch device in the detection circuit and reacquiring a second receiving signal in the first receiving circuit; and determining the circuit connection condition of the first port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
In one embodiment, the first switch device includes a first sub-switch and a second sub-switch, the first port includes a first sub-port and a second sub-port, each circuit in the detection circuit is connected by two paths, the first sub-switch and the first sub-port are in one path, and the second sub-switch and the second sub-port are in the other path;
a first end of the first transmitting circuit is connected with one end of the first sub-switch, the other end of the first sub-switch is connected with a first end of the first echo cancellation circuit, a second end of the first echo cancellation circuit is connected with a first end of the first receiving circuit, a third end of the first echo cancellation circuit is connected with the first sub-port, a second end of the first transmitting circuit is connected with the first sub-port, and the first transmitting chip is connected with the second transmitting chip through the first sub-port;
the third end of the first transmitting circuit is connected with one end of the second sub-switch, the other end of the second sub-switch is connected with the fourth end of the first echo cancellation circuit, the fifth end of the first echo cancellation circuit is connected with the second end of the first receiving circuit, the sixth end of the first echo cancellation circuit is connected with the second sub-port, the fourth end of the first transmitting circuit is connected with the second sub-port, and the first transmitting chip is connected with the second transmitting chip through the second sub-port.
In one embodiment, the second transmitting chip includes a second switch, a second transmitting circuit, a second echo cancellation circuit, a second receiving circuit, and a second port; the second transmitting circuit is connected with the second echo cancellation circuit through the second switch device, the second echo cancellation circuit is connected with the second receiving circuit, the second echo cancellation circuit is connected with the second port, the second transmitting circuit is connected with the second port, and the second transmitting chip is connected with the second transmitting chip through the second port.
In one embodiment, the second switch device includes a third sub-switch and a fourth sub-switch, the second port includes a third sub-port and a fourth sub-port, the circuits in the detection circuit are connected by two paths, the third sub-switch and the third sub-port are in one path, and the fourth sub-switch and the fourth sub-port are in the other path;
the first end of the second transmitting circuit is connected with one end of the third sub-switch, the other end of the third sub-switch is connected with the first end of the second echo cancellation circuit, the second end of the second echo cancellation circuit is connected with the first end of the second receiving circuit, the third end of the second echo cancellation circuit is connected with the third sub-port, the second end of the second transmitting circuit is connected with the third sub-port, and the second transmitting chip is connected with the first transmitting chip through the third sub-port;
the third end of the second transmitting circuit is connected with one end of the fourth sub-switch, the other end of the fourth sub-switch is connected with the fourth end of the second echo cancellation circuit, the fifth end of the second echo cancellation circuit is connected with the second end of the second receiving circuit, the sixth end of the second echo cancellation circuit is connected with the fourth sub-port, the fourth end of the second transmitting circuit is connected with the fourth sub-port, and the second transmitting chip is connected with the first transmitting chip through the fourth sub-port.
In a third aspect, the present application also provides a computer device. The computer device comprises a memory storing a computer program and a processor implementing the following steps when executing the computer program:
sending a test signal through a first sending chip in the detection circuit, sending a preset standard signal through a second sending chip, wherein the period of the test signal is greater than that of the preset standard signal;
under the condition that the switch device in the detection circuit is conducted, acquiring a first receiving signal in the first receiving circuit;
if the first receiving signal does not meet the preset level condition, the switch device in the detection circuit is disconnected, and a second receiving signal in the first receiving circuit is collected again;
and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
In a fourth aspect, the present application further provides a computer-readable storage medium. The computer-readable storage medium having stored thereon a computer program which, when executed by a processor, performs the steps of:
sending a test signal through a first sending chip in the detection circuit, sending a preset standard signal through a second sending chip, wherein the period of the test signal is greater than that of the preset standard signal;
under the condition that the switch device in the detection circuit is conducted, acquiring a first receiving signal in the first receiving circuit;
if the first receiving signal does not meet the preset level condition, the switch device in the detection circuit is disconnected, and a second receiving signal in the first receiving circuit is collected again;
and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
In a fifth aspect, the present application further provides a computer program product. The computer program product comprising a computer program which when executed by a processor performs the steps of:
sending a test signal through a first sending chip in the detection circuit, sending a preset standard signal through a second sending chip, wherein the period of the test signal is greater than that of the preset standard signal;
under the condition that the switch device in the detection circuit is conducted, acquiring a first receiving signal in the first receiving circuit;
if the first receiving signal does not meet the preset level condition, the switch device in the detection circuit is disconnected, and a second receiving signal in the first receiving circuit is collected again;
and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
According to the detection method, the detection circuit, the computer equipment and the storage medium, the first transmitting chip in the detection circuit sends the test signal, and the second transmitting chip sends the preset standard signal; under the condition that a switch device in the detection circuit is conducted, collecting a first receiving signal in a first receiving circuit; if the first receiving signal does not meet the preset level condition, switching off a switching device in the detection circuit, and re-collecting a second receiving signal in the first receiving circuit; and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition. The detection method provided by the embodiment is applied to a detection circuit, and a switching device is added to an original circuit of the vehicle-mounted Ethernet. Therefore, the interface circuit of the vehicle-mounted Ethernet can be accurately and timely detected by controlling the on or off of the switch device under the condition of not increasing an additional detection circuit, the energy consumption of the circuit is reduced, and the circuit cost is saved.
Drawings
FIG. 1 is a diagram of a first transmitting chip in a detection method according to an embodiment;
FIG. 2 is a schematic flow chart of a detection method in one embodiment;
FIG. 3 is a flowchart illustrating steps of determining a circuit connection condition when a predetermined level is satisfied according to an embodiment;
FIG. 4 is a flowchart illustrating steps of determining a circuit connection condition when a predetermined level condition is not met according to an embodiment;
FIG. 5 is a schematic diagram of a first transmitting chip in another embodiment;
FIG. 6 is a schematic diagram of a detection circuit in one embodiment;
FIG. 7 is a schematic diagram of a detection circuit in another embodiment;
FIG. 8 is a schematic diagram of a detection circuit in another embodiment;
FIG. 9 is a diagram illustrating the specific connections of the detection circuit in one embodiment;
FIG. 10 is a flow chart illustrating an exemplary implementation of a detection method for use in an on-board Ethernet;
FIG. 11 is a flow diagram illustrating an exemplary implementation of a detection method applied to gigabit Ethernet;
FIG. 12 is a diagram illustrating an internal structure of a computer device according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
In an embodiment, a detection method is provided, and this embodiment is exemplified by applying the method to a control device, it is to be understood that the method may also be applied to a server, and may also be applied to a system including the control device and the server, and is implemented by interaction between the control device and the server, where the control device may be, but is not limited to, various personal computers, notebook computers, smart phones, tablet computers, internet of things devices, and portable wearable devices, and the internet of things devices may be smart speakers, smart televisions, smart air conditioners, smart car-mounted devices, and the like. The portable wearable device can be a smart watch, a smart bracelet, a head-mounted device and the like, and the server can be realized by an independent server or a server cluster formed by a plurality of servers.
In particular, the detection method provided in this embodiment may be applied to a control device in a detection circuit including a first transmitting chip and a second transmitting chip. As shown in fig. 1, the first transmitting chip includes a switch device, a first transmitting circuit 100, a first echo cancellation circuit 200, a first receiving circuit 300, and a port 400, and a first end of the first transmitting circuit 100 is connected to a first end of the first echo cancellation circuit 200 through the switch device.
The detection method provided by the embodiment of the invention, as shown in fig. 2, comprises the following steps:
step 102, a first transmitting chip in the detection circuit sends a test signal, and a second transmitting chip sends a preset standard signal.
The preset standard signal is a random signal and is a non-periodic signal, but because the encoding can make the signal energy within a certain range, the signal energy will not be within the frequency range of the standard signal as long as the period of the test signal is large enough. Therefore, the period of the test signal is greater than the period of the preset standard signal.
In particular, the test signal may be specifically determined according to the interface circuit in which the detection circuit is located. In the case where the interface circuit is an interface circuit in a vehicle-mounted ethernet, the test signal may be a signal having a level (-1, 1), a period of 40 codes, a duty ratio of 1: 1 square wave test signal. The preset standard signal may be a standard PAM3 signal. The period of the test signal is different from the maximum period of the predetermined standard signal, so that the test signal received by the receiving circuit can be easily detected.
And 104, acquiring a first receiving signal in the first receiving circuit under the condition that the switching device in the detection circuit is turned on.
Specifically, the first reception signal is a partial signal of the signal received by the first reception circuit 300, in which both the code number and the duty ratio coincide with the test signal. The control device collects the amplitude information of the first received bright red in the first receiving circuit 300. The control device may turn on the switch device in the detection circuit, so that the first echo cancellation circuit 200 may operate normally. The control device may acquire the first reception signal in the first reception circuit 300 in a case where the switching device is turned on.
For example, the test signal may be a signal having a level of (-1, 1), a period of 40 codes, a duty ratio of 1: 1, then the first received signal collected by the control device at the first receiving circuit 300 is a square wave test signal with a period of 40 codes and a duty ratio of 1: and the sum of the test signal of 1 and the preset standard signal sent by the second transmitting chip after the link attenuation.
And 106, if the first receiving signal does not meet the preset level condition, switching off a switching device in the detection circuit, and re-collecting a second receiving signal in the first receiving circuit.
Specifically, the preset level condition may be that the number of levels of the first received signal coincides with the number of levels of the target signal, or that the number of levels of the first received signal coincides with the number of levels of the preset standard signal. Wherein the target signal is the sum of the test signal and a preset standard signal. Thus, if the control device determines that the first received signal does not satisfy the preset level condition, that is, determines that the number of levels of the first received signal is not consistent with the number of levels of the target signal and is not consistent with the number of levels of the preset standard signal. In this way, the control device can reacquire the reception signal in the first reception circuit 300, i.e., the second reception signal, after the switching device in the detection circuit is turned off (turned off).
And 108, determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
Specifically, the correspondence relationship of the reception signal and the circuit connection condition stored in advance may be calculated by the control device in advance based on the connection condition of the detection circuit. The port 400 includes a first sub-port and a second port, and the circuit connection condition of the port 400 includes a normal condition, a short circuit, a broken circuit and a broken two-way circuit, where the broken circuit means that only one of the first sub-port and the second sub-port is disconnected, and may be disconnection of the first sub-port or disconnection of the second sub-port; breaking two paths means that the port 400 is broken, i.e. both the first sub-port and the second sub-port are broken. The control means may determine the circuit connection condition of the port 400 at the present moment in time based on the level number condition of the second received signal.
For example, when the test signal is at a level (-1, 1), a period of 40 codes, and a duty ratio of 1: 1, and the preset standard signal is the standard PAM3 signal, if the control device determines that the collected second received signal is a level and the level value is 0, the control device may determine that the circuit connection condition in the port 400 at the current time is a short circuit. If the second received signal collected by the control device is a preset standard signal with two levels and the level value of (-4, 4), it can be determined that the circuit connection condition in the port 400 at the current time is a broken two-way connection condition.
In the detection method, a first transmitting chip in a detection circuit is combined to send a test signal, and a second transmitting chip sends a preset standard signal; under the condition that a switch device in the detection circuit is conducted, collecting a first receiving signal in a first receiving circuit; if the first receiving signal does not meet the preset level condition, switching off a switching device in the detection circuit, and re-collecting a second receiving signal in the first receiving circuit; and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition. The detection method provided by the embodiment is applied to a detection circuit, and a switching device is added to an original circuit of the vehicle-mounted Ethernet. Therefore, the interface circuit of the vehicle-mounted Ethernet can be accurately and timely detected by controlling the on or off of the switch device under the condition of not increasing an additional detection circuit, the energy consumption of the circuit is reduced, and the circuit cost is saved.
In one embodiment, as shown in fig. 3, the detection method further includes:
in step 202, if the number of levels of the first received signal is consistent with the number of levels of the test signal, under the condition that the first received signal satisfies the preset level condition.
Specifically, if the control device determines that the collected first received signal satisfies the preset level condition, the control device may determine that the circuit connection condition in the port 400 at the current time is an open circuit if the control device determines that the first received signal is consistent with the level number of the test signal.
And step 204, if the level number of the first receiving signal is consistent with the level number of the preset standard signal, determining that the port is normal.
For example, when the test signal is a signal having a level (-1, 1), a period of 40 codes (a code width of 300 ns), and a duty ratio of 1: 1, in the case that the predetermined standard signal is a standard PAM3 signal, that is, the predetermined standard signal is a three-level signal with a code width of 15ns, and the level value is (-1, 0, 1). Thus, if the control device determines that the number of levels of the collected first received signal is consistent with the number of levels of the preset standard signal, that is, the number of levels of the first received signal is 3, it may be determined that the port 400 is operating normally. If the number of levels of the first received signal is (-1, 1), that is, the number of levels of the first received signal coincides with the number of levels of the test signal, it can be determined that the circuit connection condition in the port 400 is an open circuit at the present time.
In this embodiment, the test signal with the different transmission signal periods of the second transmission chip is transmitted at the first transmission chip end, so that the test signal can be conveniently acquired at the receiving circuit, and the accurate detection of the circuit connection condition of the port can be realized on the premise of not increasing the detection scale of the additional circuit through the different conditions of the level amplitude of the acquired test signal, thereby improving the reliability of the test, and being simple and flexible.
In one embodiment, the specific process of step 106 "turn off the switching device in the detection circuit if the first received signal does not satisfy the preset level condition" includes:
and if the level number of the first receiving signals is inconsistent with the level number of the test signals and inconsistent with the level number of the preset standard signals, switching off a switching device in the detection circuit.
Specifically, if the number of levels of the collected first receiving signals is inconsistent with the number of levels of the test signals and inconsistent with the number of levels of the preset standard signals, the switching device in the detection circuit is turned off, and the signals in the first receiving circuit, namely the second receiving signals, are collected again after the current is stabilized.
Alternatively, when the test signal is a signal having a level (-1, 1), a period of 40 codes (a code width of 300 ns), and a duty ratio of 1: 1, under the condition that the preset standard signal is a standard PAM3 signal, if the level number of the collected first receiving signal is (-2, 2), the switching device is turned off, and the first echo cancellation circuit does not work.
Accordingly, as shown in fig. 4, the specific processing procedure of "determining the circuit connection condition of the port corresponding to the second received signal according to the pre-stored correspondence between the received signal and the circuit connection condition" in step 106 includes:
in step 302, if the second received signal is a dc current, it is determined that the port is shorted.
In particular, in the case of an open switching device, the signal in the first receiving circuit, i.e. the second receiving signal, is reacquired. If the second received signal is a direct current, i.e. a level of the acquired signal, and the level value is 0, it can be determined that the circuit connection condition in the port at the present moment is a short circuit.
And step 304, if the number of the levels of the second received signal and the number of the levels of the test signal are in a preset multiple relation, determining that two paths of connection in the port are disconnected.
In the event of the switching device being open, the signal in the first receiving circuit, i.e. the second receiving signal, is picked up again. If the second received signal is a direct current, that is, the level amplitude of the acquired signal and the level amplitude of the test signal are in a preset multiple relation, it can be determined that the circuit connection condition in the port at the current moment is to disconnect two paths.
Alternatively, the preset multiple relationship may be two times, that is, the level amplitude of the collected signal is 2 × TX1, and TX1 is a signal that may be transmitted by the first transmitting chip.
In one embodiment, as shown in fig. 5, the switch device includes a first sub switch and a second sub switch, the port 400 includes a first sub port 410 and a second sub port 420, the circuits in the detection circuit are connected by two paths, the first sub switch is in one path with the first sub port 410, and the second sub switch is in the other path with the second sub port 420.
Accordingly, step 104 "in case that the switch device in the detection circuit is turned on, the specific process of collecting the first receiving signal in the first receiving circuit" includes:
under the condition that a first sub-switch and a second sub-switch in a detection circuit are conducted, a first receiving signal in a first receiving circuit is collected.
Accordingly, the specific process of step 106 "reacquiring the second received signal in the first receiving circuit in case the switching device in the detection circuit is opened" includes:
and under the condition that the first sub-switch and the second sub-switch in the detection circuit are disconnected, the second receiving signal in the first receiving circuit is collected again.
It should be understood that, although the steps in the flowcharts related to the embodiments are shown in sequence as indicated by the arrows, the steps are not necessarily executed in sequence as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least a part of the steps in the flowcharts related to the above embodiments may include multiple steps or multiple stages, which are not necessarily performed at the same time, but may be performed at different times, and the order of performing the steps or stages is not necessarily sequential, but may be performed alternately or alternately with other steps or at least a part of the steps or stages in other steps.
In one embodiment, as shown in fig. 6, there is provided a detection circuit comprising: control device, first emitting chip 10 and second emitting chip 20, wherein:
the first transmitting chip includes a switching device, a first transmitting circuit 100, a first echo cancellation circuit 200, a first receiving circuit 300, and a port 400. The first transmitting circuit 100 is connected to the first echo cancellation circuit 200 through the first switch device, the first echo cancellation circuit 200 is connected to the first receiving circuit 300, the first echo cancellation circuit 200 is connected to the first circuit 400, the first transmitting circuit 100 is connected to the port 400, and the first transmitting chip is connected to the second transmitting chip through the port 400.
The first transmitting circuit 100 is configured to transmit a test signal.
The second transmitting chip 20 is configured to send a preset standard signal.
The control device is configured to collect a first receiving signal in the first receiving circuit 300 when the first switch device in the detection circuit is turned on.
If the first receiving signal does not satisfy the preset level condition, the control device is further configured to turn off the first switch device in the detection circuit, and reacquire the second receiving signal in the first receiving circuit 300. And determining the circuit connection condition of the port 400 corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
In one embodiment, as shown in fig. 5, the first switch device includes a first sub-switch and a second sub-switch, the first port 400 includes a first sub-port 410 and a second sub-port 420, and the circuits in the detection circuit are connected by two paths, the first sub-switch is located in one path with the first sub-port 410, and the second sub-switch is located in the other path with the second sub-port 420.
A first end of the first transmitting circuit 100 is connected to one end of the first sub-switch, the other end of the first sub-switch is connected to a first end of the first echo cancellation circuit 200, a second end of the first echo cancellation circuit 200 is connected to a first end of the first receiving circuit 300, a third end of the first echo cancellation circuit 200 is connected to the first sub-port 410, a second end of the first transmitting circuit 100 is connected to the first sub-port 420, and the first transmitting chip is connected to the second transmitting chip through the first sub-port 410.
The third terminal of the first transmitting circuit 100 is connected to one terminal of the second sub-switch, the other terminal of the second sub-switch is connected to the fourth terminal of the first echo cancellation circuit 200, the fifth terminal of the first echo cancellation circuit 200 is connected to the second terminal of the first receiving circuit 300, the sixth terminal of the first echo cancellation circuit 200 is connected to the second sub-port 420, the fourth terminal of the first transmitting circuit 100 is connected to the second sub-port 420, and the first transmitting chip is connected to the second transmitting chip through the second sub-port 420.
In one embodiment, as shown in fig. 7, the second transmitting chip 20 includes a second switch device, a second transmitting circuit 600, a second echo cancellation circuit 700, a second receiving circuit 800, and a second port 500. The second transmitting circuit 600 is connected to the second echo cancellation circuit 700 through the second switch device, the second echo cancellation circuit 700 is connected to the second receiving circuit 800, the second echo cancellation circuit 700 is connected to the second port 500, the second transmitting circuit 600 is connected to the second port 500, and the second transmitting chip is connected to the second transmitting chip through the second port 500.
In one embodiment, as shown in fig. 8, the second switch device includes a third sub-switch and a fourth sub-switch, the second port 500 includes a third sub-port 510 and a fourth sub-port 520, the circuits in the detection circuit are connected by two paths, the third sub-switch is in one path with the third sub-port 510, and the fourth sub-switch is in the other path with the fourth sub-port 520.
The first end of the second transmitting circuit 600 is connected to one end of the third sub-switch, the other end of the third sub-switch is connected to the first end of the second echo cancellation circuit 700, the second end of the second echo cancellation circuit 700 is connected to the first end of the second receiving circuit 800, the third end of the second echo cancellation circuit 700 is connected to the third sub-port 510, the second end of the second transmitting circuit 600 is connected to the third sub-port 510, and the second transmitting chip is connected to the first transmitting chip through the third sub-port 510.
The third terminal of the second transmitting circuit 600 is connected to one terminal of the fourth sub-switch, the other terminal of the fourth sub-switch is connected to the fourth terminal of the second echo cancellation circuit 700, the fifth terminal of the second echo cancellation circuit 700 is connected to the second terminal of the second receiving circuit 800, the sixth terminal of the second echo cancellation circuit 700 is connected to the fourth sub-port 520, the fourth terminal of the second transmitting circuit 600 is connected to the fourth sub-port 520, and the second transmitting chip is connected to the first transmitting chip through the fourth sub-port 520.
The following describes in detail the implementation of the above detection method applied in the detection circuit, with reference to a specific embodiment:
the interface circuit of the vehicle-mounted Ethernet consists of a transmitting chip of the Ethernet and a twisted pair socket. Signal transmission is achieved through the physical connection of twisted pair jacks to twisted pair wires. In order to detect whether two twisted pair ports are open or only one twisted pair port is open and whether the twisted pair ports are short-circuited, an additional analog detection circuit is added to the traditional Ethernet physical layer interface chip, so that the circuit scale is increased.
In order to solve the above problems, the present invention provides a method for detecting the port connection status of a vehicle ethernet and a gigabit ethernet. The Ethernet port connection state is detected by switching of the echo cancellation circuit.
Specifically, in the standard 100BASE-T1 protocol, a three-level pulse amplitude modulation code PAM3 signal is transmitted and received over the same pair of cables, which requires an echo cancellation circuit to prevent the transmitted signal TX echo from interfering with the received signal RX at the receiving end to cause bit errors, as shown in fig. 9. Wherein RX = TRX-TX, TRX is a mixed transceiving signal in the cable, TX is a transmission signal of the local terminal, and RX is a received signal transmitted by the opposite terminal, i.e. an opposite terminal signal.
For the transmission 1, the local terminal is a transmission 1 circuit, and the opposite terminal is a transmission 2 circuit. Chip 1 is connected to the differential twisted pair line through port 1 and port 2, and chip 2 is connected to the differential twisted pair line through port 3 and port 4. Port 1 is connected to port 3 and port 2 is connected to port 4. Chip 1 may be identical to chip 2. Thus, we can detect port 1 and port 2 of chip 1.
As shown in fig. 9, let TX1= TXp1-TXn1, TX2= TXp2-TXn2, TXp1= -TXn1, TXp2= -TXn2, RX1= RXp1-RXn 1. Wherein, the preset standard signal TXP2 (PAM 3 signal) takes three-level value as (-1, 0, 1). Since the PAM3 signal is a three-level signal with a code width of 15ns, to eliminate interference of the PAM3 signal on the test signal, the TXp1 of the test signal can be a two-level periodic signal with a code width of 300ns, and the two-level value is (-1, 1). If the link normally attenuates by a times (a > = 1), the RX1 signal levels in different connection states of the ports are obtained as shown in table 1:
TABLE 1
The detection signal sent in the detection method provided by the embodiment of the invention has a cycle of 40 codes and a duty ratio of 1: the standard signal of 1, which is clearly different from the varying code interval of the PMA3 signal sent by the opposite terminal, can make the detection signal collected at the receiving circuit easy to detect. As shown in table 1 above: by detecting the amplitude of the test signal (40-code, 1: 1 duty cycle signal) obtained from the RX1 signal (first received signal), the following amplitudes can be obtained: the levels are (-2, 2), (-1, 1) and (-4, 4), and the test result is not affected by the link attenuation value because the levels are independent of the link attenuation value, thereby ensuring the detection reliability.
As shown in fig. 10, the detection method in the embodiment of the present invention may ensure the uniqueness of the amplitude parameter of the received signal RX1 acquired at the receiving circuit by switching whether the echo cancellation circuit operates or not. In the detection scenario of the detection method applied to the receiving circuit of the vehicle-mounted ethernet, then, in the transmitting 1 circuit, the transmission level is (-1, 1), the period is 40 codes (the code width is 300 ns), and the duty ratio is 1: 1, and a preset standard signal (standard PAM3 signal) is sent at emission 2. In this way, the number of levels of the received signal RX1 in different operating states of the differential twisted pair in port 1 and port 2 can be obtained, as shown in table 2 below:
TABLE 2
Specifically, a transmission period of 40 codes (code width is 300 ns), a duty ratio of 1: 1, so that the number of levels of TXp1= - (number of levels of TXp 2), is (-1, 1). Under the condition that the first sub-switch SW1 and the second sub-switch SW2 are turned on, acquiring the level amplitude of a test signal RX (first received signal) in a receiving 1 circuit, and if 3 levels are received, judging that a differential port (port 1 and port 2) is normal; when the test signal with the (-1, 1) level is received, the differential port is disconnected, when the test signal with the (-2, 2) level is received, the test signal is switched to echo cancellation not work, namely the first sub-switch SW1 and the second sub-switch SW2 are turned off, the level amplitude of the test signal RX (second received signal) in the circuit of the receiving 1 is collected again, and when the RX receives 1 level (0), the differential port is determined to be short-circuited; when RX receives a test signal with (-4, 4) level, the differential port is disconnected.
In an embodiment, as shown in fig. 11, the detection method may also be applied to detect port circuit connection in the gigabit ethernet network. Thus, let TX1= TXp1-TXn1, TX2= TXp2-TXn2, TXp1= -TXn1, TXp2= -TXn 2. The preset standard signal TXP2 (PAM 5 signal code width is 8 ns) takes three-level values of (-1, -0.5, 0, 0.5, 1).
To eliminate the interference of the PAM5 signal on the test signal, we can make TXp1 of the test signal a two-level periodic signal with a code width of 160ns, and take the two-level value as (-1, 1). If the link normally attenuates by a times (a > = 1), the RX1 signal levels in different connection states of the ports are obtained as shown in table 3:
TABLE 3
Specifically, a transmission period of 40 codes (code width is 160 ns), a duty ratio of 1: 1, so that the number of levels of TXp1= - (number of levels of TXp 2), is (-1, 1). Under the condition that the first sub-switch SW1 and the second sub-switch SW2 are turned on, acquiring the level amplitude of a test signal RX (first received signal) in a receiving 1 circuit, and if 5 levels are received, judging that the differential ports (port 1 and port 2) are normal; when the test signal with the (-1, 1) level is received, the differential port is disconnected, when the test signal with the (-2, 2) level is received, the test signal is switched to echo cancellation not work, namely the first sub-switch SW1 and the second sub-switch SW2 are turned off, the level amplitude of the test signal RX (second received signal) in the circuit of the receiving 1 is collected again, and when the RX receives 1 level (0), the differential port is determined to be short-circuited; RX receives 2 levels and when the level value is (-4, 4) test signal, it is determined that the differential port is disconnected.
In one embodiment, a computer device is provided, which may be a server, and its internal structure diagram may be as shown in fig. 12. The computer device includes a processor, a memory, and a network interface connected by a system bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device includes a non-volatile storage medium and an internal memory. The non-volatile storage medium stores an operating system, a computer program, and a database. The internal memory provides an environment for the operation of an operating system and computer programs in the non-volatile storage medium. The database of the computer device is used for storing relevant data of the detection circuit. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a detection method.
Those skilled in the art will appreciate that the architecture shown in fig. 12 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, a computer device is further provided, which includes a memory and a processor, the memory stores a computer program, and the processor implements the steps of the above method embodiments when executing the computer program.
In an embodiment, a computer-readable storage medium is provided, on which a computer program is stored which, when being executed by a processor, carries out the steps of the above-mentioned method embodiments.
In an embodiment, a computer program product is provided, comprising a computer program which, when being executed by a processor, carries out the steps of the above-mentioned method embodiments.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, database, or other medium used in the embodiments provided herein may include at least one of non-volatile and volatile memory. The nonvolatile Memory may include Read-Only Memory (ROM), magnetic tape, floppy disk, flash Memory, optical Memory, high-density embedded nonvolatile Memory, resistive Random Access Memory (ReRAM), Magnetic Random Access Memory (MRAM), Ferroelectric Random Access Memory (FRAM), Phase Change Memory (PCM), graphene Memory, and the like. Volatile Memory can include Random Access Memory (RAM), external cache Memory, and the like. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM), among others. The databases referred to in various embodiments provided herein may include at least one of relational and non-relational databases. The non-relational database may include, but is not limited to, a block chain based distributed database, and the like. The processors referred to in the embodiments provided herein may be general purpose processors, central processing units, graphics processors, digital signal processors, programmable logic devices, quantum computing based data processing logic devices, etc., without limitation.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present application. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present application shall be subject to the appended claims.
Claims (10)
1. A detection method is applied to a detection circuit, the detection circuit comprises a first transmitting chip and a second transmitting chip, the first transmitting chip comprises a switch device, a first transmitting circuit, a first echo cancellation circuit, a first receiving circuit and a port, and a first end of the first transmitting circuit is connected with a first end of the first echo cancellation circuit through the switch device;
the method comprises the following steps:
sending a test signal through a first sending chip in the detection circuit, sending a preset standard signal through a second sending chip, wherein the period of the test signal is greater than that of the preset standard signal;
under the condition that the switch device in the detection circuit is conducted, acquiring a first receiving signal in the first receiving circuit;
if the first receiving signal does not meet the preset level condition, the switch device in the detection circuit is disconnected, and a second receiving signal in the first receiving circuit is collected again;
and determining the circuit connection condition of the port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
2. The method of claim 1, further comprising:
under the condition that the first receiving signal meets a preset level condition, if the level number of the first receiving signal is consistent with the level number of a target signal, determining that one path of connection in the port is disconnected, wherein the target signal is the sum of the test signal and the preset standard signal;
and if the level number of the first receiving signal is consistent with the level number of the preset standard signal, determining that the port is normal.
3. The method of claim 2, wherein said opening the switching device in the detection circuit if the first received signal does not satisfy a preset level condition comprises:
if the level number of the first receiving signal is inconsistent with the level number of the target signal and inconsistent with the level number of the preset standard signal, switching off the switch device in the detection circuit;
the determining the circuit connection condition of the port corresponding to the second received signal according to the pre-stored correspondence between the received signal and the circuit connection condition includes:
determining that the port is shorted if the second received signal is a direct current;
and if the level number of the second receiving signals and the level number of the test signals are in a preset multiple relation, determining that two paths of the ports are disconnected.
4. The method of claim 2, wherein the switching device comprises a first sub-switch and a second sub-switch, the ports comprise a first sub-port and a second sub-port, the circuits in the detection circuit are connected by two paths, the first sub-switch is in one path with the first sub-port, and the second sub-switch is in the other path with the second sub-port;
the acquiring a first receiving signal in the first receiving circuit under the condition that the switching device in the detecting circuit is turned on includes:
under the condition that the first sub-switch and the second sub-switch in the detection circuit are turned on, acquiring a first receiving signal in the first receiving circuit;
the reacquiring a second receive signal in the first receive circuit with the switching device in the detection circuit open includes:
reacquiring a second receive signal in the first receive circuit when the first sub-switch and the second sub-switch in the detection circuit are open.
5. A detection circuit, comprising: controlling means, first transmission chip and second transmission chip, wherein:
the first transmitting chip comprises a first switching device, a first transmitting circuit, a first echo eliminating circuit, a first receiving circuit and a first port; the first transmitting circuit is connected with the first echo cancellation circuit through the first switch device, the first echo cancellation circuit is connected with the first receiving circuit, the first echo cancellation circuit is connected with the first port, the first transmitting circuit is connected with the first port, and the first transmitting chip is connected with the second transmitting chip through the first port;
the first transmitting circuit is used for transmitting a test signal;
the second transmitting chip is used for transmitting a preset standard signal;
the control device is used for acquiring a first receiving signal in the first receiving circuit under the condition that the first switch device in the detection circuit is conducted;
if the first receiving signal does not meet the preset level condition, the control device is also used for disconnecting the first switch device in the detection circuit and reacquiring a second receiving signal in the first receiving circuit; and determining the circuit connection condition of the first port corresponding to the second receiving signal according to the pre-stored corresponding relationship between the receiving signal and the circuit connection condition.
6. The detection circuit according to claim 5, wherein the first switch device comprises a first sub-switch and a second sub-switch, the first port comprises a first sub-port and a second sub-port, the circuits in the detection circuit are connected by two paths, the first sub-switch is in one path with the first sub-port, and the second sub-switch is in the other path with the second sub-port;
a first end of the first transmitting circuit is connected with one end of the first sub-switch, the other end of the first sub-switch is connected with a first end of the first echo cancellation circuit, a second end of the first echo cancellation circuit is connected with a first end of the first receiving circuit, a third end of the first echo cancellation circuit is connected with the first sub-port, a second end of the first transmitting circuit is connected with the first sub-port, and the first transmitting chip is connected with the second transmitting chip through the first sub-port;
the third end of the first transmitting circuit is connected with one end of the second sub-switch, the other end of the second sub-switch is connected with the fourth end of the first echo cancellation circuit, the fifth end of the first echo cancellation circuit is connected with the second end of the first receiving circuit, the sixth end of the first echo cancellation circuit is connected with the second sub-port, the fourth end of the first transmitting circuit is connected with the second sub-port, and the first transmitting chip is connected with the second transmitting chip through the second sub-port.
7. The detection circuit of claim 5, wherein the second transmit chip comprises a second switching device, a second transmit circuit, a second echo cancellation circuit, a second receive circuit, and a second port; the second transmitting circuit is connected with the second echo cancellation circuit through the second switch device, the second echo cancellation circuit is connected with the second receiving circuit, the second echo cancellation circuit is connected with the second port, the second transmitting circuit is connected with the second port, and the second transmitting chip is connected with the second transmitting chip through the second port.
8. The detection circuit according to claim 7, wherein the second switch device comprises a third sub-switch and a fourth sub-switch, the second port comprises a third sub-port and a fourth sub-port, the circuits in the detection circuit are connected by two paths, the third sub-switch and the third sub-port are in one path, and the fourth sub-switch and the fourth sub-port are in the other path;
the first end of the second transmitting circuit is connected with one end of the third sub-switch, the other end of the third sub-switch is connected with the first end of the second echo cancellation circuit, the second end of the second echo cancellation circuit is connected with the first end of the second receiving circuit, the third end of the second echo cancellation circuit is connected with the third sub-port, the second end of the second transmitting circuit is connected with the third sub-port, and the second transmitting chip is connected with the first transmitting chip through the third sub-port;
the third end of the second transmitting circuit is connected with one end of the fourth sub-switch, the other end of the fourth sub-switch is connected with the fourth end of the second echo cancellation circuit, the fifth end of the second echo cancellation circuit is connected with the second end of the second receiving circuit, the sixth end of the second echo cancellation circuit is connected with the fourth sub-port, the fourth end of the second transmitting circuit is connected with the fourth sub-port, and the second transmitting chip is connected with the first transmitting chip through the fourth sub-port.
9. A computer device comprising a memory and a processor, the memory storing a computer program, characterized in that the processor, when executing the computer program, implements the steps of the method of any of claims 1 to 4.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 4.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210123506.6A CN114172539B (en) | 2022-02-10 | 2022-02-10 | Detection method, detection circuit, computer device and storage medium |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210123506.6A CN114172539B (en) | 2022-02-10 | 2022-02-10 | Detection method, detection circuit, computer device and storage medium |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN114172539A true CN114172539A (en) | 2022-03-11 |
| CN114172539B CN114172539B (en) | 2022-04-19 |
Family
ID=80489590
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210123506.6A Active CN114172539B (en) | 2022-02-10 | 2022-02-10 | Detection method, detection circuit, computer device and storage medium |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114172539B (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337734A (en) * | 2022-03-16 | 2022-04-12 | 北京国科天迅科技有限公司 | Detection circuit, detection method and chip |
| CN115277520A (en) * | 2022-09-29 | 2022-11-01 | 北京国科天迅科技有限公司 | Detection method and detection circuit |
Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6212258B1 (en) * | 1998-11-25 | 2001-04-03 | Westell Technologies, Inc. | Device for remotely testing a twisted pair transmission line |
| CN101127928A (en) * | 2007-09-11 | 2008-02-20 | 电子科技大学 | Method and device for testing network cable failure |
| US7375532B1 (en) * | 2002-06-07 | 2008-05-20 | Marvell International Ltd. | Cable tester |
| CN101487872A (en) * | 2009-02-17 | 2009-07-22 | 徐先 | Network cable test method and device |
| US20130162262A1 (en) * | 2011-06-17 | 2013-06-27 | Darrell J. Johnson | System and Method for Automated Testing of an Electric Cable Harness |
| EP2743712A1 (en) * | 2012-12-11 | 2014-06-18 | Bombardier Transportation GmbH | Testing device and method of testing |
| US9942125B1 (en) * | 2012-09-24 | 2018-04-10 | Aquantia Corp. | High-speed ethernet diagnostic apparatus and method for cross-pair faults |
| CN211579990U (en) * | 2019-12-26 | 2020-09-25 | 苏州裕太微电子有限公司 | Test circuit of vehicle-mounted Ethernet |
-
2022
- 2022-02-10 CN CN202210123506.6A patent/CN114172539B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6212258B1 (en) * | 1998-11-25 | 2001-04-03 | Westell Technologies, Inc. | Device for remotely testing a twisted pair transmission line |
| US7375532B1 (en) * | 2002-06-07 | 2008-05-20 | Marvell International Ltd. | Cable tester |
| CN101127928A (en) * | 2007-09-11 | 2008-02-20 | 电子科技大学 | Method and device for testing network cable failure |
| CN101487872A (en) * | 2009-02-17 | 2009-07-22 | 徐先 | Network cable test method and device |
| US20130162262A1 (en) * | 2011-06-17 | 2013-06-27 | Darrell J. Johnson | System and Method for Automated Testing of an Electric Cable Harness |
| US9942125B1 (en) * | 2012-09-24 | 2018-04-10 | Aquantia Corp. | High-speed ethernet diagnostic apparatus and method for cross-pair faults |
| EP2743712A1 (en) * | 2012-12-11 | 2014-06-18 | Bombardier Transportation GmbH | Testing device and method of testing |
| CN211579990U (en) * | 2019-12-26 | 2020-09-25 | 苏州裕太微电子有限公司 | Test circuit of vehicle-mounted Ethernet |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114337734A (en) * | 2022-03-16 | 2022-04-12 | 北京国科天迅科技有限公司 | Detection circuit, detection method and chip |
| CN114337734B (en) * | 2022-03-16 | 2022-07-29 | 北京国科天迅科技有限公司 | Detection circuit, detection method and chip |
| CN115277520A (en) * | 2022-09-29 | 2022-11-01 | 北京国科天迅科技有限公司 | Detection method and detection circuit |
| CN115277520B (en) * | 2022-09-29 | 2022-12-27 | 北京国科天迅科技有限公司 | Detection method and detection circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN114172539B (en) | 2022-04-19 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN114172539B (en) | Detection method, detection circuit, computer device and storage medium | |
| US4888764A (en) | Transmission-reception equipment for a bus system | |
| US10454527B1 (en) | NBASE-T PHY-to-PHY information exchange method and apparatus | |
| US6965610B2 (en) | System and method for providing compatibility between different transceivers in a multi-pair communication system | |
| US10404560B2 (en) | Disconnection diagnosis | |
| US7653014B2 (en) | Configuring a transmission mode between devices | |
| CN109165184B (en) | 1553B bus system based on double-bus transceiver | |
| CN102318267A (en) | Data communication method, communication equipment and communication system | |
| CN102707696B (en) | Multi-serial-port data transmission method and transmission center system | |
| CN111427824B (en) | Serial port communication circuit | |
| US10592382B2 (en) | Advanced communication computer with dedicated network adaptor processor for sending secure communications across networks | |
| US4881244A (en) | Transmission-reception equipment for a bus system | |
| CN114337734B (en) | Detection circuit, detection method and chip | |
| CN108737673B (en) | Network telephone equipment, external connection card and communication method of network telephone equipment | |
| CN103186248B (en) | Remote management system and remote management method thereof | |
| CN113472593B (en) | Solution method for link instantaneous change caused by clutter in PHY in auto-negotiation mode | |
| CN113009246B (en) | PSE device detection device and PSE device detection method | |
| EP2406720B1 (en) | Method for controlling a data transfer on a serial transmission data transfer bus | |
| CN114337942A (en) | Message retransmission method and device and electronic equipment | |
| KR101396293B1 (en) | High speed serial communication system based on spacewire | |
| EP3245529A1 (en) | Fault tolerant communication system | |
| CN108809719B (en) | Gigabit Ethernet interface interconnection method, communication device and storage medium | |
| CN113868176A (en) | Information encoding method, information transmission method, device, equipment and storage medium | |
| US11853551B2 (en) | Storage system and data reading method thereof | |
| US20240071994A1 (en) | C2c yield and performance optimization in a die stacking platform |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant | ||
| CP03 | Change of name, title or address |
Address after: 701, 7th Floor, Building 6, Courtyard 8, Kegu 1st Street, Beijing Economic and Technological Development Zone, Daxing District, Beijing, 100176 Patentee after: Beijing Tasson Technology Ltd. Address before: Room 701, 7 / F, building 6, courtyard 8, KEGU 1st Street, Beijing Economic and Technological Development Zone, Daxing District, Beijing 100176 Patentee before: BEIJING TASSON TECHNOLOGY Ltd. |
|
| CP03 | Change of name, title or address |