CN114171677A - Dielectric layer for realizing multi-value storage, resistive random access memory, and preparation method and application thereof - Google Patents
Dielectric layer for realizing multi-value storage, resistive random access memory, and preparation method and application thereof Download PDFInfo
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- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/882—Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
- H10N70/8822—Sulfides, e.g. CuS
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Abstract
The invention provides a dielectric layer for realizing multi-value storage, a resistive random access memory, and a preparation method and application thereof, and CuSbS is prepared by2The dielectric material used as the RRAM can present bipolar and nonvolatile resistance change characteristics, and has lower switching voltage and high resistance change-over ratio; simultaneously, the high energy level of the reverse bond orbit formed by the lone pair electrons of the Sb atom and the S3 p is utilized to perform orbital hybridization with the Sb 5p again to form a new charge trapping state, so that the dielectric layer and the resistive random access memory have the multi-value storage performance, the dielectric layer and the resistive random access memory with a novel multi-value storage mechanism different from the prior art are obtained, and CuSbS is obtained2The method is applied to the field of memories in a brand-new way. The resistive random access memory is characterized in that: the dielectric layer adopts CuSbS2A material. The preparation method is characterized in that: using CuSbS2The material forms a dielectric layer. The dielectric layer is characterized in that: using CuSbS2A material.
Description
Technical Field
The invention belongs to the technical field of semiconductor manufacturing, and particularly relates to a dielectric layer for realizing multi-value storage, a resistive random access memory, and a preparation method and application thereof.
Background
A Resistive Random Access Memory (RRAM) receives high importance and extensive research in academic and industrial fields due to its low cost, low energy consumption and excellent data storage characteristics, and the RRAM has a great potential for miniaturization. The purpose of miniaturization of RRAM devices is to obtain high-density memories, and the resistance transition mechanism of RRAM ensures that it can work normally in unit devices with sizes of only a few nanometers, but even if the resistance transition mechanism of RRAM supports the continuous reduction of device dimensions, the improvement of memory density depends on the continuous progress of microelectronic processing technology. However, the progress of current micromachining technologies is facing more and more challenges, and the price to be paid to obtain miniaturized devices is also increasing.
In this case, the multi-valued storage concept provides an effective way for RRAM to equivalently increase storage density: the multi-value storage technology can improve the storage density by storing a plurality of data in a single storage unit in the RRAM, and the technology can multiply the storage density on the premise of not increasing the cost. One of the advantages of the RRAM is its multi-value storage potential compared to magnetic and ferroelectric memories.
Recent research results show that the Quantum Dots (QDs) used as the resistive function layer in the RRAM can show typical bipolar resistive characteristics, and the resistive performance of the device can be accurately controlled by adjusting the thickness of the quantum dot film layer. In the RRAM, due to coulomb blocking and quantum tunneling effects of quantum dots, the quantum dots can realize self-capture of injected electrons, so that the RRAM has resistance change performance; under the influence of quantum size effect, the quantity of trapped electrons is related to the size of quantum dots, so that the resistance change characteristic of the device can be regulated and controlled by controlling the thickness of a quantum dot layer, and the multi-value storage of data is realized.
The RRAM realizes storage of data "0" and "1" by means of resistance transition of a dielectric material under different voltages, and a resistance transition mechanism that can be relied on in a resistive random access memory is as follows: electrochemical metallization mechanisms, valence change mechanisms, thermochemical mechanisms, and electrostatic/electronic mechanisms. There are generally two methods for implementing multi-value storage in RRAM, the first is to obtain multiple resistance values by using two or more resistance switching mechanisms acting simultaneously in the same resistive device. However, it is not easy to have both mechanisms active simultaneously and obtain different resistance states in the same device, and several requirements are usually to be fulfilled: firstly, the low resistance state resistance values obtained by the two conversion mechanisms have to be different and can be observed; secondly, the mechanism with higher resistance value in low resistance state must have relatively smaller writing voltage, or the mechanism with lower resistance value in low resistance state must have relatively smaller erasing voltage, and the resistance transformation phenomena caused by the two mechanisms can be separated and not be covered. The other is to obtain different resistance values by controlling the transition voltage or the current limiting value in the resistance transition process to obtain conductive filaments with different sizes, but in this way, the RRAM has a very large memory window (usually more than 100 times required) to obtain multi-value storage of data by finely controlling the size or length of the conductive filament, which is technically difficult and can only be applied to conductive filament type resistive switching devices.
Although the multi-valued storage of data can be achieved in the RRAM using the above two methods, as the device size is further reduced to a size of several nanometers, the limitations of the above two methods, which are difficult to avoid by themselves, limit further commercial applications of the RRAM. Therefore, a new method for realizing data multi-value storage must be found to adapt to the further development of RRAM.
Disclosure of Invention
The present invention is made to solve the above problems, and an object of the present invention is to provide a dielectric layer and a resistive random access memory for realizing multi-value storage (having a multi-value storage effect), and a method for manufacturing the same, and an application thereof.
In order to achieve the purpose, the invention adopts the following scheme:
< resistive random Access memory >
The invention provides a resistive random access memory for realizing multi-value storage, which is characterized in that: the dielectric layer adopts CuSbS2A material.
Preferably, the resistive random access memory for implementing multi-value storage provided by the invention is characterized in that: CuSbS2The material is CuSbS2At least one of the bulk material, nanosheet, nanowire, nanocrystal, and quantum dot.
Preferably, the resistive random access memory for implementing multi-value storage provided by the invention is characterized in that: a dielectric layer is positioned between the bottom electrode and the top electrode.
< preparation method >
Furthermore, the invention also provides the above<Resistive random access memory>The preparation method is characterized by comprising the following steps: using CuSbS2The material forms a dielectric layer.
Preferably, the preparation method of the high-temperature high-emissivity heat dissipation coating provided by the invention specifically comprises the following steps: step 1, preparing a bottom electrode on a substrate; step 2, CuSbS2The CuSbS is prepared by adopting a hot injection method, a hydrothermal method or magnetron sputtering as a dielectric material to form CuSbS2A dielectric layer; step 3. in CuSbS2And preparing a top electrode on the upper surface of the dielectric layer.
< dielectric layer >
Furthermore, the invention also provides a dielectric layer of the resistive random access memory, which is characterized in that: using CuSbS2A material.
Preferably, the present inventionThe dielectric layer of the resistive random access memory is characterized in that: CuSbS2The material is CuSbS2At least one of the bulk material, nanosheet, nanowire, nanocrystal, and quantum dot.
< application >
In addition, the invention also provides CuSbS2The material is applied to a resistive random access memory as a dielectric layer material.
Action and Effect of the invention
Compared with the resistive random access memory with the multi-value storage effect in the prior art, the resistive random access memory provided by the invention is focused on regulating and controlling the dielectric material of the memory, and a brand-new mode for realizing the multi-value storage of data different from the prior art is found by utilizing the diversity of the material and the unique electron ion coupling characteristic: copper antimony sulfide (CuSbS)2) Belongs to ternary sulfide, has the advantages of optimal optical band gap of 1.4-1.6eV, high light absorption coefficient, p-type conductivity, high abundance in nature, no toxic elements and the like, and the CuSbS is prepared by the method2The dielectric material is used as a dielectric material of RRAM, and is found to have bipolar and nonvolatile resistance change characteristics, and lower switching voltage and high resistance change switching ratio; meanwhile, the high energy level of the reverse bond orbit formed by the lone pair electrons of the Sb atom and the S3 p is utilized to perform orbital hybridization with the Sb 5p again to form a new charge trapping state, so that the dielectric layer and the resistive random access memory have the multi-value storage performance, and CuSbS is obtained2The method is applied to the field of memories in a brand-new way.
Drawings
Fig. 1 is a schematic structural diagram of a resistive random access memory for implementing multi-value storage in an embodiment of the present invention, wherein the resistive random access memory includes a 10-resistive random access memory, an 11-substrate, a 12-bottom electrode, a 13-dielectric layer, and a 14-top electrode;
FIG. 2 is a CuSbs for implementing multi-valued storage in an embodiment of the present invention2A schematic of the crystal structure of (a);
fig. 3 is a resistance change curve diagram of the resistive random access memory for implementing multi-valued storage according to the embodiment of the present invention;
fig. 4 is a graph of repeated read endurance of a resistance change memory implementing multi-value storage in an embodiment of the present invention;
fig. 5 is a time stability graph of a resistive random access memory implementing multi-value storage in an embodiment of the present invention;
FIG. 6 shows a comparative example of the present invention in which the dielectric layer is Cu3SbS4A resistance change curve graph of the resistance change memory;
FIG. 7 shows a comparative example of the present invention in which the dielectric layer is Cu12Sb4S13The resistance change curve graph of the resistance change memory.
Detailed Description
The following detailed description of specific embodiments of the invention refers to the accompanying drawings. Unless otherwise indicated, the raw materials and reagents used in the following examples are all commercially available products or can be prepared by known methods.
< example >
As shown in fig. 1, the resistive random access memory 10 for implementing multi-value storage provided in this embodiment includes a substrate 11, a bottom electrode 12, a dielectric layer 13, and a top electrode 14, which are sequentially disposed from bottom to top. Wherein the substrate 11 is a glass substrate, the bottom electrode 12 is an ITO film, and the dielectric layer 13 is a copper antimony sulfur quantum dot (CuSbS)2QDs) dielectric material and the top electrode 14 is an Au electrode.
The preparation method comprises the following steps:
(1) selecting glass as a substrate 11, and depositing ITO on the surface of the substrate 11 by a magnetron sputtering method to form a bottom electrode 12; the sputtering power is 100W, and the distance between the substrate and the target is 100 mm; sputtering atmosphere Ar/O is 45: 1; the sputtering pressure is 0.4 Pa; the sputtering temperature is 200 ℃, and the annealing process is 650 ℃ and the temperature is kept for 30 min.
(2) CuSbS prepared by adopting two-step method2QDs: in a first step, 1.5mmol of sulfur powder (CDH, 99.9%) and thioacetamide (TA, 99%) are added to 2ml of oleylamine (OLA, 90%), heated to 50 ℃ under a nitrogen atmosphere and kept warm until all CDH and TA are dissolved in oleylamine, which takes about 20-30min, and in a second step, 0.5mmol of copper acetate ((CH, 99%) is added3COO)2Cu·H2O, 99%), 0.5mmol of antimony trichloride (SbCl)399%) and 6ml of OLA were added to a three-necked flask, stirred and degassed at room temperature for 20-30min, and the mixed system was heated to 190 ℃ under a nitrogen atmosphere, and finally the CDH-OL prepared in the first step was addedAdding the solution A into a three-neck flask, heating the mixed system to 200 ℃, keeping the temperature for 45min, cooling to room temperature after the reaction is finished, and preparing CuSbS by adopting a thermal injection method2QDs. 275mg of cuprous iodide (CuI, 99%) was first weighed into a three-necked flask and mounted on a heating mantle. Filling quartz sand for heat preservation to ensure that the three-neck flask is heated uniformly. OLA was selected as the reaction solvent, 30mL of oleylamine (OLA, 80-90%) was measured and added to a three-necked flask and gradually warmed to a reaction temperature of 150 ℃ under an argon atmosphere and held for 10 minutes. 342mg of antimony trichloride (SbCl) were then added399%) was added to the reaction mixture and stirred continuously for 3 minutes. In another reagent bottle, 1026mgN, N-diphenylthiourea (C) is weighed13H12N2S, 98%) to 2.25mL diphenyl ether (C)12H10O，>99%) was heated to 90 ℃ until dissolved. Using a quartz syringe to mix C13H12N2S-C12H10The O solution was quickly injected into the OLA and incubated for 300 s. After completion of the reaction, the resulting solution was rapidly cooled to room temperature. Performing, washing and centrifuging processes to obtain purified CuSbs2QDs, dispersed in hexane and stored in a nitrogen glove box. The CuSbS obtained2The structure of QDs is shown in FIG. 2.
(3) Mixing the prepared CuSbS2The QDs precursor solution was spin coated on the ITO/Glass substrate to form dielectric layer 13.
(4) Finally, through a magnetron sputtering method, in CuSbs2Au is deposited on the surfaces of QDs to form Au top electrodes 14. The purity of the top electrode 14 is 99.99%, and the sputtering parameters are respectively as follows: the sputtering power is 100W substrate to target distance 100 mm; the sputtering atmosphere is Ar; sputtering air pressure is 0 Pa; the sputtering temperature was room temperature.
And (3) performance characterization:
the resistance change curve and the cycle stability of the prepared resistive random access memory 10 are tested.
FIG. 3 shows CuSbs2The I-V curve of QDs, as can be seen from the figure: in a non-applied voltage (or low voltage) state, CuSbs2QDs device Current is 10-8～10-6In the A range, the device is in the High Resistance State (HRS), tableExhibiting high insulation, this is called the OFF state. The current value increases as the voltage increases slowly from 0V (process 1), and when the reverse voltage increases to-0.83V, the current increases from 10-6A rapidly increases to around 10-4A left and right (process 2), which is referred to as the ON state, when the Voltage (-0.83V) is referred to as the RRAM write Voltage (SET Voltage), when the device transitions from HRS to an Intermediate resistance state (process 3), indicating CuSbs2QDs have the capability of multivalue storage; further increasing the applied voltage to-1.28V and the device current to 10-2～10-1In the a range, the device enters a low resistance state (LRS, process 4), and further voltage is applied, the device in the LRS state shows good stability in either negative voltage sweep (process 5, 6) or positive voltage sweep (process 7, 8). Subsequently, the scanning voltage is gradually decreased from the high voltage applied in the forward direction, and the current is about 10 to about 1.28V-2A suddenly decreases to 10-4A (process 9), at which point the device again transitions from the LRS to an intermediate resistive state (process 10), visible as CuSbs2The intermediate resistance state of QDs can exist stably during writing and erasing of the device, at which time the Voltage (1.28V) is referred to as the RESET Voltage. When the applied voltage value is continuously reduced to be about 0.83V, the current is from 10-4A rapidly decreases to around 10-6A left and right (process 11), the device enters a High Resistance State (HRS), i.e., an OFF state.
Fig. 4 and 5 are graphs showing the repeated read endurance and the time stability of the resistance change memory 10, respectively. The device is subjected to durability test by alternately applying positive and negative voltages by using rectangular pulse waves, and the writing voltage pulse and the erasing voltage pulse are respectively-0.1V/1 ms and 0.1V/1 ms. It can be seen that at pass 105The memory window of the device remains at 10 after the next repeated erase and write4And the data storage state has no obvious change, which indicates that the device has good data writing and reading characteristics. The device is continuously operated at 1.4 × 10 by using-0.1V as a reading voltage7The degradation rate of the resistance change performance after s is less than 0.01 percent, and the on/off ratio is still stably kept at 104In the above, the device has good storage stability. Durability in repeated readingIn the sex and time stability test, CuSbs2The intermediate resistance state of QDs is always stable, which shows that the multivalued memory state is not assisted by CuSbs2The metastable state of the QDs is stored, and the intermediate storage process can stably exist in the resistive random access memory, so that a new mode for realizing multi-value storage is provided for the resistive random access memory.
< comparative example >
CuSbS is contained in a Cu-Sb-S ternary system2、Cu3SbS4And Cu12Sb4S13Three phases, we have also explored Cu3SbS4And Cu12Sb4S13Whether the two phases have the property of multivalue storage.
Preparation of Cu by thermal injection3SbS4And Cu12Sb4S13And (4) quantum dots.
Cu12Sb4S13The preparation process of the quantum dot comprises the following steps: 285.6mg of cuprous iodide (CuI, 99%) was first weighed into a three-neck flask and mounted on a heating mantle. Filling quartz sand for heat preservation to ensure that the three-neck flask is heated uniformly. Oleylamine (OLA) was selected as a reaction solvent, 30mL of OLA was measured and added to a three-necked flask and gradually heated to reaction temperatures (110 deg.C, 130 deg.C and 150 deg.C, respectively) under an argon atmosphere and held for 10 minutes. 114mg of antimony trichloride (SbCl) were then added399%) was added to the reaction mixture and stirred continuously for 3 minutes. In another reagent bottle, 513.70mgN, N-diphenylthiourea (C) was weighed13H12N2S, 98%) to 2.25mL diphenyl ether (C)12H10O，>99%) was heated to 90 ℃ until dissolved. Using a quartz syringe to mix C13H12N2S-C12H10The O solution was quickly injected into the OLA and incubated for 300 s. After completion of the reaction, the resulting solution was rapidly cooled to room temperature. Washing and centrifuging to obtain purified Cu12Sb4S13QDs, dispersed in hexane and stored in a nitrogen glove box.
In contrast to Cu12Sb4S13Quantum dots, Cu3SbS4The quantum dots were prepared as 285.6mg of CuI, 114mg of SbCl3And 1140mg of C13H12N2S carrying out original feeding, other preparation processes and the Cu12Sb4S13The same is true.
Cu3SbS4And Cu12Sb4S13The resistance change curves of the quantum dots are shown in FIGS. 6 and 7, and Cu can be seen3SbS4And Cu12Sb4S13The resistance change curve of the quantum dot has no middle resistance state process, and shows that Cu3SbS4And Cu12Sb4S13Quantum dots do not have the capability of multi-value storage.
Analysis of three phases (CuSbS) of Cu-Sb-S2、Cu3SbS4And Cu12Sb4S13) CuSbS only2Reason for having multivalued memory property: we found CuSbS2Having multivalued memory properties determined by its own crystal structure, in CuSbs2In the unique two-dimensional layered structure, the lone-pair electrons of the Sb atom have higher energy with the anti-bonding orbit formed by the S3 p orbit, the energy can be hybridized with the Sb 5p orbit again, the formed new orbit can provide a new trapping state for the charges, namely an intermediate resistance state shown in a resistance change curve, and the Cu3SbS4And Cu12Sb4S13Do not have such a crystal structure, so they do not have the property of multivalue storage.
The above embodiments are merely illustrative of the technical solutions of the present invention. The dielectric layer, the resistive random access memory, and the manufacturing method and application thereof for realizing multi-value storage according to the present invention are not limited to the contents described in the above embodiments, but are subject to the scope defined by the claims. Any modification or supplement or equivalent replacement made by a person skilled in the art on the basis of this embodiment is within the scope of the invention as claimed in the claims.
Claims (8)
1. The resistive random access memory for realizing multi-value storage is characterized in that:
the dielectric layer adopts CuSbS2A material.
2. The resistive random access memory realizing multivalue storage according to claim 1, characterized in that:
wherein the CuSbS2The material is CuSbS2At least one of the bulk material, nanosheet, nanowire, nanocrystal, and quantum dot.
3. The resistive random access memory realizing multivalue storage according to claim 1, characterized in that:
wherein the dielectric layer is positioned between the bottom electrode and the top electrode.
4. The method for manufacturing a resistive random access memory realizing multi-value storage according to any one of claims 1 to 3, characterized in that:
using CuSbS2The material forms a dielectric layer.
5. The method for preparing the resistive random access memory for realizing the multi-value storage is characterized by comprising the following steps of:
step 1, preparing a bottom electrode on a substrate;
step 2, CuSbS2The CuSbS is prepared by adopting a hot injection method, a hydrothermal method or magnetron sputtering as a dielectric material to form CuSbS2A dielectric layer;
step 3. in CuSbS2And preparing a top electrode on the upper surface of the dielectric layer.
6. The dielectric layer of the resistive random access memory is characterized in that:
using CuSbS2A material.
7. The dielectric layer of the resistive random access memory according to claim 6, wherein:
wherein the CuSbS2The material is CuSbS2A bulk material, a nanosheet, a nanowire, a nanocrystal andat least one of quantum dots.
8.CuSbS2The material is applied to a resistive random access memory as a dielectric layer material.
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