CN114157339A - Star affair computer and satellite system - Google Patents
Star affair computer and satellite system Download PDFInfo
- Publication number
- CN114157339A CN114157339A CN202111322879.8A CN202111322879A CN114157339A CN 114157339 A CN114157339 A CN 114157339A CN 202111322879 A CN202111322879 A CN 202111322879A CN 114157339 A CN114157339 A CN 114157339A
- Authority
- CN
- China
- Prior art keywords
- jtag
- interface
- unit
- main control
- module
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims abstract description 38
- 230000002708 enhancing effect Effects 0.000 claims abstract description 5
- 238000013461 design Methods 0.000 claims description 18
- 230000009977 dual effect Effects 0.000 claims description 3
- 238000001914 filtration Methods 0.000 claims description 3
- 230000002452 interceptive effect Effects 0.000 claims description 2
- 150000002500 ions Chemical class 0.000 abstract description 7
- 230000005611 electricity Effects 0.000 abstract description 5
- 230000005855 radiation Effects 0.000 abstract description 5
- 230000003068 static effect Effects 0.000 abstract description 5
- 230000008054 signal transmission Effects 0.000 abstract description 4
- 238000004891 communication Methods 0.000 description 11
- 238000010586 diagram Methods 0.000 description 10
- 108091092878 Microsatellite Proteins 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 238000012545 processing Methods 0.000 description 6
- 230000005540 biological transmission Effects 0.000 description 4
- 238000005259 measurement Methods 0.000 description 4
- 230000008569 process Effects 0.000 description 4
- 239000013078 crystal Substances 0.000 description 3
- 238000011161 development Methods 0.000 description 3
- 230000002093 peripheral effect Effects 0.000 description 3
- 238000012360 testing method Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 238000012544 monitoring process Methods 0.000 description 2
- 210000004556 brain Anatomy 0.000 description 1
- 239000002360 explosive Substances 0.000 description 1
- 230000036039 immunity Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 230000003993 interaction Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B7/00—Radio transmission systems, i.e. using radiation field
- H04B7/14—Relay systems
- H04B7/15—Active relay systems
- H04B7/185—Space-based or airborne stations; Stations for satellite systems
- H04B7/1851—Systems using a satellite or space-based relay
- H04B7/18519—Operations control, administration or maintenance
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Astronomy & Astrophysics (AREA)
- Aviation & Aerospace Engineering (AREA)
- General Physics & Mathematics (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Power Sources (AREA)
Abstract
The invention relates to a satellite computer and a satellite system, which comprise a host, wherein the host comprises a power supply conversion module, a main control module and an interface module; the power supply conversion module is used for power supply protection and power supply conversion so as to stably supply power to the main control module and the interface module; the main control module comprises a main control chip; the interface module comprises a JTAG enhanced driving unit; the JTAG enhanced driving unit is connected with a JTAG interface of the main control chip and is used for enhancing the signal intensity of JTAG signals. By arranging the JTAG enhancement driving unit, the invention can weaken the influence of ground static electricity, on-satellite radiation and single ions on the JTAG interface of the main control chip, simultaneously improve the stability of JTAG signal transmission, improve the reliability of a satellite system and improve the product competitiveness.
Description
Technical Field
The invention relates to the technical field of satellites, in particular to a satellite computer and a satellite system.
Background
Aerospace commercialization has shown an explosive trend of development worldwide. A large number of commercial satellites are developed and transmitted, most of the commercial satellites are microsatellites with the weight of less than 100 kilograms, and the field of communication, remote sensing, technical tests and the like is covered. The development period of the microsatellite is short, and the requirements on quality and reliability of the microsatellite are much looser than those of the microsatellite in the whole period development process of satellite products. Under the condition of irradiation of the space environment, the design life of the microsatellite is usually 1 year.
The star computer is used as the brain for controlling satellite communication and is the core part of the satellite electronic system. The house service computer mainly completes the management tasks of each subsystem and each stand-alone machine on the satellite. Due to the limitations of weight, size and power consumption, the spaceborne computer needs to be highly integrated, simplify the hardware system, and have high reliability and flexibility, which is an important support for realizing platform functions and completing satellite payload tasks.
The ground test interface of the traditional house keeping computer reserves the remote control and remote measurement functions of the information on the house and the JTAG debugging function of the main control of the house keeping computer through the 422 bus or other communication bus modes. But it is only directed to its own individual outlet. Once the whole satellite is synthesized and covered, if software updating operation is still required to be carried out on each single machine in the satellite, the cover of the satellite needs to be removed, rework is caused, and the cost on the progress and the quality is heavy. Applicants have discovered that while some low-orbit commercial satellites have chosen to bring the ground test interface directly to the star catalogue, they are still limited by the reliability of the interface, and by the signal integrity problems associated with extra long cables within the star. For example, JTAG key signals comprise TMS, TCK, TDO, TDI, NTRST, VCC and GND at least 6 TTL or CMOS single-ended signals, and firstly, after long-distance transmission through a cable of 4-10m in a satellite, the signals are seriously distorted, and the JTAG function cannot be started; secondly, because different JTAG interface levels are inconsistent, if the JTAG downloader with unmatched level is misused, the risk of burning the single-machine main control chip exists.
Disclosure of Invention
In view of this, the present invention provides a satellite computer and a satellite system, which can weaken the influence of ground static electricity, on-satellite radiation and single ions on the JTAG interface of the main control chip, improve the stability of JTAG signal transmission, improve the reliability of the satellite system, and improve the product competitiveness.
In order to achieve the above object, an embodiment of the present invention provides a house keeping computer, as one implementation manner, where the house keeping computer includes a host, and the host includes a power conversion module, a main control module, and an interface module; wherein,
the power supply conversion module is used for power supply protection and power supply conversion so as to stably supply power to the main control module and the interface module;
the main control module comprises a main control chip;
the interface module comprises a JTAG enhanced driving unit;
the JTAG enhanced driving unit is connected with a JTAG interface of the main control chip and is used for enhancing the signal intensity of JTAG signals.
In one embodiment, the JTAG enhanced driver unit further includes a power selection circuit, and the power selection circuit is configured to selectively adapt a level of an external JTAG downloader.
In one embodiment, the house keeping computer further includes a first shielded connector, which is connected to the JTAG enhanced driver unit and is used for shielding interference signals inside the satellite system when transmitting JTAG signals.
In one embodiment, the JTAG enhanced driver unit is further configured to transparently transmit remote control signals and telemetry signals of the star computer.
As one embodiment, the power conversion module includes: an electronic fuse circuit, an EMI filter, and a DC/DC switching circuit, the electronic fuse circuit being connected to the DC/DC switching circuit through the EMI filter; wherein,
the electronic fuse circuit is used for power protection;
the EMI filter is used for filtering signals;
the DC/DC switching circuit is used for power conversion.
In one embodiment, the model of the main control chip is Smartfusion2 series SOC; the main control module also comprises a storage unit, a clock unit and a watchdog unit, and the storage unit, the clock unit and the watchdog unit are respectively connected with the main control chip; wherein,
the storage unit comprises FLASH, SRAM and DDR.
As one of the embodiments, the interface module further includes an interface level conversion unit and an interface unit, and the interface level conversion unit is connected to the interface unit; wherein,
the interface unit includes: RS422 receiving and dispatching interface, OC instruction output interface and CAN interface, all kinds of interfaces all adopt the design of activestandby dual fail-safe.
As one implementation mode, the star computer further comprises at least one spare machine, the structure of the spare machine is the same as that of the main machine, and a multi-mode redundancy design is formed.
Based on the same inventive concept, an embodiment of the present invention further provides a satellite system, where the satellite system includes the satellite computer described in any of the above embodiments.
In one embodiment, the satellite system further includes a second shielded connector connected to the satellite computer for shielding the interference signal outside the satellite system when transmitting the JTAG signal.
To sum up, the satellite computer and the satellite system provided by the embodiment of the invention comprise a host, wherein the host comprises a power conversion module, a main control module and an interface module; the power supply conversion module is used for power supply protection and power supply conversion so as to stably supply power to the main control module and the interface module; the main control module comprises a main control chip; the interface module comprises a JTAG enhanced driving unit; the JTAG enhanced driving unit is connected with a JTAG interface of the main control chip and is used for enhancing the signal intensity of JTAG signals. By arranging the JTAG enhancement driving unit, the invention can weaken the influence of ground static electricity, on-satellite radiation and single ions on the JTAG interface of the main control chip, simultaneously improve the stability of JTAG signal transmission, improve the reliability of a satellite system and improve the product competitiveness.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention.
Fig. 1 is a block diagram of a star computer according to an embodiment of the present invention.
Fig. 2 is a schematic structural diagram of a JTAG enhanced driver unit according to an embodiment of the present invention.
Fig. 3 is a schematic structural diagram of a star computer according to an embodiment of the present invention.
Fig. 4 is a schematic structural diagram of a GNSS module according to an embodiment of the present invention.
Fig. 5 is a schematic structural diagram of a satellite system according to an embodiment of the present invention.
Detailed Description
In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention. It is to be understood that the described embodiments are merely exemplary of a portion of the invention and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments of the present invention without inventive step, shall fall within the scope of protection of the present invention.
It should be noted that the terms "first," "second," and the like in the description, the claims, and the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
As used herein, an element, port, component or section "connected" to another element, port, component or section may be understood as a direct electrical connection, or may be understood as an indirect electrical connection with an intervening element. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used herein in the description of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention.
Referring to fig. 1, fig. 1 is a block diagram of a star computer according to an embodiment of the present invention. As shown in fig. 1, the star computer includes a host 10, the host 10 includes a power conversion module 11, a main control module 12 and an interface module 13; the power conversion module 11 is used for power protection and power conversion so as to stably supply power to the main control module 12 and the interface module 13; a main control module 12 including a main control chip 120; an interface module 13 including a JTAG enhanced driver unit 130; the JTAG enhanced driver unit 130 is connected to the JTAG interface of the main control chip 120, and is configured to enhance the signal strength of the JTAG signal.
Specifically, the power conversion module 11 receives a primary power bus voltage input by the satellite power board, and converts the primary power bus voltage into a voltage required by the main control module 12 and the interface module 13, for example, 1.2V, 1.8V, 2.5V, 3.3V, and 5V. The main control module 12 is the core of the satellite computer and is responsible for processing and arranging all commands on the satellite system. The interface module 13 provides various interface types to realize communication and data interaction with various subsystems and loads on the satellite. The main control module 12 includes a main control chip 120, the interface module 13 includes a JTAG enhanced driver unit 130, and the JTAG enhanced driver unit 130 is connected to a JTAG interface of the main control chip 120, and is configured to enhance signal strength of a JTAG signal input to the JTAG interface. When the JTAG interface of the main control chip 120 is led out to the star catalogue (i.e. the surface of the satellite system) so as to facilitate the implementation of the JTAG debugging function after the whole star is synthesized and the cover is closed, the extra-long cable in the star may cause the signal integrity problem. For example, JTAG-like key signals include at least 6 TTL or CMOS single-ended signals including TMS, TCK, TDO, TDI, NTRST, VCC, and GND, and after long-distance transmission through a 4-10m cable inside a satellite, the signals are severely distorted, and the JTAG function cannot be enabled. In this embodiment, the added primary driving unit can improve the stability of JTAG signals, and after the JTAG enhanced driving unit 130 is added, the JTAG interface of the satellite computer main control chip 120 inside the satellite is not directly exposed, which also weakens the influence of ground static electricity, satellite irradiation, and single ion on it.
Referring to fig. 2, fig. 2 is a schematic structural diagram of a JTAG enhanced driver unit 130 according to an embodiment of the present invention. As shown in fig. 2, the JTAG enhanced driver unit 130 further includes a power selection circuit for selectively adapting the level of an external JTAG downloader.
Specifically, the JTAG enhanced driver unit 130 includes a JTAG driver circuit and a power supply selection circuit, the JTAG driver circuit is configured to enhance the signal strength of the JTAG signal input to the JTAG interface, and the power supply selection circuit of the JTAG enhanced driver unit 130, that is, the external interface VCC power supply selection terminal, can fully adapt to different levels of the external JTAG downloader, for example, 1.8V, 2.5V, and 3.3V, so as to eliminate the risk of damaging the main control chip 120 due to wrong selection of the JTAG downloader with different voltages.
In one embodiment, JTAG enhanced driver unit 130 is also used for transparent transmission of telemetry and remote control signals for a star computer.
Referring to fig. 3, fig. 3 is a schematic structural diagram of a star computer according to an embodiment of the present invention. As shown in fig. 3, in one embodiment, the power conversion module 11 includes: the electronic fuse circuit is connected with the DC/DC switch circuit through the EMI filter. The electronic fuse circuit is used for power protection, the EMI filter is used for signal filtering, and the DC/DC switch circuit is used for power conversion.
Specifically, the power conversion module 11 of the present embodiment uses an integrated electronic fuse circuit for power protection. For example, an integrated electronic fuse chip TPS25944 is used, and the device body area is only 4mm × 3 mm. A peripheral circuit built by using the TPS25944 chip has the functions of overcurrent fusing, current limiting, current monitoring, overvoltage protection, undervoltage protection, output voltage slow start and the like. The power conversion module 11 receives the primary power bus voltage input by the satellite energy board, and after passing through the current limiting, surge eliminating and EMI filter, the primary power bus voltage is converted into the voltage required by the main control module 12 and the interface module 13, such as 1.2V, 1.8V, 2.5V, 3.3V and 5V, through the switching power supply DC/DC. The required voltage can also be provided to the analog part by the linear power supply LDO. The electronic fuse circuit is applied in the power conversion module 11 of this embodiment, which can set the threshold values for undervoltage, overvoltage, overcurrent, dVo/Dt slow start slope, power normality and inrush current protection, and also provide an accurate current monitoring output function. A first-stage EMI filter is added between the EFUSE circuit and the DC/DC circuit, so that the interference of the satellite bus voltage on each subsystem can be effectively filtered, and the power supply interference on each subsystem is prevented from reversely influencing the satellite bus voltage. And considering from the area of the hardware PCB printed board, compared with the design of the traditional satellite system, the traditional satellite system realizes the same functions, and the area of the PCB is about 60mm multiplied by 20 mm. After the electronic fuse circuit is used, the area is reduced by more than 90%, and the cost is greatly reduced.
In one embodiment, the main control chip 120 has a model number Smartfusion2 series SOC; the main control module 12 further includes a storage unit, a clock unit and a watchdog unit, and the storage unit, the clock unit and the watchdog unit are respectively connected to the main control chip 120; the storage unit comprises FLASH, SRAM and DDR.
Specifically, in the present embodiment, the main control chip 120 of the star computer is a Smartfusion2 series SOC of industrial-grade Microsemi. Smartfusion2 series SOC has the characteristics of low power consumption, high performance, abundant logic resources and the like, and is relatively low in price and easy to obtain. The chip integrates a system-level FPGA, a 166MHzARMCortex-M3 processor, a safety processing accelerator, a DSP module, an SRAM, an eNMM and a high-performance communication interface, integrates a high-speed multiplier on the basis of common peripherals such as SRAM, PLL and the like, has peripheral interfaces such as DDR2/3, CAN, USB, gigabit Ethernet and the like, and CAN meet the requirements of a comprehensive electronic external interface. As an industrial device, the single ion locking indicator SEL is more than or equal to 22.5MeV-cm2/mg, and the single ion locking indicator SEL can effectively cope with a complex irradiation environment in an aerospace environment. And as a FLASH type SOC, the self-body has certain immunity to the radiation of the aerospace environment. In order to achieve a more reliable design target, a watchdog unit is additionally designed to monitor the running state of the main control chip 120 of the housekeeping computer, for example, a MAX706 military-temperature-level chip is selected, after a program runs abnormally, the high-level watchdog unit cannot receive a dog feeding signal sent by the main control chip 120, the watchdog unit can be bitten by a dog, and the main control unit of the housekeeping computer is automatically reset and reloaded with the program in time.
Referring to fig. 3 and 4 in combination, fig. 4 is a schematic structural diagram of a GNSS module according to an embodiment of the invention. As shown IN fig. 3 and 4, the main control module 12 further includes a GNSS module, the GNSS module is connected to the main control chip 120, and the GNSS module includes a radio frequency input interface RF _ IN, a power input interface VCC, serial communication interfaces TXD and RXD (TXD1, RXD1, TXD2, RXD2), a RESET signal interface RESET, and a pulse per second interface PPS.
Specifically, the GNSS module includes a pre-radio frequency processing unit, a baseband platform, a temperature compensation crystal oscillator unit, and a power supply unit, the power supply unit supplies power to the pre-radio frequency processing unit, the baseband platform, and the temperature compensation crystal oscillator unit, and the pre-radio frequency processing unit and the temperature compensation crystal oscillator unit are connected to the baseband platform. The GNSS module is externally provided with a radio frequency input interface RF _ IN, a power supply input interface VCC, serial communication interfaces TXD and RXD (TXD1, RXD1, TXD2 and RXD2, a serial communication interface backup design), a RESET signal interface RESET and a pulse per second signal interface PPS. The GNSS module of this embodiment is ASIC chip module, for the design of industry universalization, can pin to pin normal position replacement be with frequency point, the module that the function is similar, and it is convenient to guarantee in the at utmost that the GNSS module maintains. By using the GNSS module, the radio frequency input interface RF _ IN can be directly connected to a satellite navigation line, the module can complete down-conversion, AGC, VGA, AD conversion and other processing of signals, and complete real-time acquisition, tracking and positioning calculation of 12-channel GPS L1CA code navigation signals and 12-channel BD B1C code navigation signals, and finally data positioning data and time information are output through a serial port, and 1PPS time synchronization signals are output. By using the GNSS module, the area and the weight are greatly reduced.
In an embodiment, the interface module 13 further includes an interface level conversion unit and an interface unit, where the interface level conversion unit is connected to the interface unit; wherein, the interface unit includes: RS422 receiving and dispatching interface, OC instruction output interface and CAN interface, all kinds of interfaces all adopt the design of activestandby dual fail-safe.
Specifically, the main control chip 120 performs interface management, the interface level conversion unit is configured to perform interface level conversion, the interface unit includes an RS422 transceiver interface (RS422TX RS422RX), an OC instruction output interface, a CAN interface, and the like, and all connection extensions are cold and hot backup designs. For example, when a problem occurs in the primary CAN interface of the host 10, the system automatically switches to the backup CAN interface of the host 10.
In one embodiment, the star computer further comprises at least one spare machine 20, and the structure of the spare machine 20 is the same as that of the main machine 10, and a multi-mode redundancy design is formed.
Referring to fig. 3, in an embodiment, the star computer further includes a first shielded connector 30, and the first shielded connector 30 is connected to the JTAG enhanced driver unit 130 for shielding the interference signal inside the satellite system when transmitting the JTAG signal.
Specifically, in order to meet the requirement of high reliability, the embodiment performs a main backup multi-mode redundancy design on the hardware level of the star computer. The hardware is divided into a host computer 10 and a standby computer 20 with the same functions, and only the host computer 10 works in a normal working state. The ground measurement and control station can monitor the state of the satellite affair computer in real time, and once the program of the satellite affair computer is abnormally operated and the watchdog unit cannot realize the reset condition, the ground measurement and control station can send a cutter command to switch the satellite affair computer to the standby computer 20 so as to continuously complete various functions of the satellite affair computer. The primary and standby design of the interfaces and the design of the host computer 10 and the standby computer 20 CAN better ensure the stability of the star computer, for example, when the main CAN interface of the host computer 10 has a problem, the system CAN automatically switch to the backup CAN interface of the host computer 10. If and only if both CAN interfaces of the host 10 fail, the system cannot complete communication with each load. The satellite ground remote station can not receive the instruction, and can actively upload the switching-off instruction of the main machine 20 and the standby machine 20 of the satellite computer, and switch to the standby machine 20. The backup device 20 has the same software and hardware architecture as the host device 10, continues to use the main CAN interface of the backup device 20 for communication, and switches to the backup CAN interface after failure. The 422 interface and the OC output interface are in the same reason and are in double insurance design, so that the stability of the satellite service platform is ensured.
In one embodiment, the house keeping computer is designed in a standard card-type stack design and is designed in a local shielding cavity isolation design.
Specifically, in this embodiment, a hardware circuit of the satellite computer is designed by stacking standard boards in a card manner, and a sensitive circuit on a single board is designed by isolating a local shielding cavity, so that the mechanical requirement of the microsatellite is ensured, and a higher EMC index of the microsatellite is also ensured.
Referring to fig. 5, fig. 5 is a schematic structural diagram of a satellite system according to an embodiment of the invention. As shown in fig. 5, based on the same inventive concept, an embodiment of the present invention further provides a satellite system, where the satellite system includes the star computer in any of the above embodiments.
Specifically, the satellite system includes the satellite computer of any of the above embodiments, and further includes an attitude control unit, a measurement and transmission unit, a load unit, and the like, and the satellite computer is in communication connection with each unit through the interface module 13.
In one embodiment, the satellite system further comprises a second shielded connector 40, the second shielded connector 40 being connected to the star computer for shielding interfering signals external to the satellite system while transmitting JTAG signals.
Specifically, the second shielded connector 40 and the first shielded connector 30 lead out the JTAG interface of the main control chip 120 to the star catalogue of the satellite system, and shield interference of other signals outside the satellite system and inside the satellite system in the process of transmitting JTAG signals, thereby further improving reliability of the satellite system.
To sum up, the satellite computer and the satellite system provided by the embodiment of the invention comprise a host, wherein the host comprises a power conversion module, a main control module and an interface module; the power supply conversion module is used for power supply protection and power supply conversion so as to stably supply power to the main control module and the interface module; the main control module comprises a main control chip; the interface module comprises a JTAG enhanced driving unit; the JTAG enhanced driving unit is connected with a JTAG interface of the main control chip and is used for enhancing the signal intensity of JTAG signals. By arranging the JTAG enhancement driving unit, the invention can weaken the influence of ground static electricity, on-satellite radiation and single ions on the JTAG interface of the main control chip, simultaneously improve the stability of JTAG signal transmission, improve the reliability of a satellite system and improve the product competitiveness.
In the description herein, references to the description of terms such as "an embodiment," "an implementation," "an example" or "a specific example" or the like mean that a particular feature, structure, material, or characteristic described in connection with the embodiment, implementation, or example is included in at least one embodiment, implementation, or example of the invention. In this specification, a schematic representation of the above terms does not necessarily refer to the same embodiment, implementation, or example. And the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments. Furthermore, various embodiments, implementations, or examples described in this specification can be combined and combined by one skilled in the art.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
Claims (10)
1. A house keeping computer is characterized by comprising a host, wherein the host comprises a power conversion module, a master control module and an interface module; wherein,
the power supply conversion module is used for power supply protection and power supply conversion so as to stably supply power to the main control module and the interface module;
the main control module comprises a main control chip;
the interface module comprises a JTAG enhanced driving unit;
the JTAG enhanced driving unit is connected with a JTAG interface of the main control chip and is used for enhancing the signal intensity of JTAG signals.
2. The star computer of claim 1, wherein the JTAG enhanced driver unit further comprises a power selection circuit for selectively adapting a level of an external JTAG downloader.
3. The house keeping computer of claim 1, further comprising a first shielded connector connected to the JTAG enhanced driver unit for shielding interference signals inside the satellite system while transmitting JTAG signals.
4. The house keeping computer of claim 1, wherein the JTAG enhanced driver unit is further configured to transparently transmit remote control signals and telemetry signals of the house keeping computer.
5. The house keeping computer of claim 1, wherein the power conversion module comprises: an electronic fuse circuit, an EMI filter, and a DC/DC switching circuit, the electronic fuse circuit being connected to the DC/DC switching circuit through the EMI filter; wherein,
the electronic fuse circuit is used for power protection;
the EMI filter is used for filtering signals;
the DC/DC switching circuit is used for power conversion.
6. The house keeping computer of claim 1, wherein the master chip model is a Smartfusion2 series SOC; the main control module also comprises a storage unit, a clock unit and a watchdog unit, and the storage unit, the clock unit and the watchdog unit are respectively connected with the main control chip; wherein,
the storage unit comprises FLASH, SRAM and DDR.
7. The house keeping computer of claim 1, wherein the interface module further comprises an interface level conversion unit and an interface unit, the interface level conversion unit is connected with the interface unit; wherein,
the interface unit includes: RS422 receiving and dispatching interface, OC instruction output interface and CAN interface, all kinds of interfaces all adopt the design of activestandby dual fail-safe.
8. The house keeping computer of claim 1, further comprising at least one spare machine having a structure identical to that of the main machine and forming a multi-mode redundant design.
9. A satellite system comprising a satellite computer according to any one of claims 1 to 8.
10. The satellite system of claim 9, further comprising a second shielded connector coupled to the satellite computer for shielding interfering signals external to the satellite system while transmitting JTAG signals.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111322879.8A CN114157339A (en) | 2021-11-09 | 2021-11-09 | Star affair computer and satellite system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111322879.8A CN114157339A (en) | 2021-11-09 | 2021-11-09 | Star affair computer and satellite system |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114157339A true CN114157339A (en) | 2022-03-08 |
Family
ID=80459722
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111322879.8A Pending CN114157339A (en) | 2021-11-09 | 2021-11-09 | Star affair computer and satellite system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114157339A (en) |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6266801B1 (en) * | 1998-09-15 | 2001-07-24 | Adaptec, Inc. | Boundary-scan cells with improved timing characteristics |
| CN1996274A (en) * | 2006-12-25 | 2007-07-11 | 中国科学院安徽光学精密机械研究所 | JTAG simulation signal intensifier circuit based on high-speed processor |
| CN102053882A (en) * | 2011-01-11 | 2011-05-11 | 北京航空航天大学 | Heterogeneous satellite-borne fault-tolerant computer based on COTS (Commercial Off The Shelf) device |
| CN103414236A (en) * | 2013-07-26 | 2013-11-27 | 西北工业大学 | Pico-satellite-borne power supply system based on low-power MCU |
| WO2015180000A1 (en) * | 2014-05-26 | 2015-12-03 | 中国科学院长春光学精密机械与物理研究所 | Comprehensive management system for platform and payload integrated satellite |
| CN108762994A (en) * | 2018-06-06 | 2018-11-06 | 哈尔滨工业大学 | It is a kind of that machine method is cut based on the board computer system of multi-computer back-up and the system |
| CN109408435A (en) * | 2018-10-19 | 2019-03-01 | 中国兵器装备集团自动化研究所 | A kind of enhanced jtag interface based on DSP |
| CN110233695A (en) * | 2019-07-12 | 2019-09-13 | 成都能通科技有限公司 | A kind of jamming equipment and its implementation of anti-unmanned plane |
| CN112445748A (en) * | 2020-10-29 | 2021-03-05 | 北京时代民芯科技有限公司 | Domestic controllable high-reliability satellite computer for micro-nano satellite |
-
2021
- 2021-11-09 CN CN202111322879.8A patent/CN114157339A/en active Pending
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6266801B1 (en) * | 1998-09-15 | 2001-07-24 | Adaptec, Inc. | Boundary-scan cells with improved timing characteristics |
| CN1996274A (en) * | 2006-12-25 | 2007-07-11 | 中国科学院安徽光学精密机械研究所 | JTAG simulation signal intensifier circuit based on high-speed processor |
| CN102053882A (en) * | 2011-01-11 | 2011-05-11 | 北京航空航天大学 | Heterogeneous satellite-borne fault-tolerant computer based on COTS (Commercial Off The Shelf) device |
| CN103414236A (en) * | 2013-07-26 | 2013-11-27 | 西北工业大学 | Pico-satellite-borne power supply system based on low-power MCU |
| WO2015180000A1 (en) * | 2014-05-26 | 2015-12-03 | 中国科学院长春光学精密机械与物理研究所 | Comprehensive management system for platform and payload integrated satellite |
| CN108762994A (en) * | 2018-06-06 | 2018-11-06 | 哈尔滨工业大学 | It is a kind of that machine method is cut based on the board computer system of multi-computer back-up and the system |
| CN109408435A (en) * | 2018-10-19 | 2019-03-01 | 中国兵器装备集团自动化研究所 | A kind of enhanced jtag interface based on DSP |
| CN110233695A (en) * | 2019-07-12 | 2019-09-13 | 成都能通科技有限公司 | A kind of jamming equipment and its implementation of anti-unmanned plane |
| CN112445748A (en) * | 2020-10-29 | 2021-03-05 | 北京时代民芯科技有限公司 | Domestic controllable high-reliability satellite computer for micro-nano satellite |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102053882B (en) | Heterogeneous satellite-borne fault-tolerant computer based on COTS (Commercial Off The Shelf) device | |
| US9327600B1 (en) | Aircraft utilities and power distribution system | |
| US10248601B2 (en) | Remote terminal unit (RTU) with universal input/output (UIO) and related method | |
| CN110002005A (en) | A kind of restructural micro-nano satellite system architecture and satellite system reconstructing method | |
| CN105182944A (en) | Full digital solid-state power distribution management system and method for unmanned plane | |
| CN115168114A (en) | Satellite-borne integrated electronic system based on COTS device | |
| GB2530887A (en) | Electrical distribution system for an aircraft | |
| US10689129B1 (en) | Integrated electrical power and utilities management system | |
| CN112046787A (en) | Domain-based microsatellite system | |
| CN215814619U (en) | Airborne training simulation system based on embedded architecture | |
| CN104216846A (en) | Pico-satellite computer system based on quad-core microprocessor of android mobile phone | |
| CN111708623B (en) | Star affair management and star map processing integrated platform | |
| CN114157339A (en) | Star affair computer and satellite system | |
| CN103901881A (en) | Device compatible with multiple test states for carrier rocket equivalent device system | |
| CN112147880B (en) | Remote control instruction selection control method | |
| CN115291120B (en) | Battery metering system, electronic device and control method | |
| Balázs et al. | Command and data management system (CDMS) of the Philae lander | |
| US10785054B2 (en) | Slave module | |
| CN210075264U (en) | GJB289A bus acquisition recorder | |
| CN115968109B (en) | Control circuit board for space station on-line cabinet | |
| CN112085870A (en) | Flight parameter data storage device | |
| CN112711214A (en) | Flight navigation data loader based on FPGA | |
| CN221406342U (en) | Remote interface device of electromechanical management system | |
| CN207965882U (en) | A kind of modularization board for server signal monitoring | |
| CN115524955B (en) | Chassis integrated controller based on heterogeneous redundancy and control method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |