CN114151374A - Fan control circuit and host - Google Patents
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- CN114151374A CN114151374A CN202111323146.6A CN202111323146A CN114151374A CN 114151374 A CN114151374 A CN 114151374A CN 202111323146 A CN202111323146 A CN 202111323146A CN 114151374 A CN114151374 A CN 114151374A
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F04—POSITIVE - DISPLACEMENT MACHINES FOR LIQUIDS; PUMPS FOR LIQUIDS OR ELASTIC FLUIDS
- F04D—NON-POSITIVE-DISPLACEMENT PUMPS
- F04D27/00—Control, e.g. regulation, of pumps, pumping installations or pumping systems specially adapted for elastic fluids
- F04D27/008—Stop safety or alarm devices, e.g. stop-and-go control; Disposition of check-valves
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Abstract
The application discloses fan control circuit and host computer, this fan control circuit includes: the power supply is connected with a power pin of the fan interface through the switch module, and the current sampling module samples current output by the power supply; the non-inverting input end of the comparator is connected with a power switch pin of the CPLD, and the inverting input end of the comparator is connected with the output end of the current sampling module; the switch module is controlled by the output end of the comparator; the CPLD is connected with an in-place signal pin of the fan interface; when the fan interface is connected with a fan, the on-position signal pin sends an on-position signal to the CPLD, so that the comparator outputs a high level to control the switch module to be conducted, and the power supply supplies power to the fan. The fan control circuit disclosed by the application uses fewer circuit units, avoids redundant design, saves PCB space, and achieves the effect of controlling the fan with lower cost.
Description
Technical Field
The invention relates to the field of host fan control, in particular to a fan control circuit and a host.
Background
At present, fan control of a server system is generally completed by using a special hot swap control chip and a peripheral circuit, and in order to adapt to various application scenes, a great number of functional modules are integrated in the hot swap, so that the server system has extremely high universality. However, most functions of the hot swap control chip are not used in practical application, the hot swap control chip belongs to a redundant design, function waste is caused, meanwhile, the hot swap control chip needs to be imported from foreign countries, and hardware cost is high.
Therefore, how to provide a solution to the above technical problems is a problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above, the present invention provides a low-cost fan control circuit with non-redundant functions and a host. The specific scheme is as follows:
a fan control circuit, comprising: power, CPLD, golden finger form fan interface, comparator, current sampling module and switch module, wherein:
the power supply is connected with a power pin of the fan interface through the switch module, and the current sampling module samples the current output by the power supply;
the non-inverting input end of the comparator is connected with a power switch pin of the CPLD, and the inverting input end of the comparator is connected with the output end of the current sampling module;
the switch module is controlled by the output end of the comparator;
the CPLD is connected with an in-place signal pin of the fan interface;
when the fan interface is connected with a fan, the in-place signal pin sends an in-place signal to the CPLD, and the CPLD sends a high-level power supply conducting signal through the power supply switch pin after receiving the in-place signal, so that the comparator outputs a high level to control the switch module to be conducted, and the power supply supplies power to the fan.
Preferably, the current sampling module includes a differential amplifier and a sampling resistor, wherein:
the power supply is connected with the switch module through the sampling resistor;
the non-inverting input end and the inverting input end of the differential amplifier are respectively connected to the two ends of the sampling resistor, and the output end of the differential amplifier is connected with the inverting input end of the comparator.
Preferably, the differential amplifier includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first operational amplifier, a second operational amplifier, and a third operational amplifier, wherein:
the non-inverting input end of the first operational amplifier is connected with the current input end of the sampling resistor;
the inverting input end of the first operational amplifier is connected with the first end of the first resistor and the first end of the second resistor;
the output end of the first operational amplifier is connected with the second end of the first resistor and the first end of the fourth resistor;
the non-inverting input end of the second operational amplifier is connected with the current output end of the sampling resistor;
the inverting input end of the second operational amplifier is connected with the second end of the second resistor and the first end of the third resistor;
the output end of the second operational amplifier is connected with the second end of the third resistor and the first end of the fifth resistor;
the inverting input end of the third operational amplifier is connected with the second end of the fourth resistor and the first end of the sixth resistor;
the non-inverting input end of the third operational amplifier is connected with the second end of the fifth resistor and the first end of the seventh resistor;
the output end of the third operational amplifier is connected with the second end of the sixth resistor and serves as the output end of the differential amplifier;
and the second end of the seventh resistor is grounded.
Preferably, the first resistor and the third resistor have the same resistance value, the fourth resistor and the fifth resistor have the same resistance value, and the sixth resistor and the seventh resistor have the same resistance value.
Preferably, the fan control circuit further includes:
the voltage sampling module is used for sampling the voltage of the power supply pin of the fan interface;
the ADC conversion module is used for converting analog signals output by the current sampling module and the voltage sampling module into digital signals and sending the digital signals to the CPLD;
the CPLD is also used for receiving the digital signal of the ADC conversion module and calculating the power of the fan.
Preferably, the fan control circuit further includes an analog switch, which is used for time-sharing connection between the current sampling module and the ADC conversion module, and between the voltage sampling module and the ADC conversion module.
Preferably, among all the pins of the fan interface in the form of gold fingers, the in-place signal pin is shortest and the grounding pin is longest.
Preferably, the fan control circuit further includes:
and the grounding TVS is connected with the power supply pin.
Preferably, the current sampling module is further configured to output an over-current signal with a higher level than the power-on signal when the current is detected to exceed the current threshold, so that the comparator outputs a low level to control the switch module to turn off.
Correspondingly, the application also discloses a host computer, which comprises the fan control circuit.
The application discloses fan control circuit includes: power, CPLD, golden finger form fan interface, comparator, current sampling module and switch module, wherein: the power supply is connected with a power pin of the fan interface through the switch module, and the current sampling module samples the current output by the power supply; the non-inverting input end of the comparator is connected with a power switch pin of the CPLD, and the inverting input end of the comparator is connected with the output end of the current sampling module; the switch module is controlled by the output end of the comparator; the CPLD is connected with an in-place signal pin of the fan interface; when the fan interface is connected with a fan, the in-place signal pin sends an in-place signal to the CPLD, and the CPLD sends a high-level power supply conducting signal through the power supply switch pin after receiving the in-place signal, so that the comparator outputs a high level to control the switch module to be conducted, and the power supply supplies power to the fan. The fan control circuit disclosed by the application uses fewer circuit units when meeting the requirements of controlling the fan under various scenes, avoids redundant design, saves the PCB space and achieves the control effect of a special control chip with lower cost.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the provided drawings without creative efforts.
FIG. 1 is a structural diagram of a fan control circuit according to an embodiment of the present invention;
fig. 2 is a structural distribution diagram of a specific fan control circuit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Most functions of the hot swap control chip are not used in practical application, the hot swap control chip belongs to redundant design, function waste is caused, meanwhile, the hot swap control chip needs to be imported from foreign countries, and hardware cost is high. The fan control circuit disclosed by the application uses fewer circuit units when meeting the requirements of controlling the fan under various scenes, avoids redundant design, saves the PCB space and achieves the control effect of a special control chip with lower cost.
The embodiment of the invention discloses a fan control circuit, which comprises: power supply V, CPLD 1, gold finger form fan interface 2, comparator U1, current sampling module 3 and switch module 4, wherein:
the power supply V is connected with a power pin of the fan interface 2 through the switch module 4, and the current sampling module 3 samples the current output by the power supply V;
the non-inverting input end of the comparator U1 is connected with a power switch pin of the CPLD 1, and the inverting input end of the comparator U1 is connected with the output end of the current sampling module 3;
the switch module 4 is controlled by the output end of the comparator U1;
the CPLD 1 is connected with an in-place signal pin of the fan interface 2;
when the fan interface 2 is connected with a fan, the on-position signal pin sends an on-position signal to the CPLD 1, and the CPLD 1 sends a high-level power supply conducting signal through the power supply switch pin after receiving the on-position signal, so that the comparator U1 outputs a high level to control the switch module 4 to be conducted, and the power supply V supplies power to the fan.
It can be understood that one or more fan interfaces 2 can be included in the fan control circuit, after each fan interface 2 is inserted into a fan, the CPLD 1 detects an in-place signal of the fan interface, the power supply V is controlled to supply power to the fan, and the CPLD 1 sends a PWM control signal to the fan interface 2 through connection with the fan interface.
Specifically, if the fan interface 2 is not connected to the fan, the on-position signal pin does not send an on-position signal to the CPLD 1, the power switch pin of the CPLD 1 is at a low level, at this time, the circuit of the power supply V and the fan interface 2 is not turned on, the current value acquired by the current sampling module 3 is 0, the comparator outputs a low level, the switch module 4 is turned off, and the fan interface 2 is not electrified;
if the fan interface 2 is connected with a fan, the on-position signal pin sends an on-position signal to the CPLD 1, and after the CPLD 1 receives the on-position signal, the CPLD 1 sends a high-level power supply conducting signal, which is received by the non-inverting input terminal of the comparator U1, and meanwhile, because the circuits of the power supply V and the fan interface 2 are not yet conducted at this time, the current value output by the power supply V collected by the current sampling module 3 is 0, the voltage value of the inverting input terminal of the comparator U1 is extremely low, so that the comparator U1 outputs a high level, and the switch module 4 is controlled to be conducted, so that the power supply V is conducted with the power supply path of the fan interface 2, and the power supply V supplies power to the fan.
Then, when the current output by the power supply V is in the normal current range, the voltage value output by the current sampling module 3 to the comparator U1 is still in the low level range, that is, is lower than the high level of the power supply conducting signal, so that the output signal of the comparator U1 still controls the switch module 4 to be kept conducting, and the power supply V supplies power to the fan.
It can be understood that, once the current output by the power supply V exceeds the normal current range, the voltage value output by the current sampling module 3 to the comparator U1 becomes larger and higher than the high level of the power-on signal, so that the output signal of the comparator U1 is low, the control switch module 4 is turned off, the fan interface 2 is powered off, and the over-current protection of the fan is implemented, and therefore, the current sampling module 3 is further configured to output an over-current signal with a higher level than the power-on signal when detecting that the current exceeds the current threshold, so that the comparator U1 outputs a low level to control the switch module 4 to turn off.
It can be understood that, the comparator U1 controls the state of the switch module 4 according to the voltage variation of the non-inverting input terminal and the inverting input terminal, and actually, the output of the current sampling module 3 is used as the reference voltage of the comparator U1 to compare the high level or the low level of the power switch pin of the CPLD 1, so the circuit of the current sampling module 3 needs to be designed according to the voltage comparison range corresponding to the power switch pin mentioned in the above cases, so that the supply current of the fan is always kept in the safe range, thereby ensuring the hot plug safety of the fan.
The fan control circuit disclosed by the application uses fewer circuit units when meeting the requirements of controlling the fan under various scenes, avoids redundant design, saves the PCB space and achieves the control effect of a special control chip with lower cost.
The embodiment of the invention discloses a specific fan control circuit, and compared with the previous embodiment, the technical scheme is further explained and optimized by the embodiment. Specifically, see fig. 2 for a description of:
the current sampling module 3 includes a differential amplifier and a sampling resistor Rpr:
the power supply V is connected with the switch module 4 through a sampling resistor Rpr;
the non-inverting input end and the inverting input end of the differential amplifier are respectively connected to two ends of the sampling resistor R, and the output end of the differential amplifier is connected with the inverting input end of the comparator U1.
It can be understood that the sampling resistor Rpr in this embodiment is a precision sampling resistor, and the precision sampling resistor is connected in series with the path between the power supply V and the switch module 4, and the precision sampling resistor can reduce the influence of voltage drop on the path as much as possible. The differential amplifier is realized by a plurality of operational amplifiers and peripheral resistors thereof, and the amplification factor of the differential amplifier is determined by the peripheral resistors.
Further, the differential amplifier comprises a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, a first operational amplifier U2, a second operational amplifier U3 and a third operational amplifier U4, wherein:
the non-inverting input end of the first operational amplifier U2 is connected with the current input end of the sampling resistor Rpr;
the inverting input end of the first operational amplifier U2 is connected with the first end of the first resistor R1 and the first end of the second resistor R2;
the output end of the first operational amplifier U2 is connected with the second end of the first resistor R1 and the first end of the fourth resistor R4;
the non-inverting input end of the second operational amplifier U3 is connected with the current output end of the sampling resistor Rpr;
the inverting input end of the second operational amplifier U3 is connected with the second end of the second resistor R2 and the first end of the third resistor R3;
the output end of the second operational amplifier U3 is connected with the second end of the third resistor R3 and the first end of the fifth resistor R5;
the inverting input end of the third operational amplifier U4 is connected with the second end of the fourth resistor R4 and the first end of the sixth resistor R6;
the non-inverting input end of the third operational amplifier U4 is connected with the second end of the fifth resistor R5 and the first end of the seventh resistor R7;
the output end of the third operational amplifier U is connected with the second end of the sixth resistor R and serves as the output end of the differential amplifier;
the second terminal of the seventh resistor R7 is connected to ground.
Further, the resistances in the differential amplifier satisfy the following relationship: the first resistor R and the third resistor R have the same resistance value, the fourth resistor R and the fifth resistor R have the same resistance value, and the sixth resistor R and the seventh resistor R have the same resistance value.
In this case, the amplification factor of the differential amplifier is (1+ (2 × R1)/R2) R6/R4; the resistance in the calculation formula represents the corresponding resistance value.
In fig. 2, the current input terminal of the sampling resistor Rpr is PWR _ sense _ P, the current output terminal is PWR _ sense _ N, and the output voltage of the differential amplifier is Uo, which are determined by k, PWR _ sense _ P, and PWR _ sense _ N.
Furthermore, the inverting input terminal of the comparator U1 receives the output voltage Uo of the differential amplifier, the non-inverting input terminal is connected to the power supply conducting signal PWR _ EN of the CPLD 1 by dividing the voltage with the series resistors R8 and R9, and when the power supply conducting signal PWR _ EN is at a high level, the voltage value of the high level is 3.3V, and the voltage at the non-inverting input terminal of the comparator U1 should be Vr ═ R9/(R8+ R9) × 3.3V.
It can be understood that, in practical applications, the comparator U1, the first operational amplifier U2, the second operational amplifier U3 and the third operational amplifier U4 can be implemented by four operational amplifiers in a four-way operational amplifier integrated chip, thereby saving the wiring space and the design cost.
Further, the switch module 4 may be implemented by two switch transistors, such as the transistor Q1 and the power PMOS transistor PQ1 shown in fig. 2, wherein the output terminal of the comparator U1 is connected to the base b of the transistor Q1 through a resistor, the collector c of the transistor Q1 is connected to the gate G of the power PMOS transistor PQ1, the emitter e of the transistor Q1 is grounded, the source S of the power PMOS transistor PQ1 is connected to the current output terminal of the sampling resistor Rpr, and the gate D is connected to the power supply pin V _ FAN of the FAN interface 2.
Further, the fan control circuit may further include:
the voltage sampling module 5 is used for sampling the voltage of the power pin of the fan interface 2;
the ADC conversion module 6 is used for converting analog signals output by the current sampling module 3 and the voltage sampling module 5 into digital signals and sending the digital signals to the CPLD 1;
the CPLD 1 is also used for receiving the digital signal of the ADC conversion module 6 and calculating the power of the fan.
Specifically, the voltage sampling module 5 is usually implemented by dividing the voltage through resistors R10 and R11, so as to obtain the sampled voltage signal V _ TEST of the power pin V _ FAN, which is R11/(R10+ R11) × V _ FAN.
The ADC conversion module 6 is used for converting the analog signal Uo output by the current sampling module 3 and the analog signal V _ TEST output by the voltage sampling module 5 into digital signals and sending the digital signals to the CPLD 1, and the CPLD 1 is used for calculating the power of the fan.
Further, considering that the fan control circuit of this embodiment may include a plurality of fan interfaces 2, and may be connected with a plurality of fans, the sampling of the power parameters of the plurality of fans may be performed by time-sharing polling, that is: the fan control circuit further comprises an analog switch 7 which is used for switching on the current sampling module 3 and the ADC conversion module 6, the voltage sampling module 5 and the ADC conversion module 6 in a time-sharing mode, and the CPLD 1 can determine the current power of the same fan after receiving the current and voltage sampling values of the same fan. The CPLD 1 can also detect the fan power-on completion signal PGD through the analog switch 7. In short, the analog switch 7 can be used for transmission and detection of signals with low time limit requirement in the fan control of the embodiment.
Further, in consideration of the stability of different potentials, a transient suppression diode TVS may be added at a necessary potential point, such as ground TVS 1 connected to power supply V, ground TVS2 connected to a power supply pin, ground TVS 3 connected to fan speed feedback pin TACH on fan interface 2, ground TS4 connected to on-site signal pin PRN, and the like. Meanwhile, the PWM control signal is sent by the CPLD, isolated by the two-stage switching tubes Q2 and Q3, and then reaches the fan interface 2.
Furthermore, considering the circuit safety, the length of the pins in the form of gold fingers of the fan interface 2 may be set according to the following principle: among all the pins of the fan interface 2 in the form of gold fingers, the on-site signal pin is shortest and the grounding pin is longest, so that current overshoot during hot plugging is prevented.
The fan control circuit in the embodiment has the advantages of few device pins, small package, simple peripheral circuit, few PCB space and convenience in trend, and compared with an imported chip with higher cost originally, the cost is greatly reduced, and the condition of function redundancy and waste does not exist.
Correspondingly, the application also discloses a host computer, which comprises the fan control circuit.
The specific details of the fan control circuit may refer to the description in the above embodiments, and are not repeated herein.
The host in this embodiment has the same technical effect as the fan control circuit in the above embodiments, and is not described herein again.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The present invention provides a fan control circuit and a host computer, and the principle and the implementation of the present invention are explained in detail by applying specific examples, and the descriptions of the above embodiments are only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A fan control circuit, comprising: power, CPLD, golden finger form fan interface, comparator, current sampling module and switch module, wherein:
the power supply is connected with a power pin of the fan interface through the switch module, and the current sampling module samples the current output by the power supply;
the non-inverting input end of the comparator is connected with a power switch pin of the CPLD, and the inverting input end of the comparator is connected with the output end of the current sampling module;
the switch module is controlled by the output end of the comparator;
the CPLD is connected with an in-place signal pin of the fan interface;
when the fan interface is connected with a fan, the in-place signal pin sends an in-place signal to the CPLD, and the CPLD sends a high-level power supply conducting signal through the power supply switch pin after receiving the in-place signal, so that the comparator outputs a high level to control the switch module to be conducted, and the power supply supplies power to the fan.
2. The fan control circuit of claim 1, wherein the current sampling module comprises a differential amplifier and a sampling resistor, wherein:
the power supply is connected with the switch module through the sampling resistor;
the non-inverting input end and the inverting input end of the differential amplifier are respectively connected to the two ends of the sampling resistor, and the output end of the differential amplifier is connected with the inverting input end of the comparator.
3. The fan control circuit of claim 2, wherein the differential amplifier comprises a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, a first op-amp, a second op-amp, and a third op-amp, wherein:
the non-inverting input end of the first operational amplifier is connected with the current input end of the sampling resistor;
the inverting input end of the first operational amplifier is connected with the first end of the first resistor and the first end of the second resistor;
the output end of the first operational amplifier is connected with the second end of the first resistor and the first end of the fourth resistor;
the non-inverting input end of the second operational amplifier is connected with the current output end of the sampling resistor;
the inverting input end of the second operational amplifier is connected with the second end of the second resistor and the first end of the third resistor;
the output end of the second operational amplifier is connected with the second end of the third resistor and the first end of the fifth resistor;
the inverting input end of the third operational amplifier is connected with the second end of the fourth resistor and the first end of the sixth resistor;
the non-inverting input end of the third operational amplifier is connected with the second end of the fifth resistor and the first end of the seventh resistor;
the output end of the third operational amplifier is connected with the second end of the sixth resistor and serves as the output end of the differential amplifier;
and the second end of the seventh resistor is grounded.
4. The fan control circuit according to claim 3, wherein the first resistor and the third resistor have the same resistance, the fourth resistor and the fifth resistor have the same resistance, and the sixth resistor and the seventh resistor have the same resistance.
5. The fan control circuit of claim 1, further comprising:
the voltage sampling module is used for sampling the voltage of the power supply pin of the fan interface;
the ADC conversion module is used for converting analog signals output by the current sampling module and the voltage sampling module into digital signals and sending the digital signals to the CPLD;
the CPLD is also used for receiving the digital signal of the ADC conversion module and calculating the power of the fan.
6. The fan control circuit of claim 5, further comprising an analog switch for time-sharing connection between the current sampling module and the ADC conversion module, and between the voltage sampling module and the ADC conversion module.
7. The fan control circuit of claim 1, wherein the bit signal pin is shortest and the ground pin is longest among all the pins of the fan interface in the form of gold fingers.
8. The fan control circuit of claim 7, further comprising:
and the grounding TVS is connected with the power supply pin.
9. The fan control circuit according to any one of claims 1 to 8, wherein the current sampling module is further configured to output an over-current signal with a higher level than the power-on signal when the current exceeding the current threshold is detected, so that the comparator outputs a low level to control the switch module to turn off.
10. A host comprising a fan control circuit as claimed in any one of claims 1 to 9.
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| CN202111323146.6A CN114151374A (en) | 2021-11-05 | 2021-11-05 | Fan control circuit and host |
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| CN202111323146.6A CN114151374A (en) | 2021-11-05 | 2021-11-05 | Fan control circuit and host |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN118705205A (en) * | 2024-08-28 | 2024-09-27 | 苏州元脑智能科技有限公司 | Fan control system, method, computer program product, apparatus, and storage medium |
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Application publication date: 20220308 |