CN114114000A - Time relay calibrating device based on SOPC - Google Patents
Time relay calibrating device based on SOPC Download PDFInfo
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- CN114114000A CN114114000A CN202111394461.8A CN202111394461A CN114114000A CN 114114000 A CN114114000 A CN 114114000A CN 202111394461 A CN202111394461 A CN 202111394461A CN 114114000 A CN114114000 A CN 114114000A
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- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/327—Testing of circuit interrupters, switches or circuit-breakers
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Abstract
The invention discloses a time relay calibration device based on SOPC (system on programmable chip), which belongs to the technical field of metering, comprises a standard time module and is characterized in that: the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS II soft core processor, a UART controller, a PIO controller and an EPCS controller in an FPGA, and information of the SOPC system module is transmitted through an AVALON bus. The invention can reduce the use of a universal chip and discrete components, improve the stability of signals during high-speed transmission, reasonably plan a human-computer interaction interface, improve the portability, reduce the connecting and dismounting processes in the calibration process by designing a reasonable signal processing circuit, and has simple and convenient calibration operation.
Description
Technical Field
The invention relates to the technical field of metering, in particular to a time relay calibration device based on an SOPC.
Background
The time relay is a commonly used relay, after a specific signal is added to an input end of the time relay, a contact action output is generated after the output end is delayed for a set time, so that a delay action is realized, and the time relay plays the roles of automatic adjustment, safety protection and circuit switching in a circuit. The device is generally composed of a time base circuit, a control circuit, a timing display circuit, a setting circuit, a driving circuit and a contact reed. It is widely used in time control system of various process equipments in industrial manufacture.
At present, the existing time relay calibration equipment mainly has the following problems:
the existing calibration device usually uses a single chip microcomputer and other separating devices to design a circuit, and has the defects of large volume, poor portability, difficulty in finishing field calibration work, difficulty in maintenance and easiness in signal interference. During the calibration time relay, the wiring is loaded down with trivial details, and the mode of connection of the time relay of different grade type also has great difference moreover, and frequent dismouting wiring causes the instrument to damage easily in the calibration process.
Chinese patent publication No. CN 211826375U, published as 2020, 10, and 30, discloses a calibration system for time relays, which includes two identical time relays, wherein the first time relay is a time relay to be tested, the second time relay is a time relay for testing, and the calibration system further includes a voltage regulator, an AC/DC converter, a calibration device, a first switch, a second switch, a third switch, a fourth switch, and an auxiliary power supply; the calibration device responds to the fact that the first switch, the second switch and the third switch are all in a conducting state, so that the signal input end of the first time relay and the input end of the second time relay are powered simultaneously, and a first time point T1 is recorded; and, in response to the third switch being turned off, the fourth switch is turned on, so that the input terminal of the second time relay is powered on for the second time, and a second time point T2 is recorded; the calibration device obtains the time calibration parameter according to the second time point T2, the first time point T1 and the calibrated delay time of the first time relay.
The calibration system for the time relay disclosed in the patent document has a simple and easy calibration scheme and is low in cost. However, the stability of the signal during high-speed transmission is not good enough, and the calibration operation is complicated.
Disclosure of Invention
In order to overcome the defects of the prior art, the invention provides the time relay calibration device based on the SOPC, the use of a universal chip and discrete components can be reduced, the stability of signals in high-speed transmission is improved, a man-machine interaction interface is reasonably planned, the portability is improved, the connection and disassembly and assembly processes in the calibration process are reduced through designing a reasonable signal processing circuit, and the calibration operation is simple and convenient.
The invention is realized by the following technical scheme:
the utility model provides a time relay calibrating device based on SOPC, includes standard time module, its characterized in that: the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS II soft-core processor, a UART controller, a PIO controller and an EPCS controller in an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
And the NIOS II soft core processor is used for processing system control, multitask processing and interrupt response.
And the UART controller is used for communicating with the serial port type liquid crystal touch screen and analyzing data.
And the PIO controller is used for providing control signals for the standard time module and the signal processing circuit.
And the EPCS controller communicates with the FLASH memory through an SPI protocol to complete the configuration of the FPGA.
The standard time module adopts a high-stability crystal oscillator to provide a standard clock signal of the calibration device, and a sequential logic circuit is used in the FPGA to perform hardware frequency division on an input clock of the crystal oscillator.
And obtaining eight time scale signals of 1 mus, 10 mus, 100 mus, 1ms, 10ms, 100ms, 1s and 10s after the clock signal of the high-stability crystal oscillator is subjected to frequency division.
The input end of the counter circuit is connected with a PIO controller of the SOPC system module to receive the setting information, and the output end of the counter circuit is connected with the PIO controller to output the count value of the counter in real time.
The signal processing circuit comprises a signal processing circuit connected with a time relay with a control end and a signal processing circuit connected with a time relay without the control end.
The SOPC system module refers to a programmable system on chip.
The FPGA is a field programmable gate array.
The UART controller refers to a universal asynchronous receiving and transmitting transmitter.
The PIO controller of the invention refers to a parallel input/output controller.
The EPCS controller of the invention refers to a serial memory.
The NIOS II soft core processor is an embedded processor.
The SPI refers to a serial peripheral device interface.
The beneficial effects of the invention are mainly shown in the following aspects:
1. compared with the prior art, the invention can reduce the use of a universal chip and discrete elements, improve the stability of signals in high-speed transmission, reasonably plan a man-machine interaction interface, improve the portability, reduce the connecting and dismounting processes in the calibration process by designing a reasonable signal processing circuit, and has simple and convenient calibration operation.
2. The invention adopts the SOPC to integrate the embedded processor, the interface controller and the digital logic circuit on one FPGA chip, has the functions of software and hardware design, reduces the use of components, improves the stability of signals during high-speed transmission, and has the advantages of high integration level, good reliability, low power consumption and convenient upgrade.
3. According to the invention, human-computer interaction is realized through the serial port type liquid crystal touch screen, and the key functions of the number keys and the function keys are realized through the virtual keys of the serial port type liquid crystal touch screen, so that the panel area occupied by the entity keys is reduced.
4. The invention provides a high-stability reference clock signal by adopting a high-stability crystal oscillator, and ensures the requirement of time scale of the time-class measuring equipment to be calibrated.
5. According to the invention, the signal processing circuit connected with the time relay at the control end and the signal processing circuit connected with the time relay without the control end are designed according to different types of the time relays, so that the safety and the convenience of the calibration process are enhanced.
Drawings
The invention will be further described in detail with reference to the drawings and the detailed description, in which:
FIG. 1 is a block diagram of the present invention;
FIG. 2 is a block diagram of the SOPC system module of the present invention;
FIG. 3 is a schematic diagram of a connection of a serial port type liquid crystal touch screen according to the present invention;
FIG. 4 is a signal connection diagram of the frequency divider circuit and the counter circuit according to the present invention;
FIG. 5 is a schematic diagram of a signal processing circuit of the time relay with a control terminal according to the present invention;
FIG. 6 is a schematic diagram of a signal processing circuit of a non-control-end time relay using an AC solid state relay according to the present invention;
fig. 7 is a schematic diagram of a signal processing circuit of a non-control-end time relay using a dc solid state relay according to the present invention.
Detailed Description
Example 1
Referring to fig. 1-4, an SOPC-based time relay calibration device comprises a standard time module, an SOPC system module, a signal processing circuit, a FLASH memory and a serial liquid crystal touch screen, wherein the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS ii soft-core processor, a UART controller, a PIO controller and an EPCS controller on an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
The embodiment is the most basic implementation mode, the standard time module comprises a frequency dividing circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS ii soft-core processor, a UART controller, a PIO controller and an EPCS controller on an FPGA, information of the SOPC system module is transmitted through an AVALON bus, the SOPC system module is electrically connected with the standard time module, the signal processing circuit, a FLASH memory and a serial liquid crystal touch screen respectively, compared with the prior art, the use of a universal chip and discrete components can be reduced, the stability of signals during high-speed transmission is improved, a man-machine interaction interface is reasonably planned, the portability is improved, through designing a reasonable signal processing circuit, the connecting line and the dismounting process in the calibration process are reduced, and the calibration operation is simple and convenient.
Example 2
Referring to fig. 1-4, an SOPC-based time relay calibration device comprises a standard time module, an SOPC system module, a signal processing circuit, a FLASH memory and a serial liquid crystal touch screen, wherein the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS ii soft-core processor, a UART controller, a PIO controller and an EPCS controller on an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
And the NIOS II soft core processor is used for processing system control, multitask processing and interrupt response.
Example 3
Referring to fig. 1-4, an SOPC-based time relay calibration device comprises a standard time module, an SOPC system module, a signal processing circuit, a FLASH memory and a serial liquid crystal touch screen, wherein the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS ii soft-core processor, a UART controller, a PIO controller and an EPCS controller on an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
And the NIOS II soft core processor is used for processing system control, multitask processing and interrupt response.
And the UART controller is used for communicating with the serial port type liquid crystal touch screen and analyzing data.
The embodiment is a better implementation mode, adopts the SOPC, integrates the embedded processor, the interface controller and the digital logic circuit on one FPGA chip, has the functions of software and hardware design, reduces the use of components, improves the stability of signals during high-speed transmission, and has the advantages of high integration level, good reliability, low power consumption and convenient upgrading.
Example 4
Referring to fig. 1-4, an SOPC-based time relay calibration device comprises a standard time module, an SOPC system module, a signal processing circuit, a FLASH memory and a serial liquid crystal touch screen, wherein the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS ii soft-core processor, a UART controller, a PIO controller and an EPCS controller on an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
And the NIOS II soft core processor is used for processing system control, multitask processing and interrupt response.
And the UART controller is used for communicating with the serial port type liquid crystal touch screen and analyzing data.
And the PIO controller is used for providing control signals for the standard time module and the signal processing circuit.
And the EPCS controller communicates with the FLASH memory through an SPI protocol to complete the configuration of the FPGA.
In this embodiment, the human-computer interaction is realized by a serial port type liquid crystal touch screen, and the key functions of the number keys and the function keys are realized by virtual keys of the serial port type liquid crystal touch screen, so that the area of a panel occupied by the entity keys is reduced.
Example 5
Referring to fig. 1-4, an SOPC-based time relay calibration device comprises a standard time module, an SOPC system module, a signal processing circuit, a FLASH memory and a serial liquid crystal touch screen, wherein the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS ii soft-core processor, a UART controller, a PIO controller and an EPCS controller on an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
And the NIOS II soft core processor is used for processing system control, multitask processing and interrupt response.
And the UART controller is used for communicating with the serial port type liquid crystal touch screen and analyzing data.
And the PIO controller is used for providing control signals for the standard time module and the signal processing circuit.
And the EPCS controller communicates with the FLASH memory through an SPI protocol to complete the configuration of the FPGA.
The standard time module adopts a high-stability crystal oscillator to provide a standard clock signal of the calibration device, and a sequential logic circuit is used in the FPGA to perform hardware frequency division on an input clock of the crystal oscillator.
And obtaining eight time scale signals of 1 mus, 10 mus, 100 mus, 1ms, 10ms, 100ms, 1s and 10s after the clock signal of the high-stability crystal oscillator is subjected to frequency division.
The embodiment is a further preferred embodiment, and the high-stability crystal oscillator is adopted to provide a high-stability reference clock signal, so that the requirement of the time scale of the time-class measurement device to be calibrated is ensured.
Example 6
Referring to fig. 1-4, an SOPC-based time relay calibration device comprises a standard time module, an SOPC system module, a signal processing circuit, a FLASH memory and a serial liquid crystal touch screen, wherein the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS ii soft-core processor, a UART controller, a PIO controller and an EPCS controller on an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
And the NIOS II soft core processor is used for processing system control, multitask processing and interrupt response.
And the UART controller is used for communicating with the serial port type liquid crystal touch screen and analyzing data.
And the PIO controller is used for providing control signals for the standard time module and the signal processing circuit.
And the EPCS controller communicates with the FLASH memory through an SPI protocol to complete the configuration of the FPGA.
The standard time module adopts a high-stability crystal oscillator to provide a standard clock signal of the calibration device, and a sequential logic circuit is used in the FPGA to perform hardware frequency division on an input clock of the crystal oscillator.
And obtaining eight time scale signals of 1 mus, 10 mus, 100 mus, 1ms, 10ms, 100ms, 1s and 10s after the clock signal of the high-stability crystal oscillator is subjected to frequency division.
The input end of the counter circuit is connected with a PIO controller of the SOPC system module to receive the setting information, and the output end of the counter circuit is connected with the PIO controller to output the count value of the counter in real time.
The signal processing circuit comprises a signal processing circuit connected with a time relay with a control end and a signal processing circuit connected with a time relay without the control end.
The embodiment is the best implementation mode, and the signal processing circuit connected with the time relay at the control end and the signal processing circuit connected with the time relay without the control end are designed according to different types of the time relays, so that the safety and the convenience of the calibration process are enhanced.
The signal processing circuit of the invention designs two different control circuits according to different control modes of the time relay:
and a signal processing circuit connected with the control end time relay, and see fig. 5.
Three electronic switches are used IN each calibration channel, a DG442 electronic switch is connected with a RESET terminal of a time relay, a PIO interface supplies a positive pulse of 10ms to an IN pin of the electronic switch at the beginning to enable the electronic switch to be switched on, and the RESET terminal of the time relay is connected with a COM terminal to be RESET. Next, the PIO interface pulls down the IN pin of the electronic switch DG442 connected to the PAUSE end of the time relay to turn off the IN pin, so that the PAUSE is cancelled when the PAUSE end of the time relay is disconnected from the COM end, and the timing function of the time relay is recovered at the same time.
And a signal processing circuit connected with the time relay without the control end, and see fig. 6 and 7.
The control principle of the alternating current time relay is the same as that of the direct current time relay, the direct current time relay calibration is taken as an example for explanation, the PIO interface outputs a high level to be connected into a normally closed end of the time relay to enable a counter of the calibration device to start timing, meanwhile, a high level signal is driven by ULN2003 to pull up a solid state input end, an output end of the solid state relay is connected, an external direct current power supply is connected with a positive end of the time relay, the time relay also starts timing synchronously, after the time relay is set, the normally closed end is disconnected, the time relay and the calibration device stop timing simultaneously, and calibration of the time relay without the control end is achieved.
Claims (9)
1. The utility model provides a time relay calibrating device based on SOPC, includes standard time module, its characterized in that: the standard time module comprises a frequency division circuit and a counter circuit, the SOPC system module is formed by embedding an NIOS II soft-core processor, a UART controller, a PIO controller and an EPCS controller in an FPGA, information of the SOPC system module is transmitted through an AVALON bus, and the SOPC system module is electrically connected with the standard time module, the signal processing circuit, the FLASH memory and the serial liquid crystal touch screen respectively.
2. The SOPC-based time relay calibration device of claim 1, wherein: and the NIOS II soft core processor is used for processing system control, multitask processing and interrupt response.
3. The SOPC-based time relay calibration device of claim 1, wherein: and the UART controller is used for communicating with the serial port type liquid crystal touch screen and analyzing data.
4. The SOPC-based time relay calibration device of claim 1, wherein: and the PIO controller is used for providing control signals for the standard time module and the signal processing circuit.
5. The SOPC-based time relay calibration device of claim 1, wherein: and the EPCS controller communicates with the FLASH memory through an SPI protocol to complete the configuration of the FPGA.
6. The SOPC-based time relay calibration device of claim 1, wherein: the standard time module adopts a high-stability crystal oscillator to provide a standard clock signal of the calibration device, and a sequential logic circuit is used in the FPGA to perform hardware frequency division on an input clock of the crystal oscillator.
7. The SOPC-based time relay calibration device of claim 6, wherein: and obtaining eight time scale signals of 1 mus, 10 mus, 100 mus, 1ms, 10ms, 100ms, 1s and 10s after the clock signal of the high-stability crystal oscillator is subjected to frequency division.
8. The SOPC-based time relay calibration device of claim 1, wherein: the input end of the counter circuit is connected with a PIO controller of the SOPC system module to receive the setting information, and the output end of the counter circuit is connected with the PIO controller to output the count value of the counter in real time.
9. The SOPC-based time relay calibration device of claim 1, wherein: the signal processing circuit comprises a signal processing circuit connected with a time relay with a control end and a signal processing circuit connected with a time relay without the control end.
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| CN202111394461.8A CN114114000A (en) | 2021-11-23 | 2021-11-23 | Time relay calibrating device based on SOPC |
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| CN202111394461.8A CN114114000A (en) | 2021-11-23 | 2021-11-23 | Time relay calibrating device based on SOPC |
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| CN113625623A (en) * | 2021-07-28 | 2021-11-09 | 成都飞机工业（集团）有限责任公司 | Stopwatch calibrating device based on SOPC |
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| CN101625395A (en) * | 2009-08-20 | 2010-01-13 | 哈尔滨工业大学 | Method for measuring relay contact settling time and device thereof |
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Application publication date: 20220301 |