CN114095136A

CN114095136A - Method and apparatus in a node used for wireless communication

Info

Publication number: CN114095136A
Application number: CN202010854453.6A
Authority: CN
Inventors: 张晓博
Original assignee: Shanghai Langbo Communication Technology Co Ltd
Current assignee: Shanghai Langbo Communication Technology Co Ltd
Priority date: 2020-08-24
Filing date: 2020-08-24
Publication date: 2022-02-25
Anticipated expiration: 2040-08-24
Also published as: CN114095136B; CN116781226A

Abstract

A method and apparatus in a node used for wireless communication is disclosed. A first receiver receiving a first signaling and a second signaling; the first transmitter is used for transmitting a first signal in a target air interface resource block, wherein the first signal carries a first bit block; wherein the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; a second empty resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, and the first air interface resource block and the second air interface resource block have overlap in a time domain; a first number is used to determine a fourth resource block, the first number being not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block.

Description

Method and apparatus in a node used for wireless communication

Technical Field

The present application relates to a transmission method and apparatus in a wireless communication system, and more particularly, to a transmission method and apparatus for a wireless signal in a wireless communication system supporting a cellular network.

Background

In the 5G system, eMBB (enhanced Mobile Broadband), and URLLC (Ultra Reliable and Low Latency Communication) are two typical Service types (Service Type). In 3GPP (3rd Generation Partner Project, third Generation partnership Project) NR (New Radio, New air interface) Release 15, a New Modulation and Coding Scheme (MCS) table is defined for the requirement of lower target BLER (10^ -5) of URLLC service. In order to support the higher required URLLC traffic, such as higher reliability (e.g. target BLER is 10^ -6), lower delay (e.g. 0.5-1ms), etc., in 3GPP NR Release 16, DCI (Downlink Control Information) signaling may indicate whether the scheduled traffic is Low Priority (Low Priority) or High Priority (High Priority), where the Low Priority corresponds to URLLC traffic and the High Priority corresponds to eMBB traffic. When a low priority transmission overlaps a high priority transmission in the time domain, the high priority transmission is performed and the low priority transmission is discarded.

The URLLC enhanced WI (Work Item) by NR Release 17 was passed over the 3GPP RAN symposium. Among them, Multiplexing (Multiplexing) of different services in a UE (User Equipment) (Intra-UE) is a major point to be researched.

Disclosure of Invention

After introducing multiplexing of services with different priorities in the UE, the UE may multiplex UCI (Uplink Control Information) with different priorities to the same PUCCH (Physical Uplink Control CHannel) for transmission; the UE may need to perform PUCCH resource (PUCCH resource) reselection in performing multiplexing. How to handle collision (collision) with other channels caused by PUCCH resource reselection is a key problem to be solved.

In view of the above, the present application discloses a solution. In the above description of the problem, an UpLink (UpLink) is taken as an example; the application is also applicable to transmission scenarios such as Downlink (Downlink) and SideLink (SL), and achieves technical effects similar to those in uplink. Furthermore, employing a unified solution for different scenarios (including but not limited to uplink, downlink, companion link) also helps to reduce hardware complexity and cost. It should be noted that, without conflict, the embodiments and features in the embodiments in the user equipment of the present application may be applied to the base station, and vice versa. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.

As an example, the term (telematics) in the present application is explained with reference to the definition of the specification protocol TS36 series of 3 GPP.

As an example, the terms in the present application are explained with reference to the definitions of the 3GPP specification protocol TS38 series.

As an example, the terms in the present application are explained with reference to the definitions of the 3GPP specification protocol TS37 series.

As an example, the terms in the present application are explained with reference to the definition of the specification protocol of IEEE (Institute of Electrical and Electronics Engineers).

The application discloses a method in a first node used for wireless communication, characterized by comprising:

receiving a first signaling and a second signaling;

sending a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

wherein the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; a second empty resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, and the first air interface resource block and the second air interface resource block have overlap in a time domain; a first number is used for determining a fourth resource block, the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As an embodiment, the problem to be solved by the present application includes: when UCIs (including HARQ-ACK (Hybrid Automatic Repeat reQuest Acknowledgement, etc.) of different priorities are allowed to be multiplexed into the same PUCCH, how to handle collision between multiple physical layer channels caused by PUCCH resource reselection.

As an embodiment, the problem to be solved by the present application includes: how to guarantee the communication performance of high priority traffic under the condition of allowing the multiplexing of different priority traffic in the UE.

As an embodiment, the essence of the above method is: when a PUCCH required to carry the multiplexed UCI of different priority collides with another uplink physical layer channel (e.g., a PUSCH), the priority corresponding to the other uplink physical layer channel is used to determine whether multiplexing is performed.

As an embodiment, the essence of the above method is: when a PUCCH required to carry multiplexed UCI of different priority collides with another uplink physical layer channel (e.g., a PUSCH), the priority corresponding to the other uplink physical layer channel is used to determine how the UCI of different priority is multiplexed.

As an embodiment, the essence of the above method is: when the PUCCH required to carry the first bit block and the third bit block collides with another uplink physical layer channel (e.g., a PUSCH), the priority corresponding to the other uplink physical layer channel is used to determine whether multiplexing is performed or how multiplexing is performed.

As an example, the above method has the benefits of: the transmission performance of high-priority data or control information is ensured.

As an example, the above method has the benefits of: the spectral efficiency (spectral efficiency) is improved.

As an example, the words collided in this application include: overlapping in the time domain.

According to one aspect of the application, the above method is characterized in that,

the first bit block comprises a first type of HARQ-ACK; the third bit block includes a second type of HARQ-ACK.

when the priority of the second bit block is the first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the first priority, the target empty resource block is the first empty resource block.

As an example, the above method has the benefits of: the PUCCH required for carrying the first bit block and the third bit block collides with another uplink physical layer channel (e.g., a PUSCH); when the priority corresponding to the other uplink physical layer channel is the high priority, the transmission performance of the transmitted data or control information of the other uplink physical layer channel is not affected.

As an example, the above method has the benefits of: the PUCCH required for carrying the first bit block and the third bit block collides with another uplink physical layer channel (e.g., a PUSCH); and when the priority corresponding to the other uplink physical layer channel is the low priority, the third bit block is transmitted after being multiplexed, so that the system performance is improved.

the N number ranges respectively correspond to the N empty resource block sets; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first block of bits and the number of bits comprised by the third block of bits is equal to one of the first range of numbers; the first empty resource block set is an empty resource block set corresponding to the first quantity range in the N empty resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

when the target air interface resource block is the first air interface resource block, the first node abandons and sends a signal carrying the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a part which is included in the second air interface resource block and is overlapped with the first air interface resource block in a time domain.

As an embodiment, the essence of the above method is: when the PUCCH required for carrying the first bit block and the third bit block collides with another uplink physical layer channel (such as a PUSCH) and the priority corresponding to the other uplink physical layer channel is low, only part of signals in the other uplink physical layer channel are abandoned to be transmitted.

As an example, the above method has the benefits of: it is advantageous to perform a cancel (cancel) operation.

the first number is used to determine the fourth resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is related to the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

As an embodiment, the essence of the above method is: when the PUCCH required to carry all high-priority UCI and all low-priority UCI collides with another uplink physical layer channel (e.g., one PUSCH): the low priority UCI is multiplexed onto a PUCCH orthogonal to the other upgoing physical layer channel in time domain before being transmitted (if the priority corresponding to the other upgoing physical layer channel is a high priority) after being subjected to the first processing.

As an embodiment, the input of the first process comprises a number of bits that is greater than the number of bits comprised by the output of the first process.

As one embodiment, the first processing includes one or more of a logical and, a logical or, an exclusive or, a deleting bit, a pre-coding, an adding a duplicate bit, or a zero padding operation.

As an example, the above method has the benefits of: the number of reported UCI information bits is optimized without affecting the transmission of high priority information.

The application discloses a method in a second node used for wireless communication, characterized by comprising:

sending a first signaling and a second signaling;

receiving a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

when the target air interface resource block is the first air interface resource block, the second node does not execute signal reception aiming at the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a part which is included in the second air interface resource block and is overlapped with the first air interface resource block in a time domain.

The application discloses a first node device used for wireless communication, characterized by comprising:

a first receiver receiving a first signaling and a second signaling;

the first transmitter is used for transmitting a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

The present application discloses a second node device used for wireless communication, comprising:

a second transmitter for transmitting the first signaling and the second signaling;

the second receiver is used for receiving a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

As an example, the method in the present application has the following advantages:

guaranteed transmission performance (e.g., reliability or delay) requirements, etc.) of high priority data or control information;

improving the spectral efficiency of the communication system;

-taking into account the transmission performance of high priority information and the reporting performance of low priority UCI;

-facilitating performing operations to cancel the transmission;

-optimizing the number of UCI information bits that are reported without affecting the transmission of high priority information.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof with reference to the accompanying drawings in which:

FIG. 1 illustrates a process flow diagram of a first node according to one embodiment of the present application;

FIG. 2 shows a schematic diagram of a network architecture according to an embodiment of the present application;

figure 3 shows a schematic diagram of a radio protocol architecture of a user plane and a control plane according to an embodiment of the present application;

FIG. 4 shows a schematic diagram of a first communication device and a second communication device according to an embodiment of the present application;

FIG. 5 shows a signal transmission flow diagram according to an embodiment of the present application;

fig. 6 shows a schematic diagram of a relationship between a fifth resource block of null ports, a first bit block, a third resource block of null ports and a third bit block according to an embodiment of the present application;

fig. 7 is a diagram illustrating a relationship between N number ranges, N sets of empty resource blocks, a sum of a number of bits included in a first bit block and a number of bits included in a third bit block, the first number range, the first set of empty resource blocks, and the first empty resource block according to an embodiment of the present application;

fig. 8 is a diagram illustrating a process in which the priority of a second bit block is used to determine a target air interface resource block from a first air interface resource block and a fourth air interface resource block according to an embodiment of the present application;

fig. 9 is a schematic diagram illustrating a process of determining whether to abandon sending a signal carrying a second bit block in a second air interface resource sub-block according to an embodiment of the present application;

fig. 10 shows a schematic diagram of a procedure for determining whether to transmit a second signal in a second air interface resource block according to an embodiment of the present application;

fig. 11 shows a schematic diagram of a relationship between a number of bits comprised by a first bit block, a number of bits comprised by a fourth bit block, a first number and a number of bits comprised by a third bit block according to an embodiment of the present application;

FIG. 12 shows a block diagram of a processing arrangement in a first node device according to an embodiment of the present application;

fig. 13 is a block diagram illustrating a structure of a processing apparatus in a second node device according to an embodiment of the present application.

Detailed Description

The technical solutions of the present application will be further described in detail with reference to the accompanying drawings, and it should be noted that the embodiments and features of the embodiments of the present application can be arbitrarily combined with each other without conflict.

Example 1

Embodiment 1 illustrates a processing flow diagram of a first node according to an embodiment of the present application, as shown in fig. 1.

In embodiment 1, the first node in this application receives a second signaling in step 101; receiving a first signaling in step 102; in step 103 a first signal is transmitted in a target air interface resource block.

In embodiment 1, the first signal carries a first block of bits; the first signaling is used to determine the first block of bits, the second signaling is used to determine a third block of bits; a second empty resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, and the first air interface resource block and the second air interface resource block have overlap in a time domain; a first number is used for determining a fourth resource block, the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As one embodiment, the first signal comprises a wireless signal.

For one embodiment, the first signal comprises a radio frequency signal.

For one embodiment, the first signal comprises a baseband signal.

In one embodiment, the first node receives the second signaling before receiving the first signaling.

In one embodiment, the first node receives the first signaling before receiving the second signaling.

As an embodiment, the first node receives the first signaling and the second signaling simultaneously.

As an embodiment, the first signaling is dynamically configured.

As one embodiment, the first signaling includes layer 1(L1) signaling.

As an embodiment, the first signaling comprises layer 1(L1) control signaling.

As one embodiment, the first signaling includes Physical Layer (Physical Layer) signaling.

As an embodiment, the first signaling comprises one or more fields (fields) in a physical layer signaling.

As an embodiment, the first signaling comprises Higher Layer (Higher Layer) signaling.

As an embodiment, the first signaling comprises one or more fields in a higher layer signaling.

As an embodiment, the first signaling includes RRC (Radio Resource Control) signaling.

As an embodiment, the first signaling includes MAC CE (Medium Access Control layer Control Element) signaling.

As an embodiment, the first signaling comprises one or more fields in one RRC signaling.

As an embodiment, the first signaling comprises one or more fields in one MAC CE signaling.

As one embodiment, the first signaling includes DCI (Downlink Control Information).

As one embodiment, the first signaling includes one or more fields in one DCI.

As an embodiment, the first signaling includes SCI (Sidelink Control Information).

As an embodiment, the first signaling comprises one or more fields in one SCI.

As an embodiment, the first signaling comprises one or more fields in an ie (information element).

As an embodiment, the first signaling is a DownLink scheduling signaling (DownLink Grant signaling).

As an embodiment, the first signaling is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used to carry physical layer signaling).

As an embodiment, the Downlink Physical layer Control CHannel in the present application is a PDCCH (Physical Downlink Control CHannel).

As an embodiment, the downlink physical layer control channel in this application is a short PDCCH (short PDCCH).

As an embodiment, the downlink physical layer control channel in the present application is an NB-PDCCH (Narrow Band PDCCH).

As an embodiment, the first signaling is DCI format 1_0, and the specific definition of the DCI format 1_0 is described in section 7.3.1.2 of 3GPP TS 38.212.

As an embodiment, the first signaling is DCI format 1_1, and the specific definition of the DCI format 1_1 is described in section 7.3.1.2 of 3GPP TS 38.212.

As an embodiment, the first signaling is DCI format 1_2, and the specific definition of the DCI format 1_2 is described in section 7.3.1.2 in 3GPP TS 38.212.

As an embodiment, the first signaling is signaling used for scheduling a downlink physical layer data channel.

As an embodiment, the Downlink Physical layer data Channel in the present application is a PDSCH (Physical Downlink Shared Channel).

As an embodiment, the downlink physical layer data channel in the present application is sPDSCH (short PDSCH).

As an embodiment, the downlink physical layer data channel in the present application is NB-PDSCH (Narrow Band PDSCH).

As an embodiment, the second signaling is dynamically configured.

As an embodiment, the second signaling comprises layer 1 signaling.

As an embodiment, the second signaling comprises layer 1 control signaling.

As one embodiment, the second signaling includes physical layer signaling.

As an embodiment, the second signaling comprises one or more fields in one physical layer signaling.

As an embodiment, the second signaling comprises higher layer signaling.

As an embodiment, the second signaling comprises one or more fields in a higher layer signaling.

As an embodiment, the second signaling comprises RRC signaling.

As an embodiment, the second signaling comprises MAC CE signaling.

As an embodiment, the second signaling comprises one or more fields in one RRC signaling.

As an embodiment, the second signaling comprises one or more fields in one MAC CE signaling.

As one embodiment, the second signaling includes DCI.

As an embodiment, the second signaling includes one or more fields in one DCI.

For one embodiment, the second signaling includes SCI.

As an embodiment, the second signaling comprises one or more fields in one SCI.

As an embodiment, the second signaling includes one or more fields in one IE.

As an embodiment, the second signaling is a downlink scheduling signaling.

As an embodiment, the second signaling is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used for carrying physical layer signaling).

As an embodiment, the second signaling is DCI format 1_0, and the specific definition of the DCI format 1_0 is described in section 7.3.1.2 in 3GPP TS 38.212.

As an embodiment, the second signaling is DCI format 1_1, and the specific definition of the DCI format 1_1 is described in section 7.3.1.2 of 3GPP TS 38.212.

As an embodiment, the second signaling is DCI format 1_2, and the specific definition of the DCI format 1_2 is described in section 7.3.1.2 in 3GPP TS 38.212.

As an embodiment, the second signaling is signaling used for scheduling a downlink physical layer data channel.

As an embodiment, said sentence said first signal carrying a first block of bits comprises: the first signal includes an output of all or part of bits in the first bit block after CRC addition (CRC Insertion), Segmentation (Segmentation), Coding block level CRC addition (CRC Insertion), Channel Coding (Channel Coding), Rate Matching (Rate Matching), Concatenation (Concatenation), Scrambling (Scrambling), Modulation (Modulation), Layer Mapping (Layer Mapping), Precoding (Precoding), Mapping to Resource elements (Mapping to Resource elements), multi-carrier symbol Generation (Generation), Modulation up-conversion (Modulation and up-conversion) in sequence.

As an embodiment, when the target air interface resource block is the former one of the first air interface resource block and the fourth air interface resource block, the first signal carries the third bit block.

As an embodiment, when the first signal carries the third block of bits: the first signal comprises output of all or part of bits in the third bit block after CRC addition, segmentation, coding block level CRC addition, channel coding, rate matching, concatenation, scrambling, modulation, layer mapping, precoding, mapping to resource elements, multi-carrier symbol generation and modulation of part or all of the up-conversion.

As an embodiment, when the first signal carries the third block of bits: the first signal comprises output of all or part of bits in the first bit block and the third bit block after CRC addition, segmentation, coding block level CRC addition, channel coding, rate matching, concatenation, scrambling, modulation, layer mapping, precoding, mapping to resource elements, multi-carrier symbol generation and modulation up-conversion in sequence.

As an embodiment, the first empty Resource block includes a positive integer number of REs (Resource elements) in a time-frequency domain.

As an embodiment, one of the REs occupies one multicarrier symbol in the time domain and one subcarrier in the frequency domain.

As an embodiment, the multi-carrier Symbol in this application is an OFDM (Orthogonal Frequency Division Multiplexing) Symbol (Symbol).

As an embodiment, the multicarrier symbol in this application is an SC-FDMA (Single Carrier-Frequency Division Multiple Access) symbol.

As an embodiment, the multicarrier symbol in this application is a DFT-S-OFDM (Discrete Fourier Transform Spread OFDM) symbol.

As an embodiment, the first null resource block includes a positive integer number of subcarriers (subcarriers) in a frequency domain.

As an embodiment, the first empty Resource Block includes a positive integer number of PRBs (Physical Resource blocks) in a frequency domain.

As an embodiment, the first empty Resource block includes a positive integer number of RBs (Resource blocks) in a frequency domain.

As an embodiment, the first air interface resource block includes a positive integer number of multicarrier symbols in a time domain.

As an embodiment, the first air-port resource block includes a positive integer number of slots (slots) in a time domain.

As an embodiment, the first slot resource block includes a positive integer number of sub-slots (sub-slots) in a time domain.

As an embodiment, the first null resource block includes a positive integer number of milliseconds (ms) in a time domain.

As an embodiment, the first air interface resource block includes a positive integer number of consecutive multicarrier symbols in a time domain.

As an embodiment, the first air interface resource block includes a positive integer number of discontinuous time slots in a time domain.

As an embodiment, the first air interface resource block includes a positive integer number of consecutive time slots in a time domain.

As one embodiment, the first resource block of air ports includes a positive integer number of sub-frames in the time domain.

As an embodiment, the first air interface resource block is configured by physical layer signaling.

As an embodiment, the first air interface resource block is configured by higher layer signaling.

As an embodiment, the first air interface Resource is configured by RRC (Radio Resource Control) signaling.

As an embodiment, the first air interface resource block is configured by a MAC CE (Medium Access Control layer Control Element) signaling.

As an embodiment, the first air interface resource block is reserved for a physical layer channel.

As an embodiment, the first air interface resource block includes air interface resources reserved for a physical layer channel.

As an embodiment, the first air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the first air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the first air interface resource block includes time-frequency resources reserved for one physical layer channel in time-frequency domain.

As an embodiment, the Physical layer CHannel in the present application includes a PUCCH (Physical Uplink Control CHannel).

As an embodiment, the Physical layer CHannel in the present application includes a PUSCH (Physical Uplink Shared CHannel).

As an embodiment, the physical layer channel in this application includes an uplink physical layer channel.

As an embodiment, the first null resource block includes one PUCCH resource (PUCCH resource).

As an embodiment, the first empty resource block includes one PUCCH resource in one PUCCH resource set (PUCCH resource set).

As an embodiment, the first signaling indicates the first resource block.

As an embodiment, the first signaling explicitly indicates the first resource block.

As an embodiment, the first signaling implicitly indicates the first resource block.

As an embodiment, the second signaling indicates the first resource block.

As an embodiment, the second signaling explicitly indicates the first resource block.

As an embodiment, the second signaling implicitly indicates the first resource block.

As an embodiment, the implicit indication in this application includes: implicitly indicated by a signaling format (format).

As an embodiment, the implicit indication in this application includes: implicitly indicated by RNTI (Radio Network temporary Identity).

As an embodiment, the second air interface resource block includes a positive integer number of REs in a time-frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of subcarriers in a frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of PRBs in a frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of RBs in a frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of multicarrier symbols in a time domain.

As an embodiment, the second air interface resource block includes a positive integer number of slots in a time domain.

As an embodiment, the second air interface resource block includes a positive integer number of sub-slots in a time domain.

As an embodiment, the second air interface resource block includes a positive integer number of milliseconds in a time domain.

As an embodiment, the second air interface resource block includes a positive integer number of consecutive multicarrier symbols in a time domain.

As an embodiment, the second air interface resource block includes a positive integer number of discontinuous time slots in a time domain.

As an embodiment, the second air interface resource block includes a positive integer number of consecutive time slots in a time domain.

As an embodiment, the second resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the second air interface resource block is configured by physical layer signaling.

As an embodiment, the second air interface resource block is configured by higher layer signaling.

As an embodiment, the second air interface resource is configured by RRC signaling.

As an embodiment, the second empty resource block is configured by MAC CE signaling.

As an embodiment, the second air interface resource block is reserved for a physical layer channel.

As an embodiment, the second air interface resource block includes air interface resources reserved for a physical layer channel.

As an embodiment, the second air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the second air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the second air interface resource block includes time-frequency resources reserved for one physical layer channel in time-frequency domain.

As an embodiment, the second air interface resource block includes one PUCCH resource.

In one embodiment, the second empty resource block includes one PUCCH resource in one PUCCH resource set.

As an embodiment, the second air interface resource block includes an air interface resource occupied by a PUSCH.

As an embodiment, the second null resource block is reserved for one PUSCH transmission (a PUSCH transmission).

As an embodiment, the second resource block of the null port is reserved for one PUSCH transmission carrying the second bit block.

As an embodiment, the fourth resource block includes a positive integer number of REs in a time-frequency domain.

As an embodiment, the fourth empty resource block includes a positive integer number of subcarriers in a frequency domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of PRBs in a frequency domain.

As an embodiment, the fourth resource block includes a positive integer number of RBs in a frequency domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of multicarrier symbols in a time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of slots in a time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of sub-slots in a time domain.

As an embodiment, the fourth resource block of the null interface includes a positive integer of milliseconds in the time domain.

As an embodiment, the fourth resource block includes a positive integer number of consecutive multicarrier symbols in the time domain.

As an embodiment, the fourth resource block of air ports includes a positive integer number of discontinuous time slots in the time domain.

As an embodiment, the fourth resource block includes a positive integer number of consecutive slots in the time domain.

As an embodiment, the fourth resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the fourth resource block is configured by physical layer signaling.

As an embodiment, the fourth resource block is configured by higher layer signaling.

As an embodiment, the fourth air interface resource is configured by RRC signaling.

As an embodiment, the fourth empty resource block is configured by MAC CE signaling.

As an embodiment, the fourth empty resource block is reserved for one physical layer channel.

As an embodiment, the fourth air interface resource block includes air interface resources reserved for one physical layer channel.

As an embodiment, the fourth air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the fourth resource block includes, in the time-frequency domain, a time-frequency resource occupied by a physical layer channel.

As an embodiment, the fourth resource block includes time-frequency resources reserved for one physical layer channel in the time-frequency domain.

As an embodiment, the fourth empty resource block includes one PUCCH resource.

As an embodiment, the fourth empty resource block includes one PUCCH resource in one PUCCH resource set.

As an embodiment, the first signaling indicates the fourth resource block.

As an embodiment, the first signaling explicitly indicates the fourth resource block.

As an embodiment, the first signaling implicitly indicates the fourth resource block for the air interface.

As an embodiment, the second signaling indicates the fourth resource block.

As an embodiment, the second signaling explicitly indicates the fourth resource block.

As an embodiment, the second signaling implicitly indicates the fourth resource block for the air interface.

For one embodiment, the first bit block includes a first type of HARQ-ACK.

As one embodiment, the first bit block includes a positive integer number of bits.

As an embodiment, the first bit block comprises a positive integer number of ACKs or NACKs.

As an embodiment, the first bit block includes a positive integer number of the first type HARQ-ACK information bits (s)).

For one embodiment, the first bit block includes a HARQ-ACK codebook (codebook).

As an embodiment, all HARQ-ACKs comprised by the first bit block are HARQ-ACKs of the first type.

As an embodiment, the first type of HARQ-ACK comprises HARQ-ACKs corresponding to one of a plurality of QoS (Quality of Service) types.

As an embodiment, the first type of HARQ-ACK includes HARQ-ACK corresponding to URLLC traffic type.

For one embodiment, the first type of HARQ-ACK includes HARQ-ACKs corresponding to an eMBB traffic type.

For one embodiment, the first type of HARQ-ACK comprises a high priority HARQ-ACK.

For one embodiment, the first type of HARQ-ACK comprises a low priority HARQ-ACK.

As an embodiment, the first type of HARQ-ACK includes HARQ-ACK corresponding to a Priority Index (Priority Index) 1.

For one embodiment, the first type of HARQ-ACK comprises HARQ-ACK with corresponding priority index 0.

For one embodiment, the first bit block includes UCI.

For one embodiment, the first bit block includes UCI corresponding to priority index 1.

For one embodiment, the first bit block includes UCI corresponding to priority index 0.

For one embodiment, the first bit block includes high priority UCI.

For one embodiment, the first bit block includes low priority UCI.

For one embodiment, the first bit block includes a first type of UCI.

As an embodiment, the first bit block includes an SR (Scheduling Request).

As an embodiment, the first bit block includes an SR corresponding to a priority index of 1.

As an embodiment, the first bit block includes an SR corresponding to a priority index of 0.

As an embodiment, the first bit block comprises a high priority SR.

As an embodiment, the first bit block comprises a low priority SR.

As an embodiment, the first bit block includes a CSI (Channel State Information) report (report).

As an embodiment, the first type of HARQ-ACK includes sidelink HARQ-ACK (SL HARQ-ACK).

As an embodiment, the first bit block includes information indicating whether the first signaling is correctly received, or the first bit block includes information indicating whether one bit block scheduled by the first signaling is correctly received.

As an embodiment, the first type of HARQ-ACK included in the first bit block includes HARQ-ACK indicating whether the first signaling is correctly received, or the first type of HARQ-ACK included in the first bit block includes HARQ-ACK indicating whether one bit block scheduled by the first signaling is correctly received.

As an embodiment, the first signaling includes scheduling information of the one bit block scheduled by the first signaling.

As an embodiment, the scheduling information in this application includes at least one of occupied time domain resources, occupied frequency domain resources, MCS (Modulation and Coding Scheme), Configuration information of DMRS (DeModulation Reference Signals), HARQ (Hybrid Automatic Repeat reQuest) process number, RV (Redundancy Version), NDI (New Data Indicator), period (periodicity), transmitting antenna port, and corresponding TCI (Transmission Configuration Indicator) state (state).

As an embodiment, the one bit block scheduled by the first signaling comprises a positive integer number of bits.

As an embodiment, the one bit Block scheduled by the first signaling includes one Transport Block (TB).

As an embodiment, the one bit Block scheduled by the first signaling includes one CB (Code Block).

As an embodiment, the one bit Block scheduled by the first signaling includes one CBG (Code Block Group).

As an embodiment, the sixth bit block includes indication information whether the first signaling is correctly received, or the sixth bit block includes indication information whether one bit block scheduled by the first signaling is correctly received; the sixth bit block is used to generate the first bit block.

As an embodiment, a sixth block of bits is used to generate the first block of bits.

As an embodiment, the sixth bit block includes HARQ-ACKs of the first type.

As an embodiment, the sixth bit block comprises a positive integer number of bits.

As an embodiment, the sixth bit block comprises a positive integer number of ACKs or NACKs.

As an embodiment, the sixth bit block includes a positive integer number of the HARQ-ACK information bits of the first type.

For an embodiment, the sixth bit block includes a HARQ-ACK codebook.

As an embodiment, all HARQ-ACKs comprised by the sixth bit block are HARQ-ACKs of the first type.

As an embodiment, the sixth bit block includes UCI.

For one embodiment, the sixth bit block includes UCI corresponding to priority index 1.

For one embodiment, the sixth bit block includes UCI corresponding to priority index 0.

For one embodiment, the sixth bit block includes high priority UCI.

For one embodiment, the sixth bit block includes low priority UCI.

For an embodiment, the sixth bit block includes UCI of the first type.

As an embodiment, the sixth bit block includes an SR.

As an embodiment, the sixth bit block includes an SR corresponding to priority index 1.

As an embodiment, the sixth bit block includes an SR corresponding to a priority index of 0.

As an embodiment, the sixth bit block comprises a high priority SR.

As an embodiment, the sixth bit block comprises a low priority SR.

As an embodiment, the sixth bit block includes CSI reporting.

As an embodiment, the meaning that the sixth bit block of the sentence is used to generate the first bit block comprises: the first bit block is the sixth bit block.

As an embodiment, the meaning that the sixth bit block of the sentence is used to generate the first bit block comprises: the first bit block includes all or a portion of the bits in the sixth bit block.

As an embodiment, the meaning that the sixth bit block of the sentence is used to generate the first bit block comprises: the first bit block comprises an output of a part or all of bits in the sixth bit block after one or more of logical and, logical or, exclusive or, deleting bits or zero padding operation.

As an embodiment, the meaning that the sixth bit block of the sentence is used to generate the first bit block comprises: the first bit block comprises an output of part or all of the bits in the sixth bit block after one or more of logical and, logical or, exclusive or, bit deletion, precoding, bit repetition addition or zero padding.

As an embodiment, the third bit block includes HARQ-ACKs of the second type.

As an embodiment, the third bit block comprises a positive integer number of bits.

As an embodiment, the third bit block comprises a positive integer number of ACKs or NACKs.

As an embodiment, the third bit block includes a positive integer number of HARQ-ACK information bits of the second type.

For an embodiment, the third bit block comprises a HARQ-ACK codebook.

As an embodiment, all HARQ-ACKs comprised by the third bit block are HARQ-ACKs of the second type.

As an embodiment, the second type of HARQ-ACK comprises HARQ-ACKs corresponding to one of a plurality of QoS types.

As an embodiment, the second type of HARQ-ACK includes HARQ-ACK corresponding to URLLC traffic type.

For one embodiment, the second type of HARQ-ACK includes HARQ-ACK corresponding to an eMBB traffic type.

As an embodiment, the second type of HARQ-ACK comprises a high priority HARQ-ACK.

As an embodiment, the second type of HARQ-ACK comprises a low priority HARQ-ACK.

For one embodiment, the second type of HARQ-ACK includes HARQ-ACK corresponding to a Priority Index (Priority Index) 1.

For one embodiment, the second type of HARQ-ACK comprises HARQ-ACKs corresponding to a priority index of 0.

For one embodiment, the third bit block includes UCI.

For one embodiment, the third bit block includes UCI corresponding to priority index 1.

For one embodiment, the third bit block includes UCI corresponding to priority index 0.

For one embodiment, the third bit block includes high priority UCI.

For one embodiment, the third bit block includes low priority UCI.

For one embodiment, the third bit block includes UCI of the second type.

As an embodiment, the first type of UCI and the second type of UCI are different types of UCI, respectively.

As an embodiment, the third bit block includes an SR.

As an embodiment, the third bit block includes an SR corresponding to priority index 1.

As an embodiment, the third bit block includes an SR corresponding to a priority index of 0.

As an embodiment, the third bit block comprises a high priority SR.

As an embodiment, the third bit block comprises a low priority SR.

As an embodiment, the third bit block includes CSI reporting.

As an embodiment, the third bit block corresponds to a priority index of 0, and the first bit block corresponds to a priority index of 1.

As an embodiment, the third bit block corresponds to a priority index of 1, and the first bit block corresponds to a priority index of 0.

As an embodiment, the second type of HARQ-ACK includes sidelink HARQ-ACK (SL HARQ-ACK).

As an embodiment, the second type of HARQ-ACK and the first type of HARQ-ACK are HARQ-ACKs for different links, respectively.

For one embodiment, the different links include an uplink and a sidelink.

As an embodiment, the second type of HARQ-ACK and the first type of HARQ-ACK are different types of HARQ-ACK respectively.

As an embodiment, the second type of HARQ-ACK and the first type of HARQ-ACK are HARQ-ACKs of different priorities, respectively.

As an embodiment, the second type of HARQ-ACK and the first type of HARQ-ACK are HARQ-ACKs corresponding to different priority indexes, respectively.

For one embodiment, the second type of HARQ-ACK comprises HARQ-ACKs corresponding to priority index 1, and the first type of HARQ-ACKs comprises HARQ-ACKs corresponding to priority index 0.

For one embodiment, the second type of HARQ-ACK comprises HARQ-ACKs corresponding to priority index 0, and the first type of HARQ-ACKs comprises HARQ-ACKs corresponding to priority index 1.

As an embodiment, the third bit block comprises a different kind of HARQ-ACK than the first bit block.

As an embodiment, the third bit block includes indication information whether the second signaling is correctly received, or the third bit block includes indication information whether one bit block scheduled by the second signaling is correctly received.

As an embodiment, the second type of HARQ-ACK included in the third bit block includes HARQ-ACK indicating whether the second signaling is correctly received, or the second type of HARQ-ACK included in the third bit block includes HARQ-ACK indicating whether one bit block scheduled by the second signaling is correctly received.

As an embodiment, the second signaling includes scheduling information of the one bit block scheduled by the second signaling.

As an embodiment, the one bit block scheduled by the second signaling comprises a positive integer number of bits.

As an embodiment, the one bit block scheduled by the second signaling comprises one TB.

As an embodiment, the one bit block scheduled by the second signaling includes one CB.

As an embodiment, the one bit block scheduled by the second signaling comprises one CBG.

As an embodiment, the seventh bit block includes indication information whether the second signaling is correctly received, or the seventh bit block includes indication information whether one bit block scheduled by the second signaling is correctly received; the seventh bit block is used to generate the third bit block.

As an embodiment, a seventh bit block is used for generating the third bit block.

As an embodiment, the seventh bit block includes HARQ-ACKs of the second type.

As an embodiment, the seventh bit block comprises a positive integer number of bits.

As an embodiment, the seventh bit block comprises a positive integer number of ACKs or NACKs.

As an embodiment, the seventh bit block includes a positive integer number of HARQ-ACK information bits of the second type.

For one embodiment, the seventh bit block includes a HARQ-ACK codebook.

As an embodiment, all HARQ-ACKs comprised by the seventh bit block are HARQ-ACKs of the second type.

For one embodiment, the seventh bit block includes UCI.

For one embodiment, the seventh bit block includes UCI corresponding to priority index 1.

For one embodiment, the seventh bit block includes UCI corresponding to priority index 0.

For one embodiment, the seventh bit block includes high priority UCI.

For one embodiment, the seventh bit block includes low priority UCI.

For an embodiment, the seventh bit block includes UCI of the second type.

As an embodiment, the first type of UCI and the second type of UCI are UCI of different priorities, respectively.

As an embodiment, the first type of UCI and the second type of UCI are UCI corresponding to different priority indexes, respectively.

As an embodiment, the first type of UCI corresponds to a priority index 1, and the second type of UCI corresponds to a priority index 0.

As an embodiment, the first type of UCI corresponds to a priority index 0, and the second type of UCI corresponds to a priority index 1.

As an embodiment, the first type of UCI and the second type of UCI are UCI for different links, respectively.

As an embodiment, the seventh bit block includes an SR.

As an embodiment, the seventh bit block includes an SR corresponding to priority index 1.

As an embodiment, the seventh bit block includes an SR corresponding to a priority index of 0.

As an embodiment, the seventh bit block comprises a high priority SR.

As an embodiment, the seventh bit block comprises a low priority SR.

As an embodiment, the seventh bit block includes CSI reporting.

As an embodiment, the first bit block includes the same category of UCI as the sixth bit block.

As an embodiment, the first bit block includes a same HARQ-ACK class as the sixth bit block.

As an embodiment, the third bit block includes the same kind of UCI as the kind of UCI included in the seventh bit block.

As an embodiment, the third bit block comprises the same HARQ-ACK category as the seventh bit block.

As an embodiment, the third bit block includes a different category of UCI than the first bit block.

As an embodiment, the third bit block comprises a different category of HARQ-ACK than the first bit block.

As an embodiment, the meaning that the seventh bit block of the sentence is used to generate the third bit block includes: the third bit block is the seventh bit block.

As an embodiment, the meaning that the seventh bit block of the sentence is used to generate the third bit block includes: the third bit block includes all or a portion of the bits in the seventh bit block.

As an embodiment, the meaning that the seventh bit block of the sentence is used to generate the third bit block includes: the third bit block comprises an output of a part or all of the bits in the seventh bit block after one or more of logical AND, logical OR, XOR, bit deletion or zero padding.

As an embodiment, the meaning that the seventh bit block of the sentence is used to generate the third bit block includes: the third bit block comprises an output of part or all of the bits in the seventh bit block after one or more of logical AND, logical OR, XOR, bit deletion, precoding, bit repetition addition or zero padding.

As an embodiment, when the target air interface resource block is the latter one of the first air interface resource block and the fourth air interface resource block, the first signal carries one bit block generated by the seventh bit block.

As an embodiment, when the target air interface resource block is the latter of the first air interface resource block and the fourth air interface resource block, the first signal carries only the first bit block of the first bit block and the third bit block.

As an embodiment, when the target air interface resource block is the latter one of the first air interface resource block and the fourth air interface resource block, the first signal does not carry the second type HARQ-ACK.

As an embodiment, the seventh bit block comprises a number of bits greater than a seventh threshold.

As an embodiment, only when the number of bits included in the seventh bit block is greater than a seventh threshold, the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the foregoing embodiment, when the number of bits included in the seventh bit block is not greater than the seventh threshold, the target air interface resource block is the fourth air interface resource block.

As an embodiment, only when the number of bits included in the seventh bit block is not less than a seventh threshold, the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the foregoing embodiment, when the number of bits included in the seventh bit block is smaller than the seventh threshold, the target air interface resource block is the fourth air interface resource block.

As one embodiment, the seventh threshold is greater than zero.

As an embodiment, the seventh threshold is configured for higher layer signaling.

As an embodiment, the seventh threshold is configured by RRC signaling.

As an embodiment, the seventh threshold is configured for mac ce signaling.

As an embodiment, the seventh threshold is predefined (default).

As an embodiment, only when the number of bits included in the seventh bit block is smaller than an eighth threshold, the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the foregoing embodiment, when the number of bits included in the seventh bit block is not less than the eighth threshold, the target air interface resource block is the first air interface resource block.

As an embodiment, only when the number of bits included in the seventh bit block is not greater than an eighth threshold, the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the foregoing embodiment, when the number of bits included in the seventh bit block is greater than the eighth threshold, the target air interface resource block is the first air interface resource block.

As one embodiment, the eighth threshold is greater than zero.

As an embodiment, the eighth threshold is configured for higher layer signaling.

As an embodiment, the eighth threshold is configured by RRC signaling.

As an embodiment, the eighth threshold is configured for mac ce signaling.

As an embodiment, the eighth threshold is predefined.

As an embodiment, the overlapping of the phrases in the time domain in the present application includes: there is overlap in the time domain and overlap in the frequency domain.

As an embodiment, the overlapping of the phrases in the time domain in the present application includes: there is overlap in the time domain, overlap in the frequency domain or orthogonality in the frequency domain.

As an embodiment, the first number is equal to a number of bits comprised by the first block of bits.

As an embodiment, the first number is greater than the number of bits comprised by the first bit block, and the first number is less than the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block.

As an example, the phrase orthogonal in this application includes: there is no overlap.

As an embodiment, the first signaling indicates a priority index of 0, and the second signaling indicates a priority index of 1.

As an embodiment, the first signaling indicates a priority index of 1, and the second signaling indicates a priority index of 0.

As an embodiment, the first signaling includes a field indicating priority.

As an embodiment, the second signaling comprises a field indicating priority.

As an embodiment, the one Priority-indicating field is a Priority indicator field.

As an embodiment, the one domain indicating priority is used to indicate a priority index.

As an embodiment, the one priority indicating field includes 1 bit.

As an embodiment, the one priority indicating field includes 2 bits.

As an embodiment, the one priority indicating field includes 3 bits.

As an embodiment, the one priority indicating field includes a plurality of bits.

As an embodiment, a signaling format of the first signaling is used to indicate a priority index.

As an embodiment, a signaling format of the second signaling is used to indicate a priority index.

As an embodiment, the priority of the first bit block is different from the priority of the third bit block.

As an embodiment, the first bit block has a higher priority than the third bit block.

As an embodiment, when the target air interface resource block is the first air interface resource block, the number of bits related to the first bit block or the third bit block transmitted in the first air interface resource block is an eighth number; when the target air interface resource block is the fourth air interface resource block, the number of bits related to the first bit block or the third bit block transmitted in the fourth air interface resource block is a ninth number; the eighth number is greater than the ninth number.

As a sub-embodiment of the above embodiment, said eighth number is equal to a sum of said number of bits comprised by said first bit block and said number of bits comprised by said third bit block.

As a sub-embodiment of the above embodiment, the ninth number is equal to the first number.

As an embodiment, the sentence that the first number is used to determine the meaning of the fourth empty resource block includes: the first number is used to determine the fourth resource block.

As an embodiment, the sentence that the first number is used to determine the meaning of the fourth empty resource block includes: the first number is used to determine the fourth empty resource block only if the target empty resource block is the latter of the first empty resource block and the fourth empty resource block.

As an embodiment, the sentence that the first number is used to determine the meaning of the fourth empty resource block includes: the first number is used to determine the fourth resource block of air ports only if the priority of the second bit block is the first priority.

As an embodiment, the sentence that the first number is used to determine the meaning of the fourth empty resource block includes: when the target air interface resource block is the latter of the first air interface resource block and the fourth air interface resource block, the first number is used to determine the fourth air interface resource block.

As an embodiment, the sentence that the first number is used to determine the meaning of the fourth empty resource block includes: the first number is used to determine the fourth resource block of air ports when the priority of the second bit block is the first priority.

As one example, the phrase in this application is used to include: is used by the first node in the present application.

As one example, the phrase in this application is used to include: is used by the second node in the present application.

As one example, the phrase in this application is used to include: is used by the transmitting end of the first signal.

As one example, the phrase in this application is used to include: is used by the receiving end of the first signal.

As an embodiment, the determining that the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the meaning of the first air interface resource block includes: the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is used to determine the first resource block of air ports.

As an embodiment, one signaling different from the first signaling and the second signaling is used for determining the second bit block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates an MCS used for the second bit block.

As an embodiment, one signaling different from the first signaling and the second signaling is used for determining the second empty resource block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates the second resource block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates a time domain resource occupied by the second empty resource block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates a frequency domain resource occupied by the second empty resource block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates a time-frequency resource occupied by the second air interface resource block.

As an embodiment, the one signaling different from the first signaling and the second signaling is dynamically configured.

As an embodiment, the one signaling different from the first signaling and the second signaling includes layer 1 signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling includes layer 1 control signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises physical layer signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more fields in one physical layer signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling includes higher layer signaling.

As an embodiment, said one signalling different from said first signalling and said second signalling comprises one or more fields in a higher layer signalling.

As an embodiment, the one signaling different from the first signaling and the second signaling includes RRC signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling includes MAC CE signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more fields in one RRC signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more fields in one MAC CE signaling.

As one embodiment, the one signaling different from the first signaling and the second signaling includes DCI.

As one embodiment, the one signaling different from the first signaling and the second signaling includes one or more fields in one DCI.

As an embodiment, said one signaling different from said first signaling and said second signaling comprises SCI.

As an embodiment, said one signaling different from said first signaling and said second signaling comprises one or more fields in one SCI.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more fields in one IE.

As an embodiment, the one signaling different from the first signaling and the second signaling is an UpLink scheduling signaling (UpLink Grant signaling).

As an embodiment, the one signaling different from the first signaling and the second signaling is a downlink scheduling signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used for carrying physical layer signaling).

As an embodiment, the one signaling different from the first signaling and the second signaling is DCI format 0_0, and the specific definition of the DCI format 0_0 is described in section 7.3.1.1 of 3GPP TS 38.212.

As an embodiment, the one signaling different from the first signaling and the second signaling is DCI format 0_1, and the specific definition of the DCI format 0_1 is described in section 7.3.1.1 of 3GPP TS 38.212.

As an embodiment, the one signaling different from the first signaling and the second signaling is DCI format 0_2, and the specific definition of the DCI format 0_2 is described in section 7.3.1.1 of 3GPP TS 38.212.

As an embodiment, the one signaling different from the first signaling and the second signaling is a signaling used for scheduling an uplink physical layer data channel.

Example 2

Embodiment 2 illustrates a schematic diagram of a network architecture according to the present application, as shown in fig. 2.

Fig. 2 illustrates a diagram of a network architecture 200 for 5G NR, LTE (Long-Term Evolution), and LTE-a (Long-Term Evolution-enhanced) systems. The 5G NR or LTE network architecture 200 may be referred to as EPS (Evolved Packet System) 200 or some other suitable terminology. The EPS 200 may include one or more UEs (User Equipment) 201, NG-RANs (next generation radio access networks) 202, EPCs (Evolved Packet cores)/5G-CNs (5G-Core networks) 210, HSS (Home Subscriber Server) 220, and internet services 230. The EPS may interconnect with other access networks, but these entities/interfaces are not shown for simplicity. As shown, the EPS provides packet-switched services, however those skilled in the art will readily appreciate that the various concepts presented throughout this application may be extended to networks providing circuit-switched services or other cellular networks. The NG-RAN includes NR node b (gNB)203 and other gnbs 204. The gNB203 provides user and control plane protocol termination towards the UE 201. The gnbs 203 may be connected to other gnbs 204 via an Xn interface (e.g., backhaul). The gNB203 may also be referred to as a base station, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a Basic Service Set (BSS), an Extended Service Set (ESS), a TRP (transmitting receiving node), or some other suitable terminology. The gNB203 provides an access point for the UE201 to the EPC/5G-CN 210. Examples of the UE201 include a cellular phone, a smart phone, a Session Initiation Protocol (SIP) phone, a laptop, a Personal Digital Assistant (PDA), a satellite radio, non-terrestrial base station communications, satellite mobile communications, a global positioning system, a multimedia device, a video device, a digital audio player (e.g., MP3 player), a camera, a game console, a drone, an aircraft, a narrowband internet of things device, a machine type communication device, a terrestrial vehicle, an automobile, a wearable device, or any other similar functioning device. Those skilled in the art may also refer to UE201 as a mobile station, a subscriber station, a mobile unit, a subscriber unit, a wireless unit, a remote unit, a mobile device, a wireless communication device, a remote device, a mobile subscriber station, an access terminal, a mobile terminal, a wireless terminal, a remote terminal, a handset, a user agent, a mobile client, a client, or some other suitable terminology. The gNB203 connects to the EPC/5G-CN 210 through the S1/NG interface. The EPC/5G-CN 210 includes MME (Mobility Management Entity)/AMF (Authentication Management Domain)/UPF (User Plane Function) 211, other MMEs/AMF/UPF 214, S-GW (Service Gateway) 212, and P-GW (Packet data Network Gateway) 213. MME/AMF/UPF211 is a control node that handles signaling between UE201 and EPC/5G-CN 210. In general, the MME/AMF/UPF211 provides bearer and connection management. All user IP (Internet protocol) packets are transmitted through S-GW212, and S-GW212 itself is connected to P-GW 213. The P-GW213 provides UE IP address allocation as well as other functions. The P-GW213 is connected to the internet service 230. The internet service 230 includes an operator-corresponding internet protocol service, and may specifically include the internet, an intranet, an IMS (IP Multimedia Subsystem), and a packet-switched streaming service.

As an embodiment, the UE201 corresponds to the first node in this application.

As an embodiment, the UE241 corresponds to the second node in this application.

As an embodiment, the gNB203 corresponds to the second node in this application.

As an embodiment, the UE241 corresponds to the first node in this application.

As an embodiment, the UE201 corresponds to the second node in this application.

Example 3

Embodiment 3 shows a schematic diagram of an embodiment of a radio protocol architecture for the user plane and the control plane according to the present application, as shown in fig. 3. Fig. 3 is a schematic diagram illustrating an embodiment of radio protocol architecture for the user plane 350 and the control plane 300, fig. 3 showing the radio protocol architecture for the first communication node device (UE, RSU in gbb or V2X) and the second communication node device (gbb, RSU in UE or V2X), or the control plane 300 between two UEs, in three layers: layer 1, layer 2 and layer 3. Layer 1(L1 layer) is the lowest layer and implements various PHY (physical layer) signal processing functions. The L1 layer will be referred to herein as PHY 301. Layer 2(L2 layer) 305 is above PHY301 and is responsible for the link between the first and second communication node devices and the two UEs through PHY 301. The L2 layer 305 includes a MAC (Medium Access Control) sublayer 302, an RLC (Radio Link Control) sublayer 303, and a PDCP (Packet Data Convergence Protocol) sublayer 304, which terminate at the second communication node device. The PDCP sublayer 304 provides multiplexing between different radio bearers and logical channels. The PDCP sublayer 304 also provides security by ciphering data packets and provides handoff support between second communication node devices to the first communication node device. The RLC sublayer 303 provides segmentation and reassembly of upper layer packets, retransmission of lost packets, and reordering of packets to compensate for out-of-order reception due to HARQ. The MAC sublayer 302 provides multiplexing between logical and transport channels. The MAC sublayer 302 is also responsible for allocating various radio resources (e.g., resource blocks) in one cell between the first communication node devices. The MAC sublayer 302 is also responsible for HARQ operations. The RRC (Radio Resource Control) sublayer 306 in layer 3 (layer L3) in the Control plane 300 is responsible for obtaining Radio resources (i.e. Radio bearers) and configuring the lower layers using RRC signaling between the second communication node device and the first communication node device. The radio protocol architecture of the user plane 350 comprises layer 1(L1 layer) and layer 2(L2 layer), the radio protocol architecture in the user plane 350 for the first and second communication node devices being substantially the same for the physical layer 351, the PDCP sublayer 354 in the L2 layer 355, the RLC sublayer 353 in the L2 layer 355 and the MAC sublayer 352 in the L2 layer 355 as the corresponding layers and sublayers in the control plane 300, but the PDCP sublayer 354 also provides header compression for upper layer packets to reduce radio transmission overhead. The L2 layer 355 in the user plane 350 further includes an SDAP (Service Data Adaptation Protocol) sublayer 356, and the SDAP sublayer 356 is responsible for mapping between QoS streams and Data Radio Bearers (DRBs) to support diversity of services. Although not shown, the first communication node device may have several upper layers above the L2 layer 355, including a network layer (e.g., IP layer) that terminates at the P-GW on the network side and an application layer that terminates at the other end of the connection (e.g., far end UE, server, etc.).

As an example, the wireless protocol architecture in fig. 3 is applicable to the first node in this application.

As an example, the radio protocol architecture in fig. 3 is applicable to the second node in this application.

As an embodiment, the first bit block in this application is generated in the RRC sublayer 306.

As an embodiment, the first bit block in this application is generated in the MAC sublayer 302.

As an embodiment, the first bit block in this application is generated in the MAC sublayer 352.

As an embodiment, the first bit block in this application is generated in the PHY 301.

As an embodiment, the first bit block in this application is generated in the PHY 351.

As an embodiment, the second bit block in this application is generated in the RRC sublayer 306.

As an example, the second bit block in this application is generated in the SDAP sublayer 356.

As an embodiment, the second bit block in this application is generated in the MAC sublayer 302.

As an embodiment, the second bit block in this application is generated in the MAC sublayer 352.

As an embodiment, the second bit block in this application is generated in the PHY 301.

As an embodiment, the second bit block in this application is generated in the PHY 351.

As an embodiment, the third bit block in this application is generated in the RRC sublayer 306.

As an embodiment, the third bit block in this application is generated in the MAC sublayer 302.

As an embodiment, the third bit block in this application is generated in the MAC sublayer 352.

As an embodiment, the third bit block in this application is generated in the PHY 301.

As an embodiment, the third bit block in this application is generated in the PHY 351.

As an embodiment, the sixth bit block in this application is generated in the RRC sublayer 306.

As an embodiment, the sixth bit block in this application is generated in the MAC sublayer 302.

As an embodiment, the sixth bit block in this application is generated in the MAC sublayer 352.

As an embodiment, the sixth bit block in this application is generated in the PHY 301.

As an embodiment, the sixth bit block in this application is generated in the PHY 351.

As an embodiment, the seventh bit block in this application is generated in the RRC sublayer 306.

As an embodiment, the seventh bit block in this application is generated in the MAC sublayer 302.

As an embodiment, the seventh bit block in this application is generated in the MAC sublayer 352.

As an embodiment, the seventh bit block in this application is generated in the PHY 301.

As an embodiment, the seventh bit block in this application is generated in the PHY 351.

As an embodiment, the first signaling in this application is generated in the RRC sublayer 306.

As an embodiment, the first signaling in this application is generated in the MAC sublayer 302.

As an embodiment, the first signaling in this application is generated in the MAC sublayer 352.

As an embodiment, the first signaling in this application is generated in the PHY 301.

As an embodiment, the first signaling in this application is generated in the PHY 351.

As an embodiment, the second signaling in this application is generated in the RRC sublayer 306.

As an embodiment, the second signaling in this application is generated in the MAC sublayer 302.

As an embodiment, the second signaling in this application is generated in the MAC sublayer 352.

As an embodiment, the second signaling in this application is generated in the PHY 301.

As an embodiment, the second signaling in this application is generated in the PHY 351.

Example 4

Embodiment 4 shows a schematic diagram of a first communication device and a second communication device according to the present application, as shown in fig. 4. Fig. 4 is a block diagram of a first communication device 410 and a second communication device 450 communicating with each other in an access network.

The first communications device 410 includes a controller/processor 475, a memory 476, a receive processor 470, a transmit processor 416, a multiple antenna receive processor 472, a multiple antenna transmit processor 471, a transmitter/receiver 418, and an antenna 420.

The second communications device 450 includes a controller/processor 459, a memory 460, a data source 467, a transmit processor 468, a receive processor 456, a multi-antenna transmit processor 457, a multi-antenna receive processor 458, a transmitter/receiver 454, and an antenna 452.

In the transmission from the first communication device 410 to the second communication device 450, at the first communication device 410, upper layer data packets from the core network are provided to the controller/processor 475. The controller/processor 475 implements the functionality of layer L2. In transmissions from the first communications device 410 to the first communications device 450, the controller/processor 475 provides header compression, encryption, packet segmentation and reordering, multiplexing between logical and transport channels, and radio resource allocation to the second communications device 450 based on various priority metrics. The controller/processor 475 is also responsible for retransmission of lost packets and signaling to the second communication device 450. The transmit processor 416 and the multi-antenna transmit processor 471 implement various signal processing functions for the L1 layer (i.e., the physical layer). The transmit processor 416 implements coding and interleaving to facilitate Forward Error Correction (FEC) at the second communication device 450 and mapping of signal constellation based on various modulation schemes (e.g., Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK), M-phase shift keying (M-PSK), M-quadrature amplitude modulation (M-QAM)). The multi-antenna transmit processor 471 performs digital spatial precoding, including codebook-based precoding and non-codebook based precoding, and beamforming processing on the coded and modulated symbols to generate one or more spatial streams. Transmit processor 416 then maps each spatial stream to subcarriers, multiplexes with reference signals (e.g., pilots) in the time and/or frequency domain, and then uses an Inverse Fast Fourier Transform (IFFT) to generate the physical channels carrying the time-domain multicarrier symbol streams. The multi-antenna transmit processor 471 then performs transmit analog precoding/beamforming operations on the time domain multi-carrier symbol stream. Each transmitter 418 converts the baseband multicarrier symbol stream provided by the multi-antenna transmit processor 471 into a radio frequency stream that is then provided to a different antenna 420.

In a transmission from the first communications device 410 to the second communications device 450, at the second communications device 450, each receiver 454 receives a signal through its respective antenna 452. Each receiver 454 recovers information modulated onto a radio frequency carrier and converts the radio frequency stream into a baseband multi-carrier symbol stream that is provided to a receive processor 456. Receive processor 456 and multi-antenna receive processor 458 implement the various signal processing functions of the L1 layer. A multi-antenna receive processor 458 performs receive analog precoding/beamforming operations on the baseband multi-carrier symbol stream from the receiver 454. Receive processor 456 converts the baseband multicarrier symbol stream after the receive analog precoding/beamforming operation from the time domain to the frequency domain using a Fast Fourier Transform (FFT). In the frequency domain, the physical layer data signals and the reference signals to be used for channel estimation are demultiplexed by the receive processor 456, and the data signals are subjected to multi-antenna detection in the multi-antenna receive processor 458 to recover any spatial streams destined for the second communication device 450. The symbols on each spatial stream are demodulated and recovered at a receive processor 456 and soft decisions are generated. The receive processor 456 then decodes and deinterleaves the soft decisions to recover the upper layer data and control signals transmitted by the first communications device 410 on the physical channel. The upper layer data and control signals are then provided to a controller/processor 459. The controller/processor 459 implements the functionality of the L2 layer. The controller/processor 459 may be associated with a memory 460 that stores program codes and data. Memory 460 may be referred to as a computer-readable medium. In transmissions from the first communications device 410 to the second communications device 450, the controller/processor 459 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, control signal processing to recover upper layer packets from the core network. The upper layer packet is then provided to all protocol layers above the L2 layer. Various control signals may also be provided to L3 for L3 processing.

In a transmission from the second communications device 450 to the first communications device 410, a data source 467 is used at the second communications device 450 to provide upper layer data packets to a controller/processor 459. Data source 467 represents all protocol layers above the L2 layer. Similar to the transmit function at the first communications apparatus 410 described in the transmission from the first communications apparatus 410 to the second communications apparatus 450, the controller/processor 459 implements header compression, encryption, packet segmentation and reordering, and multiplexing between logical and transport channels based on radio resource allocation, implementing L2 layer functions for the user plane and control plane. The controller/processor 459 is also responsible for retransmission of lost packets and signaling to said first communications device 410. A transmit processor 468 performs modulation mapping, channel coding, and digital multi-antenna spatial precoding by a multi-antenna transmit processor 457 including codebook-based precoding and non-codebook based precoding, and beamforming, and the transmit processor 468 then modulates the resulting spatial streams into multi-carrier/single-carrier symbol streams, which are provided to different antennas 452 via a transmitter 454 after analog precoding/beamforming in the multi-antenna transmit processor 457. Each transmitter 454 first converts the baseband symbol stream provided by the multi-antenna transmit processor 457 into a radio frequency symbol stream and provides the radio frequency symbol stream to the antenna 452.

In a transmission from the second communication device 450 to the first communication device 410, the functionality at the first communication device 410 is similar to the receiving functionality at the second communication device 450 described in the transmission from the first communication device 410 to the second communication device 450. Each receiver 418 receives an rf signal through its respective antenna 420, converts the received rf signal to a baseband signal, and provides the baseband signal to a multi-antenna receive processor 472 and a receive processor 470. The receive processor 470 and the multiple antenna receive processor 472 collectively implement the functionality of the L1 layer. Controller/processor 475 implements the L2 layer functions. The controller/processor 475 can be associated with a memory 476 that stores program codes and data. Memory 476 may be referred to as a computer-readable medium. In transmissions from the second communications device 450 to the first communications device 410, the controller/processor 475 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, control signal processing to recover upper layer packets from the UE 450. Upper layer data packets from the controller/processor 475 may be provided to a core network.

As an embodiment, the first node in this application includes the second communication device 450, and the second node in this application includes the first communication device 410.

As a sub-embodiment of the foregoing embodiment, the first node is a user equipment, and the second node is a user equipment.

As a sub-embodiment of the foregoing embodiment, the first node is a user equipment, and the second node is a relay node.

As a sub-embodiment of the foregoing embodiment, the first node is a relay node, and the second node is a user equipment.

As a sub-embodiment of the foregoing embodiment, the first node is a user equipment, and the second node is a base station equipment.

As a sub-embodiment of the foregoing embodiment, the first node is a relay node, and the second node is a base station device.

As a sub-embodiment of the above-described embodiment, the second communication device 450 includes: at least one controller/processor; the at least one controller/processor is responsible for HARQ operations.

As a sub-embodiment of the above-described embodiment, the first communication device 410 includes: at least one controller/processor; the at least one controller/processor is responsible for HARQ operations.

As a sub-embodiment of the above-described embodiment, the first communication device 410 includes: at least one controller/processor; the at least one controller/processor is responsible for error detection using positive Acknowledgement (ACK) and/or Negative Acknowledgement (NACK) protocols to support HARQ operations.

As an embodiment, the second communication device 450 includes: at least one processor and at least one memory including computer program code; the at least one memory and the computer program code are configured for use with the at least one processor. The second communication device 450 apparatus at least: receiving the first signaling in the application and the second signaling in the application; sending the first signal in the present application in the target air interface resource block in the present application, where the first signal carries the first bit block in the present application; the first signaling is used to determine the first bit block, the second signaling is used to determine the third bit block in this application; the second air interface resource block in the application is reserved for the second bit block in the application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, and the first air interface resource block and the second air interface resource block overlap in a time domain; the first number is used to determine the fourth resource block, where the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in the time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in the present application.

As an embodiment, the second communication device 450 includes: a memory storing a program of computer readable instructions that when executed by at least one processor result in actions comprising: receiving the first signaling in the application and the second signaling in the application; sending the first signal in the present application in the target air interface resource block in the present application, where the first signal carries the first bit block in the present application; the first signaling is used to determine the first bit block, the second signaling is used to determine the third bit block in this application; the second air interface resource block in the application is reserved for the second bit block in the application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, and the first air interface resource block and the second air interface resource block overlap in a time domain; the first number is used to determine the fourth resource block, where the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in the time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As an embodiment, the first communication device 410 includes: at least one processor and at least one memory including computer program code; the at least one memory and the computer program code are configured for use with the at least one processor. The first communication device 410 means at least: sending the first signaling and the second signaling in the application; receiving the first signal in the present application in the target air interface resource block in the present application, where the first signal carries the first bit block in the present application; the first signaling is used to determine the first bit block, the second signaling is used to determine the third bit block in this application; the second air interface resource block in the application is reserved for the second bit block in the application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, and the first air interface resource block and the second air interface resource block overlap in a time domain; the first number is used to determine the fourth resource block, where the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in the time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in this application.

As an embodiment, the first communication device 410 includes: a memory storing a program of computer readable instructions that when executed by at least one processor result in actions comprising: sending the first signaling and the second signaling in the application; receiving the first signal in the present application in the target air interface resource block in the present application, where the first signal carries the first bit block in the present application; the first signaling is used to determine the first bit block, the second signaling is used to determine the third bit block in this application; the second air interface resource block in the application is reserved for the second bit block in the application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, and the first air interface resource block and the second air interface resource block overlap in a time domain; the first number is used to determine the fourth resource block, where the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in the time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As one example, at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, the data source 467 may be configured to receive the first signaling.

As an example, at least one of { the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, the memory 476} is used to transmit the first signaling in this application.

As one example, at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, the data source 467 may be configured to receive the second signaling.

As an example, at least one of { the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, the memory 476} is used to send the second signaling in this application.

As an example, at least one of the antenna 452, the transmitter 454, the multi-antenna transmit processor 458, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 may be configured to transmit the first signal of the present application in the target air resource block of the present application.

As an example, at least one of { the antenna 420, the receiver 418, the multi-antenna reception processor 472, the reception processor 470, the controller/processor 475, and the memory 476} is used for receiving the first signal in the target air interface resource block in this application.

Example 5

Embodiment 5 illustrates a wireless signal transmission flow chart according to an embodiment of the present application, as shown in fig. 5. In FIG. 5, communication between the first node U1 and the second node U2 is over an air interface. In particular, the sequence between the two step pairs of { S521, S511} and { S522, S512} in FIG. 5 does not represent a specific time sequence.

First node U1Receiving a second signaling in step S511; receiving a first signaling in step S512; in step S513, the first signal is transmitted in the target air interface resource block.

Second node U2Transmitting a second signaling in step S521; transmitting a first signaling in step S522; in step S523, the first signal is received in the target air interface resource block.

In embodiment 5, the first signal carries a first block of bits; the first signaling is used to determine the first block of bits, the second signaling is used to determine a third block of bits; a second empty resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, and the first air interface resource block and the second air interface resource block have overlap in a time domain; a first number is used for determining a fourth resource block, the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block; when the priority of the second bit block is the first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the first priority, the target air interface resource block is the first air interface resource block; reserving a fifth air interface resource block for the first bit block; a third air interface resource block is reserved for the third bit block; the fifth air interface resource block and the third air interface resource block are overlapped in a time domain; the N number ranges respectively correspond to the N empty resource block sets; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first block of bits and the number of bits comprised by the third block of bits is equal to one of the first range of numbers; the first empty resource block set is an empty resource block set corresponding to the first quantity range in the N empty resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

As a sub-embodiment of embodiment 5, the first bit block includes a first type HARQ-ACK; the third bit block includes a second type of HARQ-ACK.

As a sub-embodiment of embodiment 5, when the target air interface resource block is the first air interface resource block, the first node U1 abandons sending a signal carrying the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a part which is included in the second air interface resource block and is overlapped with the first air interface resource block in a time domain.

As a sub-embodiment of embodiment 5, the first number is used to determine the fourth resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is related to the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

As an example, the first node U1 is the first node in this application.

As an example, the second node U2 is the second node in this application.

For one embodiment, the first node U1 is a UE.

For one embodiment, the second node U2 is a base station.

For one embodiment, the second node U2 is a UE.

For one embodiment, the air interface between the second node U2 and the first node U1 is a Uu interface.

For one embodiment, the air interface between the second node U2 and the first node U1 includes a cellular link.

For one embodiment, the air interface between the second node U2 and the first node U1 is a PC5 interface.

For one embodiment, the air interface between the second node U2 and the first node U1 includes a sidelink.

For one embodiment, the air interface between the second node U2 and the first node U1 comprises a wireless interface between a base station device and a user equipment.

As an embodiment, the second air interface resource block group includes the third air interface resource block and the fifth air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the third air interface resource block and the fifth air interface resource block.

As an embodiment, the second air interface resource block group includes the third air interface resource block and the first air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the third air interface resource block and the first air interface resource block.

As an embodiment, the second air interface resource block group includes the third air interface resource block and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the third air interface resource block and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the first air interface resource block, the third air interface resource block and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the first air interface resource block, the fifth air interface resource block, the third air interface resource block, and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the first air interface resource block, the fifth air interface resource block, the third air interface resource block, and the fourth air interface resource block.

As an embodiment, all air interface resource blocks in the second air interface resource block group meet the conditions in the second condition set.

As an embodiment, the condition in the second condition set relates to a processing time (processing time) of the UE.

As an embodiment, the condition in the second set of conditions relates to a UE processing capability (UE processing capability).

As an embodiment, the conditions in the second condition set include timeline conditions (time conditions) related to the second air interface resource block group, and the detailed description of the timeline conditions is referred to in section 9.2.5 of 3GPP TS 38.213.

As an embodiment, the conditions in the second set of conditions include: and the time interval between the second time and the starting time of the first (first) multicarrier symbol of the earliest air interface resource block in the second air interface resource block group is not less than a third numerical value.

As a sub-embodiment of the above embodiment, the third value is related to a processing time of the UE.

As a sub-embodiment of the above embodiment, the third value is related to UE processing capability.

As a sub-embodiment of the above embodiment, the third value is related to a PDSCH processing capability (UE PDSCH processing capability) of the UE.

As a sub-embodiment of the above-described embodiment,

and

is used to determine the third value, said

The above-mentioned

In the above-mentioned manner,

and said

See section 9.2.5 of 3GPP TS38.213 for a specific definition of (d).

As a sub-embodiment of the foregoing embodiment, the second time is a cutoff time of a downlink physical layer channel being transmitted.

As a sub-embodiment of the foregoing embodiment, the second time is a cutoff time of a downlink physical layer channel being transmitted; the transmitted downlink physical layer channel comprises a PDSCH or a PDCCH.

As an embodiment, the third signaling indicates that the third bit block is allowed to be transmitted in one resource block of an air interface determined by the first signaling.

As an embodiment, the third signaling includes a first domain; the first field included in the third signaling indicates that the third bit block is allowed to be transmitted in one air interface resource block determined by the first signaling.

As an embodiment, the third signaling indicates that the second type HARQ-ACK is allowed to be transmitted in one resource block over an air interface determined by the first signaling.

As an embodiment, the third signaling includes a first domain; the first field included in the third signaling indicates that the second type of HARQ-ACK is allowed to be transmitted in one air interface resource block determined by the first signaling.

As an embodiment, the one air interface resource block determined by the first signaling is the first air interface resource block.

As an embodiment, the one air interface resource block determined by the first signaling is the fourth air interface resource block.

As an embodiment, the third signaling indicates that the first bit block is allowed to be transmitted in one resource block of air interface determined by the second signaling.

As an embodiment, the third signaling includes a first domain; the first field included in the third signaling indicates that the first bit block is allowed to be transmitted in one air interface resource block determined by the second signaling.

As an embodiment, the third signaling indicates that the first type HARQ-ACK is allowed to be transmitted in one resource block over air determined by the second signaling.

As an embodiment, the third signaling includes a first domain; the first field included in the third signaling indicates that the first type of HARQ-ACK is allowed to be transmitted in one air interface resource block determined by the second signaling.

As an embodiment, the one air interface resource block determined by the second signaling is the first air interface resource block.

As an embodiment, the one air interface resource block determined by the second signaling is the fourth air interface resource block.

As an embodiment, the third signaling includes a first domain.

As an embodiment, the first field is used to determine whether UCI of different priorities is allowed to be multiplexed (multiplex) into the same channel.

As an embodiment, the first field is used to determine whether HARQ-ACKs of different priorities are allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether UCI of different priorities is allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether HARQ-ACKs of different priorities are allowed to be multiplexed into the same channel.

As an embodiment, the first field is used to determine whether different kinds of UCI are allowed to be multiplexed into the same channel.

As an embodiment, the first field is used to determine whether different kinds of HARQ-ACKs are allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether different kinds of UCI are allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether different kinds of HARQ-ACKs are allowed to be multiplexed into the same channel.

As an embodiment, the first field includes 1 bit.

For one embodiment, the first field includes 2 bits.

For one embodiment, the first field includes a plurality of bits.

As an embodiment, the third signaling is the first signaling.

As an embodiment, the third signaling is the second signaling.

As an embodiment, the third signaling is dynamically configured.

As an embodiment, the third signaling comprises layer 1 signaling.

As an embodiment, the third signaling comprises layer 1 control signaling.

As an embodiment, the third signaling comprises physical layer signaling.

As an embodiment, the third signaling comprises one or more fields in one physical layer signaling.

As an embodiment, the third signaling comprises higher layer signaling.

As an embodiment, the third signaling comprises one or more fields in a higher layer signaling.

As an embodiment, the third signaling comprises RRC signaling.

As an embodiment, the third signaling comprises MAC CE signaling.

As an embodiment, the third signaling comprises one or more fields in one RRC signaling.

As an embodiment, the third signaling comprises one or more fields in one MAC CE signaling.

As one embodiment, the third signaling includes DCI.

As an embodiment, the third signaling includes one or more fields in one DCI.

As an embodiment, the third signaling includes SCI.

As an embodiment, the third signaling comprises one or more fields in one SCI.

As an embodiment, the third signaling includes one or more fields in one IE.

As an embodiment, the starting time of the first air interface resource block is not earlier than the first time.

As an embodiment, the starting time of the fourth air interface resource block is not earlier than the first time.

As an embodiment, a starting time of the fourth empty resource block is earlier than the first time.

As an embodiment, the target air interface resource block is the first air interface resource block; the starting time of the first air interface resource block is not earlier than the first time; the benefits of the above constraints are: advantageously, the first node cancels (cancel) transmission of all or part of the signal carrying the second bit block in the second air interface resource block.

As an embodiment, the first signaling is used to determine the first time instant.

As an embodiment, the first time is later than an end time of the first signaling in a time domain; the time interval between the first time and the cut-off time of the first signaling in the time domain is equal to the time domain resources occupied by the P multicarrier symbols.

As an embodiment, the first time is later than an end time of a physical layer channel carrying the first signaling in a time domain; the time interval between the first time and the ending time of the physical layer channel carrying the first signaling in the time domain is equal to the time domain resources occupied by the P multicarrier symbols.

As an embodiment, the one physical layer channel carrying the first signaling comprises one PDCCH.

As an embodiment, said one physical layer channel carrying said first signaling comprises one sPDCCH.

As an embodiment, the one physical layer channel carrying the first signaling comprises one NB-PDCCH.

As an embodiment, the first time is later than an expiration time of a physical layer channel scheduled by the first signaling in a time domain; the time interval between the first time and the ending time of the one physical layer channel scheduled by the first signaling in the time domain is equal to the time domain resources occupied by the P multicarrier symbols.

As an embodiment, the one physical layer channel of the first signaling schedule comprises one PDSCH.

As an embodiment, said one physical layer channel of said first signalling schedule comprises one sPDSCH.

As an embodiment, the one physical layer channel of the first signaling schedule comprises one NB-PDSCH.

As an embodiment, the second signaling is used to determine the first time instant.

As an embodiment, the first time is later than an expiration time of the second signaling in a time domain; the time interval between the first time and the cut-off time of the second signaling in the time domain is equal to the time domain resources occupied by the P multicarrier symbols.

As an embodiment, the first time is later than an end time of a physical layer channel carrying the second signaling in a time domain; the time interval between the first time and the ending time of the physical layer channel carrying the second signaling in the time domain is equal to the time domain resources occupied by the P multi-carrier symbols.

As an embodiment, the one physical layer channel carrying the second signaling comprises one PDCCH.

As an embodiment, the one physical layer channel carrying the second signaling comprises one sPDCCH.

As an embodiment, the one physical layer channel carrying the second signaling comprises one NB-PDCCH.

As an embodiment, the first time is later than an expiration time of a physical layer channel scheduled by the second signaling in a time domain; the time interval between the first time and the ending time of the second signaling scheduling of the physical layer channel in the time domain is equal to the time domain resources occupied by the P multicarrier symbols.

As an embodiment, the one physical layer channel of the second signaling schedule comprises one PDSCH.

As an embodiment, said one physical layer channel of said second signalling schedule comprises one sPDSCH.

As an embodiment, the one physical layer channel of the second signaling schedule comprises one NB-PDSCH.

As an example, P is equal to 1.

As one example, P is greater than 1.

As an embodiment, UE processing capability (UE processing capability) is used to determine the first time instant.

As an embodiment, the time domain resource occupied by the P multicarrier symbols is equal to T_proc,2+d1。

As a sub-embodiment of the above embodiment, the T_proc,2The UE processing capability corresponding to the first node.

As a sub-embodiment of the above embodiment, the T_proc,2See section 6.4 of 3GPP TS38.214 for definition of (a).

As a sub-embodiment of the above embodiment, the d1 is equal to zero.

As a sub-embodiment of the above embodiment, the d1 is equal to the time domain resource occupied by 1 multicarrier symbol.

As a sub-embodiment of the above embodiment, the d1 is equal to the time domain resource occupied by 2 multicarrier symbols.

As a sub-embodiment of the above embodiment, the d1 is reported as UE capability (ported by UE capability).

As an embodiment, the first signaling is used to determine the first resource block.

As an embodiment, the first signaling is used to determine the fourth resource block.

As an embodiment, the second signaling is used to determine the first resource block.

As an embodiment, the second signaling is used to determine the fourth resource block.

As an embodiment, the first signaling is used to determine the fifth resource block.

As an embodiment, the second signaling is used to determine the third resource block.

For one embodiment, the first priority is different from the second priority.

As an embodiment, the first priority and the second priority are different priorities, respectively.

As an embodiment, the first signaling indicates the first priority, and the second signaling indicates the second priority.

As an embodiment, the first signaling indicates the second priority, and the second signaling indicates the first priority.

As an embodiment, all information bits comprised by said first bit block are information bits of said first priority.

As an embodiment, all information bits comprised by said first bit block are information bits of said second priority.

As an embodiment, all information bits included in the third bit block are information bits of the first priority.

As an embodiment, all information bits included in the third bit block are information bits of the second priority.

As an embodiment, the priority of the sixth bit block is the same as the priority of the first bit block.

As an embodiment, the priority of the seventh bit block is the same as the priority of the third bit block.

As an embodiment, all information bits included in the sixth bit block are information bits of the first priority.

As an embodiment, all information bits included in the sixth bit block are information bits of the second priority.

As an embodiment, all information bits included in the seventh bit block are information bits of the first priority.

As an embodiment, all information bits included in the seventh bit block are information bits of the second priority.

As one embodiment, the first priority is a higher priority than the second priority.

As an embodiment, the first priority and the second priority respectively correspond to different service types (service types).

For one embodiment, the first priority and the second priority are both physical layer priorities (PHY priorities).

As an embodiment, the priority index of the first priority is equal to 1 and the priority index of the second priority is equal to 0.

As an embodiment, the priority index of the first priority is equal to 0 and the priority index of the second priority is equal to 1.

As an embodiment, the priority of the first bit block is the first priority of a first priority and a second priority, and the priority of the third bit block is the second priority of the first priority and the second priority.

As an embodiment, the priority of the first bit block is the second priority of a first priority and a second priority, and the priority of the third bit block is the first priority of the first priority and the second priority.

As an embodiment, the first type of HARQ-ACK corresponds to the first priority, and the second type of HARQ-ACK corresponds to the second priority.

As an embodiment, the first type of HARQ-ACK corresponds to the second priority, and the second type of HARQ-ACK corresponds to the first priority.

As an embodiment, the first bit block and the third bit block respectively include UCI of different priorities.

As an embodiment, the first signaling indicates one priority in a first set of priorities; the priority of the first bit block is the same as the one of the first set of priorities of the first signaling indication.

As an embodiment, the second signaling indicates one priority in a first set of priorities; the priority of the third bit block is the same as the one of the first set of priorities of the second signaling indication.

As an embodiment, the priority of the first bit block is one of a first set of priorities.

As an embodiment, the priority of the second bit block is one of a first set of priorities.

As an embodiment, the priority of the third bit block is one of a first set of priorities.

As an embodiment, a QoS value corresponding to a block of bits transmitted on a sidelink is used to determine the priority of the third block of bits.

As an embodiment, the priority corresponding to a block of bits transmitted on the uplink is used to determine the priority of the first block of bits.

As a sub-embodiment of the above embodiment, the one bit block transmitted on the side link is transmitted in one psch.

As an embodiment, the priority of a signalling indication transmitted on a sidelink is used to determine the priority of the third bit block.

As an embodiment, the priority of the first signaling indication transmitted on the uplink is used to determine the priority of the first bit block.

As a sub-embodiment of the above embodiment, the one signaling transmitted on the sidelink comprises SCI.

As a sub-embodiment of the above embodiment, the one signaling transmitted on the sidelink comprises one or more fields in one SCI.

As an embodiment, the second signaling indicates that a positive integer number of HARQ-ACK information bits of the second type are transmitted in a first time domain unit.

As an embodiment, the second signaling instructs the first node to transmit a positive integer number of the second type HARQ-ACK information bits in a first time domain unit.

As an embodiment, the third bit block includes the second type of HARQ-ACK information bits transmitted in the first time domain unit.

For one embodiment, the first time domain unit includes one time slot.

For one embodiment, the first time domain unit includes one sub-slot.

As an embodiment, the first time domain unit includes one multicarrier symbol.

As an embodiment, the first set of priorities comprises a plurality of priorities.

As one embodiment, the first set of priorities includes the first priority and the second priority.

As one embodiment, the first set of priorities includes a plurality of priorities corresponding to different QoS values (values).

As an embodiment, the first set of priorities comprises a plurality of priorities corresponding to different ranges of QoS values.

For one embodiment, the second bit block includes one TB.

For one embodiment, the second bit block includes one CB.

As an embodiment, the second bit block comprises one CBG.

For one embodiment, the second bit block includes one UCI.

As an embodiment, the second bit block includes one SR.

As an embodiment, the second bit block includes a CSI report.

As an embodiment, the priority of the second bit block corresponds to priority index 1 or priority index 0.

As an embodiment, the priority of the second bit block is the first priority or the second priority.

As an embodiment, the priority of the second bit block is a QoS related priority.

Example 6

Embodiment 6 illustrates a schematic diagram of a relationship among a fifth resource block, a first bit block, a third resource block and a third bit block according to an embodiment of the present application, as shown in fig. 6.

In embodiment 6, a fifth empty resource block is reserved for the first bit block; a third empty resource block is reserved for a third bit block; and the fifth air interface resource block and the third air interface resource block are overlapped in a time domain.

As an embodiment, the fifth air interface resource block is the fourth air interface resource block in this application.

As an embodiment, the fourth air interface resource block in this application is the fifth air interface resource block.

As an embodiment, the fifth air interface resource block is not the fourth air interface resource block in this application.

As an embodiment, the fourth air interface resource block in this application is not the fifth air interface resource block.

As an embodiment, the fifth air interface resource block is orthogonal to the second air interface resource block in the time domain.

As an embodiment, the second air interface resource block and the third air interface resource block are orthogonal in time domain.

As an embodiment, a fifth resource block of null ports is reserved for the sixth bit block in this application.

As an embodiment, a third resource block of null ports is reserved for the seventh bit block in this application.

As an embodiment, the third air interface resource block includes a positive integer number of REs in a time-frequency domain.

As an embodiment, the third empty resource block includes a positive integer number of subcarriers in a frequency domain.

As an embodiment, the third air interface resource block includes a positive integer number of PRBs in a frequency domain.

As an embodiment, the third air interface resource block includes a positive integer number of RBs in a frequency domain.

As an embodiment, the third air interface resource block includes a positive integer number of multicarrier symbols in a time domain.

As an embodiment, the third air interface resource block includes a positive integer number of slots in a time domain.

As an embodiment, the third air interface resource block includes a positive integer number of sub-slots in a time domain.

As an embodiment, the third air interface resource block includes a positive integer number of milliseconds in a time domain.

As an embodiment, the third air interface resource block includes a positive integer number of consecutive multicarrier symbols in a time domain.

As an embodiment, the third air interface resource block includes a positive integer number of discontinuous time slots in a time domain.

As an embodiment, the third air interface resource block includes a positive integer number of consecutive time slots in a time domain.

As an embodiment, the third resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the third air interface resource block is configured by physical layer signaling.

As an embodiment, the third air interface resource block is configured by higher layer signaling.

As an embodiment, the third air interface resource is configured by RRC signaling.

As an embodiment, the third empty resource block is configured by MAC CE signaling.

As an embodiment, the third empty resource block is reserved for one physical layer channel.

As an embodiment, the third air interface resource block includes air interface resources reserved for a physical layer channel.

As an embodiment, the third air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the third air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the third resource block includes time-frequency resources reserved for one physical layer channel in the time-frequency domain.

As an embodiment, the third air interface resource block includes one PUCCH resource.

As an embodiment, the third empty resource block includes one PUCCH resource of one PUCCH resource set.

As an embodiment, the second signaling indicates the third resource block.

As an embodiment, the second signaling explicitly indicates the third resource block.

As an embodiment, the second signaling implicitly indicates the third resource block.

As an embodiment, the fifth resource block includes a positive integer number of REs in a time-frequency domain.

As an embodiment, the fifth empty resource block includes a positive integer number of subcarriers in a frequency domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of PRBs in a frequency domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of RBs in a frequency domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of multicarrier symbols in a time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of slots in a time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of sub-slots in a time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of milliseconds in a time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of consecutive multicarrier symbols in a time domain.

As an embodiment, the fifth resource block includes a positive integer number of discontinuous slots in the time domain.

As an embodiment, the fifth resource block includes a positive integer number of consecutive slots in the time domain.

As an embodiment, the fifth resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the fifth air interface resource block is configured by physical layer signaling.

As an embodiment, the fifth air interface resource block is configured by higher layer signaling.

As an embodiment, the fifth air interface resource is configured by RRC signaling.

As an embodiment, the fifth air interface resource block is configured by MAC CE signaling.

As an embodiment, the fifth air interface resource block is reserved for a physical layer channel.

As an embodiment, the fifth air interface resource block includes air interface resources reserved for a physical layer channel.

As an embodiment, the fifth air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the fifth air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the fifth resource block includes time-frequency resources reserved for one physical layer channel in the time-frequency domain.

As an embodiment, the fifth air interface resource block includes one PUCCH resource.

As an embodiment, the fifth empty resource block includes one PUCCH resource in one PUCCH resource set.

As an embodiment, the first signaling indicates the fifth resource block.

As an embodiment, the first signaling explicitly indicates the fifth resource block.

As an embodiment, the first signaling implicitly indicates the fifth resource block for air ports.

Example 7

Embodiment 7 illustrates N number ranges, N sets of air interface resource blocks, a sum of a number of bits included in the first bit block and a number of bits included in the third bit block, and a schematic diagram of a relationship between the first number range, the first set of air interface resource blocks, and the first air interface resource block according to an embodiment of the present application, as shown in fig. 7.

In embodiment 7, N number ranges respectively correspond to N air interface resource block sets; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block equals one of the first number range; the first empty resource block set is an empty resource block set corresponding to the first quantity range in the N empty resource block sets; the first empty resource block is one empty resource block in the first empty resource block set.

As an embodiment, each of the N sets of air interface resource blocks includes one PUCCH resource set.

For an embodiment, the first set of null resource blocks includes one set of PUCCH resources.

As an embodiment, the first signaling indicates the first set of null resource blocks from the first set of null resource blocks.

As an embodiment, the second signaling indicates the first set of null resource blocks from the first set of null resource blocks.

As an embodiment, the N number ranges respectively correspond to N empty resource blocks; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first block of bits and the number of bits comprised by the third block of bits is equal to one of the first range of numbers; the first empty resource block is a set of empty resource blocks corresponding to the first number range among the N empty resource blocks.

As an embodiment, each of the N air interface resource blocks includes one PUCCH resource.

As an example, the N number of ranges of numbers are mutually orthogonal.

As an embodiment, N is a positive integer greater than 1.

As an embodiment, N is not greater than 4.

As an embodiment, N is not greater than 8.

As one embodiment, N is not greater than 16.

As one embodiment, N is not greater than 256.

As one embodiment, the N is not greater than 1024.

As an embodiment, the first number is used to determine the fourth resource block; m number ranges respectively correspond to M empty resource block sets; the second number range is one of said M number ranges; the first number is equal to one of the second number ranges; the second air interface resource block set is an air interface resource block set corresponding to the second quantity range in the M air interface resource block sets; the second set of air interface resource blocks includes the fourth air interface resource block.

As an embodiment, each of the M sets of air interface resource blocks includes one PUCCH resource set.

As an embodiment, the second set of null resource blocks includes one set of PUCCH resources.

As an embodiment, the first signaling indicates the fourth air interface resource block from the second set of air interface resource blocks.

As an embodiment, the second signaling indicates the fourth air interface resource block from the second set of air interface resource blocks.

As an embodiment, the first number is used to determine the fourth resource block; m number ranges respectively correspond to M empty resource blocks; the second number range is one of said M number ranges; the first number is equal to one of the second number ranges; the fourth air interface resource block is an air interface resource block set corresponding to the second number range in the M air interface resource blocks.

As an embodiment, each of the M empty resource blocks includes one PUCCH resource.

As an example, the M number ranges are mutually orthogonal.

As one embodiment, the M is equal to the N.

As an embodiment, the M sets of air interface resource blocks are the N sets of air interface resource blocks.

As an embodiment, the M air interface resource blocks are the N air interface resource blocks.

As an embodiment, M is a positive integer greater than 1.

As one embodiment, M is not greater than 4.

As one embodiment, M is not greater than 8.

As one embodiment, M is not greater than 16.

As one embodiment, the M is not greater than 256.

As one embodiment, the M is not greater than 1024.

As an embodiment, the T number ranges respectively correspond to T air interface resource block sets; a fifth quantity range is one of said T quantity ranges; the first block of bits comprises a number of bits equal to one of the fifth range of numbers; a fifth set of air interface resource blocks is the set of air interface resource blocks corresponding to the fifth quantity range in the T sets of air interface resource blocks; the fifth set of air interface resource blocks includes the fifth air interface resource block.

As an embodiment, the T number ranges respectively correspond to T air interface resource block sets; a fifth quantity range is one of said T quantity ranges; the sixth bit block in this application generates a bit block comprising a number of bits equal to one of the fifth number range; a fifth set of air interface resource blocks is the set of air interface resource blocks corresponding to the fifth quantity range in the T sets of air interface resource blocks; the fifth set of air interface resource blocks includes the fifth air interface resource block.

As an embodiment, each of the T sets of air interface resource blocks includes a PUCCH resource set.

As an embodiment, the fifth set of air interface resource blocks includes one set of PUCCH resources.

As an embodiment, the first signaling indicates the fifth set of resource blocks from the fifth set of resource blocks.

As an embodiment, the T number ranges respectively correspond to T empty resource blocks; a fifth quantity range is one of said T quantity ranges; the first block of bits comprises a number of bits equal to one of the fifth range of numbers; the fifth empty resource block is a set of empty resource blocks corresponding to the fifth number range among the T empty resource blocks.

As an embodiment, the T number ranges respectively correspond to T empty resource blocks; a fifth quantity range is one of said T quantity ranges; the sixth bit block in this application generates a bit block comprising a number of bits equal to one of the fifth number range; the fifth empty resource block is a set of empty resource blocks corresponding to the fifth number range among the T empty resource blocks.

As an embodiment, each of the T air interface resource blocks includes one PUCCH resource.

As an example, the T number ranges are orthogonal to each other.

As an embodiment, T is a positive integer greater than 1.

As one embodiment, T is not greater than 4.

As one embodiment, T is not greater than 8.

As one embodiment, T is not greater than 16.

As one embodiment, T is not greater than 256.

As one embodiment, the T is no greater than 1024.

As one embodiment, the T is equal to the N.

As an embodiment, the T sets of air interface resource blocks are the N sets of air interface resource blocks.

As an embodiment, the T air interface resource blocks are the N air interface resource blocks.

As an embodiment, the number of bits comprised by the third block of bits is used to determine the third resource block of air ports; the K number ranges respectively correspond to K empty resource block sets; the third number range is one of the K number ranges; said third block of bits comprises said number of bits equal to one of said third range of numbers; a third set of air interface resource blocks is the set of air interface resource blocks corresponding to the third quantity range in the K sets of air interface resource blocks; the third set of air interface resource blocks includes the third air interface resource block.

As an embodiment, the number of bits included in one bit block generated by the seventh bit block is used to determine the third resource block; the K number ranges respectively correspond to K empty resource block sets; the third number range is one of the K number ranges; said one bit block generated by said seventh bit block comprises said number of bits equal to one number in said third range of numbers; a third set of air interface resource blocks is the set of air interface resource blocks corresponding to the third quantity range in the K sets of air interface resource blocks; the third set of air interface resource blocks includes the third air interface resource block.

As an embodiment, each of the K sets of air interface resource blocks includes one PUCCH resource set.

As an embodiment, the third set of air interface resource blocks includes one set of PUCCH resources.

As an embodiment, the second signaling indicates the third set of resource blocks of the null interface from the third set of resource blocks of the null interface.

As an embodiment, the number of bits comprised by the third block of bits is used to determine the third resource block of air ports; the K number ranges respectively correspond to K empty resource blocks; the third number range is one of the K number ranges; said third block of bits comprises said number of bits equal to one of said third range of numbers; the third empty resource block is a set of empty resource blocks corresponding to the third number range among the K empty resource blocks.

As an embodiment, the number of bits included in one bit block generated by the seventh bit block is used to determine the third resource block; the K number ranges respectively correspond to K empty resource blocks; the third number range is one of the K number ranges; said one bit block generated by said seventh bit block comprises said number of bits equal to one number in said third range of numbers; the third empty resource block is a set of empty resource blocks corresponding to the third number range among the K empty resource blocks.

As an embodiment, each of the K air interface resource blocks includes one PUCCH resource.

As an example, the K number ranges are orthogonal to each other.

As an example, K is a positive integer greater than 1.

As an embodiment, K is not greater than 4.

As an embodiment, K is not greater than 8.

As one embodiment, K is not greater than 16.

As one example, K is not greater than 256.

As one embodiment, K is not greater than 1024.

Example 8

Embodiment 8 illustrates a schematic diagram of a process in which the priority of the second bit block is used to determine a target air interface resource block from the first air interface resource block and the fourth air interface resource block according to an embodiment of the present application, as shown in fig. 8.

In embodiment 8, the first node in the present application determines in step S81 whether the priority of the second bit block is the first priority; if yes, go to step S82 to determine that the target air interface resource block is a fourth air interface resource block; otherwise, step S83 is proceeded to determine that the target air interface resource block is the first air interface resource block.

As an embodiment, when a priority of the second bit block is not the first priority, the priority of the second bit block is the second priority.

As an embodiment, when the priority of the second bit block is not the first priority, the priority of the second bit block is a priority other than the second priority.

As an embodiment, when the priority of the second bit block is the second priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the second priority, the target empty resource block is the first empty resource block.

As an embodiment, when the priority of the second bit block is not the second priority, the priority of the second bit block is the first priority.

As an embodiment, when the priority of the second bit block is not the second priority, the priority of the second bit block is a priority other than the first priority.

As an embodiment, when the priority of the second bit block is one of the priorities in the first priority subset, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is one of a second priority subset, the target air interface resource block is the first air interface resource block; a first priority set includes the first priority subset and the second priority subset, the first priority subset being non-intersecting with the second priority subset.

As an embodiment, the priority of the first bit block is different from the priority of the third bit block; when the priority of the second bit block is lower than the priority of the first bit block and the priority of the second bit block is lower than the priority of the third bit block, the target resource block of air interfaces is the fourth resource block of air interfaces; when the priority of the second bit block is not lower than the priority of the first bit block or the priority of the second bit block is not lower than the priority of the third bit block, the target air interface resource block is the first air interface resource block.

As an embodiment, the priority of the first bit block is different from the priority of the third bit block; the target block of air ports is the first block of air ports when the priority of the second block of bits is lower than the priority of the first block of bits and the priority of the second block of bits is lower than the priority of the third block of bits; when the priority of the second bit block is not lower than the priority of the first bit block or the priority of the second bit block is not lower than the priority of the third bit block, the target air interface resource block is the fourth air interface resource block.

As an embodiment, the priority of the first bit block is different from the priority of the third bit block; when the priority of the second bit block is higher than the priority of the first bit block and the priority of the second bit block is higher than the priority of the third bit block, the target resource block of air interfaces is the fourth resource block of air interfaces; the target empty resource block is the first empty resource block when the priority of the second bit block is not higher than the priority of the first bit block or the priority of the second bit block is not higher than the priority of the third bit block.

As an embodiment, the priority of the first bit block is different from the priority of the third bit block; the target resource block of air ports is the first resource block of air ports when the priority of the second bit block is higher than the priority of the first bit block and the priority of the second bit block is higher than the priority of the third bit block; when the priority of the second bit block is not higher than the priority of the first bit block or the priority of the second bit block is not higher than the priority of the third bit block, the target air interface resource block is the fourth air interface resource block.

As an embodiment, when the priority of the second bit block is higher than the priority of the third bit block, the target air interface resource block is the first air interface resource block; and when the priority of the second bit block is not higher than the priority of the third bit block, the target air interface resource block is the fourth air interface resource block.

As an embodiment, when the priority of the second bit block is lower than the priority of the third bit block, the target air interface resource block is the first air interface resource block; and when the priority of the second bit block is not lower than the priority of the third bit block, the target air interface resource block is the fourth air interface resource block.

As an embodiment, the priority of the third bit block corresponds to a value greater than a first threshold.

As one embodiment, the first threshold is greater than zero.

As an embodiment, the first threshold is a positive integer.

As an embodiment, the first threshold is configured for higher layer signaling.

As an embodiment, the first threshold is configured for RRC signaling.

As an embodiment, the first threshold is configured for mac ce signaling.

As an embodiment, the first threshold is predefined.

Examples9

Embodiment 9 illustrates a schematic diagram of a process of determining whether to give up sending a signal carrying a second bit block in a second air interface resource sub-block according to an embodiment of the present application, as shown in fig. 9.

In embodiment 9, the first node in this application determines, in step S91, whether a target air interface resource block is a fourth air interface resource block or a first air interface resource block; if the target air interface resource block is determined to be the fourth air interface resource block, step S92 is performed to determine that a signal carrying a second bit block is sent in a second air interface resource sub-block; if it is determined that the target air interface resource block is the first air interface resource block, step S93 is performed to determine that a signal carrying the second bit block is released and sent in the second air interface resource sub-block.

In embodiment 9, the second air interface resource block includes the second air interface resource sub-block.

As a sub-embodiment of embodiment 9, the second air interface resource sub-block includes a portion, in the second air interface resource block, of a time domain resource occupied by the first air interface resource block in the present application, which is overlapped in a time domain.

As a sub-embodiment of embodiment 9, the second air interface resource block further includes air interface resources other than the second air interface resource sub-block; when the first node determines that the target air interface resource block is the fourth air interface resource block, the first node further sends a signal carrying the second bit block in the air interface resource except the second air interface resource sub-block in the second air interface resource block.

As an embodiment, the second air interface resource sub-block is a part, included in the second air interface resource block, which overlaps with the first air interface resource block in a time domain.

As an embodiment, the second air interface resource block further includes air interface resources except for the second air interface resource sub-block; and when the target air interface resource block is the first air interface resource block, the first node sends a signal carrying the second bit block in the air interface resource except the second air interface resource sub-block in the second air interface resource block.

As an embodiment, the second air interface resource block further includes air interface resources except for the second air interface resource sub-block; and when the target air interface resource block is the first air interface resource block, the first node abandons and sends a signal carrying the second bit block in the air interface resources except the second air interface resource sub-block in the second air interface resource block.

As an embodiment, when the target air interface resource block is the fourth air interface resource block, the first node sends a second signal in the second air interface resource block; when the target air interface resource block is the first air interface resource block, the first node abandons sending the part of the second signal mapped to the second air interface resource sub-block; the second air interface resource sub-block comprises a part of the second air interface resource block, which is overlapped with the time domain resource occupied by the first air interface resource block in the time domain.

As an embodiment, when the priority of the second bit block is a first priority, the first node transmits a second signal in the second empty resource block; when the priority of the second bit block is not the first priority, the first node abandons sending the part of the second signal mapped to a second air interface resource sub-block; the second air interface resource sub-block comprises a part of the second air interface resource block, which is overlapped with the time domain resource occupied by the first air interface resource block in the time domain.

As an embodiment, the second air interface resource block further includes air interface resources except for the second air interface resource sub-block; and when the target air interface resource block is the first air interface resource block, the first node sends the second signal which is mapped to the part of the air interface resources except the second air interface resource sub-block in the second air interface resource block.

As an embodiment, the second air interface resource block further includes air interface resources except for the second air interface resource sub-block; and when the target air interface resource block is the first air interface resource block, the first node abandons sending the part of the air interface resource, which is mapped to the second air interface resource sub-block in the second air interface resource block, except for the second air interface resource sub-block.

As an embodiment, when the target air interface resource block is the first air interface resource block: and the first node abandons sending the signal carrying the second bit block in the second air interface resource block.

As an embodiment, when the target resource block of air interface is the fourth resource block of air interface, the first node sends the second signal in the second resource block of air interface.

As an embodiment, the second signal carries the second block of bits.

As an embodiment, the signal carrying the second bit block comprises all or part of the output after all or part of the bits in the second bit block are sequentially CRC added, segmented, coded block level CRC added, channel coded, rate matched, concatenated, scrambled, modulated, layer mapped, precoded, mapped to resource elements, multi-carrier symbol generated, modulated up-converted.

As an embodiment, the second signal includes an output of all or part of the bits in the second bit block after CRC adding, segmenting, coding block level CRC adding, channel coding, rate matching, concatenation, scrambling, modulating, layer mapping, precoding, mapping to resource elements, multi-carrier symbol generating, modulating part or all of the up-conversion in sequence.

As an embodiment, viewed from the time domain, the time domain resource occupied by the first air interface resource block includes the time domain resource occupied by the second air interface resource sub-block.

As an embodiment, when the target air interface resource block is the first air interface resource block: and the first node sends a second signal in an air interface resource except the second air interface resource sub-block in the second air interface resource block, wherein the second signal carries a signal of the second bit block.

As an embodiment, a starting time of the second air interface resource block is earlier than a starting time of the first air interface resource block; and the starting time of the second air interface resource block is later than that of the second air interface resource block.

As an embodiment, a starting time of the second air interface resource block is earlier than a starting time of the first air interface resource block; and the starting time of the second air interface resource sub-block is not later than the starting time of the first air interface resource block.

As an embodiment, a starting time of the second air interface resource block is earlier than a starting time of the first air interface resource block; the starting time of the second air interface resource sub-block is the same as the starting time of the first air interface resource block.

As an embodiment, a start time of the second air interface resource block is earlier than a start time of the first air interface resource block.

As an embodiment, a start time of the second air interface resource block is earlier than a start time of the fourth air interface resource block.

As an embodiment, a starting time of the second air interface resource block is not earlier than a starting time of the first air interface resource block.

As an embodiment, a starting time of the second air interface resource block is not earlier than a starting time of the fourth air interface resource block.

Example 10

Embodiment 10 illustrates a schematic diagram of a procedure of determining whether to transmit a second signal in a second empty resource block according to an embodiment of the present application, as shown in fig. 10.

In embodiment 10, the first node in this application determines, in step S101, whether a target air interface resource block is a fourth air interface resource block or a first air interface resource block; if the target air interface resource block is determined to be the fourth air interface resource block, step S102 is performed to determine that a second signal is sent in the second air interface resource block; if it is determined that the target air interface resource block is the first air interface resource block, step S103 is performed to determine to give up sending the second signal in the second air interface resource block.

In embodiment 10, the second signal carries the second bit block in this application.

As an embodiment, when the target air interface resource block is the fourth air interface resource block, the first node sends a signal carrying the second bit block in the second air interface resource block.

As an embodiment, when the priority of the second bit block is a first priority, the first node transmits a second signal in the second empty resource block; and when the priority of the second bit block is not the first priority, the first node abandons sending the second signal in the second air interface resource block.

Example 11

Embodiment 11 illustrates a schematic diagram of a relationship between the number of bits included in the first bit block, the number of bits included in the fourth bit block, the first number, and the number of bits included in the third bit block according to an embodiment of the present application, as shown in fig. 11.

In embodiment 11, the number of bits included in the first bit block and the number of bits included in the fourth bit block are used to determine the first number; the fourth bit block includes a smaller number of bits than the third bit block.

As an embodiment, the seventh bit block in the present application is used to generate the fourth bit block.

As an embodiment, the fourth bit block includes a part of bits in the seventh bit block.

As an embodiment, the fourth bit block includes an output of some or all of the bits in the seventh bit block after one or more of logical and, logical or, exclusive or, deleting bits, or zero padding.

As an embodiment, the fourth bit block and the third bit block are both bit blocks generated by the seventh bit block.

As an embodiment, the third block of bits is used to generate the fourth block of bits.

As an embodiment, the fourth bit block comprises a part of bits in the third bit block.

As one embodiment, the fourth bit block includes an output of some or all of the bits in the third bit block after one or more of a logical and, a logical or, an exclusive or, a deletion of bits, or a zero padding operation.

As an embodiment, the first number is equal to a sum of a number of bits comprised by the first bit block and a number of bits comprised by the fourth bit block.

As an embodiment, a sum of a number of bits comprised by the first bit block and a number of bits comprised by the fourth bit block is used for determining the first number.

Example 12

Embodiment 12 is a block diagram illustrating a processing apparatus in a first node device, as shown in fig. 12. In fig. 12, a first node device processing apparatus 1200 includes a first receiver 1201 and a first transmitter 1202.

For one embodiment, the first node apparatus 1200 is a user equipment.

As an embodiment, the first node apparatus 1200 is a relay node.

As an embodiment, the first node apparatus 1200 is a vehicle-mounted communication apparatus.

For one embodiment, the first node apparatus 1200 is a user equipment supporting V2X communication.

As an embodiment, the first node apparatus 1200 is a relay node supporting V2X communication.

For one embodiment, the first receiver 1201 includes at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4.

For one embodiment, the first receiver 1201 includes at least the first five of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4.

For one embodiment, the first receiver 1201 includes at least the first four of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4.

For one embodiment, the first receiver 1201 includes at least the first three of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4.

For one embodiment, the first receiver 1201 includes at least two of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4.

For one embodiment, the first transmitter 1202 may include at least one of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4.

For one embodiment, the first transmitter 1202 includes at least the first five of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

For one embodiment, the first transmitter 1202 includes at least the first four of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

For one embodiment, the first transmitter 1202 includes at least three of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

For one embodiment, the first transmitter 1202 includes at least two of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

In embodiment 12, the first receiver 1201 receives a first signaling and a second signaling; the first transmitter 1202 transmits a first signal in a target air interface resource block, where the first signal carries a first bit block; the first signaling is used to determine the first block of bits, the second signaling is used to determine a third block of bits; a second empty resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, and the first air interface resource block and the second air interface resource block have overlap in a time domain; a first number is used for determining a fourth resource block, the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

For one embodiment, the first bit block comprises a first type of HARQ-ACK; the third bit block includes a second type of HARQ-ACK.

As an embodiment, when the priority of the second bit block is a first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the first priority, the target empty resource block is the first empty resource block.

As an embodiment, a fifth air interface resource block is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; and the fifth air interface resource block and the third air interface resource block are overlapped in a time domain.

As an embodiment, the N number ranges respectively correspond to N air interface resource block sets; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first block of bits and the number of bits comprised by the third block of bits is equal to one of the first range of numbers; the first empty resource block set is an empty resource block set corresponding to the first quantity range in the N empty resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

As an embodiment, when the target air interface resource block is the first air interface resource block, the first node abandons and sends a signal carrying the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a part which is included in the second air interface resource block and is overlapped with the first air interface resource block in a time domain.

As an embodiment, the first number is used to determine the fourth resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is related to the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

As an embodiment, the first signaling is used to determine a first block of bits, the second signaling is used to determine a third block of bits; the first signaling indicates a first priority, the second signaling indicates a second priority; a second empty resource block is reserved for a second bit block; the sum of the number of bits included in the first bit block and the number of bits included in the third bit block is used for determining a first air interface resource block, and the first air interface resource block and the second air interface resource block have overlapping in a time domain; a first number is used for determining a fourth resource block, the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block; when the priority of the second bit block is the first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is the second priority, the target empty resource block is the first empty resource block.

As a sub-embodiment of the above embodiment, the first bit block includes UCI corresponding to priority index 1, and the second bit block includes UCI corresponding to priority index 0.

As a sub-embodiment of the above embodiment, the first bit block includes UCI corresponding to priority index 0, and the second bit block includes UCI corresponding to priority index 1.

As a sub-embodiment of the above embodiment, the first bit block includes HARQ-ACK corresponding to priority index 1, and the second bit block includes HARQ-ACK corresponding to priority index 0.

As a sub-embodiment of the above embodiment, the first bit block includes HARQ-ACK corresponding to priority index 0, and the second bit block includes HARQ-ACK corresponding to priority index 1.

As a sub-embodiment of the above embodiment, the second bit block comprises one TB or one CB or one CBG.

As a sub-embodiment of the above embodiment, the first priority corresponds to a priority index 1, and the second priority corresponds to a priority index 0.

As a sub-embodiment of the above embodiment, the first priority corresponds to a priority index 0, and the second priority corresponds to a priority index 1.

As a sub-embodiment of the foregoing embodiment, a fifth air interface resource block is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; the fifth air interface resource block and the third air interface resource block are overlapped in a time domain; the fifth air interface resource block is orthogonal to the second air interface resource block in the time domain; the second air interface resource block and the third air interface resource block are orthogonal in a time domain.

As a sub-embodiment of the foregoing embodiment, a fifth air interface resource block is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; the fifth air interface resource block and the third air interface resource block are overlapped in a time domain; the first number is equal to the number of bits comprised by the first block of bits; the fourth air interface resource block is the fifth air interface resource block; the fifth air interface resource block is orthogonal to the second air interface resource block in the time domain; the second air interface resource block and the third air interface resource block are orthogonal in a time domain.

As a sub-embodiment of the foregoing embodiment, the first air interface resource block includes one PUCCH resource.

As a sub-embodiment of the foregoing embodiment, the fourth resource block includes one PUCCH resource.

As a sub-embodiment of the above embodiment, the third air interface resource block includes one PUCCH resource.

As a sub-embodiment of the above embodiment, the fifth air interface resource block includes one PUCCH resource.

As a sub-embodiment of the foregoing embodiment, the second air interface resource block includes one PUCCH resource.

As a sub-embodiment of the foregoing embodiment, the second air interface resource block includes air interface resources reserved for one PUSCH transmission.

As a sub-embodiment of the foregoing embodiment, when the target air interface resource block is the fourth air interface resource block, the first node in this application sends a second signal in the second air interface resource block; when the target air interface resource block is the first air interface resource block, the first node gives up sending the second signal in the second air interface resource block; the second signal carries the second block of bits.

As a sub-embodiment of the foregoing embodiment, when the target air interface resource block is the fourth air interface resource block, the first node in this application sends a second signal in the second air interface resource block; when the target air interface resource block is the first air interface resource block, the first node abandons sending the part of the second signal mapped to the second air interface resource sub-block; the second air interface resource sub-block comprises a part of the second air interface resource block, which is overlapped with the time domain resource occupied by the first air interface resource block in the time domain; the second signal carries the second block of bits.

Example 13

Embodiment 13 is a block diagram illustrating a processing apparatus in a second node device, as shown in fig. 13. In fig. 13, the second node device processing apparatus 1300 includes a second transmitter 1301 and a second receiver 1302.

For one embodiment, the second node apparatus 1300 is a user equipment.

For one embodiment, the second node apparatus 1300 is a base station.

As an embodiment, the second node apparatus 1300 is a relay node.

As an embodiment, the second node apparatus 1300 is a vehicle-mounted communication apparatus.

As an embodiment, the second node apparatus 1300 is a user equipment supporting V2X communication.

For one embodiment, the second transmitter 1301 includes at least one of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4.

For one embodiment, the second transmitter 1301 includes at least the first five of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

For one embodiment, the second transmitter 1301 includes at least the first four of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

For one embodiment, the second transmitter 1301 includes at least the first three of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

For one embodiment, the second transmitter 1301 includes at least two of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

For one embodiment, the second receiver 1302 includes at least one of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4.

For one embodiment, the second receiver 1302 includes at least the first five of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

For one embodiment, the second receiver 1302 includes at least the first four of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

For one embodiment, the second receiver 1302 includes at least the first three of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4.

For one embodiment, the second receiver 1302 includes at least two of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4.

In embodiment 13, the second transmitter 1301 transmits a first signaling and a second signaling; the first receiver 1302, receiving a first signal in a target air interface resource block, where the first signal carries a first bit block; the first signaling is used to determine the first block of bits, the second signaling is used to determine a third block of bits; a second empty resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, and the first air interface resource block and the second air interface resource block have overlap in a time domain; a first number is used for determining a fourth resource block, the first number is not less than the number of bits included in the first bit block and less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth resource block and the second resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As an embodiment, when the target air interface resource block is the first air interface resource block, the second node does not perform signal reception for the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a part which is included in the second air interface resource block and is overlapped with the first air interface resource block in a time domain.

It will be understood by those skilled in the art that all or part of the steps of the above methods may be implemented by instructing relevant hardware through a program, and the program may be stored in a computer readable storage medium, such as a read-only memory, a hard disk or an optical disk. Alternatively, all or part of the steps of the above embodiments may be implemented by using one or more integrated circuits. Accordingly, the module units in the above embodiments may be implemented in a hardware form, or may be implemented in a form of software functional modules, and the present application is not limited to any specific form of combination of software and hardware. The first node device in the application includes but is not limited to wireless communication devices such as cell-phones, tablet computers, notebooks, network access cards, low power consumption devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircrafts, airplanes, unmanned aerial vehicles, and remote control airplanes. The second node device in the application includes but is not limited to wireless communication devices such as cell-phones, tablet computers, notebooks, network access cards, low power consumption devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircrafts, airplanes, unmanned aerial vehicles, and remote control airplanes. User equipment or UE or terminal in this application include but not limited to cell-phone, panel computer, notebook, network card, low-power consumption equipment, eMTC equipment, NB-IoT equipment, vehicle communication equipment, aircraft, unmanned aerial vehicle, wireless communication equipment such as remote control aircraft. The base station device, the base station or the network side device in the present application includes, but is not limited to, a macro cell base station, a micro cell base station, a home base station, a relay base station, an eNB, a gNB, a transmission and reception node TRP, a GNSS, a relay satellite, a satellite base station, an air base station, and other wireless communication devices.

The above description is only a preferred embodiment of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A first node device for wireless communication, comprising:

a first receiver receiving a first signaling and a second signaling;

2. The first node device of claim 1, wherein the first block of bits comprises a first type of HARQ-ACK; the third bit block includes a second type of HARQ-ACK.

3. The first node device of claim 1 or 2, wherein when the priority of the second bit block is a first priority, the target resource block of air interfaces is the fourth resource block of air interfaces; when the priority of the second bit block is not the first priority, the target empty resource block is the first empty resource block.

4. The first node device of any of claims 1-3, wherein a fifth resource block of air interfaces is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; and the fifth air interface resource block and the third air interface resource block are overlapped in a time domain.

5. The first node device of any of claims 1 to 4, wherein the N number ranges respectively correspond to N sets of air interface resource blocks; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first block of bits and the number of bits comprised by the third block of bits is equal to one of the first range of numbers; the first empty resource block set is an empty resource block set corresponding to the first quantity range in the N empty resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

6. The first node device of any one of claims 1 to 5, wherein when the target resource block of air interfaces is the first resource block of air interfaces, the first node abandons sending a signal carrying the second bit block in a second resource sub-block of air interfaces; the second air interface resource sub-block is a part which is included in the second air interface resource block and is overlapped with the first air interface resource block in a time domain.

7. The first node device of any of claims 1-6, wherein the first number is used to determine the fourth resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is related to the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

8. A second node device for wireless communication, comprising:

9. A method in a first node used for wireless communication, comprising:

receiving a first signaling and a second signaling;

10. A method in a second node used for wireless communication, comprising:

sending a first signaling and a second signaling;