CN114448578A - Method and apparatus in a node used for wireless communication - Google Patents

Method and apparatus in a node used for wireless communication Download PDF

Info

Publication number
CN114448578A
CN114448578A CN202011190796.3A CN202011190796A CN114448578A CN 114448578 A CN114448578 A CN 114448578A CN 202011190796 A CN202011190796 A CN 202011190796A CN 114448578 A CN114448578 A CN 114448578A
Authority
CN
China
Prior art keywords
bits
bit block
block
signaling
condition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202011190796.3A
Other languages
Chinese (zh)
Inventor
张晓博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Langbo Communication Technology Co Ltd
Original Assignee
Shanghai Langbo Communication Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Langbo Communication Technology Co Ltd filed Critical Shanghai Langbo Communication Technology Co Ltd
Priority to CN202011190796.3A priority Critical patent/CN114448578A/en
Priority to PCT/CN2021/123489 priority patent/WO2022083482A1/en
Publication of CN114448578A publication Critical patent/CN114448578A/en
Priority to US18/136,351 priority patent/US20230299904A1/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/0001—Arrangements for dividing the transmission path
    • H04L5/0003—Two-dimensional division
    • H04L5/0005—Time-frequency
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/003—Arrangements for allocating sub-channels of the transmission path
    • H04L5/0053—Allocation of signaling, i.e. of overhead other than pilot signals
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/50—Allocation or scheduling criteria for wireless resources
    • H04W72/535—Allocation or scheduling criteria for wireless resources based on resource usage policies
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W72/00—Local resource management
    • H04W72/50—Allocation or scheduling criteria for wireless resources
    • H04W72/56—Allocation or scheduling criteria for wireless resources based on priority criteria
    • H04W72/566—Allocation or scheduling criteria for wireless resources based on priority criteria of the information or information source or recipient

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

A method and apparatus in a node used for wireless communication is disclosed. A first receiver receiving a first signaling; a first transmitter, configured to transmit a first signal in a first air interface resource pool, where the first signal carries a first bit block and a second bit block; wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.

Description

Method and apparatus in a node used for wireless communication
Technical Field
The present application relates to a transmission method and apparatus in a wireless communication system, and more particularly, to a transmission method and apparatus for wireless signals in a wireless communication system supporting a cellular network.
Background
In the 5G system, eMBB (enhanced Mobile Broadband), and URLLC (Ultra Reliable and Low Latency Communication) are two typical Service types (Service Type). In 3GPP (3rd Generation Partner Project, third Generation partnership Project) NR (New Radio, New air interface) Release 15, a New Modulation and Coding Scheme (MCS) table is defined for the requirement of lower target BLER (10^ -5) of URLLC service. In order to support the higher required URLLC traffic, such as higher reliability (e.g. target BLER is 10^ -6), lower delay (e.g. 0.5-1ms), etc., in 3GPP NR Release 16, DCI (Downlink Control Information) signaling may indicate whether the scheduled traffic is Low Priority (Low Priority) or High Priority (High Priority), where the Low Priority corresponds to URLLC traffic and the High Priority corresponds to eMBB traffic. When a low priority transmission overlaps a high priority transmission in the time domain, the high priority transmission is performed and the low priority transmission is discarded.
The URLLC enhanced WI (Work Item) by NR Release 17 was passed over the 3GPP RAN symposium. Among them, Multiplexing (Multiplexing) of different services in UE (User Equipment) is a key point to be studied.
Disclosure of Invention
After introducing multiplexing of different priority services in the UE, the UE may multiplex UCI (Uplink Control Information) with different priorities to a PUCCH (Physical Uplink Control CHannel) for transmission; how to reasonably multiplex a key problem to be solved according to different transmission performance requirements of different priority levels of UCIs (such as HARQ-ACK (Hybrid Automatic Repeat reQuest ACKnowledgement) or SR (Scheduling reQuest) or CSI (Channel State Information) reporting (report)).
In view of the above, the present application discloses a solution. In the above description of the problem, an UpLink (UpLink) is taken as an example; the application is also applicable to transmission scenarios such as Downlink (Downlink) and SideLink (SL), and achieves technical effects similar to those in uplink. Furthermore, the adoption of a unified solution for different scenarios (including but not limited to uplink, downlink, sidelink) also helps to reduce hardware complexity and cost. It should be noted that, without conflict, the embodiments and features in the embodiments in the user equipment of the present application may be applied to the base station, and vice versa. The embodiments and features of the embodiments of the present application may be combined with each other arbitrarily without conflict.
As an example, the term (telematics) in the present application is explained with reference to the definition of the specification protocol TS36 series of 3 GPP.
As an example, the terms in the present application are explained with reference to the definitions of the 3GPP specification protocol TS38 series.
As an example, the terms in this application are explained with reference to the definitions of the 3GPP specification protocol TS37 series.
As an example, the terms in the present application are explained with reference to the definition of the specification protocol of IEEE (Institute of electrical and electronics Engineers).
The application discloses a method in a first node used for wireless communication, characterized by comprising:
receiving a first signaling;
sending a first signal in a first air interface resource pool, wherein the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
As an embodiment, the problem to be solved by the present application includes: how to transmit UCI of different classes (e.g., different priorities) in the same PUCCH (or PUSCH).
As an embodiment, the problem to be solved by the present application includes: how to determine the encoding mode of different classes (e.g. different priorities) of control information transmitted in a channel according to the size (size) of the payload (payload) of the control information.
As an embodiment, the characteristics of the above method include: it is determined whether different classes (e.g., different priorities) of control information multiplexed into the same channel are separately encoded (grouped encoded) according to the payload size of the control information to be reported.
As an example, the above method has the benefits of: whether to perform channel coding on different classes of control information, respectively, is determined according to the payload size of the control information (e.g., UCI), optimizing allocation of transmission resources.
As an example, the above method has the benefits of: it is avoided that the transmission of the low priority control information occupies too much the transmission resources reserved for the high priority control information.
As an example, the above method has the benefits of: the trade-off (tradeoff) in both transmission performance and resource utilization is optimized dynamically.
As an example, the above method has the benefits of: the multiplexing flexibility is enhanced.
As an example, the above method has the benefits of: the system performance is improved.
According to one aspect of the application, the above method is characterized in that,
the first number is equal to the number of bits comprised by the second block of bits; the first condition includes: the second block of bits includes the number of bits not greater than the first threshold.
According to one aspect of the application, the above method is characterized in that,
when the first condition is satisfied, the third bit block comprises all bits in the first bit block and all bits in the second bit block are input into the same channel-coded output; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, the characteristics of the above method include: when the load of the low-priority control information is smaller, the joint coding increases the coding gain; when the load of the low-priority control information is larger, the low-priority control information is respectively coded by adopting different code rates, so that the transmission resource reserved for the high-priority control information is prevented from being excessively occupied by the transmission of the low-priority control information.
According to one aspect of the application, the method described above is characterized in that,
when the first condition is satisfied, the third block of bits includes all bits in the first block of bits and all bits in the second block of bits; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
According to one aspect of the application, the above method is characterized in that,
a second condition is a condition related to a magnitude relationship between a second number and a second threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the second number; whether the second condition is satisfied is used to determine whether a sum of a number of bits included in the first bit block and a number of bits included in the second bit block or a third number is used to determine a first pool of empty resources, the third number being equal to the number of bits included in the first bit block plus a first intermediate amount, the number of bits included in the second bit block being used to determine the first intermediate amount; the first pool of air interface resources comprises the first pool of air interface resources.
As an embodiment, the characteristics of the above method include: determining how to determine the PUCCH resource set according to the load size of the control information to be reported.
As an example, the above method has the benefits of: and the PUCCH resource set is reasonably determined according to whether the codes are respectively coded, so that the uplink transmission resource waste is avoided.
According to one aspect of the application, the method described above is characterized by comprising:
receiving a first signaling group;
wherein the first signaling group comprises the first signaling; two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively.
According to one aspect of the application, the above method is characterized in that,
a third pool of empty resources is reserved for the first bit block and a second pool of empty resources is reserved for the second bit block; and the third air interface resource pool and the second air interface resource pool are overlapped in a time domain.
The application discloses a method in a second node used for wireless communication, characterized by comprising:
sending a first signaling;
receiving a first signal in a first air interface resource pool, wherein the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used to generate the first signal, the first bit block and the second bit block are used to generate the third bit block, and whether the first condition is satisfied is used to determine whether bits in the first bit block and bits in the second bit block are input to different channel codes respectively to obtain the third bit block.
According to one aspect of the application, the above method is characterized in that,
the first number is equal to the number of bits comprised by the second block of bits; the first condition includes: the second block of bits includes the number of bits no greater than the first threshold.
According to one aspect of the application, the above method is characterized in that,
when the first condition is satisfied, the third bit block comprises all bits in the first bit block and all bits in the second bit block are input into the same channel-coded output; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
According to one aspect of the application, the above method is characterized in that,
when the first condition is satisfied, the third block of bits includes all bits in the first block of bits and all bits in the second block of bits; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
According to one aspect of the application, the above method is characterized in that,
a second condition is a condition related to a magnitude relationship between a second number and a second threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the second number; whether the second condition is satisfied is used to determine whether a sum of a number of bits included in the first bit block and a number of bits included in the second bit block or a third number is used to determine a first pool of empty resources, the third number being equal to the number of bits included in the first bit block plus a first intermediate amount, the number of bits included in the second bit block being used to determine the first intermediate amount; the first pool of air interface resources comprises the first pool of air interface resources.
According to one aspect of the application, the method described above is characterized by comprising:
transmitting a first signaling group;
wherein the first signaling group comprises the first signaling; two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively.
According to one aspect of the application, the above method is characterized in that,
a third pool of empty resources is reserved for the first bit block and a second pool of empty resources is reserved for the second bit block; and the third air interface resource pool and the second air interface resource pool are overlapped in a time domain.
The application discloses a first node device used for wireless communication, characterized by comprising:
a first receiver receiving a first signaling;
a first transmitter, configured to transmit a first signal in a first air interface resource pool, where the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
The present application discloses a second node device used for wireless communication, comprising:
a second transmitter for transmitting the first signaling;
a second receiver, configured to receive a first signal in a first air interface resource pool, where the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used to generate the first signal, the first bit block and the second bit block are used to generate the third bit block, and whether the first condition is satisfied is used to determine whether bits in the first bit block and bits in the second bit block are input to different channel codes respectively to obtain the third bit block.
As an example, the method in the present application has the following advantages:
-determining whether to perform channel coding on different classes of control information, respectively, optimizing allocation of transmission resources according to a payload size of the control information (e.g., UCI);
-avoiding that the transmission of low priority control information occupies too much of the transmission resources reserved for high priority control information;
-optimizing a trade-off between coding gain and resource efficient use;
enhanced multiplexing flexibility;
-system performance is improved;
-avoiding uplink transmission resource waste.
Drawings
Other features, objects and advantages of the present application will become more apparent upon reading of the following detailed description of non-limiting embodiments thereof with reference to the accompanying drawings in which:
FIG. 1 illustrates a process flow diagram of a first node according to one embodiment of the present application;
FIG. 2 shows a schematic diagram of a network architecture according to an embodiment of the present application;
figure 3 shows a schematic diagram of a radio protocol architecture of a user plane and a control plane according to an embodiment of the present application;
FIG. 4 shows a schematic diagram of a first communication device and a second communication device according to an embodiment of the present application;
FIG. 5 shows a signal transmission flow diagram according to an embodiment of the present application;
FIG. 6 illustrates a graph of a first condition versus a magnitude relationship between a first quantity and a first threshold according to an embodiment of the present application;
FIG. 7 is a diagram illustrating a relationship between a number of bits included in a first block of bits, a number of bits included in a second block of bits, and a first number according to an embodiment of the present application;
FIG. 8 shows a schematic diagram of a flow where a first condition is used to determine a third bit block according to an embodiment of the application;
FIG. 9 shows a schematic diagram of a flow where a first condition is used to determine a third bit block according to an embodiment of the application;
fig. 10 is a diagram illustrating a relationship between a number of bits included in a first bit block, a number of bits included in a second bit block, a second number, a second threshold, a second condition, a third number, and a first pool of empty resources according to an embodiment of the present application;
fig. 11 shows a schematic diagram of a first signaling group, two signaling and a relation between a first bit block and a second bit block according to an embodiment of the application;
FIG. 12 is a diagram illustrating a relationship between a third pool of air interface resources, a second pool of air interface resources, a first block of bits, and a second block of bits, according to an embodiment of the present application;
FIG. 13 shows a schematic diagram of the relationship between a first block of bits and a first priority and a second block of bits and a second priority according to an embodiment of the present application;
FIG. 14 shows a block diagram of a processing arrangement in a first node device according to an embodiment of the present application;
fig. 15 shows a block diagram of a processing apparatus in a second node device according to an embodiment of the present application.
Detailed Description
The technical solutions of the present application will be further described in detail with reference to the accompanying drawings, and it should be noted that the embodiments and features of the embodiments of the present application can be arbitrarily combined with each other without conflict.
Example 1
Embodiment 1 illustrates a processing flow diagram of a first node according to an embodiment of the present application, as shown in fig. 1.
In embodiment 1, the first node in the present application receives a first signaling in step 101; in step 102, a first signal is sent over a first air interface resource pool.
In embodiment 1, the first signal carries a first block of bits and a second block of bits; the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
As one embodiment, the first signal comprises a wireless signal.
For one embodiment, the first signal comprises a radio frequency signal.
For one embodiment, the first signal comprises a baseband signal.
As an embodiment, the first signaling is dynamically configured.
As one embodiment, the first signaling includes layer 1(L1) signaling.
As an embodiment, the first signaling comprises layer 1(L1) control signaling.
As one embodiment, the first signaling includes Physical Layer (Physical Layer) signaling.
As an embodiment, the first signaling comprises one or more fields (fields) in a physical layer signaling.
As an embodiment, the first signaling comprises higher layer (HigherLayer) signaling.
As an embodiment, the first signaling comprises one or more fields in a higher layer signaling.
As an embodiment, the first signaling includes RRC (Radio Resource Control) signaling.
As an embodiment, the first signaling includes MAC CE (media access Control layer Control Element) signaling.
As an embodiment, the first signaling comprises one or more fields in one RRC signaling.
As an embodiment, the first signaling comprises one or more fields in one MAC CE signaling.
As an embodiment, the first signaling includes DCI (Downlink Control Information).
As one embodiment, the first signaling includes one or more fields in one DCI.
As an embodiment, the first signaling includes SCI (sidelink control Information).
As an embodiment, the first signaling comprises one or more fields in one SCI.
As an embodiment, the first signaling comprises one or more fields in an ie (information element).
As an embodiment, the first signaling is a DownLink scheduling signaling (DownLink Grant signaling).
As an embodiment, the first signaling is an UpLink scheduling signaling (UpLink Grant signaling).
As an embodiment, the first signaling is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used to carry physical layer signaling).
As an embodiment, the Downlink Physical layer Control CHannel in the present application is a PDCCH (Physical Downlink Control CHannel).
As an embodiment, the downlink physical layer control channel in this application is an sPDCCH (short PDCCH).
As an embodiment, the downlink physical layer control channel in the present application is an NB-PDCCH (Narrow Band PDCCH).
As an embodiment, the first signaling is DCI format 1_0, and the specific definition of the DCI format 1_0 is described in section 7.3.1.2 of 3GPP TS 38.212.
As an embodiment, the first signaling is DCI format 1_1, and the specific definition of the DCI format 1_1 is described in section 7.3.1.2 of 3GPP TS 38.212.
As an embodiment, the first signaling is DCI format 1_2, and the specific definition of the DCI format 1_2 is described in section 7.3.1.2 in 3GPP TS 38.212.
As an embodiment, the first signaling is DCI format 0_0, and the specific definition of DCI format 0_0 is described in section 7.3.1.1 of 3GPP TS 38.212.
As an embodiment, the first signaling is DCI format 0_1, and the specific definition of the DCI format 0_1 is described in section 7.3.1.1 of 3GPP TS 38.212.
As an embodiment, the first signaling is DCI format 0_2, and the specific definition of the DCI format 0_2 is described in section 7.3.1.1 of 3GPP TS 38.212.
As an embodiment, the sentence meaning that the first signal carries the first bit block and the second bit block includes: said first signal comprising an output of all or part of the bits of said first block of bits after CRC addition (CRC Insertion), Segmentation (Segmentation), coded block level CRC addition (CRC Insertion), Channel Coding (Channel Coding), Rate Matching (Rate Matching), Concatenation (correlation), Scrambling (Scrambling), Modulation (Modulation), layer Mapping (LayerMapping), Precoding (Precoding), Mapping to Resource elements (Mapping to Resource elements), multi-carrier symbol Generation (Generation), Modulation up-conversion (Modulation and up-conversion) in sequence, and the first signal comprises output of all or part of bits in the second bit block after CRC addition, segmentation, coding block level CRC addition, channel coding, rate matching, concatenation, scrambling, modulation, layer mapping, precoding, mapping to resource elements, multi-carrier symbol generation and modulation up-conversion in sequence.
As an embodiment, the sentence meaning that the first signal carries the first bit block and the second bit block includes: the first signal comprises all or part of bits in the first bit block and all or part of bits in the first bit block, which are sequentially subjected to CRC addition, segmentation, coding block level CRC addition, channel coding, rate matching, concatenation, scrambling, modulation, layer mapping, precoding, mapping to resource elements, multi-carrier symbol generation, and modulation up-conversion of part or all of the output.
For one embodiment, the first pool of air interface resources includes a positive integer number of time-frequency resource particles in the time-frequency domain.
As an embodiment, the first pool of empty resources includes a positive integer number of REs (Resource elements) in a time-frequency domain.
As an embodiment, one of the REs occupies one multicarrier symbol in the time domain and one subcarrier in the frequency domain.
As an embodiment, one of the time-frequency resource particles in this application is an RE.
As an embodiment, one of the time-frequency resource elements in this application includes one subcarrier in a frequency domain.
As an embodiment, one of the time-frequency resource elements in this application includes one multicarrier symbol in the time domain.
As an embodiment, the multi-carrier Symbol in this application is an OFDM (Orthogonal Frequency Division Multiplexing) Symbol (Symbol).
As an embodiment, the multicarrier symbol in this application is an SC-FDMA (Single Carrier-frequency division multiple Access) symbol.
As an embodiment, the multicarrier symbol in this application is a DFT-S-OFDM (Discrete Fourier Transform Spread OFDM) symbol.
As an embodiment, the first pool of empty resources comprises a positive integer number of subcarriers (subcarriers) in the frequency domain.
As an embodiment, the first pool of empty resources includes a positive integer number of PRBs (Physical Resource blocks) in a frequency domain.
As an embodiment, the first pool of empty resources includes a positive integer number of RBs (resource blocks) in a frequency domain.
For one embodiment, the first pool of empty resources includes a positive integer number of multicarrier symbols in a time domain.
For one embodiment, the first pool of empty resources includes a positive integer number of slots (slots) in a time domain.
For one embodiment, the first pool of empty resources includes a positive integer number of sub-slots (sub-slots) in a time domain.
For one embodiment, the first pool of empty resources comprises a positive integer number of milliseconds (ms) in the time domain.
As an embodiment, the first pool of empty resources comprises a positive integer number of consecutive multicarrier symbols in the time domain.
For one embodiment, the first pool of air interface resources includes a positive integer number of discontinuous time slots in a time domain.
For one embodiment, the first pool of air interface resources includes a positive integer number of consecutive time slots in a time domain.
As one embodiment, the first pool of empty resources comprises a positive integer number of subframes (sub-frames) in the time domain.
For one embodiment, the first pool of empty resources is configured by physical layer signaling.
As an embodiment, the first pool of empty resources is configured by higher layer signaling.
As an embodiment, the first air interface Resource pool is configured by RRC (Radio Resource Control) signaling.
As an embodiment, the first empty resource pool is configured by MAC CE (media access Control layer Control Element) signaling.
As an embodiment, the first pool of air interface resources is reserved for an uplink physical layer channel.
As an embodiment, the first pool of air interface resources includes time-frequency resources reserved for an uplink physical layer channel.
As an embodiment, the first air interface resource pool includes a time-frequency resource occupied by an uplink physical layer channel.
As an embodiment, the first pool of empty resources is reserved for a PUSCH (Physical Uplink Shared CHannel).
As an embodiment, the first pool of air interface resources comprises time-frequency resources reserved for one PUSCH.
In an embodiment, the first pool of air interface resources includes a time-frequency resource occupied by a PUSCH.
As an embodiment, the first pool of empty resources is reserved for a PUCCH (Physical Uplink Control CHannel).
As an embodiment, the first air interface resource pool includes air interface resources reserved for one PUCCH.
As an embodiment, the first pool of empty resources includes one PUCCH resource (PUCCH resource).
As an embodiment, the first pool of empty resources is reserved for a psch (Physical Sidelink Shared CHannel).
As one embodiment, the first signaling indicates the first pool of empty resources.
As an embodiment, the first signaling explicitly indicates the first pool of empty resources.
As one embodiment, the first signaling implicitly indicates the first pool of empty resources.
As an embodiment, the first signaling indicates frequency domain resources included in the first pool of air interface resources.
In one embodiment, the first signaling indicates time domain resources included in the first pool of empty resources.
As an embodiment, the first signaling indicates an index (index) of the first pool of empty resources.
In an embodiment, the first signaling is used to configure a periodic characteristic related to the first air interface resource pool.
As an embodiment, the implicit indication in this application includes: implicitly indicated by a signaling format (format).
As an embodiment, the implicit indication in this application includes: implicitly indicated by RNTI (Radio Network temporary Identity).
As an embodiment, the first air interface resource pool is reserved for a fourth bit block.
As an embodiment, the first signal also carries a fourth block of bits.
As an embodiment, the first signaling includes scheduling information of a fourth bit block.
As an embodiment, the fourth bit block comprises a positive integer number of bits.
As an embodiment, the fourth bit block includes a Transport Block (TB).
As an embodiment, the fourth bit Block includes one CB (Code Block).
As an embodiment, the fourth bit Block includes a CBG (Code Block Group).
As an embodiment, the first signaling includes first scheduling information; the first scheduling information includes at least one of occupied time domain resources, occupied frequency domain resources, MCS (Modulation and Coding Scheme, Modulation Coding Scheme), Configuration information of DMRS (DeModulation Reference Signals), HARQ (hybrid automatic Repeat reQuest) process number, RV (redundancy version), NDI (new data Indicator, new data indication), period (periodicity), transmit antenna port, and corresponding TCI (Transmission Configuration Indicator) state (state).
As one example, the phrase in this application is used to include: is used by the first node.
As one example, the phrase in this application is used to include: is used by the transmitting end of the first signal.
As one example, the phrase in this application is used to include: is used by the receiving end of the first signal.
As an embodiment, the first bit block comprises control information.
For one embodiment, the first bit block includes UCI.
As an embodiment, the first bit block comprises HARQ-ACK.
As one embodiment, the first bit block includes a positive integer number of bits.
As an embodiment, the first bit block comprises a positive integer number of ACKs or NACKs.
For one embodiment, the first bit block includes a HARQ-ACK codebook (codebook).
For an embodiment, the first bit block includes a sub-codebook of HARQ-ACKs (sub-codebook).
As an embodiment, the first bit block includes an SR (Scheduling Request).
As an embodiment, the first bit block includes an SR corresponding to a priority index of 1.
As an embodiment, the first bit block includes an SR corresponding to a priority index of 0.
As an embodiment, the first bit block comprises a high priority SR.
As an embodiment, the first bit block comprises a low priority SR.
As an embodiment, the first bit block includes a CSI (Channel State Information) report (report).
For one embodiment, the second bit block includes control information.
For one embodiment, the second bit block includes UCI.
As an embodiment, the second bit block comprises HARQ-ACK.
As an embodiment, the second bit block comprises a positive integer number of bits.
As an embodiment, the second bit block comprises a positive integer number of ACKs or NACKs.
For one embodiment, the second bit block includes a HARQ-ACK codebook (codebook).
For one embodiment, the second bit block includes a sub-codebook of HARQ-ACK.
As one embodiment, the second bit block includes an SR.
As an embodiment, the second bit block includes an SR corresponding to a priority index of 1.
As an embodiment, the second bit block includes an SR corresponding to a priority index of 0.
As an embodiment, the second bit block comprises a high priority SR.
As an embodiment, the second block of bits comprises a low priority SR.
As an embodiment, the second bit block includes CSI reporting.
As an embodiment, the third bit block includes control information.
For one embodiment, the third bit block includes UCI.
As an embodiment, the third bit block comprises HARQ-ACK.
As an embodiment, the third bit block comprises a positive integer number of bits.
As an embodiment, the third bit block comprises a positive integer number of ACKs or NACKs.
For one embodiment, the third bit block includes a HARQ-ACK codebook (codebook).
For an embodiment, the third bit block includes a sub-codebook of HARQ-ACK.
As an embodiment, the third bit block includes an SR.
As an embodiment, the third bit block includes an SR corresponding to priority index 1.
As an embodiment, the third bit block includes an SR corresponding to a priority index of 0.
As an embodiment, the third bit block comprises a high priority SR.
As an embodiment, the third bit block comprises a low priority SR.
As an embodiment, the third bit block includes CSI reporting.
For one embodiment, the third block of bits includes coded bits.
For one embodiment, the first bit block includes a first type of UCI.
For one embodiment, the second bit block includes UCI of a second type.
As an embodiment, the first type of UCI is different from the second type of UCI.
As an embodiment, the first type of UCI includes UCI corresponding to one of a plurality of QoS (Quality of service) types.
As an embodiment, the UCI of the first type includes UCI corresponding to a URLLC service type.
For one embodiment, the first type of UCI includes UCI corresponding to an eMBB traffic type.
As an embodiment, the first type of UCI includes high priority UCI.
For one embodiment, the first type of UCI includes a low priority UCI.
For one embodiment, the first type of UCI includes a UCI corresponding to a Priority index (Priority index) 1.
For one embodiment, the first type of UCI includes a UCI corresponding to a priority index of 0.
For one embodiment, the first type of UCI includes sidelink UCI.
As an embodiment, the second type of UCI includes UCI corresponding to one QoS of a plurality of QoS types.
As an embodiment, the UCI of the second type includes UCI corresponding to a URLLC service type.
As an embodiment, the second type of UCI includes UCI corresponding to an eMBB service type.
For one embodiment, the second type of UCI includes a high priority UCI.
For one embodiment, the second type of UCI includes low priority UCI.
For one embodiment, the second type of UCI includes a UCI corresponding to a Priority index (Priority index) 1.
For one embodiment, the second type of UCI includes UCI corresponding to priority index 0.
For one embodiment, the second type of UCI includes a sidelink UCI.
As an embodiment, the second type of UCI and the first type of UCI are UCI for different links, respectively.
For one embodiment, the different links include an uplink and a sidelink.
As an embodiment, the second type of UCI and the first type of UCI are UCI used for different service types, respectively.
As an embodiment, the second type of UCI and the first type of UCI are different types of UCI, respectively.
As an embodiment, the second type of UCI and the first type of UCI are UCI of different priorities (priorities), respectively.
As an embodiment, the second type of UCI and the first type of UCI are UCI corresponding to different priority indexes, respectively.
As an embodiment, the second type of UCI includes UCI corresponding to priority index 1, and the first type of UCI includes UCI corresponding to priority index 0.
As an embodiment, the second type of UCI includes UCI corresponding to priority index 0, and the first type of UCI includes UCI corresponding to priority index 1.
For one embodiment, the first bit block includes a first type of HARQ-ACK.
For one embodiment, the second bit block includes HARQ-ACKs of a second type.
As an embodiment, the first type of UCI includes a first type of HARQ-ACK.
As an embodiment, the second type of UCI includes a second type of HARQ-ACK.
As an embodiment, the HARQ-ACK in the present application includes: information bits indicating whether a signaling is correctly received or not, or information bits indicating whether a bit block (e.g., a transport block or a code block group) of a signaling schedule is correctly received or not.
As an embodiment, the HARQ-ACK in the present application includes: an information bit indicating whether a signaling used to indicate Semi-Persistent Scheduling (SPS) Release (Release) is correctly received or not, or whether a bit block (e.g., a transport block or a code block group) transmitted on a PDSCH (Physical Downlink Shared CHannel) of a signaling schedule is correctly received.
As an embodiment, the first type of HARQ-ACK bits is different from the second type of HARQ-ACK bits.
As an embodiment, the first type of HARQ-ACK bits and the second type of HARQ-ACK bits are HARQ-ACK information bits (informatization bits (s)).
As an embodiment, the first type of HARQ-ACK bits includes HARQ-ACK bits corresponding to one of a plurality of QoS (Quality of service) types.
As an embodiment, the first type of HARQ-ACK bits includes HARQ-ACK bits corresponding to a URLLC traffic type.
For one embodiment, the first type of HARQ-ACK bits includes HARQ-ACK bits corresponding to an eMBB traffic type.
For one embodiment, the first type of HARQ-ACK bits includes high priority HARQ-ACK bits.
For one embodiment, the first type of HARQ-ACK bits includes low priority HARQ-ACK bits.
As an embodiment, the first type of HARQ-ACK bits includes HARQ-ACK bits corresponding to a Priority index (Priority index) 1.
For one embodiment, the first type of HARQ-ACK bits includes HARQ-ACK bits corresponding to a priority index of 0.
As an embodiment, the first type of HARQ-ACK bits include sidelink HARQ-ACK (SL HARQ-ACK) bits.
As an embodiment, the second type of HARQ-ACK bits includes HARQ-ACK bits corresponding to one QoS of a plurality of QoS types.
As an embodiment, the second type of HARQ-ACK bits includes HARQ-ACK bits corresponding to a URLLC traffic type.
For one embodiment, the second type of HARQ-ACK bits includes HARQ-ACK bits corresponding to an eMBB traffic type.
For one embodiment, the second type of HARQ-ACK bits includes high priority HARQ-ACK bits.
For one embodiment, the second type of HARQ-ACK bits includes low priority HARQ-ACK bits.
As an embodiment, the second type of HARQ-ACK bits includes HARQ-ACK bits corresponding to a Priority index (Priority index) 1.
For one embodiment, the second type of HARQ-ACK bits includes HARQ-ACK bits corresponding to a priority index of 0.
For one embodiment, the second type of HARQ-ACK bits includes sidelink HARQ-ACK bits.
As an embodiment, the second type of HARQ-ACK bits and the first type of HARQ-ACK bits are HARQ-ACK bits for different links, respectively.
For one embodiment, the different links include an uplink and a sidelink.
As an embodiment, the second type of HARQ-ACK bits and the first type of HARQ-ACK bits are HARQ-ACK bits used for different traffic types, respectively.
As an embodiment, the second type of HARQ-ACK bits and the first type of HARQ-ACK bits are different types of HARQ-ACK bits, respectively.
As an embodiment, the second type HARQ-ACK bit and the first type HARQ-ACK bit are HARQ-ACK bits of different priorities (priorities), respectively.
As an embodiment, the second type HARQ-ACK bits and the first type HARQ-ACK bits are HARQ-ACK bits corresponding to different priority indexes, respectively.
As an embodiment, the second type of HARQ-ACK bits includes HARQ-ACK bits corresponding to priority index 1, and the first type of HARQ-ACK bits includes HARQ-ACK bits corresponding to priority index 0.
As an embodiment, the second type of HARQ-ACK bits includes HARQ-ACK bits corresponding to priority index 0, and the first type of HARQ-ACK bits includes HARQ-ACK bits corresponding to priority index 1.
For one embodiment, the first bit block includes K1 bits.
As an embodiment, the first block of bits comprises a number of bits equal to K1.
As an example, K1 is equal to 1.
As an example, K1 is equal to 2.
As an example, the K1 is not greater than 2.
As one example, the K1 is greater than 2.
As one example, the K1 is not greater than 1706.
As an example, the K1 is not greater than 17060.
For one embodiment, the second bit block includes K2 bits.
As an embodiment, the second block of bits comprises a number of bits equal to K2.
As one example, the K2 is not greater than 1706.
As an example, the K2 is not greater than 17060.
As an example, the K2 is not greater than 2.
As one example, the K2 is greater than 2.
As an embodiment, the process by which the third block of bits is used to generate the first signal does not include a correlation step of channel coding (channel coding).
As an embodiment, the channel coding in this application includes: channel coding performed using Polar codes.
As an embodiment, the channel coding in this application includes: channel coding performed using LDPC codes.
As an embodiment, the channel coding in this application includes: channel coding performed using a Simplex code.
As an embodiment, the channel coding in this application includes: channel coding performed using RM (Reed-Muller) codes.
As an embodiment, the first signal includes an output of all or part of the bits in the third bit block after being sequentially subjected to scrambling, modulation, layer mapping, precoding, mapping to resource elements, multi-carrier symbol generation, and modulation up-conversion.
As an embodiment, a sum of a number of bits comprised by the first bit block and a number of bits comprised by the second bit block is used to determine a first pool of empty resources, the first pool of empty resources comprising the first pool of empty resources.
As an embodiment, a third number is used to determine a first set of air interface resource pools, where the first set of air interface resource pools includes the first air interface resource pool, and the third number is not equal to a sum of a number of bits included in the first bit block and a number of bits included in the second bit block.
As a sub-embodiment of the above embodiment, the third number is equal to the number of bits comprised by the first block of bits plus a first intermediate quantity, the number of bits comprised by the second block of bits being used to determine the first intermediate quantity.
As an embodiment, the first signaling indicates the first air interface resource pool from the first air interface resource pool set in the present application.
As an embodiment, the first signaling indicates an index of the first air interface resource pool in the first air interface resource pool set.
As an embodiment, the meaning that whether the first condition is satisfied is used to determine whether the bits in the first bit block and the bits in the second bit block are input into different channel codes respectively to obtain the third bit block includes: whether the first condition is satisfied is used to determine whether the third block of bits includes bits in the first block of bits and bits in the second block of bits that are input to different channel encoded outputs, respectively.
As an embodiment, the meaning that whether the first condition is satisfied is used to determine whether the bits in the first bit block and the bits in the second bit block are input into different channel codes respectively to obtain the third bit block includes: whether the first condition is satisfied is used to determine whether the third bit block includes that all bits in the first bit block and all bits in the second bit block are input to the same channel-coded output or that bits in the first bit block and bits in the second bit block are input to different channel-coded outputs, respectively.
As an embodiment, the meaning that whether the first condition is satisfied is used to determine whether the bits in the first bit block and the bits in the second bit block are input into different channel codes respectively to obtain the third bit block includes: whether the first condition is satisfied is used to determine whether the third bit block includes all bits in the first bit block and all bits in the second bit block or includes bits in the first bit block and bits in the second bit block being input to different channel-coded outputs, respectively.
As an embodiment, the meaning that whether the first condition is satisfied is used to determine whether the bits in the first bit block and the bits in the second bit block are input into different channel codes respectively to obtain the third bit block includes: whether the first condition is satisfied is used to determine whether the third bit block includes an output of the second bit block after the first processing and an output of the first bit block after all bits are input to the same channel coding or includes bits in the first bit block and bits in the second bit block are input to different channel coded outputs, respectively.
As an embodiment, the meaning that whether the first condition is satisfied is used to determine whether the bits in the first bit block and the bits in the second bit block are input into different channel codes respectively to obtain the third bit block includes: whether the first condition is satisfied is used to determine whether the third bit block includes the first processed output of the second bit block and all bits in the first bit block or includes the bits in the first bit block and the bits in the second bit block being input with different channel-coded outputs, respectively.
Example 2
Embodiment 2 illustrates a schematic diagram of a network architecture according to the present application, as shown in fig. 2.
Fig. 2 illustrates a diagram of a network architecture 200 for 5G NR, LTE (Long-Term Evolution), and LTE-a (Long-Term Evolution-enhanced) systems. The 5G NR or LTE network architecture 200 may be referred to as EPS (Evolved Packet System) 200 or some other suitable terminology. The EPS 200 may include one or more UEs (User Equipment) 201, NG-RANs (next generation radio access networks) 202, EPCs (Evolved Packet cores)/5G-CNs (5G-Core networks) 210, HSS (Home Subscriber Server) 220, and internet services 230. The EPS may interconnect with other access networks, but these entities/interfaces are not shown for simplicity. As shown, the EPS provides packet-switched services, however those skilled in the art will readily appreciate that the various concepts presented throughout this application may be extended to networks providing circuit-switched services or other cellular networks. The NG-RAN includes NR node b (gNB)203 and other gnbs 204. The gNB203 provides user and control plane protocol termination towards the UE 201. The gnbs 203 may be connected to other gnbs 204 via an Xn interface (e.g., backhaul). The gNB203 may also be referred to as a base station, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a Basic Service Set (BSS), an Extended Service Set (ESS), a TRP (transmitting receiving node), or some other suitable terminology. The gNB203 provides an access point for the UE201 to the EPC/5G-CN 210. Examples of the UE201 include a cellular phone, a smart phone, a Session Initiation Protocol (SIP) phone, a laptop, a Personal Digital Assistant (PDA), a satellite radio, non-terrestrial base station communications, satellite mobile communications, a global positioning system, a multimedia device, a video device, a digital audio player (e.g., MP3 player), a camera, a game console, a drone, an aircraft, a narrowband internet of things device, a machine type communication device, a terrestrial vehicle, an automobile, a wearable device, or any other similar functioning device. Those skilled in the art may also refer to UE201 as a mobile station, a subscriber station, a mobile unit, a subscriber unit, a wireless unit, a remote unit, a mobile device, a wireless communication device, a remote device, a mobile subscriber station, an access terminal, a mobile terminal, a wireless terminal, a remote terminal, a handset, a user agent, a mobile client, a client, or some other suitable terminology. The gNB203 connects to the EPC/5G-CN 210 through the S1/NG interface. The EPC/5G-CN 210 includes MME (Mobility Management Entity)/AMF (Authentication Management Domain)/UPF (User Plane Function) 211, other MMEs/AMF/UPF 214, S-GW (Service Gateway) 212, and P-GW (Packet data Network Gateway) 213. MME/AMF/UPF211 is a control node that handles signaling between UE201 and EPC/5G-CN 210. In general, the MME/AMF/UPF211 provides bearer and connection management. All user IP (Internet protocol) packets are transmitted through S-GW212, and S-GW212 itself is connected to P-GW 213. The P-GW213 provides UE IP address allocation as well as other functions. The P-GW213 is connected to the internet service 230. The internet service 230 includes an operator-corresponding internet protocol service, and may specifically include the internet, an intranet, an IMS (IP Multimedia Subsystem), and a packet-switched streaming service.
As an embodiment, the UE201 corresponds to the first node in this application.
As an embodiment, the UE241 corresponds to the second node in this application.
As an embodiment, the gNB203 corresponds to the second node in this application.
As an embodiment, the UE241 corresponds to the first node in this application.
As an embodiment, the UE201 corresponds to the second node in this application.
Example 3
Embodiment 3 shows a schematic diagram of an embodiment of a radio protocol architecture for the user plane and the control plane according to the present application, as shown in fig. 3. Fig. 3 is a schematic diagram illustrating an embodiment of radio protocol architecture for the user plane 350 and the control plane 300, fig. 3 showing the radio protocol architecture for the first communication node device (UE, RSU in gbb or V2X) and the second communication node device (gbb, RSU in UE or V2X), or the control plane 300 between two UEs, in three layers: layer 1, layer 2 and layer 3. Layer 1(L1 layer) is the lowest layer and implements various PHY (physical layer) signal processing functions. The L1 layer will be referred to herein as PHY 301. Layer 2(L2 layer) 305 is above PHY301 and is responsible for the link between the first and second communication node devices and the two UEs through PHY 301. The L2 layer 305 includes a MAC (media access Control) sublayer 302, an RLC (Radio Link Control) sublayer 303, and a PDCP (Packet Data Convergence Protocol) sublayer 304, which terminate at the second communication node device. The PDCP sublayer 304 provides multiplexing between different radio bearers and logical channels. The PDCP sublayer 304 also provides security by ciphering data packets and provides handoff support between second communication node devices to the first communication node device. The RLC sublayer 303 provides segmentation and reassembly of upper layer packets, retransmission of lost packets, and reordering of packets to compensate for out-of-order reception due to HARQ. The MAC sublayer 302 provides multiplexing between logical and transport channels. The MAC sublayer 302 is also responsible for allocating various radio resources (e.g., resource blocks) in one cell between the first communication node devices. The MAC sublayer 302 is also responsible for HARQ operations. The RRC (Radio Resource Control) sublayer 306 in layer 3 (layer L3) in the Control plane 300 is responsible for obtaining Radio resources (i.e. Radio bearers) and configuring the lower layers using RRC signaling between the second communication node device and the first communication node device. The radio protocol architecture of the user plane 350 comprises layer 1(L1 layer) and layer 2(L2 layer), the radio protocol architecture in the user plane 350 for the first and second communication node devices being substantially the same for the physical layer 351, the PDCP sublayer 354 in the L2 layer 355, the RLC sublayer 353 in the L2 layer 355 and the MAC sublayer 352 in the L2 layer 355 as the corresponding layers and sublayers in the control plane 300, but the PDCP sublayer 354 also provides header compression for upper layer packets to reduce radio transmission overhead. The L2 layer 355 in the user plane 350 further includes an SDAP (Service Data adaptation protocol) sublayer 356, and the SDAP sublayer 356 is responsible for mapping between QoS streams and Data Radio Bearers (DRBs) to support diversity of services. Although not shown, the first communication node device may have several upper layers above the L2 layer 355, including a network layer (e.g., IP layer) that terminates at the P-GW on the network side and an application layer that terminates at the other end of the connection (e.g., far end UE, server, etc.).
As an example, the wireless protocol architecture in fig. 3 is applicable to the first node in this application.
As an example, the radio protocol architecture in fig. 3 is applicable to the second node in this application.
As an embodiment, the first bit block in this application is generated in the RRC sublayer 306.
As an embodiment, the first bit block in this application is generated in the MAC sublayer 302.
As an embodiment, the first bit block in this application is generated in the MAC sublayer 352.
As an embodiment, the first bit block in this application is generated in the PHY 301.
As an embodiment, the first bit block in this application is generated in the PHY 351.
As an embodiment, the second bit block in this application is generated in the RRC sublayer 306.
As an example, the second bit block in this application is generated in the SDAP sublayer 356.
As an embodiment, the second bit block in this application is generated in the MAC sublayer 302.
As an embodiment, the second bit block in this application is generated in the MAC sublayer 352.
As an embodiment, the second bit block in this application is generated in the PHY 301.
As an embodiment, the second bit block in this application is generated in the PHY 351.
As an embodiment, the third bit block in this application is generated in the RRC sublayer 306.
As an embodiment, the third bit block in this application is generated in the MAC sublayer 302.
As an embodiment, the third bit block in this application is generated in the MAC sublayer 352.
As an embodiment, the third bit block in this application is generated in the PHY 301.
As an embodiment, the third bit block in this application is generated in the PHY 351.
As an example, the fourth bit block in this application is generated in the SDAP sublayer 356.
As an embodiment, the fourth bit block in this application is generated in the RRC sublayer 306.
As an embodiment, the fourth bit block in this application is generated in the MAC sublayer 302.
As an embodiment, the fourth bit block in this application is generated in the MAC sublayer 352.
As an embodiment, the fourth bit block in this application is generated in the PHY 301.
As an embodiment, the fourth bit block in this application is generated in the PHY 351.
As an embodiment, the first signaling in this application is generated in the RRC sublayer 306.
As an embodiment, the first signaling in this application is generated in the MAC sublayer 302.
As an embodiment, the first signaling in this application is generated in the MAC sublayer 352.
As an embodiment, the first signaling in this application is generated in the PHY 301.
As an embodiment, the first signaling in this application is generated in the PHY 351.
As an embodiment, one signaling in the first signaling group in the present application is generated in the RRC sublayer 306.
As an embodiment, one signaling in the first signaling group in this application is generated in the MAC sublayer 302.
As an embodiment, one signaling in the first signaling group in the present application is generated in the MAC sublayer 352.
As an embodiment, one signaling in the first signaling group in this application is generated in the PHY 301.
As an embodiment, one signaling in the first signaling group in this application is generated in the PHY 351.
Example 4
Embodiment 4 shows a schematic diagram of a first communication device and a second communication device according to the present application, as shown in fig. 4. Fig. 4 is a block diagram of a first communication device 410 and a second communication device 450 communicating with each other in an access network.
The first communications device 410 includes a controller/processor 475, a memory 476, a receive processor 470, a transmit processor 416, a multiple antenna receive processor 472, a multiple antenna transmit processor 471, a transmitter/receiver 418, and an antenna 420.
The second communications device 450 includes a controller/processor 459, a memory 460, a data source 467, a transmit processor 468, a receive processor 456, a multi-antenna transmit processor 457, a multi-antenna receive processor 458, a transmitter/receiver 454, and an antenna 452.
In the transmission from the first communication device 410 to the second communication device 450, at the first communication device 410, upper layer data packets from the core network are provided to the controller/processor 475. The controller/processor 475 implements the functionality of layer L2. In transmissions from the first communications device 410 to the first communications device 450, the controller/processor 475 provides header compression, encryption, packet segmentation and reordering, multiplexing between logical and transport channels, and radio resource allocation to the second communications device 450 based on various priority metrics. The controller/processor 475 is also responsible for retransmission of lost packets and signaling to the second communication device 450. The transmit processor 416 and the multi-antenna transmit processor 471 implement various signal processing functions for the L1 layer (i.e., the physical layer). The transmit processor 416 implements coding and interleaving to facilitate Forward Error Correction (FEC) at the second communication device 450 and mapping of signal constellation based on various modulation schemes (e.g., Binary Phase Shift Keying (BPSK), Quadrature Phase Shift Keying (QPSK), M-phase shift keying (M-PSK), M-quadrature amplitude modulation (M-QAM)). The multi-antenna transmit processor 471 performs digital spatial precoding, including codebook-based precoding and non-codebook based precoding, and beamforming on the coded and modulated symbols to generate one or more spatial streams. Transmit processor 416 then maps each spatial stream to subcarriers, multiplexes with reference signals (e.g., pilots) in the time and/or frequency domain, and then uses an Inverse Fast Fourier Transform (IFFT) to generate the physical channels carrying the time-domain multicarrier symbol streams. The multi-antenna transmit processor 471 then performs transmit analog precoding/beamforming operations on the time domain multi-carrier symbol stream. Each transmitter 418 converts the baseband multicarrier symbol stream provided by the multi-antenna transmit processor 471 into a radio frequency stream that is then provided to a different antenna 420.
In a transmission from the first communications device 410 to the second communications device 450, at the second communications device 450, each receiver 454 receives a signal through its respective antenna 452. Each receiver 454 recovers information modulated onto a radio frequency carrier and converts the radio frequency stream into a baseband multi-carrier symbol stream that is provided to a receive processor 456. Receive processor 456 and multi-antenna receive processor 458 implement the various signal processing functions of the L1 layer. A multi-antenna receive processor 458 performs receive analog precoding/beamforming operations on the baseband multi-carrier symbol stream from the receiver 454. Receive processor 456 converts the baseband multicarrier symbol stream after the receive analog precoding/beamforming operation from the time domain to the frequency domain using a Fast Fourier Transform (FFT). In the frequency domain, the physical layer data signals and the reference signals to be used for channel estimation are demultiplexed by the receive processor 456, and the data signals are subjected to multi-antenna detection in the multi-antenna receive processor 458 to recover any spatial streams destined for the second communication device 450. The symbols on each spatial stream are demodulated and recovered at a receive processor 456 and soft decisions are generated. The receive processor 456 then decodes and deinterleaves the soft decisions to recover the upper layer data and control signals transmitted by the first communications device 410 on the physical channel. The upper layer data and control signals are then provided to a controller/processor 459. The controller/processor 459 implements the functionality of the L2 layer. The controller/processor 459 may be associated with a memory 460 that stores program codes and data. Memory 460 may be referred to as a computer-readable medium. In transmissions from the first communications device 410 to the second communications device 450, the controller/processor 459 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, control signal processing to recover upper layer packets from the core network. The upper layer packet is then provided to all protocol layers above the L2 layer. Various control signals may also be provided to L3 for L3 processing.
In a transmission from the second communications device 450 to the first communications device 410, a data source 467 is used at the second communications device 450 to provide upper layer data packets to a controller/processor 459. Data source 467 represents all protocol layers above the L2 layer. Similar to the transmit function at the first communications apparatus 410 described in the transmission from the first communications apparatus 410 to the second communications apparatus 450, the controller/processor 459 implements header compression, encryption, packet segmentation and reordering, and multiplexing between logical and transport channels based on radio resource allocation, implementing L2 layer functions for the user plane and control plane. The controller/processor 459 is also responsible for retransmission of lost packets and signaling to said first communications device 410. A transmit processor 468 performs modulation mapping, channel coding, and digital multi-antenna spatial precoding by a multi-antenna transmit processor 457 including codebook-based precoding and non-codebook based precoding, and beamforming, and the transmit processor 468 then modulates the resulting spatial streams into multi-carrier/single-carrier symbol streams, which are provided to different antennas 452 via a transmitter 454 after analog precoding/beamforming in the multi-antenna transmit processor 457. Each transmitter 454 first converts the baseband symbol stream provided by the multi-antenna transmit processor 457 into a radio frequency symbol stream and provides the radio frequency symbol stream to the antenna 452.
In a transmission from the second communication device 450 to the first communication device 410, the functionality at the first communication device 410 is similar to the receiving functionality at the second communication device 450 described in the transmission from the first communication device 410 to the second communication device 450. Each receiver 418 receives an rf signal through its respective antenna 420, converts the received rf signal to a baseband signal, and provides the baseband signal to a multi-antenna receive processor 472 and a receive processor 470. The receive processor 470 and the multiple antenna receive processor 472 collectively implement the functionality of the L1 layer. Controller/processor 475 implements the L2 layer functions. The controller/processor 475 can be associated with a memory 476 that stores program codes and data. Memory 476 may be referred to as a computer-readable medium. In transmissions from the second communications device 450 to the first communications device 410, the controller/processor 475 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, control signal processing to recover upper layer packets from the UE 450. Upper layer data packets from the controller/processor 475 may be provided to a core network.
As an embodiment, the first node in this application includes the second communication device 450, and the second node in this application includes the first communication device 410.
As a sub-embodiment of the foregoing embodiment, the first node is a user equipment, and the second node is a user equipment.
As a sub-embodiment of the foregoing embodiment, the first node is a user equipment, and the second node is a relay node.
As a sub-embodiment of the foregoing embodiment, the first node is a relay node, and the second node is a user equipment.
As a sub-embodiment of the foregoing embodiment, the first node is a user equipment, and the second node is a base station equipment.
As a sub-embodiment of the foregoing embodiment, the first node is a relay node, and the second node is a base station device.
As a sub-embodiment of the above-described embodiment, the second communication device 450 includes: at least one controller/processor; the at least one controller/processor is responsible for HARQ operations.
As a sub-embodiment of the above-described embodiment, the first communication device 410 includes: at least one controller/processor; the at least one controller/processor is responsible for HARQ operations.
As a sub-embodiment of the above-described embodiment, the first communication device 410 includes: at least one controller/processor; the at least one controller/processor is responsible for error detection using positive Acknowledgement (ACK) and/or Negative Acknowledgement (NACK) protocols to support HARQ operations.
As an embodiment, the second communication device 450 includes: at least one processor and at least one memory including computer program code; the at least one memory and the computer program code are configured for use with the at least one processor. The second communication device 450 apparatus at least: receiving the first signaling in the application; sending the first signal in the present application in the first pool of empty resources in the present application, where the first signal carries the first bit block in the present application and the second bit block in the present application; wherein the first signaling is used to determine the first pool of empty resources; the first condition in this application is a condition relating to a magnitude relationship between the first number in this application and the first threshold in this application, at least one of the number of bits comprised by the first block of bits or the number of bits comprised by the second block of bits being used to determine the first number; the third bit block in this application is used to generate the first signal, the first bit block and the second bit block are used to generate the third bit block, and whether the first condition is met is used to determine whether bits in the first bit block and bits in the second bit block are input into different channel codes respectively to obtain the third bit block.
As a sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in the present application.
As an embodiment, the second communication device 450 includes: a memory storing a program of computer readable instructions that when executed by at least one processor result in actions comprising: receiving the first signaling in the application; sending the first signal in the present application in the first pool of empty resources in the present application, where the first signal carries the first bit block in the present application and the second bit block in the present application; wherein the first signaling is used to determine the first pool of empty resources; the first condition in this application is a condition relating to a magnitude relationship between the first number in this application and the first threshold in this application, at least one of the number of bits comprised by the first block of bits or the number of bits comprised by the second block of bits being used to determine the first number; the third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input with different channel codes to obtain the third bit block.
As a sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in the present application.
As an embodiment, the first communication device 410 includes: at least one processor and at least one memory including computer program code; the at least one memory and the computer program code are configured for use with the at least one processor. The first communication device 410 means at least: sending the first signaling in the application; receiving the first signal in the present application in the first pool of empty resources in the present application, where the first signal carries the first bit block in the present application and the second bit block in the present application; wherein the first signaling is used to determine the first pool of empty resources; the first condition in this application is a condition relating to a magnitude relationship between the first number in this application and the first threshold in this application, at least one of the number of bits comprised by the first block of bits or the number of bits comprised by the second block of bits being used to determine the first number; the third bit block in this application is used to generate the first signal, the first bit block and the second bit block are used to generate the third bit block, and whether the first condition is met is used to determine whether bits in the first bit block and bits in the second bit block are input into different channel codes respectively to obtain the third bit block.
As a sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in this application.
As an embodiment, the first communication device 410 includes: a memory storing a program of computer readable instructions that when executed by at least one processor result in actions comprising: sending the first signaling in the application; receiving the first signal in the present application in the first pool of empty resources in the present application, where the first signal carries the first bit block in the present application and the second bit block in the present application; wherein the first signaling is used to determine the first pool of empty resources; the first condition in this application is a condition relating to a magnitude relationship between the first number in this application and the first threshold in this application, at least one of the number of bits comprised by the first block of bits or the number of bits comprised by the second block of bits being used to determine the first number; the third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input with different channel codes to obtain the third bit block.
As a sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in this application.
As one example, at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, the data source 467 may be configured to receive the first signaling.
As an example, at least one of { the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, the memory 476} is used to transmit the first signaling in this application.
As one example, at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, the data source 467 is configured to receive the first signaling group of the present application.
As an example, at least one of { the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, the memory 476} is used to transmit the first signaling group in this application.
As an example, at least one of { the antenna 452, the transmitter 454, the multi-antenna transmit processor 458, the transmit processor 468, the controller/processor 459, the memory 460, the data source 467} is used to send the first signal in this application in the first pool of empty resources in this application.
As an example, at least one of { the antenna 420, the receiver 418, the multi-antenna reception processor 472, the reception processor 470, the controller/processor 475, the memory 476} is used to receive the first signal in the present application in the first pool of empty resources in the present application.
Example 5
Embodiment 5 illustrates a wireless signal transmission flow chart according to an embodiment of the present application, as shown in fig. 5. In FIG. 5, communication between the first node U1 and the second node U2 is over an air interface. In fig. 5, the step in the dashed box F1 is optional. In particular, the precedence order between the two step pairs { S5201, S5101} and { S521, S511} does not represent a particular chronological order.
The first node U1, in step S5101, receives signaling other than the first signaling in the first signaling group; receiving a first signaling in step S511; in step S512, a first signal is sent in the first air interface resource pool.
The second node U2, in step S5201, transmits a signaling other than the first signaling in the first signaling group; transmitting a first signaling in step S521; a first signal is received in a first pool of empty resources in step S522.
In embodiment 5, the first signal carries a first block of bits and a second block of bits; the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input with different channel codes to obtain the third bit block; a second condition is a condition related to a magnitude relationship between a second number and a second threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the second number; whether the second condition is satisfied is used to determine whether a sum of a number of bits included in the first bit block and a number of bits included in the second bit block or a third number is used to determine a first pool of empty resources, the third number being equal to the number of bits included in the first bit block plus a first intermediate amount, the number of bits included in the second bit block being used to determine the first intermediate amount; the first set of pool of air interface resources comprises the first pool of air interface resources; the first signaling group comprises the first signaling; two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively; a third pool of empty resources is reserved for the first bit block and a second pool of empty resources is reserved for the second bit block; and the third air interface resource pool and the second air interface resource pool are overlapped in a time domain.
As a sub-embodiment of embodiment 5, the first number is equal to the number of bits comprised by the second block of bits; the first condition includes: the second block of bits includes the number of bits not greater than the first threshold.
As a sub-embodiment of embodiment 5, when the first condition is satisfied, the third bit block includes all bits in the first bit block and all bits in the second bit block are input to the same channel-coded output; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As a sub-embodiment of embodiment 5, when the first condition is satisfied, the third block of bits includes all bits in the first block of bits and all bits in the second block of bits; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an example, the first node U1 is the first node in this application.
As an example, the second node U2 is the second node in this application.
For one embodiment, the first node U1 is a UE.
For one embodiment, the second node U2 is a base station.
For one embodiment, the second node U2 is a UE.
For one embodiment, the air interface between the second node U2 and the first node U1 is a Uu interface.
For one embodiment, the air interface between the second node U2 and the first node U1 includes a cellular link.
For one embodiment, the air interface between the second node U2 and the first node U1 is a PC5 interface.
For one embodiment, the air interface between the second node U2 and the first node U1 includes a sidelink.
For one embodiment, the air interface between the second node U2 and the first node U1 comprises a wireless interface between a base station device and a user equipment.
As an embodiment, when the first condition is satisfied, the third bit block includes an output of the second bit block after the first processing and an output of the first bit block after all bits are input into the same channel coding; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, when the first condition is satisfied, the third bit block includes an output of the second bit block after the first processing and all bits in the first bit block; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, when the first condition is satisfied: the output of the second bit block after the first processing and all bits in the first bit block are used to generate the first signal after sequence modulation.
As an embodiment, when the first condition is satisfied: the output of the second block of bits after the first processing and a sequence (sequence) generated by the union (join) of all bits in the first block of bits are used to generate the first signal.
As a sub-embodiment of the foregoing embodiment, the one sequence generated by combining the output of the second bit block after the first processing and all bits in the first bit block includes a sequence used for carrying UCI in PUCCH format 0 or PUCCH format 1.
As an embodiment, when the first condition is satisfied, the third bit block includes an output after the bits in the second bit block are input one channel-coded and all the bits in the first bit block; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, when the first condition is satisfied: all bits in the first bit block are used directly to generate the first signal without channel coding.
As an embodiment, when the first condition is satisfied, the third bit block includes an output after the bits in the first bit block are input to one channel coding and all the bits in the second bit block; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As a sub-embodiment of the above embodiment, when the first condition is satisfied: all bits in the second block of bits are used directly to generate the first signal without channel coding.
As an embodiment, the meaning that the expression that the bits in the first bit block and the bits in the second bit block are respectively input to different channel codes includes: the bits in the first block of bits and the bits in the second block of bits are separately encoded (partitioned encoded) rather than jointly encoded (jointly encoded).
As an embodiment, the third bit block includes a bit indicating whether the bits in the first bit block and the bits in the second bit block are input with different channel codes, respectively.
As one embodiment, the phrase bits in the first bit block includes: all bits in the first bit block.
As an embodiment, the phrase bits in the second bit block includes: all bits in the second bit block.
As an embodiment, the phrase bits in the second bit block includes: and outputting the second bit block after the first processing.
As one embodiment, the first processing includes one or more of a logical and, a logical or, an exclusive or, a deleting bit, a pre-coding, an adding a duplicate bit, or a zero padding operation.
As an embodiment, the first air interface resource pool is reserved for a second channel.
As an embodiment, the first air interface resource pool includes air interface resources occupied by the second channel.
For one embodiment, the second channel comprises a physical layer channel.
In one embodiment, the second channel includes one PUCCH.
As an embodiment, in the present application, all the conditions in the third condition set are satisfied.
As an embodiment, the third set of conditions includes: a condition that needs to be satisfied when the first bit block and the second bit block are multiplexed (multiplexed) (ed) into the second channel.
As an embodiment, the third set of conditions includes: a timeline condition (time condition (s)) that needs to be satisfied when the first and second bit chunks are multiplexed into the second channel.
As an embodiment, the third set of conditions includes: all timeline conditions that need to be met when the first and second bit chunks are multiplexed into the second channel.
As an embodiment, the third set of conditions includes conditions related to delay (delay) requirements.
As an embodiment, the third set of conditions includes all timeline conditions related to latency requirements.
For an embodiment, the timeline conditions described in this application are described in detail in section 9.2.5 of 3GPP TS 38.213.
As an embodiment, the conditions in the third condition set include: a timeline condition associated with a first (first) multicarrier symbol of an earliest one of the second pool of air interface resources.
As an embodiment, the conditions in the third set of conditions include: the time interval between the second moment and the starting moment of the first multi-carrier symbol of the earliest air interface resource pool in the second air interface resource pool group is not less than a third numerical value; the second time is earlier than the starting time of the first multicarrier symbol of the earliest air interface resource pool in the second air interface resource pool group.
As a sub-embodiment of the above embodiment, the third value is related to a processing time of the UE.
As a sub-embodiment of the above embodiment, the third value relates to a UE processing capability (processing capability).
As a sub-embodiment of the above embodiment, the third value is related to PDSCH processing capability of the UE.
As a sub-embodiment of the above embodiment, the third value is related to a PUSCH processing capability of the UE.
As a sub-embodiment of the above embodiment, the third value is
Figure BDA0002752716980000181
Or
Figure BDA0002752716980000182
At least one of, the
Figure BDA0002752716980000183
The described
Figure BDA0002752716980000184
The above-mentioned
Figure BDA0002752716980000185
And said
Figure BDA0002752716980000186
See section 9.2.5 of 3GPP TS38.213 for a specific definition of (d).
As a sub-embodiment of the above embodiment, the third value is equal to
Figure BDA0002752716980000187
Or
Figure BDA0002752716980000188
One of, the
Figure BDA0002752716980000189
The above-mentioned
Figure BDA00027527169800001810
The described
Figure BDA00027527169800001811
And the above
Figure BDA00027527169800001812
See section 9.2.5 of 3GPP TS38.213 for a specific definition of (d).
As a sub-embodiment of the foregoing embodiment, the second time is not earlier than an end time of a time domain resource occupied by the transmission of the first signaling.
As a sub-embodiment of the above embodiment, the second time is not earlier than an end time of a time domain resource occupied by one PDCCH used for transmitting the first signaling.
As a sub-embodiment of the foregoing embodiment, the second time is not earlier than a cutoff time of a time domain resource occupied by transmission of one bit block scheduled by the first signaling.
As a sub-embodiment of the above embodiment, the second time instant is no earlier than an expiration time instant of time domain resources occupied by one PDSCH used for transmitting one bit block of the first signaling schedule.
As an embodiment, the second air interface resource pool group in this application includes the first air interface resource pool.
As an embodiment, the second air interface resource pool group in this application includes the second air interface resource pool and the third air interface resource pool.
Example 6
Embodiment 6 illustrates a schematic diagram of the relationship between the first condition and the magnitude relation between the first quantity and the first threshold according to an embodiment of the present application, as shown in fig. 6.
In embodiment 6, the first condition is related to a magnitude relation between the first number and the first threshold.
As an embodiment, the first threshold DCI is signaled.
As an embodiment, the first threshold is configured for higher layer signaling.
As an embodiment, the first threshold is configured by RRC signaling.
As an embodiment, the first threshold is configured for MAC CE signaling.
As an embodiment, the first threshold is predefined (default).
As an embodiment, the first threshold is greater than zero.
As an example, the first threshold is equal to 1.
As an example, the first threshold is equal to 2.
As an example, the first threshold is equal to 3.
As an example, the first threshold is equal to 4.
As an embodiment, the first threshold is greater than 2.
As an embodiment, the first threshold is greater than 4.
For one embodiment, the first threshold is not greater than 1706.
For one embodiment, the first threshold is not greater than 17060.
As an embodiment, the first threshold is equal to the first parameter value minus a number of bits comprised by the first block of bits.
As an embodiment, the first parameter value DCI is signaled.
As an embodiment, the first parameter value is configured for higher layer signaling.
As an embodiment, the first parameter value is configured by RRC signaling.
As an embodiment, the first parameter value is configured for MAC CE signaling.
As an embodiment, the first parameter value is predefined.
As an embodiment, the first parameter value is greater than zero.
For one embodiment, the first parameter value is not greater than 1706.
As an embodiment, the first parameter value is not greater than 17060.
As an embodiment, at least one of a number of bits comprised by the first block of bits or a number of bits comprised by the second block of bits is used to determine whether the first condition is satisfied.
As an embodiment, the first condition includes: the first number is not greater than the first threshold.
As an embodiment, the first condition includes: the first number is greater than the first threshold.
As an embodiment, the first condition includes: the first number is greater than the first threshold and the fourth number is greater than a fourth threshold.
As an embodiment, the first condition includes: the first quantity is not greater than the first threshold or the fourth quantity is not greater than a fourth threshold.
As an embodiment, said stating that said first condition is satisfied comprises: all conditions in the first set of conditions are satisfied.
As an embodiment, said expressing that the first condition is not satisfied comprises: at least one condition in the first set of conditions is not satisfied.
As an embodiment, said stating that said first condition is satisfied comprises: at least one condition in the first set of conditions is satisfied.
As an embodiment, said expressing that the first condition is not satisfied comprises: all conditions in the first set of conditions are not satisfied.
As an embodiment, said stating that said first condition is satisfied comprises: all conditions in the first set of conditions are satisfied and at least one condition in the second set of conditions is satisfied.
As an embodiment, said expressing that the first condition is not satisfied comprises: at least one condition in the first set of conditions is not satisfied or all conditions in the second set of conditions are not satisfied.
As one embodiment, the first set of conditions includes 1 or more conditions.
As an embodiment, the second set of conditions includes 1 or more conditions.
As an embodiment, one condition of the first set of conditions comprises: the first number is not greater than the first threshold.
As an embodiment, one condition of the first set of conditions comprises: the first number is greater than the first threshold.
As an embodiment, one condition of the first set of conditions comprises: the fourth quantity is not greater than a fourth threshold.
As an embodiment, one condition of the first set of conditions comprises: the fourth number is greater than a fourth threshold.
As an embodiment, one condition of the first set of conditions comprises: the fifth quantity is not greater than the third threshold.
As an embodiment, one condition of the first set of conditions comprises: the fifth number is greater than the third threshold.
As an embodiment, one condition of the second set of conditions comprises: the first number is not greater than the first threshold.
As an embodiment, one condition of the second set of conditions comprises: the first number is greater than the first threshold.
As an embodiment, one condition of the second set of conditions comprises: the fourth quantity is not greater than a fourth threshold.
As an embodiment, one condition of the second set of conditions comprises: the fourth number is greater than a fourth threshold.
As an embodiment, one condition of the second set of conditions comprises: the fifth quantity is not greater than the third threshold.
As an embodiment, one condition of the second set of conditions comprises: the fifth number is greater than the third threshold.
As an embodiment, at least one of a number of bits comprised by the first bit block or a number of bits comprised by the second bit block is used for determining the fourth number.
As an embodiment, the fourth number is equal to a number of bits comprised by the first bit block.
As an embodiment, the fourth number is equal to the number of bits comprised by the second block of bits.
As an embodiment, the fourth number is equal to a sum of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an embodiment, at least one of a number of bits comprised by the first bit block or a number of bits comprised by the second bit block is used for determining the fifth number.
As an embodiment, the fifth number is equal to the number of bits comprised by the first block of bits.
As an embodiment, the fifth number is equal to the number of bits comprised by the second block of bits.
As an embodiment, the fifth number is equal to a sum of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an embodiment, the third threshold DCI is indicated by signaling.
As an embodiment, the third threshold is configured for higher layer signaling.
As an embodiment, the third threshold is configured by RRC signaling.
As an embodiment, the third threshold is configured for MAC CE signaling.
As an embodiment, the third threshold is predefined.
As an embodiment, the third threshold is greater than zero.
As an example, the third threshold is equal to 1.
As an example, the third threshold is equal to 2.
As an example, the third threshold is equal to 3.
As an example, the third threshold is equal to 4.
As an embodiment, the third threshold is greater than 2.
As an embodiment, the third threshold is greater than 4.
For one embodiment, the third threshold is not greater than 1706.
As an example, the third threshold is not greater than 17060.
As an embodiment, the fourth threshold DCI is indicated by signaling.
As an embodiment, the fourth threshold is configured for higher layer signaling.
As an embodiment, the fourth threshold is configured by RRC signaling.
As an embodiment, the fourth threshold is configured for MAC CE signaling.
As an embodiment, the fourth threshold is predefined.
As an embodiment, the fourth threshold is greater than zero.
As an example, the fourth threshold is equal to 1.
As an example, said fourth threshold is equal to 2.
As an example, the fourth threshold is equal to 3.
As an example, the fourth threshold is equal to 4.
As an embodiment, the fourth threshold is greater than 2.
As an embodiment, the fourth threshold is greater than 4.
For one embodiment, the fourth threshold is not greater than 1706.
As an embodiment, the fourth threshold is not greater than 17060.
Example 7
Embodiment 7 illustrates a relationship diagram between the number of bits included in the first bit block, the number of bits included in the second bit block, and the first number according to an embodiment of the present application, as shown in fig. 7.
In embodiment 7, at least one of the number of bits included in the first bit block or the number of bits included in the second bit block is used to determine the first number.
As an embodiment, the first number is greater than zero.
As an embodiment, the first number is equal to a number of bits comprised by the first block of bits.
As an embodiment, the first number is equal to a number of bits comprised by the second block of bits.
As an embodiment, the first number is equal to a sum of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an embodiment, the first number is equal to a product of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an embodiment, the first number is not less than the number of bits comprised by the first bit block plus a second value multiplied by the number of bits comprised by the second bit block, the second value being related to at least one of a first code rate or a second code rate, the first code rate being different from the second code rate.
As an embodiment, the first number is equal to a number of bits comprised by the first bit block plus a second value multiplied by a number of bits comprised by the second bit block, the second value being related to at least one of a first code rate or a second code rate, the first code rate being different from the second code rate.
As an embodiment, the first number is equal to a result of performing a rounding operation on a result of multiplying a second value by a number of bits included in the second bit block, the second value being related to at least one of a first code rate or a second code rate, the first code rate being different from the second code rate, plus the number of bits included in the first bit block.
As an example, the rounding in this application includes: and rounding up.
As an example, the rounding in this application includes: and rounding down.
For one embodiment, the second value is equal to the first code rate divided by the second code rate.
As an embodiment, the second value is equal to the second code rate divided by the first code rate.
As an embodiment, the second value is equal to the first code rate.
As an embodiment, the second value is equal to the second code rate.
As an embodiment, the second value is equal to 1 divided by the first code rate.
As an example, the second value is equal to 1 divided by the second code rate.
As an embodiment, the first code rate is a code rate corresponding to the first air interface resource pool.
As an embodiment, the first code rate is a maximum code rate configured for one PUCCH resource included in the first pool of air interface resources.
As an embodiment, the first code rate and the second code rate are two different code rates corresponding to the first air interface resource pool, respectively.
As an embodiment, the first code rate and the second code rate are two different maximum code rates configured for one PUCCH resource included in the first pool of air interface resources, respectively.
As an embodiment, based on the configuration of higher layer signaling or RRC signaling or MAC CE signaling, different priorities correspond to different code rates; the first code rate and the second code rate respectively correspond to a priority corresponding to the first bit block and a priority corresponding to the second bit block.
As an embodiment, the first code rate is not less than a code rate (coding rate) of channel coding performed on the first bit block.
As an embodiment, the second code rate is not less than a code rate of channel coding performed on the second bit block.
As an embodiment, when the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block in the present application: the second code rate is not less than a code rate of channel coding performed on the second bit block.
As an embodiment, when all bits in the first bit block and all bits in the second bit block are input into the same channel code, the third bit block in the present application is obtained: the first code rate is not less than a code rate of channel coding performed on the first bit block.
Example 8
Embodiment 8 illustrates a schematic diagram of a flow in which a first condition is used to determine a third bit block according to an embodiment of the present application, as shown in fig. 8.
In embodiment 8, the first node in the present application determines in step S81 whether a first condition is satisfied; if so, then the process proceeds to step S82 to determine: the third bit block comprises the output of all bits in the first bit block and all bits in the second bit block after being input into the same channel coding; otherwise, it proceeds to step S83 to determine: the third bit block comprises the output after the bits in the first bit block and the bits in the second bit block are input into different channel codes respectively.
As an embodiment, when the first condition is satisfied, all bits in the first bit block and all bits in the second bit block are input into the same channel-coded output to be used for generating the first signal; when the first condition is not satisfied, the channel-coded outputs of the bits in the first bit block and the bits in the second bit block, which are input differently, are used to generate the first signal.
As an embodiment, the one or more bit blocks input to a channel coded output includes: a coded bit sequence (coded bit sequence).
As an embodiment, when the third bit block includes all bits in the first bit block and all bits in the second bit block are input to the same channel coded output: the same code rate is used to perform channel coding on all bits in the first bit block and all bits in the second bit block.
As an embodiment, when the third bit block includes bits in the first bit block and bits in the second bit block are input to different channel-coded outputs, respectively: two different code rates are used for performing channel coding in the first bit block and in the second bit block, respectively.
As an embodiment, the meaning that the sentence in which the third bit block includes the bits in the first bit block and the bits in the second bit block are input into different channel-coded outputs respectively includes: the third bit block comprises a first coded bit sequence and a second coded bit sequence, wherein all bits in the first bit block are input with one channel code to obtain the first coded bit sequence, and all bits in the second bit block are input with the other channel code to obtain the second coded bit sequence.
As an embodiment, the meaning that the sentence in which the third bit block includes the bits in the first bit block and the bits in the second bit block are input into different channel-coded outputs respectively includes: the third bit block comprises a first coding bit sequence and a second coding bit sequence, wherein all bits in the first bit block are input into one channel to be coded to obtain the first coding bit sequence, and the output of the second bit block after first processing is input into the other channel to be coded to obtain the second coding bit sequence.
As an embodiment, in the present application, the process of inputting a bit block or a plurality of bit blocks into a channel coding to obtain an output is described in section 6.3.1.3 in 3GPP TS 38.212.
Example 9
Embodiment 9 illustrates a schematic diagram of a flow in which a first condition is used to determine a third bit block according to an embodiment of the present application, as shown in fig. 9.
In embodiment 9, the first node in the present application determines in step S91 whether a first condition is satisfied; if so, then the process proceeds to step S92 to determine: the third bit block comprises all bits in the first bit block and all bits in the second bit block; otherwise, it proceeds to step S93 to determine: the third bit block comprises the output after the bits in the first bit block and the bits in the second bit block are input into different channel codes respectively.
As an embodiment, when the first condition is satisfied: all bits in the first block of bits and all bits in the second block of bits are used directly to generate the first signal without channel coding.
As an embodiment, when the first condition is satisfied: all bits in the first bit block and all bits in the second bit block are used for generating the first signal after being used for determining sequence cyclic shift (sequence cyclic shift) based on a mapping relation.
As a sub-embodiment of the above embodiment, the mapping relationship is referred to Table (Table)9.2.3-3 or Table 9.2.3-4 in 3GPP TS 38.213.
As an embodiment, when the first condition is satisfied: all bits in the first block of bits and all bits in the second block of bits are used to generate the first signal after sequence modulation.
As an embodiment, when the first condition is satisfied: a sequence (sequence) generated by all bits in the first block of bits and all bits in the second block of bits jointly (jointly) is used for generating the first signal.
As a sub-embodiment of the foregoing embodiment, the one sequence generated by combining all bits in the first bit block and all bits in the second bit block includes a sequence used for carrying UCI in PUCCH format 0 or PUCCH format 1.
Example 10
Embodiment 10 illustrates a relationship diagram between the number of bits included in the first bit block, the number of bits included in the second bit block, the second number, the second threshold, the second condition, the third number, and the first pool of empty resources according to an embodiment of the present application, as shown in fig. 10.
In embodiment 10, the second condition is a condition relating to a magnitude relation between a second number, at least one of the number of bits included in the first bit block or the number of bits included in the second bit block being used to determine the second number, and a second threshold; whether the second condition is satisfied is used to determine whether a sum of a number of bits included by the first block of bits and a number of bits included by the second block of bits or a third number is used to determine a first pool of empty resources.
As a sub-embodiment of embodiment 10, the first set of empty resource pools includes the first empty resource pool in this application.
As a sub-embodiment of embodiment 10, the third number is equal to the number of bits comprised by the first block of bits plus a first intermediate amount, and the number of bits comprised by the second block of bits is used to determine the first intermediate amount.
As an embodiment, the third number is not equal to a sum of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an embodiment, the third number is smaller than a sum of a number of bits comprised by the first bit block and a number of bits comprised by the second bit block.
As an embodiment, the third number is greater than a sum of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an example, the second condition is the first condition in the present application.
As an example, the second condition is not the first condition in this application.
As an embodiment, the second condition includes: the second number is not greater than the second threshold.
As an embodiment, the second condition includes: the second number is greater than the second threshold.
As an embodiment, the second condition includes: the second number is greater than the second threshold and the fourth number is greater than a fourth threshold.
As an embodiment, the second condition includes: the second number is not greater than the second threshold or the fourth number is not greater than a fourth threshold.
As an embodiment, said expressing that said second condition is fulfilled comprises: all conditions in the first set of conditions are satisfied.
As an embodiment, said expressing that the second condition is not satisfied comprises: at least one condition in the first set of conditions is not satisfied.
As an embodiment, said expressing that the second condition is satisfied comprises: at least one condition in the first set of conditions is satisfied.
As an embodiment, said expressing that the second condition is not satisfied comprises: all conditions in the first set of conditions are not satisfied.
As an embodiment, said expressing that the second condition is satisfied comprises: all conditions in the first set of conditions are satisfied and at least one condition in the second set of conditions is satisfied.
As an embodiment, said expressing that the second condition is not satisfied comprises: at least one condition in the first set of conditions is not satisfied or all conditions in the second set of conditions are not satisfied.
As an embodiment, one condition of the first set of conditions comprises: the second number is not greater than the second threshold.
As an embodiment, one condition of the first set of conditions comprises: the second number is greater than the second threshold.
As an embodiment, one condition of the second set of conditions comprises: the second number is not greater than the second threshold.
As an embodiment, one condition of the second set of conditions comprises: the second number is greater than the second threshold.
As an example, said second number is equal to said first number in the present application.
As an embodiment, said second number is not equal to said first number in the present application.
As an embodiment, the second number is equal to a number of bits comprised by the first block of bits.
As an embodiment, the second number is equal to a number of bits comprised by the second block of bits.
As an embodiment, the second number is equal to a sum of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an embodiment, the second number is equal to a product of a number of bits comprised by the first block of bits and a number of bits comprised by the second block of bits.
As an embodiment, the second number is equal to a number of bits comprised by the first bit block plus a second value multiplied by a number of bits comprised by the second bit block, the second value being related to at least one of a first code rate or a second code rate, the first code rate being different from the second code rate.
As an embodiment, the second number is equal to a result of performing a rounding operation on a result of multiplying a second value by a number of bits included in the second bit block plus a number of bits included in the first bit block, the second value being related to at least one of a first code rate or a second code rate, the first code rate being different from the second code rate.
As an embodiment, the second threshold is the first threshold in this application.
As an example, the second threshold is not the first threshold in this application.
As an embodiment, the second threshold DCI is indicated by signaling.
As an embodiment, the second threshold is configured for higher layer signaling.
As an embodiment, the second threshold is configured by RRC signaling.
As an embodiment, the second threshold is configured for MAC CE signaling.
As an embodiment, the second threshold is predefined (default).
As one embodiment, the second threshold is greater than zero.
As an embodiment, the second threshold is equal to 1.
As an example, said second threshold is equal to 2.
As an example, the second threshold is equal to 3.
As an example, said second threshold is equal to 4.
As an embodiment, the second threshold is greater than 2.
As an embodiment, the second threshold is greater than 4.
For one embodiment, the second threshold is not greater than 1706.
As an example, the second threshold is no greater than 17060.
As an embodiment, the second threshold is equal to the first parameter value minus a number of bits comprised by the first block of bits.
As an embodiment, when the second condition is satisfied, a sum of a number of bits included by the first bit block and a number of bits included by the second bit block is used to determine the first pool of empty resources; when the second condition is not satisfied, the third quantity is used to determine the first pool of empty resources.
As an embodiment, when the second condition is not satisfied, a sum of a number of bits included by the first bit block and a number of bits included by the second bit block is used to determine the first pool of empty resources; when the second condition is satisfied, the third quantity is used to determine the first pool of empty resources.
As an embodiment, the determining that the sum of the number of bits included in the first bit block and the number of bits included in the second bit block is used to determine the meaning of the first pool of empty resources comprises: n number ranges respectively correspond to N empty resource pool sets, a first number range is one of the N number ranges, and a sum of the number of bits included in the first bit block and the number of bits included in the second bit block is equal to one number of the first number range; the first empty resource pool set is an empty resource pool set corresponding to the first quantity range in the N empty resource pool sets.
As an embodiment, the determining that the third quantity of the sentence is used to determine the meaning of the first pool of empty resources comprises: the N number ranges respectively correspond to N empty resource pool sets, the first number range is one of the N number ranges, and the third number is equal to one of the first number ranges; the first empty resource pool set is an empty resource pool set corresponding to the first quantity range in the N empty resource pool sets.
As an embodiment, N is a positive integer.
As an example, said N is equal to one of 1 to 2.
As an embodiment, said N is equal to one of 1 to 4.
As an embodiment, said N is equal to one of 1 to 8.
As an embodiment, said N is equal to one of 1 to 16.
As an example, said N is equal to one of 1 to 32.
As one embodiment, the N is not greater than 1024.
As an embodiment, the N empty resource pool sets respectively comprise N PUCCH resource sets(s)
For an embodiment, the first pool of air interface resources comprises one PUCCH resource set.
As an embodiment, the first intermediate quantity is equal to a first value multiplied by a number of bits comprised by the second block of bits, the first value being related to at least one of a first code rate or a second code rate, the first code rate being different from the second code rate.
As an embodiment, the first intermediate quantity is equal to a result of performing a rounding operation on a result of multiplying a first value by a number of bits included in the second bit block, the first value being related to at least one of a first code rate or a second code rate, the first code rate being different from the second code rate.
For one embodiment, the first value is equal to the first code rate divided by the second code rate.
For one embodiment, the first value is equal to the second code rate divided by the first code rate.
As an embodiment, the first value is equal to the first code rate.
As an embodiment, the first value is equal to the second code rate.
As an embodiment, the first value is equal to 1 divided by the first code rate.
As an example, the first value is equal to 1 divided by the second code rate.
Example 11
Embodiment 11 illustrates a schematic diagram of a first signaling group, two signaling and a relationship between a first bit block and a second bit block according to an embodiment of the present application, as shown in fig. 11.
In embodiment 11, two signaling included in the first signaling group are used to determine the first bit block and the second bit block, respectively.
As a sub-embodiment of embodiment 11, the first signaling group includes the first signaling in this application.
As an embodiment, two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively; the two signaling in the first signaling group comprise the first signaling.
As an embodiment, the first signaling is used to determine the first bit block.
As an embodiment, the first signaling is used to determine the second bit block.
As an embodiment, one signaling other than the first signaling is used to determine the first bit block, and another signaling other than the first signaling is used to determine the second bit block.
As an embodiment, one signaling in the first signaling group is dynamically configured.
As an embodiment, one signaling in the first signaling group comprises layer 1 signaling.
As an embodiment, one signaling in the first signaling group comprises layer 1 control signaling.
As an embodiment, one signaling in the first signaling group comprises physical layer signaling.
As an embodiment, one signaling in the first signaling group comprises one or more fields (fields) in a physical layer signaling.
As an embodiment, one signaling in the first signaling group comprises higher layer signaling.
As an embodiment, one of the first signaling group comprises one or more fields in a higher layer signaling.
As an embodiment, one signaling in the first signaling group comprises RRC signaling.
As an embodiment, one signaling in the first signaling group includes MAC CE signaling.
As an embodiment, one signaling in the first signaling group includes one or more fields in one RRC signaling.
As an embodiment, one signaling in the first signaling group includes one or more fields in one MAC CE signaling.
As one embodiment, one signaling in the first signaling group includes DCI.
As one embodiment, one signaling in the first signaling group includes one or more fields in one DCI.
As an embodiment, one signaling in the first signaling group includes SCI.
As an embodiment, one signaling in the first signaling group includes one or more fields in one SCI.
As an embodiment, one signaling in the first signaling group includes one or more fields in one IE.
As an embodiment, one signaling in the first signaling group is a downlink scheduling signaling.
As an embodiment, one signaling in the first signaling group is an uplink scheduling signaling.
As an embodiment, one signaling in the first signaling group is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used for carrying physical layer signaling).
As an embodiment, one signaling in the first signaling group is DCI format 1_0, and the specific definition of the DCI format 1_0 is described in section 7.3.1.2 of 3GPP TS 38.212.
As an embodiment, one signaling in the first signaling group is DCI format 1_1, and the specific definition of the DCI format 1_1 is described in section 7.3.1.2 of 3GPP TS 38.212.
As an embodiment, one signaling in the first signaling group is DCI format 1_2, and the specific definition of the DCI format 1_2 is described in section 7.3.1.2 of 3GPP TS 38.212.
As an embodiment, one signaling in the first signaling group is DCI format 0_0, and the specific definition of DCI format 0_0 is described in section 7.3.1.1 of 3GPP TS 38.212.
As an embodiment, one signaling in the first signaling group is DCI format 0_1, and the specific definition of the DCI format 0_1 is described in section 7.3.1.1 of 3GPP TS 38.212.
As an embodiment, one signaling in the first signaling group is DCI format 0_2, and the specific definition of the DCI format 0_2 is described in section 7.3.1.1 of 3GPP TS 38.212.
As an embodiment, two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively; the first bit block includes indication information of whether one of the two signaling in the first signaling group is correctly received or not, or the first bit block includes indication information of whether one of the two signaling in the first signaling group is scheduled to be correctly received or not; the second bit block includes indication information whether the other of the two signaling in the first signaling group is correctly received or not, or the second bit block includes indication information whether one bit block scheduled by the other of the two signaling in the first signaling group is correctly received or not.
As a sub-embodiment of the foregoing embodiment, the first bit block includes the first type HARQ-ACK in this application, and the second bit block includes the second type HARQ-ACK in this application.
Example 12
Embodiment 12 illustrates a schematic diagram of a relationship between a third pool of air interface resources, a second pool of air interface resources, a first bit block and a second bit block according to an embodiment of the present application, as shown in fig. 12.
In embodiment 12, a third air interface resource pool is reserved for a first bit block, and a second air interface resource pool is reserved for a second bit block; and the third air interface resource pool and the second air interface resource pool are overlapped in a time domain.
For an embodiment, the third pool of air interface resources includes a positive integer number of time-frequency resource particles in the time-frequency domain.
As an embodiment, the third pool of air interface resources includes a positive integer number of REs in a time-frequency domain.
As an embodiment, the third pool of empty resources includes a positive integer number of subcarriers in the frequency domain.
As an embodiment, the third pool of air interface resources includes a positive integer number of PRBs in the frequency domain.
As an embodiment, the third pool of air interface resources includes a positive integer number of RBs in the frequency domain.
For one embodiment, the third pool of air interface resources includes a positive integer number of multicarrier symbols in the time domain.
For an embodiment, the third pool of air interface resources includes a positive integer number of time slots in the time domain.
As an embodiment, the third pool of air interface resources includes a positive integer number of sub-slots in the time domain.
For one embodiment, the third pool of air interface resources comprises a positive integer number of milliseconds in the time domain.
As an embodiment, the third pool of empty resources comprises a positive integer number of consecutive multicarrier symbols in the time domain.
As an embodiment, the third pool of air interface resources includes a positive integer number of discontinuous time slots in the time domain.
For one embodiment, the third pool of air interface resources includes a positive integer number of consecutive time slots in the time domain.
For one embodiment, the third pool of air interface resources includes a positive integer number of subframes in the time domain.
As an embodiment, the third pool of empty resources is configured by physical layer signaling.
As an embodiment, the third pool of air interface resources is configured by higher layer signaling.
As an embodiment, the third pool of air interface resources is configured by RRC signaling.
As an embodiment, the third pool of empty resources is configured by MAC CE signaling.
As an embodiment, the third pool of air interface resources is reserved for an uplink physical layer channel.
As an embodiment, the third pool of air interface resources includes time-frequency resources reserved for an uplink physical layer channel.
As an embodiment, the third pool of air interface resources includes a time-frequency resource occupied by an uplink physical layer channel.
As an embodiment, the third pool of empty resources is reserved for one PUCCH.
As an embodiment, the third pool of air interface resources includes air interface resources reserved for one PUCCH.
As an embodiment, the third pool of empty resources includes one PUCCH resource.
For an embodiment, the second pool of air interface resources includes a positive integer number of time-frequency resource particles in the time-frequency domain.
For one embodiment, the second pool of air interface resources includes a positive integer number of REs in a time-frequency domain.
For an embodiment, the second pool of air interface resources includes a positive integer number of subcarriers in the frequency domain.
As an embodiment, the second pool of air interface resources includes a positive integer number of PRBs in the frequency domain.
For one embodiment, the second pool of air interface resources includes a positive integer number of RBs in a frequency domain.
As an embodiment, the second pool of empty resources comprises a positive integer number of multicarrier symbols in the time domain.
For an embodiment, the second pool of air interface resources includes a positive integer number of time slots in a time domain.
For an embodiment, the second pool of air interface resources includes a positive integer number of sub-slots in the time domain.
For one embodiment, the second pool of air resources comprises a positive integer number of milliseconds in the time domain.
As an embodiment, the second pool of empty resources comprises a positive integer number of consecutive multicarrier symbols in the time domain.
For one embodiment, the second pool of air interface resources includes a positive integer number of discontinuous time slots in the time domain.
For one embodiment, the second pool of air interface resources includes a positive integer number of consecutive time slots in the time domain.
For one embodiment, the second pool of air interface resources includes a positive integer number of subframes in the time domain.
As an embodiment, the second pool of empty resources is configured by physical layer signaling.
As an embodiment, the second pool of empty resources is configured by higher layer signaling.
As an embodiment, the second pool of empty resources is configured by RRC signaling.
As an embodiment, the second pool of empty resources is configured by MAC CE signaling.
As an embodiment, the second pool of air interface resources is reserved for an uplink physical layer channel.
As an embodiment, the second pool of air interface resources includes time-frequency resources reserved for an uplink physical layer channel.
As an embodiment, the second air interface resource pool includes a time-frequency resource occupied by an uplink physical layer channel.
As an embodiment, the second pool of empty resources is reserved for one PUCCH.
As an embodiment, the second air interface resource pool includes air interface resources reserved for one PUCCH.
In an embodiment, the second pool of empty resources includes one PUCCH resource.
As an embodiment, two signaling in the first signaling group in the present application indicate the third air interface resource pool and the second air interface resource pool respectively.
As an embodiment, the overlapping of the phrases in the time domain in the present application includes: there is overlap in the time domain and overlap in the frequency domain.
As an embodiment, the overlapping of the phrases in the time domain in the present application includes: there is overlap in the time domain and overlap or no overlap in the frequency domain.
As an embodiment, the first code rate in the present application and the second code rate in the present application are a code rate corresponding to the third air interface resource pool and a code rate corresponding to the second air interface resource pool, respectively.
As an embodiment, the first code rate in the present application and the second code rate in the present application are a maximum code rate corresponding to the third air interface resource pool and a maximum code rate corresponding to the second air interface resource pool, respectively.
As an embodiment, the first code rate in the present application and the second code rate in the present application are respectively a maximum code rate configured for one PUCCH included in the third air interface resource pool and a maximum code rate configured for one PUCCH included in the second air interface resource pool.
As an embodiment, the first code rate in this application and the second code rate in this application are two different maximum code rates configured for one PUCCH resource included in the second air interface resource pool.
As an embodiment, the first code rate in this application and the second code rate in this application are two different maximum code rates configured for one PUCCH resource included in the third pool of air interface resources, respectively.
As an embodiment, the first air interface resource pool in this application is the third air interface resource pool.
As an embodiment, the first air interface resource pool in this application is the second air interface resource pool.
As an embodiment, the first air interface resource pool in the present application is a different air interface resource pool from the second air interface resource pool and the third air interface resource pool.
As an embodiment, the third pool of air interface resources overlaps with the first pool of air interface resources in the present application in a time domain.
As an embodiment, the second pool of air interface resources overlaps with the first pool of air interface resources in the present application in a time domain.
Example 13
Embodiment 13 illustrates a schematic diagram of a relationship between a first bit block and a first priority and a relationship between a second bit block and a second priority according to an embodiment of the present application, as shown in fig. 13.
In embodiment 13, the first bit block corresponds to a first priority, and the second bit block corresponds to a second priority; the first priority is different from the second priority.
As an embodiment, the first signaling in this application indicates the first priority.
As an embodiment, the first signaling in this application indicates the second priority.
As an embodiment, the fourth bit block in the present application corresponds to one of the first priority or the second priority.
As an embodiment, the priority corresponding to the fourth bit block in this application is the priority indicated by the first signaling.
As an embodiment, the first priority index in the present application and the second priority index in the present application are both priority indexes (priority indexes).
As an embodiment, a first priority index indicates the first priority and a second priority index indicates the second priority.
As an embodiment, the index of the first priority is a first priority index, and the index of the second priority is a second priority index.
As an embodiment, the first signaling in this application indicates one of the first priority index or the second priority index.
As an embodiment, the first signaling in the present application includes a priority indicator field.
As an embodiment, the priority index included in the priority indicator field included in the first signaling is one of the first priority index or the second priority index.
For one embodiment, the first bit block comprises a first type of HARQ-ACK; the first type of HARQ-ACK is: indicating a bit block carried by a PDSCH transmission scheduled by signaling indicating the first priority or a HARQ-ACK indicating whether the signaling of the first priority is received correctly.
For one embodiment, the second bit block includes a second type of HARQ-ACK; the second type of HARQ-ACK is: indicating a bit block carried by a PDSCH transmission indicating the signaling scheduling of the second priority or a HARQ-ACK indicating whether the signaling of the second priority is received correctly.
For one embodiment, the first bit block comprises a first type of HARQ-ACK; the first type of HARQ-ACK is: indicating a bit block carried by a PDSCH transmission scheduled by a signaling indicating a first priority index or a HARQ-ACK indicating whether the signaling of the first priority index itself was correctly received.
For one embodiment, the second bit block includes a second type of HARQ-ACK; the second type of HARQ-ACK is: indicating a bit block carried by a PDSCH transmission scheduled by a signaling indicating a second priority index or a HARQ-ACK indicating whether the signaling of the second priority index itself was correctly received.
As an embodiment, the priority corresponding to the first bit block is the same as the priority corresponding to the first type of HARQ-ACK bits.
As an embodiment, the priority corresponding to the second bit block is the same as the priority corresponding to the second type of HARQ-ACK bits.
As an embodiment, the priority of the first signaling indication in the present application is the same as the priority corresponding to the first type of HARQ-ACK bits.
As an embodiment, the priority of the first signaling indication in this application is the same as the priority corresponding to the second type of HARQ-ACK bits.
As an embodiment, the first priority index is priority index 1 and the second priority index is priority index 0.
As an embodiment, the first priority index is priority index 0 and the second priority index is priority index 1.
As an embodiment, the priority of the second signaling indication in this application is the same as the priority corresponding to the second type of HARQ-ACK bits.
As an embodiment, the priority indicated by the third signaling in the present application is the same as the priority corresponding to the first type HARQ-ACK bit.
As an embodiment, the first bit block includes a first type of UCI, and the second bit block includes a second type of UCI; the first type of UCI corresponds to the first priority based on rules configured by predefined or higher layer signaling, and the second type of UCI corresponds to the second priority based on rules configured by predefined or higher layer signaling.
As an embodiment, one signaling in the first signaling group in this application indicates the first priority.
As an embodiment, one signaling in the first signaling group in this application indicates the second priority.
As an embodiment, one signaling in the first signaling group in this application includes a priority indicator field.
As an embodiment, a priority index included in a priority indicator field included in one signaling in the first signaling group in this application is a first priority index or a second priority index.
As an embodiment, the third pool of air interface resources in the present application corresponds to the first priority based on a predefined or higher layer signaling configured rule.
As an embodiment, the second pool of air interface resources in the present application corresponds to the second priority based on a predefined or higher layer signaling configured rule.
As an embodiment, the first pool of air interface resources in the present application corresponds to the first priority or the second priority based on a rule configured by predefined or higher layer signaling.
Example 14
Embodiment 14 is a block diagram illustrating a processing apparatus in a first node device, as shown in fig. 14. In fig. 14, a first node device processing apparatus 1400 includes a first receiver 1401 and a first transmitter 1402.
For one embodiment, the first node device 1400 is a user device.
As an embodiment, the first node device 1400 is a relay node.
As an example, the first node device 1400 is a vehicle communication device.
For one embodiment, the first node device 1400 is a user device supporting V2X communication.
As an embodiment, the first node device 1400 is a relay node supporting V2X communication.
For one embodiment, the first receiver 1401 includes at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4.
For one embodiment, the first receiver 1401 includes at least the first five of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
For one embodiment, the first receiver 1401 includes at least the first four of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
For one embodiment, the first receiver 1401 includes at least three of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
For one embodiment, the first receiver 1401 includes at least two of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
The first transmitter 1402 may include at least one of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4, as one example.
For one embodiment, the first transmitter 1402 includes at least the first five of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
For one embodiment, the first transmitter 1402 includes at least the first four of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
The first transmitter 1402 may include, for example, at least three of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
The first transmitter 1402 may include, for one embodiment, at least two of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.
In embodiment 14, the first receiver 1401 receives a first signaling; the first transmitter 1402 sends a first signal in a first air interface resource pool, where the first signal carries a first bit block and a second bit block; wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
As an embodiment, the first number is equal to a number of bits comprised by the second block of bits; the first condition includes: the second block of bits includes the number of bits not greater than the first threshold.
As an embodiment, when the first condition is satisfied, the third bit block includes that all bits in the first bit block and all bits in the second bit block are input into the same channel-coded output; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, when the first condition is satisfied, the third block of bits includes all bits in the first block of bits and all bits in the second block of bits; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, the second condition is a condition related to a magnitude relation between a second number and a second threshold, at least one of the number of bits included in the first bit block or the number of bits included in the second bit block being used to determine the second number; whether the second condition is satisfied is used to determine whether a sum of a number of bits included in the first bit block and a number of bits included in the second bit block or a third number is used to determine a first pool of empty resources, the third number being equal to the number of bits included in the first bit block plus a first intermediate amount, the number of bits included in the second bit block being used to determine the first intermediate amount; the first pool of air interface resources comprises the first pool of air interface resources.
As an example, the first receiver 1401, receives a first signaling group; wherein the first signaling group comprises the first signaling; two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively.
As an embodiment, a third pool of air resources is reserved for the first block of bits, and a second pool of air resources is reserved for the second block of bits; and the third air interface resource pool and the second air interface resource pool are overlapped in a time domain.
Example 15
Embodiment 15 is a block diagram illustrating a processing apparatus in a second node device, as shown in fig. 15. In fig. 15, a second node device processing apparatus 1500 includes a second transmitter 1501 and a second receiver 1502.
For one embodiment, the second node device 1500 is a user device.
For one embodiment, the second node apparatus 1500 is a base station.
As an embodiment, the second node apparatus 1500 is a relay node.
As one embodiment, the second node apparatus 1500 is an in-vehicle communication apparatus.
For one embodiment, the second node device 1500 is a user device supporting V2X communication.
For one embodiment, the second transmitter 1501 includes at least one of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second transmitter 1501 includes at least the first five of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second transmitter 1501 includes at least the first four of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second transmitter 1501 includes at least the first three of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4.
For one embodiment, the second transmitter 1501 includes at least two of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second receiver 1502 includes at least one of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second receiver 1502 includes at least the first five of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second receiver 1502 includes at least the first four of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second receiver 1502 includes at least the first three of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
For one embodiment, the second receiver 1502 includes at least two of the antenna 420, the receiver 418, the multiple antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.
In embodiment 15, the second transmitter 1501 transmits a first signaling; the second receiver 1502 receives a first signal in a first air interface resource pool, where the first signal carries a first bit block and a second bit block; wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
As an embodiment, the first number is equal to a number of bits comprised by the second block of bits; the first condition includes: the second block of bits includes the number of bits not greater than the first threshold.
As an embodiment, when the first condition is satisfied, the third bit block includes that all bits in the first bit block and all bits in the second bit block are input into the same channel-coded output; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, when the first condition is satisfied, the third block of bits includes all bits in the first block of bits and all bits in the second block of bits; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
As an embodiment, the second condition is a condition related to a magnitude relation between a second number and a second threshold, at least one of the number of bits included in the first bit block or the number of bits included in the second bit block being used to determine the second number; whether the second condition is satisfied is used to determine whether a sum of a number of bits included in the first bit block and a number of bits included in the second bit block or a third number is used to determine a first pool of empty resources, the third number being equal to the number of bits included in the first bit block plus a first intermediate amount, the number of bits included in the second bit block being used to determine the first intermediate amount; the first pool of air interface resources comprises the first pool of air interface resources.
For one embodiment, the second transmitter 1501 transmits the first signaling group; wherein the first signaling group comprises the first signaling; two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively.
As an embodiment, a third pool of air resources is reserved for the first block of bits, and a second pool of air resources is reserved for the second block of bits; and the third air interface resource pool and the second air interface resource pool are overlapped in a time domain.
It will be understood by those skilled in the art that all or part of the steps of the above methods may be implemented by instructing relevant hardware through a program, and the program may be stored in a computer readable storage medium, such as a read-only memory, a hard disk or an optical disk. Alternatively, all or part of the steps of the above embodiments may be implemented by using one or more integrated circuits. Accordingly, the module units in the above embodiments may be implemented in a hardware form, or may be implemented in a form of software functional modules, and the present application is not limited to any specific form of combination of software and hardware. The first node device in the application includes but is not limited to wireless communication devices such as cell-phones, tablet computers, notebooks, network access cards, low power consumption devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircrafts, airplanes, unmanned aerial vehicles, and remote control airplanes. The second node device in the application includes but is not limited to wireless communication devices such as cell-phones, tablet computers, notebooks, network access cards, low power consumption devices, eMTC devices, NB-IoT devices, vehicle-mounted communication devices, aircrafts, airplanes, unmanned aerial vehicles, and remote control airplanes. User equipment or UE or terminal in this application include but not limited to cell-phone, panel computer, notebook, network card, low-power consumption equipment, eMTC equipment, NB-IoT equipment, vehicle communication equipment, aircraft, unmanned aerial vehicle, wireless communication equipment such as remote control aircraft. The base station device, the base station or the network side device in the present application includes, but is not limited to, a macro cell base station, a micro cell base station, a home base station, a relay base station, an eNB, a gNB, a transmission and reception node TRP, a GNSS, a relay satellite, a satellite base station, an air base station, a testing apparatus, a testing device, a testing instrument, and other devices.
The above description is only a preferred embodiment of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims (10)

1. A first node device for wireless communication, comprising:
a first receiver receiving a first signaling;
a first transmitter, configured to transmit a first signal in a first air interface resource pool, where the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used to generate the first signal, the first bit block and the second bit block are used to generate the third bit block, and whether the first condition is satisfied is used to determine whether bits in the first bit block and bits in the second bit block are input to different channel codes respectively to obtain the third bit block.
2. The first node device of claim 1, wherein the first number is equal to a number of bits included in the second block of bits; the first condition includes: the second block of bits includes the number of bits not greater than the first threshold.
3. The first node device of claim 1 or 2, wherein when the first condition is satisfied, the third bit block comprises an output of all bits in the first bit block and all bits in the second bit block that are input to the same channel-coded output; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
4. The first node device of claim 1 or 2, wherein the third block of bits comprises all bits in the first block of bits and all bits in the second block of bits when the first condition is satisfied; when the first condition is not satisfied, the third bit block includes outputs in which bits in the first bit block and bits in the second bit block are input respectively to different channel-coded outputs.
5. The first node apparatus according to any one of claims 1 to 4, wherein a second condition is a condition relating to a magnitude relationship between a second number and a second threshold, at least one of the number of bits included in the first bit block or the number of bits included in the second bit block being used to determine the second number; whether the second condition is satisfied is used to determine whether a sum of a number of bits included in the first bit block and a number of bits included in the second bit block or a third number is used to determine a first pool of empty resources, the third number being equal to the number of bits included in the first bit block plus a first intermediate amount, the number of bits included in the second bit block being used to determine the first intermediate amount; the first pool of air interface resources comprises the first pool of air interface resources.
6. The first node device of any one of claims 1 to 5, comprising:
the first receiver receives a first signaling group;
wherein the first signaling group comprises the first signaling; two signaling in the first signaling group are used to determine the first bit block and the second bit block, respectively.
7. The first node apparatus of any of claims 1 to 6, wherein a third pool of empty resources is reserved for the first block of bits and a second pool of empty resources is reserved for the second block of bits; and the third air interface resource pool and the second air interface resource pool are overlapped in a time domain.
8. A second node device for wireless communication, comprising:
a second transmitter for transmitting the first signaling;
a second receiver, configured to receive a first signal in a first air interface resource pool, where the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
9. A method in a first node used for wireless communication, comprising:
receiving a first signaling;
sending a first signal in a first air interface resource pool, wherein the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition related to a magnitude relation between a first number and a first threshold, at least one of the number of bits included in the first block of bits or the number of bits included in the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
10. A method in a second node used for wireless communication, comprising:
sending a first signaling;
receiving a first signal in a first air interface resource pool, wherein the first signal carries a first bit block and a second bit block;
wherein the first signaling is used to determine the first pool of empty resources; the first condition is a condition relating to a magnitude relation between a first number and a first threshold, at least one of the number of bits comprised by the first block of bits or the number of bits comprised by the second block of bits being used to determine the first number; a third bit block is used for generating the first signal, the first bit block and the second bit block are used for generating the third bit block, and whether the first condition is met is used for determining whether the bits in the first bit block and the bits in the second bit block are respectively input into different channel codes to obtain the third bit block.
CN202011190796.3A 2020-10-22 2020-10-30 Method and apparatus in a node used for wireless communication Pending CN114448578A (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
CN202011190796.3A CN114448578A (en) 2020-10-30 2020-10-30 Method and apparatus in a node used for wireless communication
PCT/CN2021/123489 WO2022083482A1 (en) 2020-10-22 2021-10-13 Method and device used in node for wireless communication
US18/136,351 US20230299904A1 (en) 2020-10-22 2023-04-19 Method and device in nodes used for wireless communicatio

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011190796.3A CN114448578A (en) 2020-10-30 2020-10-30 Method and apparatus in a node used for wireless communication

Publications (1)

Publication Number Publication Date
CN114448578A true CN114448578A (en) 2022-05-06

Family

ID=81356680

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011190796.3A Pending CN114448578A (en) 2020-10-22 2020-10-30 Method and apparatus in a node used for wireless communication

Country Status (1)

Country Link
CN (1) CN114448578A (en)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110198206A (en) * 2018-02-24 2019-09-03 华为技术有限公司 The method and apparatus for sending uplink control channel
CN111278143A (en) * 2018-12-27 2020-06-12 维沃移动通信有限公司 Method and device for processing uplink control information
WO2020146247A2 (en) * 2019-01-09 2020-07-16 Idac Holdings, Inc. Methods, apparatus and systems for enhanced control signaling of ultra-reliable transmissions

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110198206A (en) * 2018-02-24 2019-09-03 华为技术有限公司 The method and apparatus for sending uplink control channel
CN111278143A (en) * 2018-12-27 2020-06-12 维沃移动通信有限公司 Method and device for processing uplink control information
WO2020146247A2 (en) * 2019-01-09 2020-07-16 Idac Holdings, Inc. Methods, apparatus and systems for enhanced control signaling of ultra-reliable transmissions

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
""R1-1718337"", 3GPP TSG_RAN\\WG1_RL1, 3 October 2017 (2017-10-03) *
""R1-1811378 eURLLC L1 enhancement"", 3GPP TSG_RAN\\WG1_RL1, 29 September 2018 (2018-09-29) *

Similar Documents

Publication Publication Date Title
CN112532357B (en) Method and apparatus in a node used for wireless communication
CN114553377A (en) Method and apparatus in a node used for wireless communication
CN113543231B (en) Method and apparatus in a node used for wireless communication
CN113453345B (en) Method and apparatus in a node used for wireless communication
CN113498179B (en) Method and device used in node of wireless communication
CN113556820B (en) Method and device used in node of wireless communication
CN114916073A (en) Method and apparatus in a node used for wireless communication
CN113498195A (en) Method and apparatus in a node used for wireless communication
CN115085878A (en) Method and apparatus in a node used for wireless communication
CN114696973A (en) Method and apparatus in a node used for wireless communication
CN113677032A (en) Method and apparatus in a node used for wireless communication
CN113765636A (en) Method and apparatus in a node used for wireless communication
CN113132056A (en) Method and apparatus in a node used for wireless communication
CN113949483B (en) Method and apparatus in a node used for wireless communication
CN113411887B (en) Method and device used in node of wireless communication
CN113225167B (en) Method and apparatus in a node used for wireless communication
CN112788770B (en) Method and apparatus in a node used for wireless communication
CN114448578A (en) Method and apparatus in a node used for wireless communication
CN114389775A (en) Method and apparatus in a node used for wireless communication
CN114285536A (en) Method and apparatus in a node used for wireless communication
CN113597015A (en) Method and apparatus in a node used for wireless communication
CN114257346A (en) Method and apparatus in a node used for wireless communication
CN113573414A (en) Method and apparatus in a node used for wireless communication
CN114095136A (en) Method and apparatus in a node used for wireless communication
CN113692061A (en) Method and apparatus in a node used for wireless communication

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination