CN116781226A

CN116781226A - Method and apparatus in a node for wireless communication

Info

Publication number: CN116781226A
Application number: CN202310814517.3A
Authority: CN
Inventors: 张晓博
Original assignee: Shanghai Langbo Communication Technology Co Ltd
Current assignee: Shanghai Langbo Communication Technology Co Ltd
Priority date: 2020-08-24
Filing date: 2020-08-24
Publication date: 2023-09-19
Also published as: CN114095136A; CN114095136B

Abstract

A method and apparatus in a node for wireless communication is disclosed. A first receiver that receives a first signaling and a second signaling; a first transmitter for transmitting a first signal in a target air interface resource block, wherein the first signal carries a first bit block; wherein the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; the second air interface resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, which overlaps with the second air interface resource block in the time domain; a first number is used to determine a fourth air interface resource block, the first number being not less than a number of bits comprised by the first bit block and less than a sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block.

Description

Method and apparatus in a node for wireless communication

The application is a divisional application of the following original application:

filing date of the original application: 2020, 08 and 24 days

Number of the original application: 202010854453.6

-the name of the application of the original application: method and apparatus in a node for wireless communication

Technical Field

The present application relates to a transmission method and apparatus in a wireless communication system, and more particularly, to a transmission method and apparatus for wireless signals in a wireless communication system supporting a cellular network.

Background

In 5G systems, ebbb (Enhance Mobile Broadband, enhanced mobile broadband), and URLLC (Ultra Reliable and Low Latency Communication, ultra high reliability and ultra low latency communication) are two major typical traffic types (Service Type). A New modulation and coding scheme (MCS, modulation and Coding Scheme) table has been defined in 3GPP (3 rd Generation Partner Project, third generation partnership project) NR (New Radio, new air interface) Release 15 for the lower target BLER requirement (10-5) of the URLLC service. In 3GPP NR Release 16, DCI (Downlink Control Information ) signaling may indicate whether the scheduled traffic is Low Priority (Low Priority) or High Priority (High Priority), where Low Priority corresponds to URLLC traffic, lower latency (e.g., 0.5-1 ms), etc., in order to support higher demand URLLC traffic. When a low priority transmission overlaps a high priority transmission in the time domain, the high priority transmission is performed and the low priority transmission is discarded.

The 3GPP RAN together passes the URLLC enhanced WI (Work Item) of NR Release 17. Among them, multiplexing (Multiplexing) of different services in a UE (User Equipment) is an important point to be studied.

Disclosure of Invention

After introducing multiplexing of different priority services in the UE, the UE may multiplex UCI (Uplink Control Information ) of different priorities onto the same PUCCH (Physical Uplink Control CHannel ) for transmission; the UE may need to perform PUCCH resource (PUCCH resource) reselection in performing multiplexing. How to handle collisions (collisions) with other channels caused by PUCCH resource reselection is a critical issue to be solved.

In view of the above, the present application discloses a solution. In the above description of the problem, upLink (UpLink) is taken as an example; the application is also applicable to transmission scenes such as Downlink (Downlink) and Side Link (SL) and the like, and achieves technical effects similar to those in the uplink. Furthermore, the adoption of unified solutions for different scenarios (including but not limited to uplink, downlink, companion link) also helps to reduce hardware complexity and cost. It should be noted that embodiments of the user equipment and features of embodiments of the present application may be applied to a base station and vice versa without conflict. The embodiments of the application and the features of the embodiments may be combined with each other arbitrarily without conflict.

As an embodiment, the term (terminalogy) in the present application is explained with reference to the definition of the 3GPP specification protocol TS36 series.

As an embodiment, the term in the present application is explained with reference to the definition of the 3GPP specification protocol TS38 series.

As an embodiment, the term in the present application is explained with reference to the definition of the 3GPP specification protocol TS37 series.

As one example, the term in the present application is explained with reference to the definition of the specification protocol of IEEE (Institute ofElectrical andElectronics Engineers ).

The application discloses a method used in a first node of wireless communication, which is characterized by comprising the following steps:

receiving a first signaling and a second signaling;

transmitting a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

wherein the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; the second air interface resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, which overlaps with the second air interface resource block in the time domain; a first number is used to determine a fourth air interface resource block, the first number being not less than a number of bits comprised by the first bit block and less than a sum of the number of bits comprised by the first bit block and a number of bits comprised by the third bit block, the fourth air interface resource block and the second air interface resource block being mutually orthogonal in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As one embodiment, the problems to be solved by the present application include: when UCI of different priorities (including HARQ-ACK (Hybrid Automatic Repeat reQuest Acknowledgement, hybrid automatic repeat request acknowledgement), etc.) is allowed to be multiplexed into the same PUCCH, a problem of collision between a plurality of physical layer channels caused by PUCCH resource reselection is handled.

As one embodiment, the problems to be solved by the present application include: how to guarantee the communication performance of the high priority service under the condition of allowing multiplexing of the different priority services in the UE.

As an embodiment, the essence of the method is that: when PUCCHs required to carry UCI of different priorities multiplexed collide with another uplink physical layer channel (e.g., one PUSCH), the priority corresponding to the other uplink physical layer channel is used to determine whether multiplexing is performed.

As an embodiment, the essence of the method is that: when PUCCHs required to carry UCI of different priorities multiplexed collide with another uplink physical layer channel (e.g., one PUSCH), the priorities corresponding to the other uplink physical layer channel are used to determine how UCI of the different priorities is multiplexed.

As an embodiment, the essence of the method is that: when the PUCCH required to carry the first and third bit blocks collides with another uplink physical layer channel (e.g. one PUSCH), the priority corresponding to the other uplink physical layer channel is used to determine whether multiplexing is performed or how multiplexing is performed.

As an embodiment, the above method has the following advantages: the transmission performance of the high priority data or control information is ensured.

As an embodiment, the above method has the following advantages: spectral efficiency is improved (spectral efficiency).

As one embodiment, the term collision in the present application includes: overlapping in the time domain.

According to one aspect of the application, the above method is characterized in that,

the first bit block includes a first type of HARQ-ACK; the third bit block includes a second type of HARQ-ACK.

when the priority of the second bit block is the first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the first priority, the target air interface resource block is the first air interface resource block.

As an embodiment, the above method has the following advantages: the PUCCH required for carrying the first bit block and the third bit block collides with another uplink physical layer channel (e.g. a PUSCH); when the priority corresponding to the other uplink physical layer channel is high, the transmission performance of the other uplink physical layer channel in the transmitted data or control information is not influenced.

As an embodiment, the above method has the following advantages: the PUCCH required for carrying the first bit block and the third bit block collides with another uplink physical layer channel (e.g. a PUSCH); when the priority corresponding to the other uplink physical layer channel is low, the third bit block is transmitted after being multiplexed, thereby improving the system performance.

n number ranges respectively correspond to N empty resource block sets; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is equal to one of the first number range; the first air interface resource block set is an air interface resource block set corresponding to the first quantity range in the N air interface resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

when the target air interface resource block is the first air interface resource block, the first node discards and sends a signal carrying the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a portion of the second air interface resource block overlapping the first air interface resource block in a time domain.

As an embodiment, the essence of the method is that: when the PUCCH required for carrying the first and third bit blocks collides with another uplink physical layer channel (e.g. one PUSCH) and the priority corresponding to the other uplink physical layer channel is low, only part of the signals in the other uplink physical layer channel are discarded from being transmitted.

As an embodiment, the above method has the following advantages: advantageously, the operation of canceling the transmission (cancel) is performed.

the first number is used to determine the fourth air interface resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is associated with the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

As an embodiment, the essence of the method is that: when the PUCCH required to carry all the high-priority UCI and all the low-priority UCI collides with another uplink physical layer channel (e.g., one PUSCH): the low-priority UCI is multiplexed to one PUCCH orthogonal to the other uplink physical layer channel in time domain after being first processed (if the priority corresponding to the other uplink physical layer channel is high priority).

As an embodiment, the input of the first process comprises a larger number of bits than the output of the first process.

As one embodiment, the first process includes one or more of logical and, logical or, exclusive or, bit deletion, precoding, addition of repeated bits, or zero padding operations.

As an embodiment, the above method has the following advantages: the number of UCI information bits reported is optimized without affecting the high priority information transmission.

The application discloses a method used in a second node of wireless communication, which is characterized by comprising the following steps:

transmitting a first signaling and a second signaling;

receiving a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

when the target air interface resource block is the first air interface resource block, the second node does not perform signal reception for the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a portion of the second air interface resource block overlapping the first air interface resource block in a time domain.

The present application discloses a first node device used for wireless communication, which is characterized by comprising:

a first receiver that receives a first signaling and a second signaling;

a first transmitter for transmitting a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

The present application discloses a second node apparatus used for wireless communication, characterized by comprising:

a second transmitter that transmits the first signaling and the second signaling;

a second receiver for receiving a first signal in a target air interface resource block, wherein the first signal carries a first bit block;

As an embodiment, the method of the present application has the following advantages:

guaranteed transmission performance (e.g., reliability) or latency (delay) requirements, etc.) of high priority data or control information;

-improving the spectral efficiency of the communication system;

-compromise between transmission performance of high priority information and reporting performance of low priority UCI;

-facilitating the execution of the cancel send operation;

the number of UCI information bits reported is optimized without affecting the high priority information transmission.

Drawings

Other features, objects and advantages of the present application will become more apparent upon reading of the detailed description of non-limiting embodiments, made with reference to the following drawings in which:

FIG. 1 illustrates a process flow diagram of a first node according to one embodiment of the application;

FIG. 2 shows a schematic diagram of a network architecture according to one embodiment of the application;

fig. 3 shows a schematic diagram of a radio protocol architecture of a user plane and a control plane according to an embodiment of the application;

FIG. 4 shows a schematic diagram of a first communication device and a second communication device according to one embodiment of the application;

FIG. 5 shows a signal transmission flow diagram according to one embodiment of the application;

FIG. 6 shows a schematic diagram of a relationship between a fifth air interface resource block, a first bit block, a third air interface resource block, and a third bit block, according to one embodiment of the application;

FIG. 7 shows a schematic diagram of a relationship between N number ranges, N sets of air interface resource blocks, a first number of bits comprised by a first bit block and a third number of bits comprised by a third bit block, the first number range, the first set of air interface resource blocks and the first air interface resource block, according to one embodiment of the application;

fig. 8 is a schematic diagram showing a flow in which the priority of the second bit block is used to determine a target air interface resource block from the first air interface resource block and the fourth air interface resource block according to an embodiment of the present application;

FIG. 9 is a diagram illustrating a process for determining whether to discard a signal carrying a second block of bits in a second air interface resource sub-block according to an embodiment of the application;

fig. 10 is a schematic diagram of a process of determining whether to transmit a second signal in a second air interface resource block according to an embodiment of the present application;

FIG. 11 shows a schematic diagram of a relationship between a number of bits comprised by a first bit block, a number of bits comprised by a fourth bit block, the first number and the number of bits comprised by a third bit block, according to an embodiment of the application;

Fig. 12 shows a block diagram of a processing arrangement in a first node device according to an embodiment of the application;

fig. 13 shows a block diagram of the processing means in the second node device according to an embodiment of the application.

Detailed Description

The technical scheme of the present application will be further described in detail with reference to the accompanying drawings, and it should be noted that, without conflict, the embodiments of the present application and features in the embodiments may be arbitrarily combined with each other.

Example 1

Embodiment 1 illustrates a process flow diagram of a first node according to one embodiment of the application, as shown in fig. 1.

In embodiment 1, the first node in the present application receives a second signaling in step 101; receiving first signaling in step 102; a first signal is transmitted in a target air interface resource block in step 103.

In embodiment 1, the first signal carries a first block of bits; the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; the second air interface resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, which overlaps with the second air interface resource block in the time domain; a first number is used to determine a fourth air interface resource block, the first number being not less than a number of bits comprised by the first bit block and less than a sum of the number of bits comprised by the first bit block and a number of bits comprised by the third bit block, the fourth air interface resource block and the second air interface resource block being mutually orthogonal in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As one embodiment, the first signal comprises a wireless signal.

As an embodiment, the first signal comprises a radio frequency signal.

As an embodiment, the first signal comprises a baseband signal.

As an embodiment, the first node receives the second signaling first and then receives the first signaling.

As an embodiment, the first node receives the first signaling first and then receives the second signaling.

As an embodiment, the first node receives the first signaling and the second signaling simultaneously.

As an embodiment, the first signaling is dynamically configured.

As an embodiment, the first signaling comprises layer 1 (L1) signaling.

As an embodiment, the first signaling comprises layer 1 (L1) control signaling.

As an embodiment, the first signaling includes physical layer (physical layer) signaling.

For one embodiment, the first signaling includes one or more fields (fields) in a physical layer signaling.

As an embodiment, the first signaling comprises higher layer (HigherLayer) signaling.

As an embodiment, the first signaling comprises one or more domains in a higher layer signaling.

As an embodiment, the first signaling comprises RRC (Radio Resource Control ) signaling.

As an embodiment, the first signaling comprises MAC CE (MediumAccess Control layer Control Element ) signaling.

As an embodiment, the first signaling includes one or more domains in an RRC signaling.

As an embodiment, the first signaling includes one or more domains in a MAC CE signaling.

As an embodiment, the first signaling comprises DCI (downlink control information ).

As an embodiment, the first signaling includes one or more fields in one DCI.

As an embodiment, the first signaling includes SCI (side link control information ).

As an embodiment, the first signaling comprises one or more fields in one SCI.

As an embodiment, the first signaling includes one or more fields in one IE (InformationElement).

As an embodiment, the first signaling is a downlink scheduling signaling (DownLinkGrant Signalling).

As an embodiment, the first signaling is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used to carry physical layer signaling).

As an embodiment, the downlink physical layer control channel in the present application is PDCCH (Physical Downlink Control CHannel ).

As an embodiment, the downlink physical layer control channel in the present application is a sppdcch (short PDCCH).

As an embodiment, the downlink physical layer control channel in the present application is NB-PDCCH (Narrow band PDCCH).

As an embodiment, the first signaling is DCI format 1_0, and the specific definition of the DCI format 1_0 is described in section 7.3.1.2 of 3gpp ts 38.212.

As an embodiment, the first signaling is DCI format 1_1, and the specific definition of the DCI format 1_1 is described in section 7.3.1.2 of 3gpp ts 38.212.

As an embodiment, the first signaling is DCI format 1_2, and the specific definition of the DCI format 1_2 is described in 3gpp ts38.212, section 7.3.1.2.

As an embodiment, the first signaling is signaling used to schedule a downlink physical layer data channel.

As an embodiment, the downlink physical layer data channel in the present application is PDSCH (Physical Downlink Shared Channel ).

As an embodiment, the downlink physical layer data channel in the present application is a sPDSCH (short PDSCH).

As an embodiment, the downlink physical layer data channel in the present application is NB-PDSCH (Narrow Band PDSCH ).

As an embodiment, the second signaling is dynamically configured.

As an embodiment, the second signaling comprises layer 1 signaling.

As an embodiment, the second signaling comprises layer 1 control signaling.

As an embodiment, the second signaling comprises physical layer signaling.

As an embodiment, the second signaling comprises one or more domains in a physical layer signaling.

As an embodiment, the second signaling comprises higher layer signaling.

As an embodiment, the second signaling comprises one or more domains in a higher layer signaling.

As an embodiment, the second signaling comprises RRC signaling.

As an embodiment, the second signaling includes MAC CE signaling.

As an embodiment, the second signaling includes one or more domains in an RRC signaling.

As an embodiment, the second signaling includes one or more domains in a MAC CE signaling.

As an embodiment, the second signaling comprises DCI.

As an embodiment, the second signaling includes one or more fields in one DCI.

As an embodiment, the second signaling comprises SCI.

As an embodiment, the second signaling comprises one or more fields in one SCI.

As an embodiment, the second signaling includes one or more fields in an IE.

As an embodiment, the second signaling is a downlink scheduling signaling.

As an embodiment, the second signaling is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used to carry physical layer signaling).

As an embodiment, the second signaling is DCI format 1_0, and the specific definition of the DCI format 1_0 is described in section 7.3.1.2 of 3gpp ts 38.212.

As an embodiment, the second signaling is DCI format 1_1, and the specific definition of the DCI format 1_1 is described in 3gpp ts38.212, section 7.3.1.2.

As an embodiment, the second signaling is DCI format 1_2, and the specific definition of the DCI format 1_2 is described in 3gpp ts38.212, section 7.3.1.2.

As an embodiment, the second signaling is signaling used to schedule a downlink physical layer data channel.

As an embodiment, the sentence the first signal carrying a first bit block comprises: the first signal includes output of all or part of bits in the first bit block after CRC addition (CRC Insertion), segmentation (Segmentation), coding block level CRC addition (CRC Insertion), channel Coding (Channel Coding), rate Matching (Rate Matching), concatenation (Concatenation), scrambling (Scrambling), modulation (Modulation), layer Mapping (Layer Mapping), precoding (Precoding), mapping to resource elements (Mappingto Resource Element), multicarrier symbol Generation (Generation), and Modulation up-conversion (Modulation andUpconversion).

As an embodiment, the first signal carries the third bit block when the target air interface resource block is the former of the first air interface resource block and the fourth air interface resource block.

As one embodiment, when the first signal carries the third bit block: the first signal includes all or part of bits in the third bit block sequentially subjected to CRC addition, segmentation, coding block level CRC addition, channel coding, rate matching, concatenation, scrambling, modulation, layer mapping, precoding, mapping to resource elements, multicarrier symbol generation, and output after part or all of modulation up-conversion.

As one embodiment, when the first signal carries the third bit block: the first signal includes outputs after all or part of bits in the first bit block and the third bit block are sequentially subjected to CRC addition, segmentation, coding block level CRC addition, channel coding, rate matching, concatenation, scrambling, modulation, layer mapping, precoding, mapping to resource elements, multicarrier symbol generation, modulation up-conversion.

As an embodiment, the first air interface Resource block includes a positive integer number of REs (Resource elements) in a time-frequency domain.

As an embodiment, one of the REs occupies one multicarrier symbol in the time domain and one subcarrier in the frequency domain.

As an embodiment, the multi-carrier Symbol in the present application is an OFDM (Orthogonal Frequency Division Multiplexing ) Symbol (Symbol).

As one embodiment, the multi-Carrier symbol in the present application is an SC-FDMA (Single Carrier-FrequencyDivision Multiple Access, single Carrier frequency division multiple access) symbol.

As an embodiment, the multi-carrier symbol in the present application is a DFT-S-OFDM (Discrete Fourier Transform Spread OFDM, discrete fourier transform orthogonal frequency division multiplexing) symbol.

As an embodiment, the first air interface resource block includes a positive integer number of subcarriers (subcarriers) in the frequency domain.

As an embodiment, the first air interface resource block comprises a positive integer number of PRBs (PhysicalResource Block, physical resource blocks) in the frequency domain.

As an embodiment, the first air interface resource block includes a positive integer number of RBs (resource blocks) in the frequency domain.

As an embodiment, the first air interface resource block includes a positive integer number of multicarrier symbols in the time domain.

As an embodiment, the first air interface resource block includes a positive integer number of slots (slots) in the time domain.

As an embodiment, the first air interface resource block includes a positive integer number of sub-slots (sub-slots) in the time domain.

As one embodiment, the first air interface resource block comprises a positive integer number of milliseconds (ms) in the time domain.

As an embodiment, the first air interface resource block includes a positive integer number of consecutive multicarrier symbols in the time domain.

As an embodiment, the first air interface resource block includes a positive integer number of discontinuous slots in the time domain.

As an embodiment, the first air interface resource block includes a positive integer number of consecutive slots in the time domain.

As an embodiment, the first air interface resource block includes a positive integer number of subframes (sub-frames) in the time domain.

As an embodiment, the first air interface resource block is configured by physical layer signaling.

As an embodiment, the first air interface resource block is configured by higher layer signaling.

As an embodiment, the first air interface resource is configured by RRC (Radio Resource Control ) signaling.

As an embodiment, the first air interface resource block is configured by MAC CE (MediumAccess Control layer Control Element ) signaling.

As an embodiment, the first air interface resource block is reserved for a physical layer channel.

As an embodiment, the first air interface resource block includes air interface resources reserved for one physical layer channel.

As an embodiment, the first air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the first air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the first air interface resource block includes a time-frequency resource reserved for one physical layer channel on a time-frequency domain.

As an embodiment, the physical layer channel in the present application includes PUCCH (PhysicalUplink Control CHannel ).

As an embodiment, the physical layer channel in the present application includes PUSCH (Physical Uplink Shared CHannel ).

As an embodiment, the physical layer channel in the present application includes an uplink physical layer channel.

As an embodiment, the first air interface resource block includes one PUCCH resource (PUCCH resource).

As an embodiment, the first air interface resource block comprises one PUCCH resource in one PUCCH resource set (PUCCH resource set).

As an embodiment, the first signaling indicates the first air interface resource block.

As an embodiment, the first signaling explicitly indicates the first air interface resource block.

As an embodiment, the first signaling implicitly indicates the first air interface resource block.

As an embodiment, the second signaling indicates the first air interface resource block.

As an embodiment, the second signaling explicitly indicates the first air interface resource block.

As an embodiment, the second signaling implicitly indicates the first air interface resource block.

As an embodiment, the implicit indication in the present application comprises: by means of a signaling format (format).

As an embodiment, the implicit indication in the present application comprises: implicit indication is by RNTI (radio network temporary identity, radio Network Tempory Identity).

As an embodiment, the second air interface resource block includes a positive integer number of REs in the time-frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of subcarriers in the frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of PRBs in the frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of RBs in the frequency domain.

As an embodiment, the second air interface resource block includes a positive integer number of multicarrier symbols in the time domain.

As an embodiment, the second air interface resource block includes a positive integer number of slots in the time domain.

As an embodiment, the second air interface resource block includes a positive integer number of sub-slots in the time domain.

As an embodiment, the second air interface resource block includes a positive integer number of milliseconds in the time domain.

As an embodiment, the second air interface resource block includes a positive integer number of consecutive multicarrier symbols in the time domain.

As an embodiment, the second air interface resource block includes a positive integer number of discontinuous slots in the time domain.

As an embodiment, the second air interface resource block includes a positive integer number of consecutive slots in the time domain.

As an embodiment, the second air interface resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the second air interface resource block is configured by physical layer signaling.

As an embodiment, the second air interface resource block is configured by higher layer signaling.

As an embodiment, the second air interface resource is configured by RRC signaling.

As an embodiment, the second air interface resource block is configured by MAC CE signaling.

As an embodiment, the second air interface resource block is reserved for a physical layer channel.

As an embodiment, the second air interface resource block includes air interface resources reserved for one physical layer channel.

As an embodiment, the second air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the second air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the second air interface resource block includes, in a time-frequency domain, a time-frequency resource reserved for one physical layer channel.

As an embodiment, the second air interface resource block includes one PUCCH resource.

As an embodiment, the second air interface resource block includes one PUCCH resource in one PUCCH resource set.

As an embodiment, the second air interface resource block includes an air interface resource occupied by a PUSCH.

As an embodiment, the second air interface resource block is reserved for a PUSCH transmission (aPUSCH transmission).

As an embodiment, the second air interface resource block is reserved for PUSCH transmission carrying the second bit block once.

As an embodiment, the fourth air interface resource block includes a positive integer number of REs in the time-frequency domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of subcarriers in the frequency domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of PRBs in the frequency domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of RBs in the frequency domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of multicarrier symbols in the time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of slots in the time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of sub-slots in the time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of milliseconds in the time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of consecutive multicarrier symbols in the time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of discontinuous slots in the time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of consecutive slots in the time domain.

As an embodiment, the fourth air interface resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the fourth air interface resource block is configured by physical layer signaling.

As an embodiment, the fourth air interface resource block is configured by higher layer signaling.

As an embodiment, the fourth air interface resource is configured by RRC signaling.

As an embodiment, the fourth air interface resource block is configured by MAC CE signaling.

As an embodiment, the fourth air interface resource block is reserved for a physical layer channel.

As an embodiment, the fourth air interface resource block includes air interface resources reserved for one physical layer channel.

As an embodiment, the fourth air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the fourth air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the fourth air interface resource block includes, in a time-frequency domain, a time-frequency resource reserved for one physical layer channel.

As an embodiment, the fourth air interface resource block includes one PUCCH resource.

As an embodiment, the fourth air interface resource block includes one PUCCH resource in one PUCCH resource set.

As an embodiment, the first signaling indicates the fourth air interface resource block.

As an embodiment, the first signaling explicitly indicates the fourth air interface resource block.

As an embodiment, the first signaling implicitly indicates the fourth air interface resource block.

As an embodiment, the second signaling indicates the fourth air interface resource block.

As an embodiment, the second signaling explicitly indicates the fourth air interface resource block.

As an embodiment, the second signaling implicitly indicates the fourth air interface resource block.

As an embodiment, the first bit block comprises a first type HARQ-ACK.

As an embodiment, the first bit block comprises a positive integer number of bits.

As an embodiment, the first bit block includes a positive integer number of ACKs or NACKs.

As an embodiment, the first bit block comprises a positive integer number of the first type HARQ-ACK information bits (informationbit (s)).

As an embodiment, the first bit block comprises a HARQ-ACK codebook (codebook).

As an embodiment, all HARQ-ACKs included in the first bit block are the first type HARQ-ACKs.

As an embodiment, the first type of HARQ-ACK includes HARQ-ACKs corresponding to one QoS of a plurality of QoS (Quality ofService ) types.

As an embodiment, the first type of HARQ-ACK includes HARQ-ACKs corresponding to URLLC traffic types.

As an embodiment, the first type of HARQ-ACK includes HARQ-ACKs corresponding to an eMBB traffic type.

As an embodiment, the first type of HARQ-ACK comprises a high priority HARQ-ACK.

As an embodiment, the first type of HARQ-ACK comprises a low priority HARQ-ACK.

As an embodiment, the first type of HARQ-ACK includes HARQ-ACKs corresponding to Priority Index (Priority Index) 1.

As an embodiment, the first type of HARQ-ACK includes HARQ-ACKs corresponding to priority index 0.

As an embodiment, the first bit block includes UCI.

As an embodiment, the first bit block includes UCI corresponding to priority index 1.

As an embodiment, the first bit block includes UCI corresponding to a priority index of 0.

As an embodiment, the first bit block comprises a high priority UCI.

As an embodiment, the first bit block comprises a low priority UCI.

As an embodiment, the first bit block includes UCI of a first type.

As an embodiment, the first bit block includes an SR (scheduling request).

As an embodiment, the first bit block includes an SR corresponding to a priority index of 1.

As an embodiment, the first bit block includes an SR corresponding to a priority index of 0.

As an embodiment, the first bit block comprises a high priority SR.

As an embodiment, the first bit block comprises a low priority SR.

As an embodiment, the first bit block includes CSI (Channel State Information ) reporting (report).

As an embodiment, the first type of HARQ-ACK includes a sidelink HARQ-ACK (SL HARQ-ACK).

As an embodiment, the first bit block comprises an indication of whether the first signaling was received correctly or whether a bit block scheduled by the first signaling was received correctly.

As an embodiment, the first type of HARQ-ACK included in the first bit block includes HARQ-ACKs indicating whether the first signaling is correctly received or the first type of HARQ-ACK included in the first bit block includes HARQ-ACKs indicating whether a bit block scheduled by the first signaling is correctly received.

As an embodiment, the first signaling includes scheduling information of the one bit block scheduled by the first signaling.

As an embodiment, the scheduling information in the present application includes at least one of occupied time domain resources, occupied frequency domain resources, MCS (Modulation and Coding Scheme, modulation coding scheme), configuration information of DMRS (DeModulation Reference Signals, demodulation reference signal), HARQ (HybridAutomatic RepeatreQuest ) process number, RV (Redundancy Version, redundancy version), NDI (New Data Indicator, new data indication), period (periodicity), transmit antenna port, and corresponding TCI (Transmission Configuration Indicator, transmission configuration indication) state (state).

As an embodiment, the one bit block scheduled by the first signaling comprises a positive integer number of bits.

As an embodiment, the one bit Block scheduled by the first signaling includes one TB (Transport Block).

As an embodiment, the one bit Block scheduled by the first signaling includes one CB (Code Block).

As an embodiment, the one bit Block scheduled by the first signaling includes one CBG (Code Block Group).

As an embodiment, the sixth bit block comprises an indication of whether the first signaling was received correctly or whether a bit block scheduled by the first signaling was received correctly; the sixth bit block is used to generate the first bit block.

As an embodiment, a sixth bit block is used to generate the first bit block.

As an embodiment, the sixth bit block includes a first type HARQ-ACK.

As an embodiment, the sixth bit block comprises a positive integer number of bits.

As an embodiment, the sixth bit block includes a positive integer number of ACKs or NACKs.

As an embodiment, the sixth bit block includes a positive integer number of the first type HARQ-ACK information bits.

As an embodiment, the sixth bit block comprises a HARQ-ACK codebook.

As an embodiment, all HARQ-ACKs included in the sixth bit block are the first type HARQ-ACKs.

As an embodiment, the sixth bit block includes UCI.

As an embodiment, the sixth bit block includes UCI corresponding to priority index 1.

As an embodiment, the sixth bit block includes UCI corresponding to priority index 0.

As an embodiment, the sixth bit block includes a high priority UCI.

As an embodiment, the sixth bit block includes a low priority UCI.

As an embodiment, the sixth bit block includes UCI of a first type.

As an embodiment, the sixth bit block includes an SR.

As an embodiment, the sixth bit block includes SRs corresponding to priority index 1.

As an embodiment, the sixth bit block includes SRs corresponding to priority index 0.

As an embodiment, the sixth bit block comprises a high priority SR.

As an embodiment, the sixth bit block comprises a low priority SR.

As an embodiment, the sixth bit block includes CSI reporting.

As an embodiment, the meaning of the sixth bit block of the sentence used to generate the first bit block includes: the first bit block is the sixth bit block.

As an embodiment, the meaning of the sixth bit block of the sentence used to generate the first bit block includes: the first bit block includes all or part of the bits in the sixth bit block.

As an embodiment, the meaning of the sixth bit block of the sentence used to generate the first bit block includes: the first bit block includes an output of some or all bits in the sixth bit block after one or more of a logical AND, a logical OR, an exclusive OR, a delete bit, or a zero padding operation.

As an embodiment, the meaning of the sixth bit block of the sentence used to generate the first bit block includes: the first bit block includes an output of the sixth bit block after one or more of logical AND, logical OR, XOR, bit deletion, precoding, repeated bit addition or zero padding operations.

As an embodiment, the third bit block comprises a second type HARQ-ACK.

As an embodiment, the third bit block comprises a positive integer number of bits.

As an embodiment, the third bit block includes a positive integer number of ACKs or NACKs.

As an embodiment, the third bit block comprises a positive integer number of the second type HARQ-ACK information bits.

As an embodiment, the third bit block comprises a HARQ-ACK codebook.

As an embodiment, all HARQ-ACKs included in the third bit block are HARQ-ACKs of the second type.

As an embodiment, the second type of HARQ-ACK comprises a HARQ-ACK corresponding to one QoS of a plurality of QoS types.

As an embodiment, the second type of HARQ-ACK comprises HARQ-ACKs corresponding to URLLC traffic types.

As an embodiment, the second type of HARQ-ACK includes HARQ-ACKs corresponding to an eMBB traffic type.

As an embodiment, the second type of HARQ-ACK comprises a high priority HARQ-ACK.

As an embodiment, the second type of HARQ-ACK comprises a low priority HARQ-ACK.

As an embodiment, the second type of HARQ-ACK includes HARQ-ACKs corresponding to Priority Index (Priority Index) 1.

As an embodiment, the second type of HARQ-ACK includes HARQ-ACKs corresponding to priority index 0.

As an embodiment, the third bit block includes UCI.

As an embodiment, the third bit block includes UCI corresponding to priority index 1.

As an embodiment, the third bit block includes UCI corresponding to priority index 0.

As an embodiment, the third bit block includes a high priority UCI.

As an embodiment, the third bit block includes a low priority UCI.

As an embodiment, the third bit block includes UCI of the second type.

As an embodiment, the first type UCI and the second type UCI are UCI of different categories, respectively.

As one embodiment, the third bit block comprises an SR.

As one embodiment, the third bit block includes SRs corresponding to priority index 1.

As one embodiment, the third bit block includes SRs corresponding to priority index 0.

As an embodiment, the third bit block comprises a high priority SR.

As an embodiment, the third bit block comprises a low priority SR.

As an embodiment, the third bit block includes CSI reporting.

As one embodiment, the third bit block corresponds to priority index 0 and the first bit block corresponds to priority index 1.

As one embodiment, the third bit block corresponds to priority index 1 and the first bit block corresponds to priority index 0.

As an embodiment, the second type of HARQ-ACK includes a sidelink HARQ-ACK (SL HARQ-ACK).

As an embodiment, the second type HARQ-ACK and the first type HARQ-ACK are HARQ-ACKs for different links, respectively.

As an embodiment, the different links include an uplink and a sidelink.

As an embodiment, the second type HARQ-ACK and the first type HARQ-ACK are respectively different types of HARQ-ACKs.

As an embodiment, the second type HARQ-ACK and the first type HARQ-ACK are HARQ-ACKs with different priorities, respectively.

As an embodiment, the second type HARQ-ACK and the first type HARQ-ACK are HARQ-ACKs corresponding to different priority indexes, respectively.

As an embodiment, the second type HARQ-ACK includes HARQ-ACKs corresponding to priority index 1, and the first type HARQ-ACK includes HARQ-ACKs corresponding to priority index 0.

As an embodiment, the second type HARQ-ACK includes HARQ-ACKs corresponding to priority index 0, and the first type HARQ-ACK includes HARQ-ACKs corresponding to priority index 1.

As an embodiment, the third bit block includes a different kind of HARQ-ACK than the first bit block.

As an embodiment, the third bit block comprises an indication of whether the second signaling was received correctly or whether a bit block scheduled by the second signaling was received correctly.

As an embodiment, the second type HARQ-ACK included in the third bit block includes a HARQ-ACK indicating whether the second signaling is correctly received or the second type HARQ-ACK included in the third bit block includes a HARQ-ACK indicating whether a bit block scheduled by the second signaling is correctly received.

As an embodiment, the second signaling includes scheduling information of the one bit block scheduled by the second signaling.

As an embodiment, the one bit block scheduled by the second signaling comprises a positive integer number of bits.

As an embodiment, the one bit block scheduled by the second signaling comprises one TB.

As an embodiment, the one bit block scheduled by the second signaling comprises one CB.

As an embodiment, the one bit block scheduled by the second signaling comprises one CBG.

As an embodiment, the seventh bit block comprises an indication of whether the second signaling was received correctly or whether a bit block scheduled by the second signaling was received correctly; the seventh bit block is used to generate the third bit block.

As an embodiment, a seventh bit block is used to generate said third bit block.

As an embodiment, the seventh bit block comprises a second type HARQ-ACK.

As an embodiment, the seventh bit block comprises a positive integer number of bits.

As an embodiment, the seventh bit block includes a positive integer number of ACKs or NACKs.

As an embodiment, the seventh bit block comprises a positive integer number of the second type HARQ-ACK information bits.

As an embodiment, the seventh bit block comprises a HARQ-ACK codebook.

As an embodiment, all HARQ-ACKs included in the seventh bit block are HARQ-ACKs of the second type.

As one embodiment, the seventh bit block includes UCI.

As an embodiment, the seventh bit block includes UCI corresponding to priority index 1.

As an embodiment, the seventh bit block includes UCI corresponding to priority index 0.

As an embodiment, the seventh bit block includes a high priority UCI.

As one embodiment, the seventh bit block includes a low priority UCI.

As an embodiment, the seventh bit block includes UCI of the second type.

As an embodiment, the UCI of the first type and the UCI of the second type are UCI of different priorities, respectively.

As an embodiment, the first type UCI and the second type UCI are UCI corresponding to different priority indexes, respectively.

As an embodiment, the first UCI corresponds to priority index 1 and the second UCI corresponds to priority index 0.

As an embodiment, the first UCI corresponds to priority index 0 and the second UCI corresponds to priority index 1.

As an embodiment, the first type UCI and the second type UCI are UCI for different links, respectively.

As one embodiment, the seventh bit block includes an SR.

As one embodiment, the seventh bit block includes SRs corresponding to priority index 1.

As one embodiment, the seventh bit block includes SRs corresponding to priority index 0.

As an embodiment, the seventh bit block comprises a high priority SR.

As an embodiment, the seventh bit block comprises a low priority SR.

As an embodiment, the seventh bit block includes CSI reporting.

As an embodiment, the first bit block includes the same category of UCI as the sixth bit block.

As an embodiment, the first bit block includes the same category of HARQ-ACKs as the sixth bit block.

As an embodiment, the third bit block includes UCI having the same category as UCI included in the seventh bit block.

As an embodiment, the category of HARQ-ACKs included in the third bit block is the same as the category of HARQ-ACKs included in the seventh bit block.

As an embodiment, the third bit block includes UCI of a different category than UCI included in the first bit block.

As an embodiment, the third bit block includes a different category of HARQ-ACKs than the first bit block.

As an embodiment, the meaning of the seventh bit block of the sentence used to generate the third bit block includes: the third bit block is the seventh bit block.

As an embodiment, the meaning of the seventh bit block of the sentence used to generate the third bit block includes: the third bit block includes all or part of the bits in the seventh bit block.

As an embodiment, the meaning of the seventh bit block of the sentence used to generate the third bit block includes: the third bit block includes an output of the seventh bit block after one or more of a logical AND, a logical OR, an exclusive OR, a delete bit, or a zero-padding operation.

As an embodiment, the meaning of the seventh bit block of the sentence used to generate the third bit block includes: the third bit block includes an output of the seventh bit block after one or more of logical AND, logical OR, exclusive OR, bit deletion, precoding, repeated bit addition or zero padding operations.

As an embodiment, when the target air interface resource block is the latter of the first air interface resource block and the fourth air interface resource block, the first signal carries one bit block generated by the seventh bit block.

As an embodiment, when the target air interface resource block is the latter of the first air interface resource block and the fourth air interface resource block, the first signal carries only the first bit block of the first bit block and the third bit block.

As an embodiment, when the target air interface resource block is the latter of the first air interface resource block and the fourth air interface resource block, the first signal does not carry the second type HARQ-ACK.

As an embodiment, the seventh bit block comprises a number of bits greater than a seventh threshold.

As an embodiment, the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block only if the seventh bit block comprises a number of bits greater than a seventh threshold.

As a sub-embodiment of the above embodiment, when the number of bits included in the seventh bit block is not greater than the seventh threshold, the target air interface resource block is the fourth air interface resource block.

As an embodiment, the priority of the second bit block is used to determine the target air-interface resource block from the first air-interface resource block and the fourth air-interface resource block only if the seventh bit block includes a number of bits not less than a seventh threshold.

As a sub-embodiment of the above embodiment, when the number of bits included in the seventh bit block is smaller than the seventh threshold, the target air interface resource block is the fourth air interface resource block.

As an embodiment, the seventh threshold is greater than zero.

As an embodiment, the seventh threshold is configured for higher layer signaling.

As an embodiment, the seventh threshold is configured for RRC signaling.

As an embodiment, the seventh threshold is MACCE signaling configured.

As an embodiment, the seventh threshold is predefined (default).

As an embodiment, the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block only if the seventh bit block comprises a number of bits less than an eighth threshold.

As a sub-embodiment of the above embodiment, when the number of bits included in the seventh bit block is not less than the eighth threshold, the target air interface resource block is the first air interface resource block.

As an embodiment, the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block only if the seventh bit block includes a number of bits not greater than an eighth threshold.

As a sub-embodiment of the above embodiment, when the number of bits included in the seventh bit block is greater than the eighth threshold, the target air interface resource block is the first air interface resource block.

As an embodiment, the eighth threshold is greater than zero.

As an embodiment, the eighth threshold is configured for higher layer signaling.

As an embodiment, the eighth threshold is configured for RRC signaling.

As an embodiment, the eighth threshold is MACCE signaling configured.

As an embodiment, the eighth threshold is predefined.

As one embodiment, the phrase overlapping in the time domain in the present application includes: there is overlap in the time domain and overlap in the frequency domain.

As one embodiment, the phrase overlapping in the time domain in the present application includes: there is overlap in the time domain, overlap in the frequency domain, or orthogonality in the frequency domain.

As an embodiment, the first number is equal to the number of bits comprised by the first bit block.

As an embodiment, the first number is greater than the number of bits comprised by the first bit block, and the first number is less than the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block.

As one embodiment, the phrase orthogonalization in the present application includes: there is no overlap.

As an embodiment, the first signaling indicates a priority index of 0 and the second signaling indicates a priority index of 1.

As an embodiment, the first signaling indicates a priority index of 1 and the second signaling indicates a priority index of 0.

As an embodiment, the first signaling comprises a field indicating priority.

As an embodiment, the second signaling comprises a field indicating priority.

As an embodiment, the one domain indicating priority is a Priority indicator domain.

As an embodiment, the one domain indicating priority is used to indicate a priority index.

As an embodiment, the one domain indicating the priority comprises 1 bit.

As an embodiment, the one domain indicating the priority comprises 2 bits.

As an embodiment, the one domain indicating the priority comprises 3 bits.

As an embodiment, the one domain indicating the priority comprises a plurality of bits.

As an embodiment, a signaling format of the first signaling is used to indicate a priority index.

As an embodiment, the signaling format of the second signaling is used to indicate a priority index.

As an embodiment, the priority of the first bit block is different from the priority of the third bit block.

As an embodiment, the first bit block has a higher priority than the third bit block.

As one embodiment, when the target air interface resource block is the first air interface resource block, the number of bits related to the first bit block or third bit block transmitted in the first air interface resource block is an eighth number; when the target air interface resource block is the fourth air interface resource block, the number of bits related to the first bit block or the third bit block transmitted in the fourth air interface resource block is a ninth number; the eighth number is greater than the ninth number.

As a sub-embodiment of the above embodiment, the eighth number is equal to a sum of the number of bits included in the first bit block and the number of bits included in the third bit block.

As a sub-embodiment of the above embodiment, the ninth number is equal to the first number.

As an embodiment, the determining the meaning of the first number of sentences to be used for the fourth air interface resource block includes: the first number is used to determine the fourth air interface resource block.

As an embodiment, the determining the meaning of the first number of sentences to be used for the fourth air interface resource block includes: the first number is used to determine the fourth air-interface resource block only if the target air-interface resource block is the latter of the first air-interface resource block and the fourth air-interface resource block.

As an embodiment, the determining the meaning of the first number of sentences to be used for the fourth air interface resource block includes: the first number is used to determine the fourth air interface resource block only if the priority of the second bit block is the first priority.

As an embodiment, the determining the meaning of the first number of sentences to be used for the fourth air interface resource block includes: the first number is used to determine the fourth air interface resource block when the target air interface resource block is the latter of the first air interface resource block and the fourth air interface resource block.

As an embodiment, the determining the meaning of the first number of sentences to be used for the fourth air interface resource block includes: the first number is used to determine the fourth air interface resource block when the priority of the second bit block is the first priority.

As one embodiment, the phrase in the present application is used to include: is used by the first node in the present application.

As one embodiment, the phrase in the present application is used to include: is used by the second node in the present application.

As one embodiment, the phrase in the present application is used to include: is used by the transmitting end of the first signal.

As one embodiment, the phrase in the present application is used to include: is used by the receiving end of the first signal.

As an embodiment, the determining the meaning of the first air interface resource block by using the number of bits included in the first bit block and the number of bits included in the third bit block of the sentence includes: the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is used to determine the first air interface resource block.

As an embodiment, one signaling different from the first signaling and the second signaling is used to determine the second bit block.

As an embodiment, one signaling, different from the first signaling and the second signaling, indicates an MCS to be used for the second bit block.

As an embodiment, one signaling different from the first signaling and the second signaling is used to determine the second air interface resource block.

As an embodiment, one signaling, different from the first signaling and the second signaling, indicates the second air interface resource block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates a time domain resource occupied by the second air interface resource block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates frequency domain resources occupied by the second air interface resource block.

As an embodiment, one signaling different from the first signaling and the second signaling indicates a time-frequency resource occupied by the second air interface resource block.

As an embodiment, the one signaling different from the first signaling and the second signaling is dynamically configured.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises layer 1 signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises layer 1 control signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises physical layer signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more domains in one physical layer signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises higher layer signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more domains in a higher layer signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises RRC signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises MAC CE signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more domains in one RRC signaling.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more domains in one MAC CE signaling.

As one embodiment, the one signaling different from the first signaling and the second signaling comprises DCI.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more fields in one DCI.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises SCI.

As an embodiment, said one signaling different from said first signaling and said second signaling comprises one or more domains in one SCI.

As an embodiment, the one signaling different from the first signaling and the second signaling comprises one or more fields in one IE.

As an embodiment, the one signaling other than the first signaling and the second signaling is one uplink scheduling signaling (UpLink Grant Signalling).

As an embodiment, the one signaling different from the first signaling and the second signaling is one downlink scheduling signaling.

As an embodiment, the one signaling that is different from the first signaling and the second signaling is transmitted on a downlink physical layer control channel (i.e. a downlink channel that can only be used for carrying physical layer signaling).

As an embodiment, the one signaling different from the first signaling and the second signaling is DCI format 0_0, a specific definition of the DCI format 0_0 is found in section 7.3.1.1 in 3gpp ts 38.212.

As an embodiment, the one signaling different from the first signaling and the second signaling is DCI format 0_1, a specific definition of the DCI format 0_1 is found in section 7.3.1.1 in 3gpp ts 38.212.

As an embodiment, the one signaling different from the first signaling and the second signaling is DCI format 0_2, a specific definition of the DCI format 0_2 is found in section 7.3.1.1 in 3gpp ts 38.212.

As an embodiment, the one signaling different from the first signaling and the second signaling is signaling used for scheduling an uplink physical layer data channel.

Example 2

Embodiment 2 illustrates a schematic diagram of a network architecture according to the present application, as shown in fig. 2.

Fig. 2 illustrates a diagram of a network architecture 200 of a 5g nr, LTE (Long-Term Evolution) and LTE-a (Long-Term Evolution Advanced, enhanced Long-Term Evolution) system. The 5G NR or LTE network architecture 200 may be referred to as EPS (Evolved Packet System ) 200 as some other suitable terminology. EPS 200 may include one or more UEs (User Equipment) 201, ng-RAN (next generation radio access Network) 202, epc (Evolved Packet Core )/5G-CN (5G Core Network) 210, hss (Home Subscriber Server ) 220, and internet service 230. The EPS may interconnect with other access networks, but these entities/interfaces are not shown for simplicity. As shown, EPS provides packet-switched services, however, those skilled in the art will readily appreciate that the various concepts presented throughout this disclosure may be extended to networks providing circuit-switched services or other cellular networks. The NG-RAN includes NR node bs (gnbs) 203 and other gnbs 204. The gNB203 provides user and control plane protocol termination towards the UE 201. The gNB203 may be connected to other gnbs 204 via an Xn interface (e.g., backhaul). The gNB203 may also be referred to as a base station, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a Basic Service Set (BSS), an Extended Service Set (ESS), a TRP (transmit receive node), or some other suitable terminology. The gNB203 provides the UE201 with an access point to the EPC/5G-CN 210. Examples of UE201 include a cellular telephone, a smart phone, a Session Initiation Protocol (SIP) phone, a laptop, a Personal Digital Assistant (PDA), a satellite radio, a non-terrestrial base station communication, a satellite mobile communication, a global positioning system, a multimedia device, a video device, a digital audio player (e.g., MP3 player), a camera, a game console, an drone, an aircraft, a narrowband internet of things device, a machine-type communication device, a land-based vehicle, an automobile, a wearable device, or any other similar functional device. Those of skill in the art may also refer to the UE201 as a mobile station, a subscriber station, a mobile unit, a subscriber unit, a wireless unit, a remote unit, a mobile device, a wireless communication device, a remote device, a mobile subscriber station, an access terminal, a mobile terminal, a wireless terminal, a remote terminal, a handset, a user agent, a mobile client, a client, or some other suitable terminology. The gNB203 is connected to the EPC/5G-CN 210 through an S1/NG interface. EPC/5G-CN 210 includes MME (Mobility Management Entity )/AMF (Authentication Management Field, authentication management domain)/UPF (User Plane Function ) 211, other MME/AMF/UPF214, S-GW (Service Gateway) 212, and P-GW (Packet Date Network Gateway, packet data network Gateway) 213. The MME/AMF/UPF211 is a control node that handles signaling between the UE201 and the EPC/5G-CN 210. In general, the MME/AMF/UPF211 provides bearer and connection management. All user IP (Internet Protocal, internet protocol) packets are transported through the S-GW212, which S-GW212 itself is connected to P-GW213. The P-GW213 provides UE IP address assignment as well as other functions. The P-GW213 is connected to the internet service 230. Internet services 230 include operator-corresponding internet protocol services, which may include, in particular, the internet, intranets, IMS (IP Multimedia Subsystem ) and packet-switched streaming services.

As an embodiment, the UE201 corresponds to the first node in the present application.

As an embodiment, the UE241 corresponds to the second node in the present application.

As an embodiment, the gNB203 corresponds to the second node in the present application.

As an embodiment, the UE241 corresponds to the first node in the present application.

As an embodiment, the UE201 corresponds to the second node in the present application.

Example 3

Embodiment 3 shows a schematic diagram of an embodiment of a radio protocol architecture of a user plane and a control plane according to the application, as shown in fig. 3. Fig. 3 is a schematic diagram illustrating an embodiment of a radio protocol architecture for the user plane 350 and the control plane 300, fig. 3 shows the radio protocol architecture for the control plane 300 for a first communication node device (UE, RSU in gNB or V2X) and a second communication node device (gNB, RSU in UE or V2X), or between two UEs, in three layers: layer 1, layer 2 and layer 3. Layer 1 (L1 layer) is the lowest layer and implements various PHY (physical layer) signal processing functions. The L1 layer will be referred to herein as PHY301. Layer 2 (L2 layer) 305 is above PHY301 and is responsible for the link between the first communication node device and the second communication node device and the two UEs through PHY301. The L2 layer 305 includes a MAC (MediumAccess Control ) sublayer 302, an RLC (Radio Link Control, radio link layer control protocol) sublayer 303, and a PDCP (PacketData Convergence Protocol ) sublayer 304, which terminate at the second communication node device. The PDCP sublayer 304 provides multiplexing between different radio bearers and logical channels. The PDCP sublayer 304 also provides security by ciphering the data packets and handover support for the first communication node device between second communication node devices. The RLC sublayer 303 provides segmentation and reassembly of upper layer data packets, retransmission of lost data packets, and reordering of data packets to compensate for out of order reception due to HARQ. The MAC sublayer 302 provides multiplexing between logical and transport channels. The MAC sublayer 302 is also responsible for allocating the various radio resources (e.g., resource blocks) in one cell among the first communication node devices. The MAC sublayer 302 is also responsible for HARQ operations. The RRC (Radio Resource Control ) sublayer 306 in layer 3 (L3 layer) in the control plane 300 is responsible for obtaining radio resources (i.e., radio bearers) and configuring the lower layers using RRC signaling between the second communication node device and the first communication node device. The radio protocol architecture of the user plane 350 includes layer 1 (L1 layer) and layer 2 (L2 layer), the radio protocol architecture for the first communication node device and the second communication node device in the user plane 350 is substantially the same for the physical layer 351, PDCP sublayer 354 in the L2 layer 355, RLC sublayer 353 in the L2 layer 355 and MAC sublayer 352 in the L2 layer 355 as the corresponding layers and sublayers in the control plane 300, but the PDCP sublayer 354 also provides header compression for upper layer data packets to reduce radio transmission overhead. Also included in the L2 layer 355 in the user plane 350 is an SDAP (Service DataAdaptationProtocol ) sublayer 356, the SDAP sublayer 356 being responsible for mapping between QoS flows and Data Radio Bearers (DRBs) to support diversity of traffic. Although not shown, the first communication node apparatus may have several upper layers above the L2 layer 355, including a network layer (e.g., IP layer) that terminates at the P-GW on the network side and an application layer that terminates at the other end of the connection (e.g., remote UE, server, etc.).

As an embodiment, the radio protocol architecture in fig. 3 is applicable to the first node in the present application.

As an embodiment, the radio protocol architecture in fig. 3 is applicable to the second node in the present application.

As an embodiment, the first bit block in the present application is generated in the RRC sublayer 306.

As an embodiment, the first bit block in the present application is generated in the MAC sublayer 302.

As an embodiment, the first bit block in the present application is generated in the MAC sublayer 352.

As an embodiment, the first bit block in the present application is generated in the PHY301.

As an embodiment, the first bit block in the present application is generated in the PHY351.

As an embodiment, the second bit block in the present application is generated in the RRC sublayer 306.

As an embodiment, the second bit block in the present application is generated in the SDAP sublayer 356.

As an embodiment, the second bit block in the present application is generated in the MAC sublayer 302.

As an embodiment, the second bit block in the present application is generated in the MAC sublayer 352.

As an embodiment, the second bit block in the present application is generated in the PHY301.

As an embodiment, the second bit block in the present application is generated in the PHY351.

As an embodiment, the third bit block in the present application is generated in the RRC sublayer 306.

As an embodiment, the third bit block in the present application is generated in the MAC sublayer 302.

As an embodiment, the third bit block in the present application is generated in the MAC sublayer 352.

As an embodiment, the third bit block in the present application is generated in the PHY301.

As an embodiment, the third bit block in the present application is generated in the PHY351.

As an embodiment, the sixth bit block in the present application is generated in the RRC sublayer 306.

As an embodiment, the sixth bit block in the present application is generated in the MAC sublayer 302.

As an embodiment, the sixth bit block in the present application is generated in the MAC sublayer 352.

As an embodiment, the sixth bit block in the present application is generated in the PHY301.

As an embodiment, the sixth bit block in the present application is generated in the PHY351.

As an embodiment, the seventh bit block in the present application is generated in the RRC sublayer 306.

As an embodiment, the seventh bit block in the present application is generated in the MAC sublayer 302.

As an embodiment, the seventh bit block in the present application is generated in the MAC sublayer 352.

As an embodiment, the seventh bit block in the present application is generated in the PHY301.

As an embodiment, the seventh bit block in the present application is generated in the PHY351.

As an embodiment, the first signaling in the present application is generated in the RRC sublayer 306.

As an embodiment, the first signaling in the present application is generated in the MAC sublayer 302.

As an embodiment, the first signaling in the present application is generated in the MAC sublayer 352.

As an embodiment, the first signaling in the present application is generated in the PHY301.

As an embodiment, the first signaling in the present application is generated in the PHY351.

As an embodiment, the second signaling in the present application is generated in the RRC sublayer 306.

As an embodiment, the second signaling in the present application is generated in the MAC sublayer 302.

As an embodiment, the second signaling in the present application is generated in the MAC sublayer 352.

As an embodiment, the second signaling in the present application is generated in the PHY301.

As an embodiment, the second signaling in the present application is generated in the PHY351.

Example 4

Embodiment 4 shows a schematic diagram of a first communication device and a second communication device according to the application, as shown in fig. 4. Fig. 4 is a block diagram of a first communication device 410 and a second communication device 450 in communication with each other in an access network.

The first communication device 410 includes a controller/processor 475, a memory 476, a receive processor 470, a transmit processor 416, a multi-antenna receive processor 472, a multi-antenna transmit processor 471, a transmitter/receiver 418, and an antenna 420.

The second communication device 450 includes a controller/processor 459, a memory 460, a data source 467, a transmit processor 468, a receive processor 456, a multi-antenna transmit processor 457, a multi-antenna receive processor 458, a transmitter/receiver 454, and an antenna 452.

In the transmission from the first communication device 410 to the second communication device 450, upper layer data packets from the core network are provided to a controller/processor 475 at the first communication device 410. The controller/processor 475 implements the functionality of the L2 layer. In the transmission from the first communication device 410 to the first communication device 450, a controller/processor 475 provides header compression, encryption, packet segmentation and reordering, multiplexing between logical and transport channels, and radio resource allocation to the second communication device 450 based on various priority metrics. The controller/processor 475 is also responsible for retransmission of lost packets and signaling to the second communication device 450. The transmit processor 416 and the multi-antenna transmit processor 471 implement various signal processing functions for the L1 layer (i.e., physical layer). Transmit processor 416 performs coding and interleaving to facilitate Forward Error Correction (FEC) at the second communication device 450, as well as mapping of signal clusters based on various modulation schemes, e.g., binary Phase Shift Keying (BPSK), quadrature Phase Shift Keying (QPSK), M-phase shift keying (M-PSK), M-quadrature amplitude modulation (M-QAM). The multi-antenna transmit processor 471 digitally space-precodes the coded and modulated symbols, including codebook-based precoding and non-codebook-based precoding, and beamforming processing, to generate one or more spatial streams. A transmit processor 416 then maps each spatial stream to a subcarrier, multiplexes with reference signals (e.g., pilots) in the time and/or frequency domain, and then uses an Inverse Fast Fourier Transform (IFFT) to generate a physical channel carrying the time domain multicarrier symbol stream. The multi-antenna transmit processor 471 then performs transmit analog precoding/beamforming operations on the time domain multi-carrier symbol stream. Each transmitter 418 converts the baseband multicarrier symbol stream provided by the multiple antenna transmit processor 471 to a radio frequency stream and then provides it to a different antenna 420.

In a transmission from the first communication device 410 to the second communication device 450, each receiver 454 receives a signal at the second communication device 450 through its respective antenna 452. Each receiver 454 recovers information modulated onto a radio frequency carrier and converts the radio frequency stream into a baseband multicarrier symbol stream that is provided to a receive processor 456. The receive processor 456 and the multi-antenna receive processor 458 implement various signal processing functions for the L1 layer. A multi-antenna receive processor 458 performs receive analog precoding/beamforming operations on the baseband multi-carrier symbol stream from the receiver 454. The receive processor 456 converts the baseband multicarrier symbol stream after receiving the analog precoding/beamforming operation from the time domain to the frequency domain using a Fast Fourier Transform (FFT). In the frequency domain, the physical layer data signal and the reference signal are demultiplexed by the receive processor 456, wherein the reference signal is to be used for channel estimation, and the data signal is subjected to multi-antenna detection in the multi-antenna receive processor 458 to recover any spatial stream destined for the second communication device 450. The symbols on each spatial stream are demodulated and recovered in a receive processor 456 and soft decisions are generated. A receive processor 456 then decodes and deinterleaves the soft decisions to recover the upper layer data and control signals that were transmitted by the first communication device 410 on the physical channel. The upper layer data and control signals are then provided to the controller/processor 459. The controller/processor 459 implements the functions of the L2 layer. The controller/processor 459 may be associated with a memory 460 that stores program codes and data. Memory 460 may be referred to as a computer-readable medium. In the transmission from the first communication device 410 to the second communication device 450, the controller/processor 459 provides demultiplexing between transport and logical channels, packet reassembly, decryption, header decompression, control signal processing to recover upper layer data packets from the core network. The upper layer packets are then provided to all protocol layers above the L2 layer. Various control signals may also be provided to L3 for L3 processing.

In the transmission from the second communication device 450 to the first communication device 410, a data source 467 is used at the second communication device 450 to provide upper layer data packets to a controller/processor 459. Data source 467 represents all protocol layers above the L2 layer. Similar to the transmit functions at the first communication device 410 described in the transmission from the first communication device 410 to the second communication device 450, the controller/processor 459 implements header compression, encryption, packet segmentation and reordering, and multiplexing between logical and transport channels based on radio resource allocations, implementing L2 layer functions for the user and control planes. The controller/processor 459 is also responsible for retransmission of lost packets and signaling to the first communication device 410. The transmit processor 468 performs modulation mapping, channel coding, and digital multi-antenna spatial precoding, including codebook-based precoding and non-codebook-based precoding, and beamforming, with the multi-antenna transmit processor 457 performing digital multi-antenna spatial precoding, after which the transmit processor 468 modulates the resulting spatial stream into a multi-carrier/single-carrier symbol stream, which is analog precoded/beamformed in the multi-antenna transmit processor 457 before being provided to the different antennas 452 via the transmitter 454. Each transmitter 454 first converts the baseband symbol stream provided by the multi-antenna transmit processor 457 into a radio frequency symbol stream and provides it to an antenna 452.

In the transmission from the second communication device 450 to the first communication device 410, the function at the first communication device 410 is similar to the receiving function at the second communication device 450 described in the transmission from the first communication device 410 to the second communication device 450. Each receiver 418 receives radio frequency signals through its corresponding antenna 420, converts the received radio frequency signals to baseband signals, and provides the baseband signals to a multi-antenna receive processor 472 and a receive processor 470. The receive processor 470 and the multi-antenna receive processor 472 collectively implement the functions of the L1 layer. The controller/processor 475 implements L2 layer functions. The controller/processor 475 may be associated with a memory 476 that stores program codes and data. Memory 476 may be referred to as a computer-readable medium. In the transmission from the second communication device 450 to the first communication device 410, a controller/processor 475 provides demultiplexing between transport and logical channels, packet reassembly, decryption, header decompression, control signal processing to recover upper layer data packets from the UE 450. Upper layer packets from the controller/processor 475 may be provided to the core network.

As an embodiment, the first node in the present application includes the second communication device 450, and the second node in the present application includes the first communication device 410.

As a sub-embodiment of the above embodiment, the first node is a user equipment and the second node is a user equipment.

As a sub-embodiment of the above embodiment, the first node is a user equipment and the second node is a relay node.

As a sub-embodiment of the above embodiment, the first node is a relay node and the second node is a user equipment.

As a sub-embodiment of the above embodiment, the first node is a user equipment and the second node is a base station device.

As a sub-embodiment of the above embodiment, the first node is a relay node and the second node is a base station device.

As a sub-embodiment of the above embodiment, the second communication device 450 includes: at least one controller/processor; the at least one controller/processor is responsible for HARQ operations.

As a sub-embodiment of the above embodiment, the first communication device 410 includes: at least one controller/processor; the at least one controller/processor is responsible for HARQ operations.

As a sub-embodiment of the above embodiment, the first communication device 410 includes: at least one controller/processor; the at least one controller/processor is responsible for error detection using a positive Acknowledgement (ACK) and/or Negative Acknowledgement (NACK) protocol to support HARQ operations.

As an embodiment, the second communication device 450 includes: at least one processor and at least one memory including computer program code; the at least one memory and the computer program code are configured for use with the at least one processor. The second communication device 450 means at least: receiving the first signaling in the application and the second signaling in the application; transmitting the first signal in the application in the target air interface resource block in the application, wherein the first signal carries the first bit block in the application; the first signaling is used to determine the first bit block and the second signaling is used to determine the third bit block in the present application; the second air interface resource block in the present application is reserved to the second bit block in the present application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, where the first air interface resource block overlaps with the second air interface resource block in the time domain; the first number of the present application is used to determine the fourth air interface resource block in the present application, the first number is not less than the number of bits included in the first bit block and is less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth air interface resource block and the second air interface resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the above embodiment, the second communication device 450 corresponds to the first node in the present application.

As an embodiment, the second communication device 450 includes: a memory storing a program of computer-readable instructions that, when executed by at least one processor, produce acts comprising: receiving the first signaling in the application and the second signaling in the application; transmitting the first signal in the application in the target air interface resource block in the application, wherein the first signal carries the first bit block in the application; the first signaling is used to determine the first bit block and the second signaling is used to determine the third bit block in the present application; the second air interface resource block in the present application is reserved to the second bit block in the present application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, where the first air interface resource block overlaps with the second air interface resource block in the time domain; the first number of the present application is used to determine the fourth air interface resource block in the present application, the first number is not less than the number of bits included in the first bit block and is less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth air interface resource block and the second air interface resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As one embodiment, the first communication device 410 includes: at least one processor and at least one memory including computer program code; the at least one memory and the computer program code are configured for use with the at least one processor. The first communication device 410 means at least: transmitting the first signaling in the application and the second signaling in the application; receiving the first signal in the application in the target air interface resource block, wherein the first signal carries the first bit block in the application; the first signaling is used to determine the first bit block and the second signaling is used to determine the third bit block in the present application; the second air interface resource block in the present application is reserved to the second bit block in the present application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, where the first air interface resource block overlaps with the second air interface resource block in the time domain; the first number of the present application is used to determine the fourth air interface resource block in the present application, the first number is not less than the number of bits included in the first bit block and is less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth air interface resource block and the second air interface resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As a sub-embodiment of the above embodiment, the first communication device 410 corresponds to the second node in the present application.

As one embodiment, the first communication device 410 includes: a memory storing a program of computer-readable instructions that, when executed by at least one processor, produce acts comprising: transmitting the first signaling in the application and the second signaling in the application; receiving the first signal in the application in the target air interface resource block, wherein the first signal carries the first bit block in the application; the first signaling is used to determine the first bit block and the second signaling is used to determine the third bit block in the present application; the second air interface resource block in the present application is reserved to the second bit block in the present application; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine the first air interface resource block in the present application, where the first air interface resource block overlaps with the second air interface resource block in the time domain; the first number of the present application is used to determine the fourth air interface resource block in the present application, the first number is not less than the number of bits included in the first bit block and is less than the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, and the fourth air interface resource block and the second air interface resource block are orthogonal to each other in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As an embodiment at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, the data source 467 is used for receiving the first signaling in the present application.

As an example, at least one of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, the memory 476 is used for transmitting the first signaling in the present application.

As an embodiment at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, the data source 467 is used for receiving the second signaling in the present application.

As an example, at least one of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, the memory 476 is used for transmitting the second signaling in the present application.

As an example, at least one of the antenna 452, the transmitter 454, the multi-antenna transmit processor 458, the transmit processor 468, the controller/processor 459, the memory 460, the data source 467 is used to transmit the first signal in the application in the target air interface resource block in the application.

As an example, at least one of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller/processor 475, the memory 476 is used to receive the first signal in the present application in the target air interface resource block in the present application.

Example 5

Embodiment 5 illustrates a wireless signal transmission flow diagram according to one embodiment of the application, as shown in fig. 5. In fig. 5, communication is performed between a first node U1 and a second node U2 via an air interface. In particular, the order between the two step pairs { S521, S511} and { S522, S512} in FIG. 5 does not represent a particular time order.

First node U1Receiving a second signaling in step S511; receiving a first signaling in step S512; the first signal is transmitted in the target air interface resource block in step S513.

Second node U2Transmitting a second signaling in step S521; transmitting a first signaling in step S522; the first signal is received in the target air interface resource block in step S523.

In embodiment 5, the first signal carries a first block of bits; the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; the second air interface resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, which overlaps with the second air interface resource block in the time domain; a first number is used to determine a fourth air interface resource block, the first number being not less than a number of bits comprised by the first bit block and less than a sum of the number of bits comprised by the first bit block and a number of bits comprised by the third bit block, the fourth air interface resource block and the second air interface resource block being mutually orthogonal in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block; when the priority of the second bit block is the first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the first priority, the target air interface resource block is the first air interface resource block; a fifth air interface resource block is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; the fifth air interface resource block and the third air interface resource block are overlapped in the time domain; n number ranges respectively correspond to N empty resource block sets; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is equal to one of the first number range; the first air interface resource block set is an air interface resource block set corresponding to the first quantity range in the N air interface resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

As a sub-embodiment of embodiment 5, the first bit block includes a first type HARQ-ACK; the third bit block includes a second type of HARQ-ACK.

As a sub-embodiment of embodiment 5, when the target air interface resource block is the first air interface resource block, the first node U1 discards transmitting a signal carrying the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a portion of the second air interface resource block overlapping the first air interface resource block in a time domain.

As a sub-embodiment of embodiment 5, the first number is used to determine the fourth air interface resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is associated with the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

As an embodiment, the first node U1 is the first node in the present application.

As an embodiment, the second node U2 is the second node in the present application.

As an embodiment, the first node U1 is a UE.

As an embodiment, the second node U2 is a base station.

As an embodiment, the second node U2 is a UE.

As an embodiment, the air interface between the second node U2 and the first node U1 is a Uu interface.

As an embodiment, the air interface between the second node U2 and the first node U1 comprises a cellular link.

As an embodiment, the air interface between the second node U2 and the first node U1 is a PC5 interface.

As an embodiment, the air interface between the second node U2 and the first node U1 comprises a sidelink.

As an embodiment, the air interface between the second node U2 and the first node U1 comprises a radio interface between a base station device and a user equipment.

As an embodiment, the second air interface resource block group includes the third air interface resource block and the fifth air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the third air interface resource block and the fifth air interface resource block.

As an embodiment, the second air interface resource block group includes the third air interface resource block and the first air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the third air interface resource block and the first air interface resource block.

As an embodiment, the second air interface resource block group includes the third air interface resource block and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the third air interface resource block and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the first air interface resource block, the third air interface resource block and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the first air interface resource block, the fifth air interface resource block, the third air interface resource block and the fourth air interface resource block.

As an embodiment, the second air interface resource block group includes the second air interface resource block, the first air interface resource block, the fifth air interface resource block, the third air interface resource block and the fourth air interface resource block.

As an embodiment, all air interface resource blocks in the second air interface resource block group satisfy the conditions in the second set of conditions.

As an embodiment, the conditions in the second set of conditions relate to a processing time (processingtime) of the UE.

As an embodiment, the conditions in the second set of conditions relate to UE processing capability (UE processing capability).

As an embodiment, the conditions in the second set of conditions include a timeline condition (timeline conditions) related to the second air interface resource block group, the timeline condition being described in detail in section 9.2.5 of 3gpp ts 38.213.

As an embodiment, the conditions in the second set of conditions include: the time interval between the second time and the starting time of the first (first) multicarrier symbol of the earliest one of the second air-interface resource block groups is not smaller than a third value.

As a sub-embodiment of the above embodiment, the third value is related to a processing time of the UE.

As a sub-embodiment of the above embodiment, the third value is related to UE processing capability.

As a sub-embodiment of the above embodiment, the third value relates to PDSCH processing capability (UE PDSCH processing capability) of the UE.

As a sub-embodiment of the above-described embodiment, And->At least one of which is used to determine the third value, the +.>Said->The described->And said->See section 9.2.5 of 3gpp ts38.213 for specific definition.

As a sub-embodiment of the above embodiment, the second time is a cut-off time of a downlink physical layer channel transmitted.

As a sub-embodiment of the above embodiment, the second time is a cut-off time of a downlink physical layer channel transmitted; the transmitted one downlink physical layer channel includes one PDSCH or one PDCCH.

As an embodiment, the third signaling indicates that the third bit block is allowed to be transmitted in one air interface resource block determined by the first signaling.

As an embodiment, the third signaling comprises a first domain; the first field included in the third signaling indicates that the third bit block is allowed to be transmitted in one of the air interface resource blocks determined by the first signaling.

As an embodiment, the third signaling indicates that the second type HARQ-ACK is allowed to be transmitted in one air interface resource block determined by the first signaling.

As an embodiment, the third signaling comprises a first domain; the first field included in the third signaling indicates that the second type HARQ-ACK is allowed to be transmitted in one air interface resource block determined by the first signaling.

As an embodiment, the one air interface resource block determined by the first signaling is the first air interface resource block.

As an embodiment, the one air interface resource block determined by the first signaling is the fourth air interface resource block.

As an embodiment, the third signaling indicates that the first bit block is allowed to be transmitted in one air interface resource block determined by the second signaling.

As an embodiment, the third signaling comprises a first domain; the third signaling includes the first field indicating that the first bit block is allowed to be transmitted in one of the air interface resource blocks determined by the second signaling.

As an embodiment, the third signaling indicates that the first type HARQ-ACK is allowed to be transmitted in one air interface resource block determined by the second signaling.

As an embodiment, the third signaling comprises a first domain; the first field included in the third signaling indicates that the first type HARQ-ACK is allowed to be transmitted in one air interface resource block determined by the second signaling.

As an embodiment, the one air interface resource block determined by the second signaling is the first air interface resource block.

As an embodiment, the one air interface resource block determined by the second signaling is the fourth air interface resource block.

As an embodiment, the third signaling comprises a first domain.

As an embodiment, the first field is used to determine whether UCI of different priorities is allowed to be multiplexed (multiplex) into the same channel.

As an embodiment, the first field is used to determine whether HARQ-ACKs of different priorities are allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether UCI of different priorities is allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether HARQ-ACKs of different priorities are allowed to be multiplexed into the same channel.

As an embodiment, the first domain is used to determine whether different kinds of UCI are allowed to be multiplexed into the same channel.

As an embodiment, the first field is used to determine whether different kinds of HARQ-ACKs are allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether different kinds of UCI are allowed to be multiplexed into the same channel.

As an embodiment, the first field in the third signaling is used to determine whether different kinds of HARQ-ACKs are allowed to be multiplexed into the same channel.

As an embodiment, the first field comprises 1 bit.

As an embodiment, the first field comprises 2 bits.

As an embodiment, the first field comprises a plurality of bits.

As an embodiment, the third signaling is the first signaling.

As an embodiment, the third signaling is the second signaling.

As an embodiment, the third signaling is dynamically configured.

As an embodiment, the third signaling comprises layer 1 signaling.

As an embodiment, the third signaling comprises layer 1 control signaling.

As an embodiment, the third signaling comprises physical layer signaling.

As an embodiment, the third signaling comprises one or more domains in a physical layer signaling.

As an embodiment, the third signaling comprises higher layer signaling.

As an embodiment, the third signaling comprises one or more domains in a higher layer signaling.

As an embodiment, the third signaling comprises RRC signaling.

As an embodiment, the third signaling includes MAC CE signaling.

As an embodiment, the third signaling includes one or more domains in an RRC signaling.

As an embodiment, the third signaling includes one or more domains in a MAC CE signaling.

As an embodiment, the third signaling comprises DCI.

As an embodiment, the third signaling includes one or more fields in one DCI.

As an embodiment, the third signaling comprises SCI.

As an embodiment, the third signaling comprises one or more fields in one SCI.

As an embodiment, the third signaling includes one or more fields in an IE.

As an embodiment, the starting time of the first air interface resource block is not earlier than the first time.

As an embodiment, the starting time of the fourth air interface resource block is not earlier than the first time.

As an embodiment, the start time of the fourth air interface resource block is earlier than the first time.

As one embodiment, the target air interface resource block is the first air interface resource block; the starting time of the first air interface resource block is not earlier than the first time; the benefits of the above constraints are: facilitating transmission of all or part of the signal carrying the second bit block in the second air interface resource block by the first node cancellation (cancel).

As an embodiment, the first signaling is used to determine the first time instant.

As an embodiment, the first time is later than a deadline of the first signaling in a time domain; the time interval between the first time and the cut-off time of the first signaling in the time domain is equal to the time domain resources occupied by the P multi-carrier symbols.

As an embodiment, the first time is later than a time-domain ending time of a physical layer channel carrying the first signaling; the time interval between the first time and the cut-off time of the physical layer channel carrying the first signaling in the time domain is equal to the time domain resource occupied by the P multi-carrier symbols.

As an embodiment, the one physical layer channel carrying the first signaling comprises one PDCCH.

As an embodiment, the one physical layer channel carrying the first signaling comprises one sppdcch.

As an embodiment, the one physical layer channel carrying the first signaling comprises one NB-PDCCH.

As an embodiment, the first time is later than a deadline of a physical layer channel scheduled by the first signaling in a time domain; the time interval between the first time and the cut-off time of the physical layer channel of the first signaling schedule in the time domain is equal to the time domain resource occupied by the P multi-carrier symbols.

As an embodiment, the one physical layer channel of the first signaling schedule includes one PDSCH.

As an embodiment, the one physical layer channel of the first signaling schedule includes one sPDSCH.

As an embodiment, the one physical layer channel of the first signaling schedule includes one NB-PDSCH.

As an embodiment, the second signaling is used to determine the first time instant.

As an embodiment, the first time is later than a deadline of the second signaling in a time domain; the time interval between the first time and the cut-off time of the second signaling in the time domain is equal to the time domain resource occupied by the P multi-carrier symbols.

As an embodiment, the first time is later than a time-domain ending time of a physical layer channel carrying the second signaling; the time interval between the first time and the cut-off time of the physical layer channel carrying the second signaling in the time domain is equal to the time domain resource occupied by the P multi-carrier symbols.

As an embodiment, the one physical layer channel carrying the second signaling comprises one PDCCH.

As an embodiment, the one physical layer channel carrying the second signaling comprises one sppdcch.

As an embodiment, the one physical layer channel carrying the second signaling comprises one NB-PDCCH.

As an embodiment, the first time is later than a time of a physical layer channel scheduled by the second signaling in a time domain; the time interval between the first time and the cut-off time of the physical layer channel of the second signaling schedule in the time domain is equal to the time domain resource occupied by the P multi-carrier symbols.

As an embodiment, the one physical layer channel of the second signaling schedule includes one PDSCH.

As an embodiment, the one physical layer channel of the second signaling schedule includes one sPDSCH.

As an embodiment, the one physical layer channel of the second signaling schedule includes one NB-PDSCH.

As an embodiment, said P is equal to 1.

As an embodiment, P is greater than 1.

As one embodiment, UE processing capability (UE processing capability) is used to determine the first time instant.

As one embodiment, the time domain resources occupied by the P multi-carrier symbols are equal to T _proc,2 +d1。

As a sub-embodiment of the above embodiment, the T _proc,2 And corresponding to the UE processing capability of the first node.

As a sub-embodiment of the above embodiment, the T _proc,2 See section 6.4 of 3gpp ts38.214 for definitions.

As a sub-embodiment of the above embodiment, the d1 is equal to zero.

As a sub-embodiment of the foregoing embodiment, d1 is equal to the time domain resource occupied by 1 multicarrier symbol.

As a sub-embodiment of the foregoing embodiment, d1 is equal to the time domain resource occupied by 2 multicarrier symbols.

As a sub-embodiment of the above embodiment, the d1 is reported as UE capability (reportedby UE capability).

As an embodiment, the first signaling is used to determine the first air interface resource block.

As an embodiment, the first signaling is used to determine the fourth air interface resource block.

As an embodiment, the second signaling is used to determine the first air interface resource block.

As an embodiment, the second signaling is used to determine the fourth air interface resource block.

As an embodiment, the first signaling is used to determine the fifth air interface resource block.

As an embodiment, the second signaling is used to determine the third air interface resource block.

As one embodiment, the first priority is different from the second priority.

As an embodiment, the first priority and the second priority are respectively different priorities.

As an embodiment, the first signaling indicates the first priority and the second signaling indicates the second priority.

As an embodiment, the first signaling indicates the second priority, and the second signaling indicates the first priority.

As an embodiment, all information bits included in the first bit block are information bits of the first priority.

As an embodiment, all information bits included in the first bit block are information bits of the second priority.

As an embodiment, all information bits included in the third bit block are information bits of the first priority.

As an embodiment, all information bits included in the third bit block are information bits of the second priority.

As an embodiment, the priority of the sixth bit block is the same as the priority of the first bit block.

As an embodiment, the priority of the seventh bit block is the same as the priority of the third bit block.

As an embodiment, all information bits included in the sixth bit block are information bits of the first priority.

As an embodiment, all information bits included in the sixth bit block are information bits of the second priority.

As an embodiment, all information bits included in the seventh bit block are information bits of the first priority.

As an embodiment, all information bits included in the seventh bit block are information bits of the second priority.

As an embodiment, the first priority is a higher priority than the second priority.

As an embodiment, the first priority and the second priority correspond to different service types (service types), respectively.

As an embodiment, the first priority and the second priority are physical layer priorities (phypriorities).

As an embodiment, the priority index of the first priority is equal to 1, and the priority index of the second priority is equal to 0.

As an embodiment, the priority index of the first priority is equal to 0, and the priority index of the second priority is equal to 1.

As one embodiment, the priority of the first bit block is the first priority of a first priority and a second priority, and the priority of the third bit block is the second priority of the first priority and the second priority.

As an embodiment, the priority of the first bit block is the second priority of the first priority and the second priority, and the priority of the third bit block is the first priority of the first priority and the second priority.

As an embodiment, the first type HARQ-ACK corresponds to the first priority, and the second type HARQ-ACK corresponds to the second priority.

As an embodiment, the first type HARQ-ACK corresponds to the second priority, and the second type HARQ-ACK corresponds to the first priority.

As an embodiment, the first bit block and the third bit block respectively include UCI of different priorities.

As an embodiment, the first signaling indicates one priority in the first set of priorities; the first bit block has a priority that is the same as the one of the first set of priorities indicated by the first signaling.

As an embodiment, the second signaling indicates one priority in the first set of priorities; the priority of the third bit block is the same as the one of the first set of priorities indicated by the second signaling.

As an embodiment, the priority of the first bit block is one of a first set of priorities.

As an embodiment, the priority of the second bit block is one of the first set of priorities.

As an embodiment, the priority of the third bit block is one of the first set of priorities.

As an embodiment, the QoS value corresponding to a block of bits transmitted on the bypass link is used to determine the priority of the third block of bits.

As an embodiment, the priority corresponding to one bit block transmitted on the uplink is used to determine the priority of the first bit block.

As a sub-embodiment of the above embodiment, the one bit block transmitted on the sidelink is transmitted in one PSSCH.

As an embodiment, the priority of one signalling indication transmitted on the bypass link is used to determine the priority of the third bit block.

As an embodiment, the priority of the first signaling indication transmitted on the uplink is used to determine the priority of the first bit block.

As a sub-embodiment of the above embodiment, the one signaling transmitted on the side link comprises SCI.

As a sub-embodiment of the above embodiment, the one signaling transmitted on the side link comprises one or more domains in one SCI.

As an embodiment, the second signaling indicates that a positive integer number of the second type HARQ-ACK information bits are transmitted in the first time domain unit.

As an embodiment, the second signaling instructs the first node to transmit a positive integer number of the second type HARQ-ACK information bits in the first time domain unit.

As an embodiment, the third bit block comprises the second type HARQ-ACK information bits transmitted in the first time domain unit.

As an embodiment, the first time domain unit comprises a time slot.

As an embodiment, the first time domain unit comprises one sub-slot.

As an embodiment, the first time domain unit comprises a multicarrier symbol.

As an embodiment, the first set of priorities includes a plurality of priorities.

As an embodiment, the first set of priorities includes the first priority and the second priority.

As one embodiment, the first set of priorities includes a plurality of priorities corresponding to different QoS values (values).

As one embodiment, the first set of priorities includes a plurality of priorities corresponding to different QoS value ranges.

As an embodiment, the second bit block comprises a TB.

As an embodiment, the second bit block comprises a CB.

As an embodiment, the second bit block comprises a CBG.

As an embodiment, the second bit block includes a UCI.

As an embodiment, the second bit block comprises an SR.

As an embodiment, the second bit block includes a CSI report.

As an embodiment, the priority of the second bit block corresponds to priority index 1 or priority index 0.

As an embodiment, the priority of the second bit block is the first priority or the second priority.

As an embodiment, the priority of the second bit block is a QoS-related priority.

Example 6

Embodiment 6 illustrates a schematic diagram of the relationship among a fifth air interface resource block, a first bit block, a third air interface resource block, and a third bit block according to one embodiment of the present application, as shown in fig. 6.

In embodiment 6, a fifth air interface resource block is reserved for the first bit block; the third air interface resource block is reserved for a third bit block; the fifth air interface resource block and the third air interface resource block overlap in the time domain.

As an embodiment, the fifth air interface resource block is the fourth air interface resource block in the present application.

As an embodiment, the fourth air interface resource block in the present application is the fifth air interface resource block.

As an embodiment, the fifth air interface resource block is not the fourth air interface resource block in the present application.

As an embodiment, the fourth air interface resource block in the present application is not the fifth air interface resource block.

As an embodiment, the fifth air interface resource block is orthogonal to the second air interface resource block in the time domain.

As an embodiment, the second air interface resource block is orthogonal to the third air interface resource block in the time domain.

As an embodiment, a fifth air interface resource block is reserved for the sixth bit block in the present application.

As an embodiment, a third air interface resource block is reserved for the seventh bit block in the present application.

As an embodiment, the third air interface resource block includes a positive integer number of REs in the time-frequency domain.

As an embodiment, the third air interface resource block includes a positive integer number of subcarriers in the frequency domain.

As an embodiment, the third air interface resource block includes a positive integer number of PRBs in the frequency domain.

As an embodiment, the third air interface resource block includes a positive integer number of RBs in the frequency domain.

As an embodiment, the third air interface resource block includes a positive integer number of multicarrier symbols in the time domain.

As an embodiment, the third air interface resource block includes a positive integer number of slots in the time domain.

As an embodiment, the third air interface resource block includes a positive integer number of sub-slots in the time domain.

As an embodiment, the third air interface resource block includes a positive integer number of milliseconds in the time domain.

As an embodiment, the third air interface resource block includes a positive integer number of consecutive multicarrier symbols in the time domain.

As an embodiment, the third air interface resource block includes a positive integer number of discontinuous slots in the time domain.

As an embodiment, the third air interface resource block includes a positive integer number of consecutive slots in the time domain.

As an embodiment, the third air interface resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the third air interface resource block is configured by physical layer signaling.

As an embodiment, the third air interface resource block is configured by higher layer signaling.

As an embodiment, the third air interface resource is configured by RRC signaling.

As an embodiment, the third air interface resource block is configured by MAC CE signaling.

As an embodiment, the third air interface resource block is reserved for a physical layer channel.

As an embodiment, the third air interface resource block includes air interface resources reserved for one physical layer channel.

As an embodiment, the third air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the third air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the third air interface resource block includes, in a time-frequency domain, a time-frequency resource reserved for one physical layer channel.

As an embodiment, the third air interface resource block includes one PUCCH resource.

As an embodiment, the third air interface resource block includes one PUCCH resource in one PUCCH resource set.

As an embodiment, the second signaling indicates the third air interface resource block.

As an embodiment, the second signaling explicitly indicates the third air interface resource block.

As an embodiment, the second signaling implicitly indicates the third air interface resource block.

As an embodiment, the fifth air interface resource block includes a positive integer number of REs in the time-frequency domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of subcarriers in the frequency domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of PRBs in the frequency domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of RBs in the frequency domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of multicarrier symbols in the time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of slots in the time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of sub-slots in the time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of milliseconds in the time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of consecutive multicarrier symbols in the time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of discontinuous slots in the time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of consecutive slots in the time domain.

As an embodiment, the fifth air interface resource block includes a positive integer number of subframes in the time domain.

As an embodiment, the fifth air interface resource block is configured by physical layer signaling.

As an embodiment, the fifth air interface resource block is configured by higher layer signaling.

As an embodiment, the fifth air interface resource is configured by RRC signaling.

As an embodiment, the fifth air interface resource block is configured by MAC CE signaling.

As an embodiment, the fifth air interface resource block is reserved for one physical layer channel.

As an embodiment, the fifth air interface resource block includes air interface resources reserved for one physical layer channel.

As an embodiment, the fifth air interface resource block includes an air interface resource occupied by a physical layer channel.

As an embodiment, the fifth air interface resource block includes a time-frequency resource occupied by a physical layer channel in a time-frequency domain.

As an embodiment, the fifth air interface resource block includes time-frequency resources reserved for one physical layer channel on a time-frequency domain.

As an embodiment, the fifth air interface resource block includes one PUCCH resource.

As an embodiment, the fifth air interface resource block includes one PUCCH resource in one PUCCH resource set.

As an embodiment, the first signaling indicates the fifth air interface resource block.

As an embodiment, the first signaling explicitly indicates the fifth air interface resource block.

As an embodiment, the first signaling implicitly indicates the fifth air interface resource block.

Example 7

Embodiment 7 illustrates a schematic diagram of the relationship between N number ranges, N number of air interface resource block sets, the sum of the number of bits included in the first bit block and the number of bits included in the third bit block, the first number range, the first air interface resource block set and the first air interface resource block according to one embodiment of the present application, as shown in fig. 7.

In embodiment 7, the N number ranges correspond to N sets of air interface resource blocks, respectively; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is equal to one of said first number range; the first air interface resource block set is an air interface resource block set corresponding to the first quantity range in the N air interface resource block sets; the first air interface resource block is one air interface resource block in the first set of air interface resource blocks.

As an embodiment, each of the N sets of air interface resource blocks includes one PUCCH resource set, respectively.

As an embodiment, the first set of air interface resource blocks includes one set of PUCCH resources.

As an embodiment, the first signaling indicates the first air interface resource block from the first set of air interface resource blocks.

As an embodiment, the second signaling indicates the first air interface resource block from the first set of air interface resource blocks.

As an embodiment, the N number ranges correspond to N air interface resource blocks respectively; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is equal to one of the first number range; the first air interface resource block is an air interface resource block set corresponding to the first number range in the N air interface resource blocks.

As an embodiment, each of the N air interface resource blocks includes one PUCCH resource.

As an embodiment, the N number ranges are mutually orthogonal.

As an embodiment, said N is a positive integer greater than 1.

As an embodiment, the N is not greater than 4.

As an embodiment, the N is not greater than 8.

As an embodiment, the N is not greater than 16.

As an embodiment, the N is not greater than 256.

As one embodiment, the N is no greater than 1024.

As an embodiment, the first number is used to determine the fourth air interface resource block; the M number ranges respectively correspond to M empty resource block sets; the second range of numbers is one of the M ranges of numbers; the first number is equal to one number in the second number range; the second air interface resource block set is an air interface resource block set corresponding to the second number range in the M air interface resource block sets; the second set of air interface resource blocks includes the fourth air interface resource block.

As an embodiment, each of the M sets of air interface resource blocks includes one PUCCH resource set, respectively.

As an embodiment, the second set of air interface resource blocks includes one set of PUCCH resources.

As an embodiment, the first signaling indicates the fourth air interface resource block from the second set of air interface resource blocks.

As an embodiment, the second signaling indicates the fourth air interface resource block from the second set of air interface resource blocks.

As an embodiment, the first number is used to determine the fourth air interface resource block; the M number ranges correspond to M empty resource blocks respectively; the second range of numbers is one of the M ranges of numbers; the first number is equal to one number in the second number range; the fourth air interface resource block is an air interface resource block set corresponding to the second number range in the M air interface resource blocks.

As an embodiment, each of the M air interface resource blocks includes one PUCCH resource.

As an embodiment, the M number ranges are mutually orthogonal.

As an embodiment, said M is equal to said N.

As an embodiment, the M sets of air interface resource blocks are the N sets of air interface resource blocks.

As an embodiment, the M air interface resource blocks are the N air interface resource blocks.

As an embodiment, said M is a positive integer greater than 1.

As an embodiment, the M is not greater than 4.

As an embodiment, the M is not greater than 8.

As an embodiment, the M is not greater than 16.

As an embodiment, the M is not greater than 256.

As one embodiment, the M is no greater than 1024.

As one embodiment, the T number ranges respectively correspond to T sets of air interface resource blocks; the fifth number range is one of the T number ranges; the first bit block includes a number of bits equal to one of the fifth number range; the fifth air interface resource block set is an air interface resource block set corresponding to the fifth quantity range in the T air interface resource block sets; the fifth set of air interface resource blocks includes the fifth air interface resource block.

As one embodiment, the T number ranges respectively correspond to T sets of air interface resource blocks; the fifth number range is one of the T number ranges; a bit block generated by the sixth bit block in the present application includes a number of bits equal to one number in the fifth number range; the fifth air interface resource block set is an air interface resource block set corresponding to the fifth quantity range in the T air interface resource block sets; the fifth set of air interface resource blocks includes the fifth air interface resource block.

As an embodiment, each of the T sets of air interface resource blocks includes one PUCCH resource set, respectively.

As an embodiment, the fifth air interface resource block set includes one PUCCH resource set.

As an embodiment, the first signaling indicates the fifth air interface resource block from the fifth air interface resource block set.

As an embodiment, the T number ranges correspond to T air interface resource blocks, respectively; the fifth number range is one of the T number ranges; the first bit block includes a number of bits equal to one of the fifth number range; the fifth air interface resource block is an air interface resource block set corresponding to the fifth number range in the T air interface resource blocks.

As an embodiment, the T number ranges correspond to T air interface resource blocks, respectively; the fifth number range is one of the T number ranges; a bit block generated by the sixth bit block in the present application includes a number of bits equal to one number in the fifth number range; the fifth air interface resource block is an air interface resource block set corresponding to the fifth number range in the T air interface resource blocks.

As an embodiment, each of the T air interface resource blocks includes one PUCCH resource.

As an embodiment, the T number ranges are mutually orthogonal.

As an embodiment, said T is a positive integer greater than 1.

As an embodiment, T is not greater than 4.

As an embodiment, T is not greater than 8.

As an embodiment, T is not greater than 16.

As an embodiment, T is not greater than 256.

As one embodiment, T is no greater than 1024.

As an embodiment, said T is equal to said N.

As an embodiment, the T sets of air interface resource blocks are the N sets of air interface resource blocks.

As an embodiment, the T air interface resource blocks are the N air interface resource blocks.

As an embodiment, the number of bits comprised by the third bit block is used to determine the third air interface resource block; k number ranges correspond to K empty resource block sets respectively; the third number range is one of the K number ranges; said third bit block comprising said number of bits equal to one of said third range of numbers; the third air interface resource block set is an air interface resource block set corresponding to the third number range in the K air interface resource block sets; the third set of air interface resource blocks includes the third air interface resource block.

As an embodiment, the number of bits included in one bit block generated by the seventh bit block in the present application is used to determine the third air interface resource block; k number ranges correspond to K empty resource block sets respectively; the third number range is one of the K number ranges; said one bit block generated by said seventh bit block comprises said number of bits equal to one of said third range of numbers; the third air interface resource block set is an air interface resource block set corresponding to the third number range in the K air interface resource block sets; the third set of air interface resource blocks includes the third air interface resource block.

As an embodiment, each of the K sets of air interface resource blocks includes one PUCCH resource set, respectively.

As an embodiment, the third air interface resource block set includes one PUCCH resource set.

As an embodiment, the second signaling indicates the third air interface resource block from the third set of air interface resource blocks.

As an embodiment, the number of bits comprised by the third bit block is used to determine the third air interface resource block; the K quantity ranges correspond to K empty resource blocks respectively; the third number range is one of the K number ranges; said third bit block comprising said number of bits equal to one of said third range of numbers; the third air interface resource block is an air interface resource block set corresponding to the third number range in the K air interface resource blocks.

As an embodiment, the number of bits included in one bit block generated by the seventh bit block in the present application is used to determine the third air interface resource block; the K quantity ranges correspond to K empty resource blocks respectively; the third number range is one of the K number ranges; said one bit block generated by said seventh bit block comprises said number of bits equal to one of said third range of numbers; the third air interface resource block is an air interface resource block set corresponding to the third number range in the K air interface resource blocks.

As an embodiment, each of the K air interface resource blocks includes one PUCCH resource.

As an example, the K number ranges are mutually orthogonal.

As an embodiment, K is a positive integer greater than 1.

As an embodiment, the K is not greater than 4.

As an embodiment, the K is not greater than 8.

As an embodiment, the K is not greater than 16.

As an embodiment, the K is not greater than 256.

As an embodiment, the K is not greater than 1024.

Example 8

Embodiment 8 illustrates a schematic diagram of a procedure in which the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block according to an embodiment of the present application, as shown in fig. 8.

In embodiment 8, the first node in the present application determines in step S81 whether the priority of the second bit block is the first priority; if yes, go to step S82 to determine that the target air interface resource block is a fourth air interface resource block; otherwise, it is determined in step S83 that the target air interface resource block is the first air interface resource block.

As one embodiment, when the priority of the second bit block is not the first priority, the priority of the second bit block is the second priority.

As an embodiment, when the priority of the second bit block is not the first priority, the priority of the second bit block is one other than the second priority.

As one embodiment, when the priority of the second bit block is the second priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the second priority, the target air interface resource block is the first air interface resource block.

As one embodiment, when the priority of the second bit block is not the second priority, the priority of the second bit block is the first priority.

As an embodiment, when the priority of the second bit block is not the second priority, the priority of the second bit block is one other than the first priority.

As one embodiment, when the priority of the second bit block is one of the first subset of priorities, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is one of a second subset of priorities, the target air interface resource block is the first air interface resource block; the first priority set includes the first priority subset and the second priority subset, the first priority subset having no intersection with the second priority subset.

As one embodiment, the priority of the first bit block is different from the priority of the third bit block; the target air interface resource block is the fourth air interface resource block when the priority of the second bit block is lower than the priority of the first bit block and the priority of the second bit block is lower than the priority of the third bit block; the target air interface resource block is the first air interface resource block when the priority of the second bit block is not lower than the priority of the first bit block or the priority of the second bit block is not lower than the priority of the third bit block.

As one embodiment, the priority of the first bit block is different from the priority of the third bit block; the target air interface resource block is the first air interface resource block when the priority of the second bit block is lower than the priority of the first bit block and the priority of the second bit block is lower than the priority of the third bit block; the target air interface resource block is the fourth air interface resource block when the priority of the second bit block is not lower than the priority of the first bit block or the priority of the second bit block is not lower than the priority of the third bit block.

As one embodiment, the priority of the first bit block is different from the priority of the third bit block; the target air interface resource block is the fourth air interface resource block when the priority of the second bit block is higher than the priority of the first bit block and the priority of the second bit block is higher than the priority of the third bit block; the target air interface resource block is the first air interface resource block when the priority of the second bit block is not higher than the priority of the first bit block or the priority of the second bit block is not higher than the priority of the third bit block.

As one embodiment, the priority of the first bit block is different from the priority of the third bit block; the target air interface resource block is the first air interface resource block when the priority of the second bit block is higher than the priority of the first bit block and the priority of the second bit block is higher than the priority of the third bit block; the target air interface resource block is the fourth air interface resource block when the priority of the second bit block is not higher than the priority of the first bit block or the priority of the second bit block is not higher than the priority of the third bit block.

As one embodiment, the target air interface resource block is the first air interface resource block when the priority of the second bit block is higher than the priority of the third bit block; when the priority of the second bit block is not higher than the priority of the third bit block, the target air interface resource block is the fourth air interface resource block.

As one embodiment, the target air interface resource block is the first air interface resource block when the priority of the second bit block is lower than the priority of the third bit block; when the priority of the second bit block is not lower than the priority of the third bit block, the target air interface resource block is the fourth air interface resource block.

As an embodiment, the priority of the third bit block corresponds to a value greater than a first threshold.

As an embodiment, the first threshold is greater than zero.

As an embodiment, the first threshold is a positive integer.

As an embodiment, the first threshold is configured for higher layer signaling.

As an embodiment, the first threshold is configured for RRC signaling.

As an embodiment, the first threshold is MACCE signaling configured.

As an embodiment, the first threshold value is predefined.

Example 9

Embodiment 9 illustrates a schematic diagram of a process of determining whether to discard a signal carrying a second bit block in a second air interface resource sub-block according to an embodiment of the present application, as shown in fig. 9.

In embodiment 9, the first node in the present application determines in step S91 whether the target air interface resource block is the fourth air interface resource block or the first air interface resource block; if it is determined that the target air interface resource block is the fourth air interface resource block, proceeding to step S92, it is determined that a signal carrying a second bit block is transmitted in a second air interface resource sub-block; if it is determined that the target air interface resource block is the first air interface resource block, the process proceeds to step S93, where it is determined that the signal carrying the second bit block is discarded and transmitted in the second air interface resource sub-block.

In embodiment 9, the second air interface resource block includes the second air interface resource sub-block.

As a sub-embodiment of embodiment 9, the second air-interface resource sub-block includes a portion of the second air-interface resource block that overlaps with the time domain resource occupied by the first air-interface resource block in the present application in the time domain.

As a sub-embodiment of embodiment 9, the second air interface resource block further includes an air interface resource other than the second air interface resource sub-block; and when the first node judges that the target air interface resource block is the fourth air interface resource block, the first node also transmits a signal carrying the second bit block in the air interface resource except the second air interface resource sub-block in the second air interface resource block.

As an embodiment, the second air-interface resource sub-block is a portion of the second air-interface resource block overlapping with the first air-interface resource block in a time domain.

As an embodiment, the second air interface resource block further includes an air interface resource other than the second air interface resource sub-block; and when the target air interface resource block is the first air interface resource block, the first node sends a signal carrying the second bit block in the air interface resource except the second air interface resource sub-block in the second air interface resource block.

As an embodiment, the second air interface resource block further includes an air interface resource other than the second air interface resource sub-block; and when the target air interface resource block is the first air interface resource block, the first node gives up sending the signal carrying the second bit block in the air interface resource except the second air interface resource sub-block in the second air interface resource block.

As one embodiment, when the target air interface resource block is the fourth air interface resource block, the first node transmits a second signal in the second air interface resource block; when the target air interface resource block is the first air interface resource block, the first node gives up sending the part of the second signal mapped to the second air interface resource sub-block; the second air interface resource sub-block comprises a part of the second air interface resource block, which is overlapped with the time domain resource occupied by the first air interface resource block in the time domain.

As one embodiment, when the priority of the second bit block in the present application is the first priority, the first node transmits a second signal in the second air interface resource block; when the priority of the second bit block is not the first priority, the first node gives up sending the portion of the second signal mapped into a second air interface resource sub-block; the second air interface resource sub-block comprises a part of the second air interface resource block, which is overlapped with the time domain resource occupied by the first air interface resource block in the time domain.

As an embodiment, the second air interface resource block further includes an air interface resource other than the second air interface resource sub-block; when the target air interface resource block is the first air interface resource block, the first node transmits the second signal mapped to a portion of the air interface resource other than the second air interface resource sub-block in the second air interface resource block.

As an embodiment, the second air interface resource block further includes an air interface resource other than the second air interface resource sub-block; when the target air interface resource block is the first air interface resource block, the first node gives up transmitting the portion of the second signal mapped into the air interface resource other than the second air interface resource sub-block in the second air interface resource block.

As an embodiment, when the target air interface resource block is the first air interface resource block: and the first node discards and transmits the signal carrying the second bit block in the second air interface resource block.

As an embodiment, when the target air interface resource block is the fourth air interface resource block, the first node transmits the second signal in the second air interface resource block.

As an embodiment, the second signal carries the second block of bits.

As an embodiment, the signal carrying the second block of bits comprises all or part of the output after all or part of the bits in the second block of bits have been sequentially CRC added, segmented, coded block level CRC added, channel coded, rate matched, concatenated, scrambled, modulated, layer mapped, precoded, mapped to resource elements, multicarrier symbol generated, modulated up-converted.

As an embodiment, the second signal includes an output after all or part of the bits in the second bit block are sequentially subjected to CRC addition, segmentation, coding block level CRC addition, channel coding, rate matching, concatenation, scrambling, modulation, layer mapping, precoding, mapping to resource elements, multicarrier symbol generation, modulation up-conversion.

As an embodiment, from the time domain, the time domain resource occupied by the first air interface resource block includes the time domain resource occupied by the second air interface resource sub-block.

As an embodiment, when the target air interface resource block is the first air interface resource block: and the first node sends a second signal in an air interface resource outside the second air interface resource sub-block in the second air interface resource block, wherein the second signal carries the signal of the second bit block.

As an embodiment, the starting time of the second air interface resource block is earlier than the starting time of the first air interface resource block; and the starting time of the second air interface resource sub-block is later than the starting time of the second air interface resource block.

As an embodiment, the starting time of the second air interface resource block is earlier than the starting time of the first air interface resource block; the starting time of the second air interface resource sub-block is not later than the starting time of the first air interface resource block.

As an embodiment, the starting time of the second air interface resource block is earlier than the starting time of the first air interface resource block; and the starting time of the second air interface resource sub-block is the same as the starting time of the first air interface resource block.

As an embodiment, the start time of the second air interface resource block is earlier than the start time of the first air interface resource block.

As an embodiment, the start time of the second air interface resource block is earlier than the start time of the fourth air interface resource block.

As an embodiment, the starting time of the second air interface resource block is not earlier than the starting time of the first air interface resource block.

As an embodiment, the start time of the second air interface resource block is not earlier than the start time of the fourth air interface resource block.

Example 10

Embodiment 10 illustrates a flowchart of determining whether to transmit the second signal in the second air interface resource block according to an embodiment of the present application, as shown in fig. 10.

In embodiment 10, the first node in the present application determines in step S101 whether the target air interface resource block is the fourth air interface resource block or the first air interface resource block; if it is determined that the target air interface resource block is the fourth air interface resource block, proceeding to step S102 to determine to transmit a second signal in the second air interface resource block; if it is determined that the target air interface resource block is the first air interface resource block, the process proceeds to step S103, where it is determined that the second signal is sent in the second air interface resource block.

In embodiment 10, the second signal carries the second bit block in the present application.

As an embodiment, when the target air interface resource block is the fourth air interface resource block, the first node sends a signal carrying the second bit block in the second air interface resource block.

As one embodiment, when the priority of the second bit block in the present application is the first priority, the first node transmits a second signal in the second air interface resource block; when the priority of the second bit block is not the first priority, the first node discards transmitting the second signal in the second air interface resource block.

Example 11

Embodiment 11 illustrates a schematic diagram of the relationship between the number of bits included in the first bit block, the number of bits included in the fourth bit block, the first number and the number of bits included in the third bit block according to an embodiment of the present application, as shown in fig. 11.

In embodiment 11, the number of bits included in the first bit block and the number of bits included in the fourth bit block are used to determine the first number; the fourth bit block includes a smaller number of bits than the third bit block.

As an embodiment, the seventh bit block in the present application is used to generate the fourth bit block.

As an embodiment, the fourth bit block comprises part of the bits in the seventh bit block.

As an embodiment, the fourth bit block includes an output of some or all bits in the seventh bit block after one or more of a logical and, a logical or, an exclusive or, a delete bit or a zero padding operation.

As an embodiment, the fourth bit block and the third bit block are both bit blocks generated by the seventh bit block.

As an embodiment, the third bit block is used to generate the fourth bit block.

As an embodiment, the fourth bit block comprises part of the bits in the third bit block.

As an embodiment, the fourth bit block includes an output of some or all bits in the third bit block after one or more of a logical and, a logical or, an exclusive or, a delete bit, or a zero padding operation.

As an embodiment, the first number is equal to the sum of the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block.

As an embodiment, a sum of a number of bits comprised by the first bit block and a number of bits comprised by a fourth bit block is used to determine the first number.

Example 12

Embodiment 12 illustrates a block diagram of the processing means in the first node device, as shown in fig. 12. In fig. 12, a first node device processing apparatus 1200 includes a first receiver 1201 and a first transmitter 1202.

As an embodiment, the first node device 1200 is a user device.

As an embodiment, the first node device 1200 is a relay node.

As an embodiment, the first node device 1200 is an in-vehicle communication device.

As an embodiment, the first node device 1200 is a user device supporting V2X communication.

As an embodiment, the first node device 1200 is a relay node supporting V2X communication.

As an example, the first receiver 1201 includes at least one of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As an example, the first receiver 1201 includes at least the first five of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As an example, the first receiver 1201 includes at least the first four of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As an example, the first receiver 1201 includes at least the first three of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As an example, the first receiver 1201 includes at least two of the antenna 452, the receiver 454, the multi-antenna receive processor 458, the receive processor 456, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As one example, the first transmitter 1202 includes at least one of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As one example, the first transmitter 1202 includes at least the first five of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As one example, the first transmitter 1202 includes at least the first four of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As one example, the first transmitter 1202 includes at least the first three of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

As one example, the first transmitter 1202 includes at least a first of the antenna 452, the transmitter 454, the multi-antenna transmitter processor 457, the transmit processor 468, the controller/processor 459, the memory 460, and the data source 467 of fig. 4 of the present application.

In embodiment 12, the first receiver 1201 receives first signaling and second signaling; the first transmitter 1202 sends a first signal in a target air interface resource block, where the first signal carries a first bit block; the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; the second air interface resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, which overlaps with the second air interface resource block in the time domain; a first number is used to determine a fourth air interface resource block, the first number being not less than a number of bits comprised by the first bit block and less than a sum of the number of bits comprised by the first bit block and a number of bits comprised by the third bit block, the fourth air interface resource block and the second air interface resource block being mutually orthogonal in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As an embodiment, the first bit block includes a first type HARQ-ACK; the third bit block includes a second type of HARQ-ACK.

As one embodiment, when the priority of the second bit block is the first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the first priority, the target air interface resource block is the first air interface resource block.

As an embodiment, a fifth air interface resource block is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; the fifth air interface resource block and the third air interface resource block overlap in the time domain.

As one embodiment, the N number ranges respectively correspond to N air interface resource block sets; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is equal to one of the first number range; the first air interface resource block set is an air interface resource block set corresponding to the first quantity range in the N air interface resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

As one embodiment, when the target air interface resource block is the first air interface resource block, the first node discards and sends a signal carrying the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a portion of the second air interface resource block overlapping the first air interface resource block in a time domain.

As an embodiment, the first number is used to determine the fourth air interface resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is associated with the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

As an embodiment, the first signaling is used to determine a first bit block and the second signaling is used to determine a third bit block; the first signaling indicates a first priority, and the second signaling indicates a second priority; the second air interface resource block is reserved for a second bit block; the sum of the number of bits included in the first bit block and the number of bits included in the third bit block is used to determine a first air interface resource block, which overlaps with the second air interface resource block in the time domain; a first number is used to determine a fourth air interface resource block, the first number being not less than a number of bits comprised by the first bit block and less than a sum of the number of bits comprised by the first bit block and a number of bits comprised by the third bit block, the fourth air interface resource block and the second air interface resource block being mutually orthogonal in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used for determining the target air interface resource block from the first air interface resource block and the fourth air interface resource block; when the priority of the second bit block is the first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is the second priority, the target air interface resource block is the first air interface resource block.

As a sub-embodiment of the above embodiment, the first bit block includes UCI corresponding to a priority index of 1, and the second bit block includes UCI corresponding to a priority index of 0.

As a sub-embodiment of the above embodiment, the first bit block includes UCI corresponding to a priority index of 0, and the second bit block includes UCI corresponding to a priority index of 1.

As a sub-embodiment of the above embodiment, the first bit block includes HARQ-ACKs corresponding to priority index 1, and the second bit block includes HARQ-ACKs corresponding to priority index 0.

As a sub-embodiment of the above embodiment, the first bit block includes HARQ-ACKs corresponding to priority index 0, and the second bit block includes HARQ-ACKs corresponding to priority index 1.

As a sub-embodiment of the above embodiment, the second bit block includes one TB or one CB or one CBG.

As a sub-embodiment of the above embodiment, the first priority corresponds to priority index 1, and the second priority corresponds to priority index 0.

As a sub-embodiment of the above embodiment, the first priority corresponds to priority index 0, and the second priority corresponds to priority index 1.

As a sub-embodiment of the above embodiment, a fifth air interface resource block is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; the fifth air interface resource block and the third air interface resource block are overlapped in the time domain; the fifth air interface resource block is orthogonal with the second air interface resource block in the time domain; the second air interface resource block is orthogonal with the third air interface resource block in the time domain.

As a sub-embodiment of the above embodiment, a fifth air interface resource block is reserved for the first bit block; a third air interface resource block is reserved for the third bit block; the fifth air interface resource block and the third air interface resource block are overlapped in the time domain; said first number is equal to said number of bits comprised by said first bit block; the fourth air interface resource block is the fifth air interface resource block; the fifth air interface resource block is orthogonal with the second air interface resource block in the time domain; the second air interface resource block is orthogonal with the third air interface resource block in the time domain.

As a sub-embodiment of the foregoing embodiment, the first air interface resource block includes one PUCCH resource.

As a sub-embodiment of the foregoing embodiment, the fourth air interface resource block includes one PUCCH resource.

As a sub-embodiment of the above embodiment, the third air interface resource block includes one PUCCH resource.

As a sub-embodiment of the above embodiment, the fifth air interface resource block includes one PUCCH resource.

As a sub-embodiment of the foregoing embodiment, the second air interface resource block includes one PUCCH resource.

As a sub-embodiment of the foregoing embodiment, the second air interface resource block includes an air interface resource reserved for one PUSCH transmission.

As a sub-embodiment of the above embodiment, when the target air interface resource block is the fourth air interface resource block, the first node in the present application sends a second signal in the second air interface resource block; when the target air interface resource block is the first air interface resource block, the first node discards and transmits the second signal in the second air interface resource block; the second signal carries the second block of bits.

As a sub-embodiment of the above embodiment, when the target air interface resource block is the fourth air interface resource block, the first node in the present application sends a second signal in the second air interface resource block; when the target air interface resource block is the first air interface resource block, the first node gives up sending the part of the second signal mapped to the second air interface resource sub-block; the second air interface resource sub-block comprises a part of the second air interface resource block, which is overlapped with the time domain resource occupied by the first air interface resource block in the time domain; the second signal carries the second block of bits.

Example 13

Embodiment 13 illustrates a block diagram of the processing means in a second node device, as shown in fig. 13. In fig. 13, the second node device processing apparatus 1300 includes a second transmitter 1301 and a second receiver 1302.

As an embodiment, the second node device 1300 is a user device.

As an embodiment, the second node device 1300 is a base station.

As an embodiment, the second node device 1300 is a relay node.

As one embodiment, the second node apparatus 1300 is an in-vehicle communication apparatus.

As an embodiment, the second node device 1300 is a user device supporting V2X communication.

As an example, the second transmitter 1301 includes at least one of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As one example, the second transmitter 1301 includes at least the first five of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As one example, the second transmitter 1301 includes at least the first four of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As an example, the second transmitter 1301 includes at least the first three of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As one example, the second transmitter 1301 includes at least the first two of the antenna 420, the transmitter 418, the multi-antenna transmit processor 471, the transmit processor 416, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As an example, the second receiver 1302 includes at least one of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As one example, the second receiver 1302 includes at least the first five of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As one example, the second receiver 1302 includes at least the first four of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As one example, the second receiver 1302 includes at least three of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

As one example, the second receiver 1302 includes at least the first two of the antenna 420, the receiver 418, the multi-antenna receive processor 472, the receive processor 470, the controller/processor 475, and the memory 476 of fig. 4 of the present application.

In embodiment 13, the second transmitter 1301 transmits a first signaling and a second signaling; the first receiver 1302 receives a first signal in a target air interface resource block, where the first signal carries a first bit block; the first signaling is used to determine the first block of bits and the second signaling is used to determine a third block of bits; the second air interface resource block is reserved for a second bit block; the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, which overlaps with the second air interface resource block in the time domain; a first number is used to determine a fourth air interface resource block, the first number being not less than a number of bits comprised by the first bit block and less than a sum of the number of bits comprised by the first bit block and a number of bits comprised by the third bit block, the fourth air interface resource block and the second air interface resource block being mutually orthogonal in a time domain; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

As one embodiment, when the target air interface resource block is the first air interface resource block, the second node does not perform signal reception for the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a portion of the second air interface resource block overlapping the first air interface resource block in a time domain.

Those of ordinary skill in the art will appreciate that all or a portion of the steps of the above-described methods may be implemented by a program that instructs associated hardware, and the program may be stored on a computer readable storage medium, such as a read-only memory, a hard disk or an optical disk. Alternatively, all or part of the steps of the above embodiments may be implemented using one or more integrated circuits. Accordingly, each module unit in the above embodiment may be implemented in a hardware form or may be implemented in a software functional module form, and the present application is not limited to any specific combination of software and hardware. The first node device in the application comprises, but is not limited to, a mobile phone, a tablet computer, a notebook computer, an internet card, a low-power consumption device, an eMTC device, an NB-IoT device, a vehicle-mounted communication device, an aircraft, an airplane, an unmanned plane, a remote control airplane and other wireless communication devices. The second node device in the application comprises, but is not limited to, a mobile phone, a tablet computer, a notebook computer, an internet card, a low-power consumption device, an eMTC device, an NB-IoT device, a vehicle-mounted communication device, an aircraft, an airplane, an unmanned plane, a remote control airplane and other wireless communication devices. The user equipment or the UE or the terminal in the application comprises, but is not limited to, mobile phones, tablet computers, notebooks, network cards, low-power consumption equipment, eMTC equipment, NB-IoT equipment, vehicle-mounted communication equipment, aircrafts, planes, unmanned planes, remote control planes and other wireless communication equipment. The base station device or the base station or the network side device in the present application includes, but is not limited to, wireless communication devices such as macro cell base stations, micro cell base stations, home base stations, relay base stations, enbs, gnbs, transmission receiving nodes TRP, GNSS, relay satellites, satellite base stations, air base stations, and the like.

The foregoing description is only of the preferred embodiments of the present application, and is not intended to limit the scope of the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. A first node device for wireless communication, comprising:

a first receiver that receives first signaling including DCI and second signaling used to determine a third bit block;

a first transmitter for transmitting a first signal in a target air interface resource block, the first signal carrying a first bit block, the first signal being used to determine the first bit block;

wherein the number of bits included in the first bit block and the number of bits included in the third bit block are used to determine a first air interface resource block, the first air interface resource block includes a PUCCH resource, and the first air interface resource block overlaps with a second air interface resource block in a time domain; a first number is used to determine a fourth air interface resource block, the fourth air interface resource block comprising one PUCCH resource, the first number being not less than a number of bits comprised by the first bit block and less than a sum of a number of bits comprised by the first bit block and a number of bits comprised by the third bit block, the fourth air interface resource block and the second air interface resource block being mutually orthogonal in a time domain; the second air interface resource block is reserved for a second bit block; the target air interface resource block is the first air interface resource block or the fourth air interface resource block, and the priority of the second bit block is used to determine the target air interface resource block from the first air interface resource block and the fourth air interface resource block.

2. The first node device of claim 1, wherein the first bit block comprises a positive integer number of ACKs or NACKs, the second bit block comprises one TB, the third bit block comprises an SR, and the second air interface resource block comprises an air interface resource occupied by one PUSCH.

3. The first node device of claim 1 or 2, wherein the first bit block comprises a first type of HARQ-ACK comprising HARQ-ACKs corresponding to priority index 1, and wherein the third bit block comprises SRs corresponding to priority index 1.

4. A first node device according to any of claims 1-3, characterized in that when the priority of the second bit block is a first priority, the target air interface resource block is the fourth air interface resource block; when the priority of the second bit block is not the first priority, the target air interface resource block is the first air interface resource block; the first priority and the second priority are respectively different priorities, the priority index of the first priority is equal to 0, and the priority index of the second priority is equal to 1.

5. The first node device according to any of claims 1-4, wherein the N number ranges correspond to N sets of air interface resource blocks, respectively; the first number range is one of the N number ranges; the sum of the number of bits comprised by the first bit block and the number of bits comprised by the third bit block is equal to one of the first number range; the first air interface resource block set is an air interface resource block set corresponding to the first quantity range in the N air interface resource block sets; the first set of air interface resource blocks includes the first air interface resource block.

6. The first node device according to any of claims 1-5, wherein when the target air interface resource block is the first air interface resource block, the first node discards transmitting a signal carrying the second bit block in a second air interface resource sub-block; the second air interface resource sub-block is a portion of the second air interface resource block overlapping the first air interface resource block in a time domain.

7. The first node device of any of claims 1 to 6, wherein the first number is used to determine the fourth air interface resource block; the number of bits comprised by the first bit block and the number of bits comprised by the fourth bit block are used to determine the first number; the fourth bit block is associated with the third bit block; the fourth bit block includes a smaller number of bits than the third bit block.

8. A second node device for wireless communication, comprising:

a second transmitter to transmit first signaling including DCI and second signaling used to determine a third bit block;

A second receiver for receiving a first signal in a target air interface resource block, the first signal carrying a first bit block, the first signal being used to determine the first bit block;

9. A method in a first node for wireless communication, comprising:

receiving first signaling and second signaling, the first signaling comprising DCI, the second signaling being used to determine a third block of bits;

transmitting a first signal in a target air interface resource block, the first signal carrying a first bit block, the first signal being used to determine the first bit block;

10. A method in a second node for wireless communication, comprising:

transmitting first signaling and second signaling, the first signaling comprising DCI, the second signaling being used to determine a third bit block;

receiving a first signal in a target air interface resource block, the first signal carrying a first bit block, the first signal being used to determine the first bit block;