CN114094846B - Synchronous rectification control circuit for realizing high-stability parallel application - Google Patents
Synchronous rectification control circuit for realizing high-stability parallel application Download PDFInfo
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- CN114094846B CN114094846B CN202111400171.XA CN202111400171A CN114094846B CN 114094846 B CN114094846 B CN 114094846B CN 202111400171 A CN202111400171 A CN 202111400171A CN 114094846 B CN114094846 B CN 114094846B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/02—Conversion of ac power input into dc power output without possibility of reversal
- H02M7/04—Conversion of ac power input into dc power output without possibility of reversal by static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/32—Means for protecting converters other than automatic disconnection
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/36—Means for starting or stopping converters
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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- Power Engineering (AREA)
- Dc-Dc Converters (AREA)
- Rectifiers (AREA)
Abstract
The invention relates to the technical field of synchronous rectification of switching power supplies, in particular to a synchronous rectification control circuit for realizing high-stability parallel application.
Description
Technical Field
The invention relates to the technical field of synchronous rectification of switching power supplies, in particular to a synchronous rectification control circuit for realizing high-stability parallel application.
Background
With the development of the current switching power supply technology, the application output current is larger and the requirements on the temperature and the efficiency of the system are higher, in order to improve the efficiency, two degaussing loop improvement modes are generally adopted, one of the two degaussing loop improvement modes adopts a plurality of Schottky circuits connected in parallel, and the other one adopts a synchronous rectification circuit with smaller conduction internal resistance.
When the system needs to output more than 10A of current, a plurality of Schottky devices are used in parallel, but the Schottky devices have inherent conduction voltage drop, the larger the current is, the larger the conduction loss is, when 10A is output, the loss reaches 4W, and when 20A of current is output, the loss reaches 8W; when the small current is less than 5A, a single synchronous rectification circuit can be adopted to replace Schottky, and when the large current works, for example, when a system works at 10A, the peak current can reach more than 40A, the conduction internal resistance of the synchronous rectification power tube is 10mΩ, the conduction voltage drop is 400mV, and the meaning of adopting synchronous rectification is lost when the synchronous rectification power tube is close to the conduction voltage drop in the application of parallel Schottky.
The synchronous rectification circuit cannot bear such large current, and the phenomenon that instant current is impacted on a single synchronous rectification circuit to cause burnout occurs due to the fact that the synchronous rectification circuit cannot be simultaneously opened and cannot be simultaneously closed when the synchronous rectification circuit is forcibly connected in parallel.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the synchronous rectification control circuit realizes high-stability parallel application, accurately achieves synchronous opening and synchronous closing of a plurality of synchronous rectification circuits, and realizes high-reliability parallel application during ultra-large current output.
In order to solve the technical problems, the invention adopts the following technical scheme:
a synchronous rectification control circuit for realizing high-stability parallel application comprises a primary side controller, a transformer and a capacitor C 1 And resistance R 1 The synchronous rectification circuit comprises a power tube N 1 The DRV port of the main control unit and the power tube N 1 Is electrically connected with the grid electrode of the transistor; the input end of the main control unit and the power tube N 1 Is electrically connected to the drain electrode of the transistor; the S end of the main control unit is provided with the power tube N 1 Is electrically connected to the source electrode of the transistor;
the main control unit comprises an opening detection unit, a closing detection unit, a parallel opening detection unit, a parallel closing detection unit and an output control unit, wherein the opening detection unit comprises an opening control unit, a reference power supply and a field effect transistor SW 1 Resistance R 2 And resistance R 3 The resistance R 2 Is electrically connected with the reference power supply, the resistor R 2 The other end of the switch is respectively connected with the output end of the switch-on detection unit and the resistor R 3 Is electrically connected with one end of the resistor R 3 Is connected with the other end of the field effect tube SW 1 Is electrically connected with the drain electrode of the field effect transistor SW 1 Is grounded, the field effect tube SW 1 Is electrically connected with one end of the opening control unit,the other end of the starting control unit is electrically connected with the input end of the main control unit;
resistor R 1 And resistance R 2 The resistance values of (2) are the same;
the output ends of more than two opening detection units are connected in parallel;
the closing detection unit comprises a closing control unit, a reference power supply and a field effect transistor SW 2 And resistance R 4 The resistance R 4 Is electrically connected with the reference power supply, the resistor R 4 The other end of the switch is respectively connected with the output end of the switch-off detection unit and the field effect tube SW 2 Is electrically connected with the drain electrode of the field effect transistor SW 2 Is grounded, the field effect tube SW 2 The grid electrode of the closing control unit is electrically connected with one end of the closing control unit, and the other end of the closing control unit is electrically connected with the input end of the main control unit;
the output ends of more than two closing detection units are connected in parallel;
the input end of the parallel opening detection unit is electrically connected with the output end of the opening detection unit, the input end of the parallel closing detection unit is electrically connected with the output end of the closing detection unit, the output end of the parallel opening detection unit and the output end of the parallel closing detection unit are respectively electrically connected with the input end of the output control unit, and the output end of the output control unit is electrically connected with the DRV port of the main control unit.
Further, the output end of the primary side controller is electrically connected with the primary side winding of the transformer, one end of the secondary side winding of the transformer is electrically connected with the input end of the synchronous rectification circuit, and the other end of the secondary side winding of the transformer is electrically connected with the resistor R 1 Is electrically connected with one end of the resistor R 1 The other end of the capacitor C is electrically connected with the output end of the synchronous rectification circuit 1 And the resistance R 1 Connected in parallel.
Further, the start control unit includes a negative level fast comparator, and a positive input end of the negative level fast comparator is externally connected with a referenceThe negative input end of the negative level fast comparator is electrically connected with the input end of the main control unit, and the output end of the negative level fast comparator is connected with the field effect tube SW 1 Is electrically connected to the gate of (c).
Further, the turn-off control unit comprises a low-offset mV (mV) comparator, wherein the positive input end of the low-offset mV comparator is electrically connected with the input end of the main control unit, the negative input end of the low-offset mV comparator is externally connected with a reference voltage, and the output end of the low-offset mV comparator is connected with the field effect transistor SW 2 Is electrically connected to the gate of (c).
Further, the parallel connection opening detection unit comprises a first comparator, the positive input end of the first comparator is electrically connected with the output end of the opening detection unit, the negative input end of the first comparator is externally connected with a reference voltage, and the output end of the first comparator is electrically connected with the input end of the output control unit.
Further, the parallel closing detection unit comprises a second comparator, the positive input end of the second comparator is electrically connected with the output end of the closing detection unit, the negative input end of the second comparator is externally connected with a reference voltage, and the output end of the second comparator is electrically connected with the input end of the output control unit.
Further, the field effect transistor SW 1 Is of the type of an enhanced NMOS tube and a field effect tube SW 2 Is an enhanced NMOS tube, the reference power supply is 2.V 1 。
Further, the power tube N 1 The on-resistance is 5-20mΩ for high-voltage NMOS transistor.
The invention has the beneficial effects that:
the synchronous rectification control circuit for realizing high-stability parallel application comprises an opening detection unit, a closing detection unit, a parallel opening detection unit, a parallel closing detection unit and an output control unit, wherein the opening control signals of all parallel synchronous rectification circuits are detected by using parallel connected A ports, the closing control signals of all parallel synchronous rectification circuits are detected by using parallel connected B ports, the output control unit is controlled to provide corresponding driving level and driving current for a power tube, the synchronous opening and the synchronous closing of the circuit are accurately realized, and the high-reliability parallel application during the output of ultra-large current is realized.
Drawings
FIG. 1 is a schematic diagram of a synchronous rectification control circuit for implementing high-stability parallel application according to the present invention;
FIG. 2 is a schematic diagram of a synchronous rectification circuit unit of a synchronous rectification control circuit for realizing high-stability parallel application according to the present invention;
FIG. 3 is a schematic diagram of a master control unit of a synchronous rectification control circuit for realizing high-stability parallel application according to the present invention;
FIG. 4 is a schematic diagram of a start detection unit of a synchronous rectification control circuit for realizing high-stability parallel application according to the present invention;
FIG. 5 is a schematic diagram of a shutdown detection unit of a synchronous rectification control circuit for implementing high-stability parallel application according to the present invention;
FIG. 6 is a schematic diagram of a start control unit of a synchronous rectification control circuit for realizing high-stability parallel application according to the present invention;
FIG. 7 is a schematic diagram of a shutdown control unit of a synchronous rectification control circuit for implementing high-stability parallel application according to the present invention;
FIG. 8 is a schematic diagram of a parallel on detection unit of a synchronous rectification control circuit for implementing high-stability parallel application according to the present invention;
FIG. 9 is a schematic diagram of a parallel shutdown detection unit of a synchronous rectification control circuit for implementing high-stability parallel application according to the present invention;
description of the reference numerals:
SW: the input end of the main control unit;
s: the output end of the main control unit;
a: starting an output end of the detection unit;
b: closing the output end of the detection unit;
CP 1 : a negative level fast comparator;
CP 2 : low and lowA detuned mV comparator;
CP 3 : a first comparator;
CP 4 : and a second comparator.
Detailed Description
In order to describe the technical contents, the achieved objects and effects of the present invention in detail, the following description will be made with reference to the embodiments in conjunction with the accompanying drawings.
Referring to fig. 1 to 9, a synchronous rectification control circuit for realizing high-stability parallel application comprises a primary side controller, a transformer, and a capacitor C 1 And resistance R 1 The synchronous rectification circuit comprises a power tube N 1 The DRV port of the main control unit and the power tube N 1 Is electrically connected with the grid electrode of the transistor; the input end of the main control unit and the power tube N 1 Is electrically connected to the drain electrode of the transistor; the S end of the main control unit is provided with the power tube N 1 Is electrically connected to the source electrode of the transistor;
the main control unit comprises an opening detection unit, a closing detection unit, a parallel opening detection unit, a parallel closing detection unit and an output control unit, wherein the opening detection unit comprises an opening control unit, a reference power supply and a field effect transistor SW 1 Resistance R 2 And resistance R 3 The resistance R 2 Is electrically connected with the reference power supply, the resistor R 2 The other end of the switch is respectively connected with the output end of the switch-on detection unit and the resistor R 3 Is electrically connected with one end of the resistor R 3 Is electrically connected with the drain electrode of the field effect tube SW1, the field effect tube SW 1 Is grounded, the field effect tube SW 1 The grid electrode of the opening control unit is electrically connected with one end of the opening control unit, and the other end of the opening control unit is electrically connected with the input end of the main control unit;
resistor R 1 And resistance R 2 The resistance values of (2) are the same;
the output ends of more than two opening detection units are connected in parallel;
the closing detection unit comprises closingControl unit, reference power supply and field effect transistor SW 2 And resistance R 4 The resistance R 4 Is electrically connected with the reference power supply, the resistor R 4 The other end of the switch is respectively connected with the output end of the switch-off detection unit and the field effect tube SW 2 Is electrically connected with the drain electrode of the field effect transistor SW 2 Is grounded, the field effect tube SW 2 The grid electrode of the closing control unit is electrically connected with one end of the closing control unit, and the other end of the closing control unit is electrically connected with the input end of the main control unit;
the output ends of more than two closing detection units are connected in parallel;
the input end of the parallel opening detection unit is electrically connected with the output end of the opening detection unit, the input end of the parallel closing detection unit is electrically connected with the output end of the closing detection unit, the output end of the parallel opening detection unit and the output end of the parallel closing detection unit are respectively electrically connected with the input end of the output control unit, and the output end of the output control unit is electrically connected with the DRV port of the main control unit.
From the above description, the beneficial effects of the invention are as follows: the synchronous rectification control circuit for realizing high-stability parallel application comprises an opening detection unit, a closing detection unit, a parallel opening detection unit, a parallel closing detection unit and an output control unit, wherein the opening control signals of all parallel synchronous rectification circuits are detected by using parallel connected A ports, the closing control signals of all parallel synchronous rectification circuits are detected by using parallel connected B ports, the output control unit is controlled to provide corresponding driving level and driving current for a power tube, the synchronous opening and the synchronous closing of the circuit are accurately realized, and the high-reliability parallel application during the output of ultra-large current is realized.
Further, the output end of the primary side controller is electrically connected with the primary side winding of the transformer, one end of the secondary side winding of the transformer is electrically connected with the input end of the synchronous rectification circuit, and the other end of the secondary side winding of the transformer is electrically connected with the resistor R 1 Is electrically connected with one end ofThe resistance R 1 The other end of the capacitor C is electrically connected with the output end of the synchronous rectification circuit 1 And the resistance R 1 Connected in parallel.
From the above description, it is known that by this circuit, an initial signal is transmitted for a subsequent partial circuit.
Further, the start control unit includes a negative level fast comparator, the positive input end of the negative level fast comparator is externally connected with a reference voltage, the negative input end of the negative level fast comparator is electrically connected with the input end of the main control unit, and the output end of the negative level fast comparator is electrically connected with the field effect transistor SW 1 Is electrically connected to the gate of (c).
As is apparent from the above description, whether or not an on signal is issued is judged by the on control unit.
Further, the turn-off control unit comprises a low-offset mV (mV) comparator, wherein the positive input end of the low-offset mV comparator is electrically connected with the input end of the main control unit, the negative input end of the low-offset mV comparator is externally connected with a reference voltage, and the output end of the low-offset mV comparator is connected with the field effect transistor SW 2 Is electrically connected to the gate of (c).
As is apparent from the above description, by the closing control unit, it is judged whether or not a closing signal is issued.
Further, the parallel connection opening detection unit comprises a first comparator, the positive input end of the first comparator is electrically connected with the output end of the opening detection unit, the negative input end of the first comparator is externally connected with a reference voltage, and the output end of the first comparator is electrically connected with the input end of the output control unit.
As is apparent from the above description, the parallel on signal is detected by the parallel on detection unit.
Further, the parallel closing detection unit comprises a second comparator, the positive input end of the second comparator is electrically connected with the output end of the closing detection unit, the negative input end of the second comparator is externally connected with a reference voltage, and the output end of the second comparator is electrically connected with the input end of the output control unit.
As is apparent from the above description, the parallel shutdown signal is detected by the parallel shutdown detection unit.
Further, the field effect transistor SW 1 Is of the type of an enhanced NMOS tube and a field effect tube SW 2 Is an enhanced NMOS tube, the reference power supply is 2.V 1 。
Further, the power tube N 1 The on-resistance is 5-20mΩ for high-voltage NMOS transistor.
Referring to fig. 1 to 9, a first embodiment of the present invention is as follows:
the invention provides a synchronous rectification control circuit for realizing high-stability parallel application, which comprises a primary side controller, a transformer L and a capacitor C 1 And resistance R 1 The synchronous rectification circuit is connected with the power supply circuit in parallel;
in this embodiment, the reference power supply is 2.V 1 ；
In this embodiment, as shown in fig. 1, the output end of the primary side controller is connected with the primary side winding L of the transformer p Electrically connected with the secondary winding L of the transformer s Is electrically connected with the input end of the synchronous rectification circuit, and the secondary winding L of the transformer s And the other end of the resistor R 1 Is electrically connected with one end of the resistor R 1 The other end of the capacitor C is electrically connected with the output end of the synchronous rectification circuit 1 And the resistance R 1 Connected in parallel;
in this embodiment, as shown in fig. 2, the synchronous rectification circuit includes a power tube N 1 The DRV port of the main control unit and the power tube N 1 Is electrically connected to the gate G of (a); the input end SW of the main control unit and the power tube N 1 Is electrically connected to the drain D of (a); the output end S of the main control unit and the power tube N 1 Is electrically connected to the source S of (a);
in this embodiment, as shown in fig. 3, the main control unit includes an on detection unit, an off detection unit, a parallel on detection unit, a parallel off detection unit, and an output control unit;
in the present embodiment, as shown in FIGS. 8 to9, the parallel turn-on detection unit includes a first comparator CP 3 The parallel shutdown detection unit includes a second comparator CP 4 ；
The first comparator CP 3 The positive input end of the second comparator CP is electrically connected with the output end A of the opening detection unit 4 Is electrically connected with the output end B of the closing detection unit, the first comparator CP 3 And the second comparator CP 4 The output end of the output control unit is electrically connected with the DRV port of the main control unit, and the output end of the output control unit is electrically connected with the output end S of the main control unit;
in the present embodiment, as shown in fig. 8 to 9, the first comparator CP 3 Is externally connected with reference voltage V at the negative input end 1 The second comparator CP 4 The negative input end of the voltage transformer is externally connected with a reference voltage D which is smaller than 100mV, when the voltage of the end A is lower than V 1 At the time, the first comparator CP 3 A second comparator CP outputting a low level when the voltage at the B terminal is lower than the reference voltage D 4 Outputting a low level;
first comparator CP 3 And a second comparator CP 4 The structure of the device can be a comparator formed by MOS tubes, a comparator formed by triodes, or a comparator formed by mixing MOS tubes and triodes, and the device mainly completes the comparison function;
in the present embodiment, as shown in FIG. 4, the ON detecting unit includes an ON control unit, a reference power supply 2.V 1 Field effect transistor SW 1 Resistance R 2 And resistance R 3 ；
In the present embodiment, as shown in fig. 6, the on control unit includes a negative level fast comparator CP 1 ；
The resistor R 2 One end of (2) is connected with the reference power supply 2.V 1 Electrically connected with the resistor R 2 The other end of the switch is respectively connected with the output end A of the switch-on detection unit and the resistor R 3 Is electrically connected with one end of the resistor R 3 Is connected with the other end of the field effect tube SW 1 Is electrically connected with the drain electrode of the field effect transistor SW 1 The source of the main control unit is grounded, the input end SW of the main control unit is connected with the negative level fast comparator CP 1 Is electrically connected with the negative input end of the field effect tube SW 1 Gate and negative level fast comparator CP 1 Is electrically connected with the output end of the power supply;
resistor R 1 And resistance R 2 The resistance values of (2) are the same;
the output ends A of more than two opening detection units are connected in parallel;
in the present embodiment, as shown in fig. 6, the negative level fast comparator CP 1 The positive input end of (1) is externally connected with reference voltage-300 Mv, when the SW voltage is lower than-300 Mv, the negative level fast comparator CP 1 Turning over and outputting a high level;
negative level fast comparator CP 1 The structure of the device can be a comparator formed by MOS tubes, a comparator formed by triodes, or a comparator formed by mixing MOS tubes and triodes, and the device mainly completes the comparison function;
in the present embodiment, as shown in FIG. 5, the off detection unit includes an off control unit, a reference power supply 2.V 1 Field effect transistor SW 2 And resistance R 2 ；
In this embodiment, as shown in FIG. 7, the off control unit includes a low offset mV comparator CP 2 ；
The resistor R 4 One end of (2) is connected with the reference power supply 2.V 1 Electrically connected with the resistor R 4 The other end of the switch-off detection unit is respectively connected with the output end B of the switch-off detection unit and the field effect transistor SW 2 Is electrically connected with the drain electrode of the field effect transistor SW 2 Is grounded, the field effect tube SW 2 Gate of (c) and low offset mV comparator CP 2 The output end of the low offset mV comparator CP is electrically connected with 2 The positive input end of the main control unit is electrically connected with the input end SW of the main control unit;
the output ends B of more than two closing detection units are connected in parallel;
in the present embodiment, asFIG. 7 shows the low offset mV comparator CP 2 The negative input terminal of (a) is externally connected with a reference voltage kmV, k ranges from 1 to 4, and when the SW voltage is higher than kmV, the low-offset mV comparator CP 2 Turning over and outputting a high level;
low offset mV comparator CP 2 The structure of the device can be a comparator formed by MOS tubes, a comparator formed by triodes, or a comparator formed by mixing MOS tubes and triodes, and the device mainly completes the comparison function;
in this embodiment, the field effect transistor SW 1 Is NMOS transistor, field effect transistor SW 2 Is NMOS tube, the power tube N 1 The type of the transistor is NMOS transistor, the on-resistance ranges from 5 mΩ to 20mΩ, and the resistance R 1 Resistance value of 5KΩ, resistance R 2 The resistance value of (2) is 100KΩ, resistance R 3 The resistance value of (2) is 100KΩ, resistance R 4 Resistance of 100KΩ, capacitance C 1 The capacitance value of (2) is 1mF;
resistor R 1 The resistance value of (2) is not limited to 5KΩ, and ranges from 500 to 10KΩ;
resistor R 2 、R 3 The resistance value of (2) is not limited to 100KΩ, and satisfies R 2 ＝R 3 Under the condition that the resistance R 4 The resistance value of (2) is not limited to 100KΩ, and is in the range of 10K-1MΩ.
Working principle: the parallel connection opening detection unit detects opening control signals of all parallel synchronous rectification circuits through the voltage of the port A, and when all synchronous rectification circuits do not send out opening signals, the voltage of the port A in parallel connection is 2.V 1 When all synchronous rectification circuits send out an opening signal, the voltage of the parallel port A is V 1 When a part of synchronous rectification circuits do not send synchronous rectification starting signals, the voltage of the parallel port A is V 1 To 2.V 1 All synchronous rectification circuits are not started at the moment, and the voltage of the parallel port A is V only 1 When the synchronous rectification circuits are started, the output control unit starts the power tube N of the synchronous rectification circuits in the locking time of 1-2us 1 Ensure all of andthe synchronous safety opening is carried out, and after the locking period, a closing signal is detected through a port B;
the parallel closing detection unit detects closing control signals of all synchronous rectification circuits connected in parallel through the port B, and when all synchronous rectification circuits do not send out closing signals, the voltage of the port A connected in parallel is 2.V 1 When one parallel synchronous rectification circuit sends a closing signal, the closing signal is locked at the moment, the locking time is 0.4-1us, the parallel port B is immediately pulled down to 0V, at the moment, a control signal for closing all the parallel synchronous rectification circuits is sent out, and all the parallel synchronous rectification circuits are closed. The power tube N of the power tube is closed in the locking time by the output control unit 1 All the synchronous rectification circuits connected in parallel are guaranteed, and when only one synchronous sending closing signal exists, all the synchronous sending closing signals are immediately locked, and all the synchronous sending closing signals are guaranteed to be closed simultaneously. After the locking period, the synchronous rectification circuit detects an opening signal through an A port;
the output control unit provides corresponding driving level and driving current for the power tube, and the opening and closing speeds are controlled within 5 ns.
The foregoing description is only illustrative of the present invention and is not intended to limit the scope of the invention, and all equivalent changes made by the specification and drawings of the present invention, or direct or indirect application in the relevant art, are included in the scope of the present invention.
Claims (8)
1. A synchronous rectification control circuit for realizing high-stability parallel application comprises a primary side controller, a transformer and a capacitor C 1 And resistance R 1 The power supply is characterized by further comprising more than two synchronous rectification circuits which are mutually connected in parallel, wherein the synchronous rectification circuits comprise power tubes N 1 The DRV port of the main control unit and the power tube N 1 Is electrically connected with the grid electrode of the transistor; the input end of the main control unit and the power tube N 1 Is electrically connected to the drain electrode of the transistor; the S end of the main control unit is provided with the power tube N 1 Is electrically connected to the source electrode of the transistor;
the main control unit comprisesThe on-state detection unit comprises an on-state control unit, a reference power supply and a field effect transistor SW 1 Resistance R 2 And resistance R 3 The resistance R 2 Is electrically connected with the reference power supply, the resistor R 2 The other end of the switch is respectively connected with the output end of the switch-on detection unit and the resistor R 3 Is electrically connected with one end of the resistor R 3 Is connected with the other end of the field effect tube SW 1 Is electrically connected with the drain electrode of the field effect transistor SW 1 Is grounded, the field effect tube SW 1 The grid electrode of the opening control unit is electrically connected with one end of the opening control unit, and the other end of the opening control unit is electrically connected with the input end of the main control unit;
resistor R 2 And resistance R 3 The resistance values of (2) are the same;
the output ends of more than two opening detection units are connected in parallel;
the closing detection unit comprises a closing control unit, a reference power supply and a field effect transistor SW 2 And resistance R 4 The resistance R 4 Is electrically connected with the reference power supply, the resistor R 4 The other end of the switch is respectively connected with the output end of the switch-off detection unit and the field effect tube SW 2 Is electrically connected with the drain electrode of the field effect transistor SW 2 Is grounded, the field effect tube SW 2 The grid electrode of the closing control unit is electrically connected with one end of the closing control unit, and the other end of the closing control unit is electrically connected with the input end of the main control unit;
the output ends of more than two closing detection units are connected in parallel;
the input end of the parallel opening detection unit is electrically connected with the output end of the opening detection unit, the input end of the parallel closing detection unit is electrically connected with the output end of the closing detection unit, the output end of the parallel opening detection unit and the output end of the parallel closing detection unit are respectively electrically connected with the input end of the output control unit, and the output end of the output control unit is electrically connected with the DRV port of the main control unit.
2. The synchronous rectification control circuit for realizing high-stability parallel application as claimed in claim 1, wherein an output end of said primary side controller is electrically connected with a primary side winding of said transformer, one end of a secondary side winding of said transformer is electrically connected with an input end of said synchronous rectification circuit, and the other end of said secondary side winding of said transformer is electrically connected with said resistor R 1 Is electrically connected with one end of the resistor R 1 The other end of the capacitor C is electrically connected with the output end of the synchronous rectification circuit 1 And the resistance R 1 Connected in parallel.
3. The synchronous rectification control circuit for realizing high-stability parallel application as claimed in claim 1, wherein said start control unit comprises a negative level fast comparator, the external reference voltage of the positive input end of said negative level fast comparator is-300 mV, the negative input end of said negative level fast comparator is electrically connected with the input end of the main control unit, the output end of said negative level fast comparator is connected with the field effect transistor SW 1 Is electrically connected to the gate of (c).
4. The synchronous rectification control circuit for realizing high-stability parallel application as claimed in claim 1, wherein said turn-off control unit comprises a low-offset mV comparator, a positive input end of said low-offset mV comparator is electrically connected with an input end of said main control unit, a negative input end of said low-offset mV comparator is externally connected with a reference voltage of 1-4mV, an output end of said low-offset mV comparator is connected with a field effect transistor SW 2 Is electrically connected to the gate of (c).
5. The synchronous rectification control circuit for realizing high-stability parallel application as claimed in claim 1, wherein said parallel turn-on detection unit comprises a first comparator, a positive input end of said first comparator is electrically connected with an output end of said turn-on detection unit, and a negative input end of said first comparator is externally connected with a reference voltage V 1 The sum ofThe output end of the first comparator is electrically connected with the input end of the output control unit.
6. The synchronous rectification control circuit for realizing high-stability parallel application according to claim 1, wherein the parallel shutdown detection unit comprises a second comparator, a positive input end of the second comparator is electrically connected with an output end of the shutdown detection unit, a negative input end of the second comparator is externally connected with a reference voltage D, the reference voltage D is smaller than 100mV, and an output end of the second comparator is electrically connected with an input end of the output control unit.
7. The synchronous rectification control circuit for realizing high-stability parallel application as claimed in claim 1, wherein said field effect transistor SW is 1 Is of the type of an enhanced NMOS tube and a field effect tube SW 2 Is an enhanced NMOS tube, the reference power supply is 2.V 1 。
8. The synchronous rectification control circuit for realizing high-stability parallel application as claimed in claim 1, wherein said power tube N 1 The on-resistance is 5-20mΩ for high-voltage NMOS transistor.
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