CN114090119A - Control flow checking method, device, equipment and storage medium - Google Patents

Control flow checking method, device, equipment and storage medium Download PDF

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Publication number
CN114090119A
CN114090119A CN202111356574.9A CN202111356574A CN114090119A CN 114090119 A CN114090119 A CN 114090119A CN 202111356574 A CN202111356574 A CN 202111356574A CN 114090119 A CN114090119 A CN 114090119A
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code
code block
control flow
current
block
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薛冰
徐大鹏
张锋瑞
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Traffic Control Technology TCT Co Ltd
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Traffic Control Technology TCT Co Ltd
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment
    • G06F11/3466—Performance evaluation by tracing or monitoring
    • G06F11/3495—Performance evaluation by tracing or monitoring for systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/445—Program loading or initiating
    • G06F9/44589—Program code verification, e.g. Java bytecode verification, proof-carrying code

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  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The embodiment of the disclosure provides a control flow checking method, a control flow checking device and a storage medium. The method comprises the steps of acquiring a static signature and a supervisory code of a previous code block when a program jumps to a current code block; according to the adjusting code of the current code block and the supervision code of the previous code block, executing check operation, and judging whether a control flow error occurs according to the result of the check operation; if the check is passed, judging whether a control flow error occurs according to the supervision code of the current code block generated by the check operation and the static signature of the current code block; wherein, the static signatures of the code blocks are prime numbers which are different from each other; the adjusting code of the code block is the product of the static signature of the code block and the static signature of the previous code block of the code block in a target sequence, and the target sequence is the sequence of the serial number identification of the code block from small to large from head to tail. In this way, the jump sequence of the program among the control nodes can be supervised, and the control flow error can be accurately detected.

Description

Control flow checking method, device, equipment and storage medium
Technical Field
The present disclosure relates to the field of industrial control, and more particularly, to the field of control flow verification techniques.
Background
For a high-reliability system running for a long time, it is very important to verify whether a program code is executed according to a correct control flow sequence, and the program is generally divided into a plurality of code modules, so that the execution of the program can be regarded as continuous jump among the code modules, and at present, an algorithm generally adopts control flow verification based on XOR operation random collision, but for the high-reliability system and a safety critical system, such as a rail transit signal system device, the existing control flow verification algorithm cannot meet the requirements.
Disclosure of Invention
The disclosure provides a method, an apparatus, a device and a storage medium for controlling flow verification.
According to a first aspect of the present disclosure, an embodiment of the present disclosure provides a control flow verification method, including:
when the program jumps to the current code block; acquiring a static signature and a supervision code of a previous code block;
according to the adjusting code of the current code block and the supervision code of the previous code block, executing check operation, and judging whether a control flow error occurs according to a check operation result;
if the check is passed, judging whether a control flow error occurs according to a supervision code of the current code block generated by the check operation and a static signature of the current code block; wherein, the static signatures of the code blocks are prime numbers which are different from each other; the adjusting code of the code block is the product of the static signature of the code block and the static signature of the previous code block in the target sequence of the code block, and the target sequence is the sequence of the serial number identification of the code block from small to large.
The foregoing aspects and any possible implementations further provide an implementation that generates a supervisory code of a current code block according to a check operation, including:
and taking the quotient of the adjusting code of the current code block and the supervisory code of the previous code block as the supervisory code of the current code block.
The foregoing aspects and any possible implementations further provide an implementation that determines whether a control flow error occurs according to a check operation result, including:
when the adjusting code of the current code block can be evenly divided by the supervisory code of the previous code block, the verification is passed;
when the adjust code of the current code block cannot be exactly divided by the supervisory code of the previous code block, the control flow jumps erroneously.
The foregoing aspects and any possible implementation manners further provide an implementation manner for determining whether a control flow error occurs according to a monitor code of a current code block generated by a checking operation and a static signature of the current code block, where the implementation manner includes:
when the generated supervision code of the current code block is equal to the static signature of the current code block, the control flow jumps correctly;
and when the generated supervisory code of the current code block is not equal to the static signature of the current code block, controlling the flow jump to be wrong.
The above-described aspects and any possible implementations further provide an implementation, and the method further includes:
the program is divided into a plurality of code modules which are executed in sequence, and a static signature and an adjusting code are set for each code module.
According to a second aspect of the present disclosure, an embodiment of the present disclosure provides a control flow verification apparatus, including:
and the acquisition module is used for acquiring the static signature and the supervisory code of the previous code block when the program jumps to the current code block.
And the judging module is used for executing the check operation according to the adjusting code of the current code block and the supervisory code of the previous code block and judging whether a control flow error occurs or not according to the check operation result.
The judging module is further used for judging whether a control flow error occurs or not according to the supervision code of the current code block generated by the checking operation and the static signature of the current code block after the checking is passed, wherein the static signatures of the code blocks are prime numbers which are different from each other; the adjusting code of the code block is the product of the static signature of the code block and the static signature of the previous code block in the target sequence of the code block, and the target sequence is the sequence of the serial number identification of the code block from small to large.
According to a third aspect of the present disclosure, an electronic device is provided. The electronic device includes: a memory having a computer program stored thereon and a processor implementing the method as described above when executing the program.
According to a fourth aspect of the present disclosure, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements a method as according to the first and/or second aspects of the present disclosure.
The method uses different prime numbers as static signatures, the adjusting code is the product of the static signatures of two adjacent code blocks in a target execution sequence, and according to the operational characteristics of the prime numbers, the adjusting code can only be divided by the static signatures of the two adjacent code blocks in the target execution sequence, but cannot be divided by the static signatures of any other modules, so that when a program control flow jumps to a current code block from all other unexpected code blocks, the adjusting code cannot be divided by the static signatures in the checking operation, and a control flow jump error can be accurately detected.
It should be understood that the statements herein reciting aspects are not intended to limit the critical or essential features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become apparent from the following description.
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The above and other features, advantages and aspects of various embodiments of the present disclosure will become more apparent by referring to the following detailed description when taken in conjunction with the accompanying drawings. The accompanying drawings are included to provide a further understanding of the present disclosure, and are not intended to limit the disclosure thereto, and the same or similar reference numerals will be used to indicate the same or similar elements, where:
FIG. 1 illustrates a flow diagram of a control flow check in which embodiments of the present disclosure can be implemented;
FIG. 2 shows a schematic diagram of a control flow verification method according to an embodiment of the present disclosure;
FIG. 3 illustrates a block diagram of a control flow verification apparatus in accordance with an embodiment of the present disclosure;
FIG. 4 illustrates a block diagram of an exemplary electronic device capable of implementing embodiments of the present disclosure.
Detailed Description
To make the objects, technical solutions and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be described clearly and completely with reference to the drawings in the embodiments of the present disclosure, and it is obvious that the described embodiments are some, but not all embodiments of the present disclosure. All other embodiments, which can be derived by a person skilled in the art from the embodiments disclosed herein without making any creative effort, shall fall within the protection scope of the present disclosure.
In addition, the term "and/or" herein is only one kind of association relationship describing an associated object, and means that there may be three kinds of relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.
The existing algorithm generally adopts control flow verification based on XOR operation random collision, whether control flow jump errors can be detected depends on the XOR operation random collision, but for a high-reliability system and a safety demanding system, the error detection coverage rate of the existing control flow verification algorithm cannot meet the requirement.
In order to solve the above problems, the present disclosure provides a control flow verification method, apparatus, device, and storage medium, and specifically, when a program jumps to a current code block, a static signature and a supervisory code of a previous code block are obtained; according to the adjusting code of the current code block and the supervision code of the previous code block, executing check operation, and judging whether a control flow error occurs according to a check operation result; if the check is passed, judging whether a control flow error occurs according to a supervision code of the current code block generated by the check operation and a static signature of the current code block; wherein, the static signatures of the code blocks are prime numbers which are different from each other; the adjusting code of the code block is the product of the static signature of the code block and the static signature of the previous code block in the target sequence of the code block, and the target sequence is the sequence of the serial number identification of the code block from small to large. According to the operation characteristic of prime numbers, when program control flow jumps to the module from all other unexpected modules, the adjusting codes in the check operation cannot be removed completely, so that control flow jump errors can be accurately detected, and the error detection rate is improved.
The method, apparatus, device and storage medium for controlling flow verification provided by the embodiments of the present disclosure are described in detail with reference to the accompanying drawings.
As shown in fig. 1, a method for controlling flow verification according to an embodiment of the present invention includes the following steps:
s110, when the program jumps to the current code block, the static signature and the supervisory code of the previous code block are obtained.
In some embodiments, the program may be divided into a plurality of sequentially executed code blocks, a static signature and an adjustment code are set for each code block, and specifically, for a sequentially executed basic code block, the program is divided into code blocks V1, V2, V3 … … Vn in the code execution order, and a static signature S1, S2, S3 … … Sn is set for each basic code block, wherein the static signatures S1, S2, S3 … … Sn of the code blocks are different prime numbers from each other.
In some embodiments, the adjustment code d1, d2, d3 … … dn corresponding to each code block may be calculated according to the static signature of the code block, and the calculation method may be that the adjustment code of the code block is equal to the product of the static signature of the code block and the static signature of the previous code block in the target order of the code block, for example: d 1-S4-S1, d 2-S1-S2, d 3-S2-S3, and d 4-S3-S4.
And S120, executing check operation according to the adjusting code of the current code block and the supervisory code of the previous code block, and judging whether a control flow error occurs or not based on a check operation result.
In some embodiments, the check operation may be:
Gnew＝dlocal/Gold；
wherein d islocalAdjustment codes for current code blocks, GoldSupervisory codes, G, being blocks of previous codenewThe code is the supervisory code of the current code block generated according to the check operation.
In some embodiments, if the current code block is adjusted by code dlocalSupervisory code G which can be coded by a previous code blockoldIf the data is completely divided, the check is passed; if the adjusting code of the current code block cannot be completely divided by the supervisory code of the previous code block, the control flow jump error is judged, and in this way, if the program control flow is subjected to unexpected jump, the adjusting code cannot be completely divided by the supervisory code of the previous code block in the check operation based on the operation property of prime numbers, so the control flow error can be accurately detected.
And S130, if the check is passed, judging whether a control flow error occurs according to the supervision code of the current code block generated by the check operation and the static signature of the current code block.
In some embodiments, the adjustment code d of the current code block may be usedlocalSupervisory code G with previous code blockoldQuotient of (c) as supervisory code G of the current code blocknew。
In some embodiments, if the generated monitor code G of the current code blocknewStatic signature S with current code blocklocalIf the two codes are equal, the control flow is a correct jump, and if the generated monitor code G of the current code blocknewStatic signature S with current code blocklocalIf not, the control flow is a false jump.
Wherein G isnewSupervision code for the current code block generated on the basis of the checking operation, GoldSupervisory codes, S, being blocks of previous codelocalIs a static signature of the current code block.
In this way, whether the control flow has errors or not is further accurately judged, and the detection accuracy is improved.
According to the embodiment of the disclosure, the following technical effects are achieved: the method comprises the steps of using different prime numbers as static signatures, using an adjusting code as a product of static signatures of two adjacent code blocks in a target execution sequence, and according to the operational characteristics of the prime numbers, the adjusting code can only be divided by the static signatures of the two adjacent code blocks in the target execution sequence and cannot be divided by the static signatures of any other modules, so that when a program control flow jumps to a current code block from all other unexpected code blocks, the adjusting code cannot be divided by the static signatures in a check operation, and a control flow jump error can be accurately detected.
A method for controlling flow verification according to an embodiment of the present disclosure is specifically described below with reference to fig. 2.
As shown in fig. 2, the program may be divided into code modules V1, V2, V3, V4 that are sequentially executed, and static signatures S1, S2, S3, S4 are set for each code module, wherein the static signatures are set to prime numbers different from each other, for example: s1-3, S2-5, S3-7, and S4-11.
Further, the adjusting code d1, d2, d3 and d4 corresponding to each code block are calculated according to the static signature of the code block, wherein,
d1＝S4*S1＝33，d2＝S1*S2＝15，d3＝S2*S3＝35，d4＝S3*S4＝77；
further, when the program jumps from the V1 code block to the V2 code block, the static signature S1 and the picket code G1 of the V1 code block are obtained, specifically, when the program departs from the V1 code block, the static signature S1 and the picket code G1 of the V1 code block should be equal, that is:
G1＝S1＝3；
further, when the program enters the V2 code block, it starts to perform a check operation, which may be dividing the current parity code by the adjustment code of the current code block, specifically, dividing the adjustment code d2 of the V2 code block by the current parity code G1:
G2＝d2/G1＝15/3＝5；
further, whether a control flow error occurs is judged according to the check result, specifically, if d2 can be divided by G1, the control flow error can be judged by checking, and if the d2 cannot be divided, the control flow error can be judged;
further, the supervisory code G2 generated by the check operation is updated to be the supervisory code of the current code block V2;
further, whether a control flow error occurs is determined according to the updated supervisory code G2 and the static signature S2 of the current code block V2, specifically, if G2 is equal to S2, the control flow jumps correctly, and if G2 is not equal to S2, the control flow jumps incorrectly.
It is noted that while for simplicity of explanation, the foregoing method embodiments have been described as a series of acts or combination of acts, it will be appreciated by those skilled in the art that the present disclosure is not limited by the order of acts, as some steps may, in accordance with the present disclosure, occur in other orders and concurrently. Further, those skilled in the art should also appreciate that the embodiments described in the specification are exemplary embodiments and that acts and modules referred to are not necessarily required by the disclosure.
The above is a description of embodiments of the method, and the embodiments of the apparatus are further described below.
Fig. 3 shows a block diagram of a control flow verification apparatus according to an embodiment of the present disclosure, and as shown in fig. 3, an apparatus 300 includes: an obtaining module 310 and a determining module 320, wherein:
an obtaining module 310, configured to obtain a static signature and a monitor code of a previous code block when the program jumps to the current code block.
The determining module 320 is configured to execute a check operation according to the adjustment code of the current code block and the monitor code of the previous code block, and determine whether a control flow error occurs according to a check operation result.
The judging module 320 is further configured to judge whether a control flow error occurs according to the monitor code of the current code block generated by the checking operation and the static signature of the current code block, where the static signatures of the code blocks are different prime numbers; the adjusting code of the code block is the product of the static signature of each code block and the static signature of the previous code block of each code block in the target sequence, and the target sequence is the sequence of the serial number identification of the code block from small to large from head to tail.
In some embodiments, the determining module 320 is specifically configured to: if the adjusting code of the current code block can be evenly divided by the supervisory code of the previous code block, the verification is passed; and if the adjusting code of the current code block cannot be completely divided by the supervisory code of the previous code block, judging that the control flow jumps wrongly.
In some embodiments, the determining module 320 is further specifically configured to: and if the supervision code of the current code block generated according to the checking operation is equal to the static signature of the current code block, judging that the control flow is jumped correctly, and if the supervision code of the current code block generated according to the checking operation is not equal to the static signature of the current code block, judging that the control flow is jumped wrongly.
It can be understood that each module/unit in the control flow verification apparatus 300 shown in fig. 3 has a function of implementing each step in the control flow verification method 100 provided by the embodiment of the present disclosure, and can achieve the corresponding technical effect, and for brevity, no further description is provided herein.
The present disclosure also provides an electronic device, a readable storage medium, and a computer program product according to embodiments of the present disclosure.
FIG. 4 shows a schematic block diagram of an electronic device 400 that may be used to implement embodiments of the present disclosure. Electronic devices are intended to represent various forms of digital computers, such as laptops, desktops, workstations, personal digital assistants, servers, blade servers, mainframes, and other appropriate computers. The electronic device may also represent various forms of mobile devices, such as personal digital processing, cellular phones, smart phones, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions, are meant to be examples only, and are not meant to limit implementations of the disclosure described and/or claimed herein.
The device 400 comprises a computing unit 401 which may perform various suitable actions and processes in accordance with a computer program stored in a Read Only Memory (ROM)402 or a computer program loaded from a storage unit 408 into a Random Access Memory (RAM) 403. In the RAM403, various programs and data required for the operation of the device 400 can also be stored. The computing unit 401, ROM 402, and RAM403 are connected to each other via a bus 404. An input/output (I/O) interface 405 is also connected to bus 404.
A number of components in device 400 are connected to I/O interface 405, including: an input unit 406 such as a keyboard, a mouse, or the like; an output unit 407 such as various types of displays, speakers, and the like; a storage unit 408 such as a magnetic disk, optical disk, or the like; and a communication unit 409 such as a network card, modem, wireless communication transceiver, etc. The communication unit 409 allows the device 400 to exchange information/data with other devices via a computer network, such as the internet, and/or various telecommunication networks.
Computing unit 401 may be a variety of general and/or special purpose processing components with processing and computing capabilities. Some examples of the computing unit 401 include, but are not limited to, a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), various dedicated Artificial Intelligence (AI) computing chips, various computing units running machine learning model algorithms, a Digital Signal Processor (DSP), and any suitable processor, controller, microcontroller, and so forth. The computing unit 401 performs the various methods and processes described above, such as the method 100. For example, in some embodiments, the method 100 may be implemented as a computer software program tangibly embodied in a machine-readable medium, such as the storage unit 408. In some embodiments, part or all of the computer program may be loaded and/or installed onto the device 400 via the ROM 402 and/or the communication unit 409. When loaded into RAM403 and executed by computing unit 401, may perform one or more of the steps of method 100 described above. Alternatively, in other embodiments, the computing unit 401 may be configured to perform the method 100 by any other suitable means (e.g., by means of firmware).
Various implementations of the systems and techniques described here above may be implemented in digital electronic circuitry, integrated circuitry, Field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Application Specific Standard Products (ASSPs), system on a chip (SOCs), load programmable logic devices (CPLDs), computer hardware, firmware, software, and/or combinations thereof. These various embodiments may include: implemented in one or more computer programs that are executable and/or interpretable on a programmable system including at least one programmable processor, which may be special or general purpose, receiving data and instructions from, and transmitting data and instructions to, a storage system, at least one input device, and at least one output device.
Program code for implementing the methods of the present disclosure may be written in any combination of one or more programming languages. These program codes may be provided to a processor or controller of a general purpose computer, special purpose computer, or other programmable data processing apparatus, such that the program codes, when executed by the processor or controller, cause the functions/operations specified in the flowchart and/or block diagram to be performed. The program code may execute entirely on the machine, partly on the machine, as a stand-alone software package partly on the machine and partly on a remote machine or entirely on the remote machine or server.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
To provide for interaction with a user, the systems and techniques described here can be implemented on a computer having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to a user; and a keyboard and a pointing device (e.g., a mouse or a trackball) by which a user can provide input to the computer. Other kinds of devices may also be used to provide for interaction with a user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user may be received in any form, including acoustic, speech, or tactile input.
The systems and techniques described here can be implemented in a computing system that includes a back-end component (e.g., as a data server), or that includes a middleware component (e.g., an application server), or that includes a front-end component (e.g., a user computer having a graphical user interface or a web browser through which a user can interact with an implementation of the systems and techniques described here), or any combination of such back-end, middleware, or front-end components. The components of the system can be interconnected by any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include: local Area Networks (LANs), Wide Area Networks (WANs), and the Internet.
The computer system may include clients and servers. A client and server are generally remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other. The server may be a cloud server, a server of a distributed system, or a server with a combined blockchain.
It should be understood that various forms of the flows shown above may be used, with steps reordered, added, or deleted. For example, the steps described in the present disclosure may be executed in parallel, sequentially, or in different orders, and are not limited herein as long as the desired results of the technical solutions of the present disclosure can be achieved.
The above detailed description should not be construed as limiting the scope of the disclosure. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions may be made in accordance with design requirements and other factors. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present disclosure should be included in the scope of protection of the present disclosure.

Claims (10)

1. A control flow verification method, the method comprising:
when the program jumps to the current code block, acquiring a static signature and a supervisory code of the previous code block;
according to the adjusting code of the current code block and the supervision code of the previous code block, executing check operation, and judging whether a control flow error occurs according to a check operation result;
if the check is passed, judging whether a control flow error occurs according to the supervision code of the current code block generated by the check operation and the static signature of the current code block; wherein,
static signatures of the code blocks are prime numbers which are different from each other; the adjusting code of the code block is the product of the static signature of the code block and the static signature of the previous code block of the code block in a target sequence, and the target sequence is the sequence of the serial number identification of the code block from small to large from head to tail.
2. The method of claim 1, wherein generating the supervisory code for the current code block based on a check operation comprises:
and taking the quotient of the adjusting code of the current code block and the supervisory code of the previous code block as the supervisory code of the current code block.
3. The method of claim 1, wherein determining whether a control flow error occurs according to the result of the check operation comprises:
when the adjusting code of the current code block can be divided by the supervisory code of the previous code block, the verification is passed;
the control flow jumps incorrectly when the adjustment code of the current code block is not divisible by the picket code of the previous code block.
4. The method of claim 1, wherein the determining whether a control flow error occurs according to the parity code of the current code block generated by the check operation and the static signature of the current code block comprises:
when the static signatures of the supervisory code and the current code block are equal, the control flow jumps correctly;
and when the static signatures of the supervisory code and the current code block are not equal, the control flow jumps wrongly.
5. The method of claim 1, further comprising:
the program is divided into a plurality of code modules which are executed in sequence, and a static signature and an adjusting code are set for each code module.
6. A control flow verification apparatus, comprising:
the acquisition module is used for acquiring the static signature and the supervisory code of the previous code block when the program jumps to the current code block;
the judging module is used for executing check operation according to the adjusting code of the current code block and the supervisory code of the previous code block and judging whether a control flow error occurs or not based on the check operation result;
the judging module is further configured to judge whether a control flow error occurs according to the monitoring code of the current code block generated by the checking operation and the static signature of the current code block after the checking is passed; wherein, the static signatures of the code blocks are prime numbers which are different from each other; the adjusting code of the code block is the product of the static signature of the code block and the static signature of the previous code block of the code block in a target sequence, and the target sequence is the sequence of the serial number identification of the code block from small to large from head to tail.
7. The apparatus of claim 6, wherein the determining module is further configured to check for passing when the adjusting code of the current code block is divisible by the parity code of the previous code block;
and when the adjusting code of the current code block cannot be completely divided by the supervisory code of the previous code block, judging that the control flow jumps wrongly.
8. The apparatus of claim 6, wherein the determining module is further configured to determine that the control flow jump is correct when the picket code is equal to the static signature of the current code block;
and when the static signatures of the supervision code and the current code block are not equal, judging that the control flow jumps wrongly.
9. An electronic device comprising a memory and a processor, the memory having stored thereon a computer program, wherein the processor, when executing the computer program, implements the method of any of claims 1-5.
10. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the method according to any one of claims 1 to 5.
CN202111356574.9A 2021-11-16 2021-11-16 Control flow checking method, device, equipment and storage medium Pending CN114090119A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114785585A (en) * 2022-04-18 2022-07-22 高途教育科技集团有限公司 Information verification and verification method, device, equipment and storage medium

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114785585A (en) * 2022-04-18 2022-07-22 高途教育科技集团有限公司 Information verification and verification method, device, equipment and storage medium
CN114785585B (en) * 2022-04-18 2023-12-08 高途教育科技集团有限公司 Information verification method, device, equipment and storage medium

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