CN114063358A - 薄膜晶体管阵列基板及显示面板 - Google Patents
薄膜晶体管阵列基板及显示面板 Download PDFInfo
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Abstract
本发明提供一种薄膜晶体管阵列基板,包括:绝缘基板,所述绝缘基板上定义有多个子像素区域,所述多个子像素区域排列为包括多行和多列的子像素阵列;多条数据线,所述多条数据线在所述绝缘基板上相互间隔排列,并沿所述子像素阵列的列方向延伸;多条共通电极,所述多条共通电极在所述绝缘基板上相互间隔排列,并沿所述子像素阵列的列方向延伸,每两条相邻的共通电极之间具有至少两条数据线,每条共通电极被施加相同的电压;以及公共电极层,所述公共电极层位于所述绝缘基板上,与所述多条共通电极电连接。本发明还提供一种显示面板。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种薄膜晶体管阵列基板及应用所述薄膜晶体管阵列基板的显示面板。
背景技术
显示面板包括薄膜晶体管阵列基板、对向基板和位于薄膜晶体管阵列基板与对向基板之间的液晶层。薄膜晶体管阵列基板上设置有公共电极和像素电极。公共电极和像素电极之间的电压差用于驱动液晶层中的液晶旋转。
在显示面板工作过程中,所述公共电极上各处的电压需要保持一致。但现有的公共电极面积较大,由于负载不同等因素,公共电极不同位置上的电压存在偏差,一种方式是在薄膜晶体管阵列基板上增设多个与所述公共电极电连接的共通电极稳定公共电极上各个位置的电压。上述方式需要增加对向基板上黑矩阵的面积以覆盖多个共通电极,损失了显示面板的开口率。
发明内容
本发明一方面提供一种薄膜晶体管阵列基板,包括:
绝缘基板,所述绝缘基板上定义有多个子像素区域,所述多个子像素区域排列为包括多行和多列的子像素阵列;
多条数据线,所述多条数据线在所述绝缘基板上相互间隔排列,并沿所述子像素阵列的列方向延伸;
多条共通电极,所述多条共通电极在所述绝缘基板上相互间隔排列,并沿所述子像素阵列的列方向延伸,每两条相邻的共通电极之间具有至少两条数据线,每条共通电极被施加相同的电压;以及
公共电极层,所述公共电极层位于所述绝缘基板上,与所述多条共通电极电连接。
本发明另一方面提供一种显示面板,包括:
薄膜晶体管阵列基板,所述薄膜晶体管阵列基板如上述;
彩膜基板,所述彩膜基板与所述薄膜晶体管阵列基板相对设置,所述彩膜基板包括网格状的黑矩阵,所述黑矩阵形成的每一网格定义一滤光区域,所述滤光区域与所述子像素区域一一对应,所述黑矩阵在所述薄膜晶体管阵列基板上的投影覆盖所述多条共通电极。
上述薄膜晶体管阵列基板,通过施加相同的电压至每个共通电极,由于公共电极层与每条共通电极电连接,则公共电极层具有与每条共通电极相同的电压(理论上),多个共通电极电连接公共电极层的不同位置,且多个共通电极电压相同,则多个共通电极为公共电极层的不同位置施加相同的电压,有利于提高公共电极层整体的电压均匀性,可有效改善显示面板画面闪烁的问题;进一步的,通过设置每相邻两条共通电极之间具有至少两条数据线,薄膜晶体管阵列基板共通电极总的数量较少,在提高薄膜晶体管基板上公共电极层整体的电压均匀性的基础上,还有利于使得显示面板在一定程度保持较高的开口率。
附图说明
图1为本实施例提供的显示面板的剖面结构示意图。
图2为本实施例提供的薄膜晶体管阵列基板的平面结构示意图。
图3为本实施例提供的薄膜晶体管阵列基板的剖面结构示意图。
图4为本实施例提供的彩膜基板的平面结构示意图。
图5为本实施例提供的薄膜晶体管阵列基板和彩膜基板的局部剖面示意图。
图6为本实施例提供的薄膜晶体管阵列基板和彩膜基板的另一局部剖面示意图。
主要元件符号说明
显示面板 10
薄膜晶体管阵列基板 20
绝缘基板 21
子像素区域 22
栅极线 GL
数据线 SL
薄膜晶体管 23
栅极 g
源极 s
漏极 d
共通电极 24
像素电极 25
公共电极层 26
彩膜基板 30
黑矩阵 31
滤光区域 32、R、G、B
滤光片 33
液晶层 40
液晶分子 41
如下具体实施方式将结合上述附图进一步说明本发明。
具体实施方式
请参阅图1,本发明实施例的显示面板10为液晶显示面板。显示面板10包括薄膜晶体管阵列基板20、与薄膜晶体管阵列基板20相对设置的彩膜基板30及位于薄膜晶体管阵列基板20和彩膜基板30之间的液晶层40。液晶层40中包括密集排列的多个液晶分子41,多个液晶分子41可根据薄膜晶体管阵列基板20上产生的电场而旋转,显示面板10根据各个液晶分子41的不同旋转角度显示不同的图像。
请一并参阅图2和图3,薄膜晶体管阵列基板20包括绝缘基板21。本实施例中,绝缘基板21为玻璃基板。绝缘基板21上定义有多个子像素区域22。多个子像素区域22排列为子像素阵列,所述子像素阵列包括沿X方向延伸的多行和沿Y方向延伸的多列。每一行的多个子像素区域22中,每相邻排列的三个子像素区域22用于发射不同颜色的光。本实施例中,每相邻排列的三个子像素区域22分别用于发射红光、绿光和蓝光。本实施例中,X方向和Y方向相互垂直。于其他实施例中,X和Y方向交叉但可不垂直。
薄膜晶体管阵列基板20还包括设置于绝缘基板21上的多条栅极线GL和多条数据线SL。多条栅极线GL与多条数据线SL绝缘交叉,以定义出多个子像素区域22。本实施例中,多条栅极线GL相互间隔平行排列,且沿所述子像素阵列的行方向(也即图2中X方向)延伸;多条数据线SL相互间隔平行排列,且沿所述子像素阵列的列方向(也即图2中Y方向)延伸。
薄膜晶体管阵列基板20还包括多个位于绝缘基板21上的薄膜晶体管23。每一子像素区域22中设置有一薄膜晶体管23。薄膜晶体管23作为各子像素区域22的开关元件,由栅极驱动器(图未示)生成的扫描信号导通/关断。在对应的薄膜晶体管23导通的情况下,从源极驱动器(图未示)经由数据线SL提供的数据信号被写入到每个子像素区域22,从而使显示面板10显示图像。
本实施例中的薄膜晶体管阵列基板20为双栅极架构。每相邻的两行子像素区域22之间具有两条栅极线GL,所述两条栅极线GL各自电连接所述相邻的两行子像素区域22中相对距离更近的一行子像素区域22的部分薄膜晶体管23的栅极g。也即,每一行子像素区域22中的所有子像素区域22被划分为两组,其中一组子像素区域22中的薄膜晶体管23电连接位于该行子像素区域22一侧的一条栅极线GL,另一组子像素区域22中的薄膜晶体管23电连接位于该行子像素区域22一侧的另一条栅极线GL。每相邻的两条数据线SL之间具有两列子像素区域22。每条数据线SL与位于其两侧的两列子像素区域22中的薄膜晶体管的源极s电连接。每个薄膜晶体管23的漏极d电连接一像素电极25。
薄膜晶体管阵列基板20还包括设置于绝缘基板21上的多条共通电极24(也称公共电极)。多条共通电极24相互间隔排列并沿所述子像素阵列的列方向(也即图2所示Y方向)延伸。每条共通电极24位于相邻两列子像素区域22之间。每两条相邻排列的共通电极24之间具有至少两条数据线SL。本实施例中,每两条共通电极24之间具有三条数据线SL,每两条共通电极24之间具有六列子像素区域22。作为示例,图2中仅示出了2条共通电极24以及六列子像素区域22。每两列相邻的子像素区域22之间具有一条数据线SL,或具有一条共通电极24,或不具有数据线SL和共通电极24。
每一子像素区域22中的薄膜晶体管23的栅极g电连接与其最邻近的栅极线GL,源极s电连接与其最接近的数据线SL,漏极d电连接像素电极25。薄膜晶体管阵列基板20还包括公共电极层26。公共电极层26与每一像素电极25形成的电压差可形成电场,液晶层40中的液晶分子可根据该电场旋转,则显示面板10可显示图像。
公共电极层26与每条共通电极24电连接。显示面板10在工作过程中,施加相同的电压至每个共通电极24,由于公共电极层26与每条共通电极24电连接,则公共电极层26具有与每条共通电极24相同的电压(理论上)。多个共通电极24电连接公共电极层26的不同位置,且多个共通电极24电压相同,则多个共通电极24为公共电极层26的不同位置施加相同的电压,有利于提高公共电极层26整体的电压均匀性,可有效改善显示面板画面闪烁的问题。
且本实施例中,优选多个共通电极24均匀排列(每两条共通电极24之间具有相同数量的数据线和相同列数的子像素区域22),更有利于提高公共电极层26整体的电压均匀性。
请参阅图4,彩膜基板30包括黑矩阵31。黑矩阵31为网格状的绝缘不透光材料。黑矩阵31中形成的每一网格定义一滤光区域32,黑矩阵31定义多个滤光区域32。彩膜基板30还包括多个滤光片33。每一滤光区域32设置有一个滤光片33。黑矩阵31对应的区域不透光,滤光区域32对应的区域透光,显示面板10的透光率与滤光区域32的面积呈正比。也即,滤光区域32的面积占滤光区域32和黑矩阵31总面积的比率越高,显示面板10的开口率越大。
所述多个滤光区域32包括多个出射红光的滤光区域R、多个出射绿光的滤光区域G以及多个出射蓝光的滤光区域B。多个滤光区域32与多个子像素区域22一一对应,多个滤光区域32也排列为包括多行及多列的滤光阵列。本实施例中,在所述滤光阵列的行方向(也即图2所示的X方向)上,滤光区域R、G和B交替排列。同一列的滤光区域32用于出射相同颜色的光。
出射不同颜色光的子像素区域22和滤光区域32的排列方式可不同,但位于同一列或同一行的相邻排列的三个子像素区域22出射不同颜色的光,位于同一列或同一行的相邻排列的三个滤光区域32出射不同颜色的光。
请参阅图5,每一滤光区域32在绝缘基板21上的投影与绝缘基板21上的一个子像素区域22重合。每一滤光片33用于对所述滤光片33所在的滤光区域32所对应的子像素区域22出射的光滤光。
本实施例中,共通电极24由不透光的金属材料制成,与薄膜晶体管23的源极和漏极在同一制程中形成,因此共通电极24与黑矩阵对应设置。也即,黑矩阵31在薄膜晶体管阵列基板20上的投影完全覆盖共通电极24。
图5为未设置共通电极24的位置上的剖面结构图,图6为设有共通电极24的位置上的剖面结构图。结合图5和图6可以看出,由于共通电极24与黑矩阵对应设置,黑矩阵31对应绝缘基板21上设置有共通电极24的位置的宽度要小于对应绝缘基板21上未设置共通电极24的位置的宽度。黑矩阵越宽,开口率越小,本实施例提供的共通电极24的排列方式(每相邻两条共通电极24之间具有六列子像素区域22,或每相邻两条共通电极24之间具有三条数据线SL),共通电极24数量较少,在提高公共电极层26整体的电压均匀性的基础上,还保证了显示面板10具有较高的开口率,可有效改善显示面板显示的图像质量。
本技术领域的普通技术人员应当认识到,以上的实施方式仅是用来说明本发明,而并非用作为对本发明的限定,只要在本发明的实质精神范围之内,对以上实施例所作的适当改变和变化都落在本发明要求保护的范围之内。
Claims (10)
1.一种薄膜晶体管阵列基板,其特征在于,包括:
绝缘基板,所述绝缘基板上定义有多个子像素区域,所述多个子像素区域排列为包括多行和多列的子像素阵列;
多条数据线,所述多条数据线在所述绝缘基板上相互间隔排列,并沿所述子像素阵列的列方向延伸;
多条共通电极,所述多条共通电极在所述绝缘基板上相互间隔排列,并沿所述子像素阵列的列方向延伸,每两条相邻的共通电极之间具有至少两条数据线,每条共通电极被施加相同的电压;以及
公共电极层,所述公共电极层位于所述绝缘基板上,与所述多条共通电极电连接。
2.如权利要求1所述的薄膜晶体管阵列基板,其特征在于,所述薄膜晶体管阵列基板还包括多条栅极线,所述多条栅极线在所述绝缘基板上相互间隔排列,并沿所述子像素阵列的行方向延伸;
所述多条栅极线及所述多条数据线用于配合以显示图像。
3.如权利要求1所述的薄膜晶体管阵列基板,其特征在于,所述多条栅极线与所述多条数据线相互垂直。
4.如权利要求3所述的薄膜晶体管阵列基板,其特征在于,每相邻的两行子像素区域之间具有两条栅极线。
5.如权利要求3所述的薄膜晶体管阵列基板,其特征在于,每两条相邻的两条数据线之间具有两列相邻排列的子像素区域。
6.如权利要求3所述的薄膜晶体管阵列基板,其特征在于,每两条相邻的共通电极之间的子像素区域的列数相同。
7.如权利要求3所述的薄膜晶体管阵列基板,其特征在于,每两条相邻的共通电极之间的具有相同数量的数据线。
8.如权利要求6或7所述的薄膜晶体管阵列基板,其特征在于,每两条相邻的共通电极之间具有六列子像素区域和三条数据线。
9.如权利要求1至7任一项所述的薄膜晶体管阵列基板,其特征在于,所述多条共通电极为金属。
10.一种显示面板,其特征在于,包括:
薄膜晶体管阵列基板,所述薄膜晶体管阵列基板如权利要求1至9任一项所述;
彩膜基板,所述彩膜基板与所述薄膜晶体管阵列基板相对设置,所述彩膜基板包括网格状的黑矩阵,所述黑矩阵形成的每一网格定义一滤光区域,所述滤光区域与所述子像素区域一一对应,所述黑矩阵在所述薄膜晶体管阵列基板上的投影覆盖所述多条共通电极。
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