CN114047430A - Circuit module interface bus control logic enumeration technique - Google Patents

Circuit module interface bus control logic enumeration technique Download PDF

Info

Publication number
CN114047430A
CN114047430A CN202111294497.9A CN202111294497A CN114047430A CN 114047430 A CN114047430 A CN 114047430A CN 202111294497 A CN202111294497 A CN 202111294497A CN 114047430 A CN114047430 A CN 114047430A
Authority
CN
China
Prior art keywords
circuit module
enumeration
circuit
programmable logic
module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
CN202111294497.9A
Other languages
Chinese (zh)
Inventor
董振华
刘军成
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to CN202111294497.9A priority Critical patent/CN114047430A/en
Publication of CN114047430A publication Critical patent/CN114047430A/en
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28Testing of electronic circuits, e.g. by signal tracer
    • G01R31/282Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05BCONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00Programme-control systems
    • G05B19/02Programme-control systems electric
    • G05B19/04Programme control other than numerical control, i.e. in sequence controllers or logic controllers
    • G05B19/05Programmable logic controllers, e.g. simulating logic interconnections of signals according to ladder diagrams or function charts
    • G05B19/054Input/output

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • Automation & Control Theory (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The invention discloses a circuit module interface bus control logic enumeration technology, which relates to the technical field of circuit detection and comprises enumeration software, a general computer platform, a digital IO module, a circuit module debugging tool and a programmable logic control circuit; the circuit module interface bus control logic enumeration technology enables a programmable logic control circuit to be abstracted into a black box according to needs, an enumeration system is constructed by enumeration software, a general computer platform, a digital IO module, a circuit module debugging tool and the programmable logic control circuit, so that a circuit module interface bus truth table is obtained through the enumeration system, secondary development circuit module testing tools and equipment can be carried out by means of the truth table, circuit module function detection and repair are realized, the fault location efficiency of a circuit module can be improved, the maintenance cost is reduced, and the SRU testing maintenance depth is improved.

Description

Circuit module interface bus control logic enumeration technique
Technical Field
The invention relates to the technical field of circuit detection, in particular to a circuit module interface bus control logic enumeration technology.
Background
A circuit module for special use is abbreviated as SRU, and a product having a specific function composed of a plurality of SRUs is called LRU. Typically, there are multiple types of SRUs in an LRU, such as power modules, IO modules, controller modules, communication modules, data processing modules, and the like. The power module provides power support for other SRUs, the IO module, the communication module, the data processing module and the like are crosslinked with the controller module through a motherboard bus (LBE), and the LRU function is completed under the control of the controller module. The SRUs, such as IO modules, communication modules, data processing modules, etc., are often referred to as LRU's. This type of SRU usually contains programmable logic devices (GAL, CPLD) for implementing backplane bus decoding.
The SRU typically contains a non-bus interface and a bus interface. The non-bus interface is a collection of various types of signals, including discrete quantity signals ("28V/on" signals, "ground/on" signals, "28V/ground" signals, various level signals), analog signals (various voltage change signals), PWM signals, and the like, and is also called a functional interface of the module, and is mainly responsible for functional transmission of the circuit module. The bus interface is a collection of various digital signals, and is divided into three types according to functions, namely a data bus, an address bus and a control bus (including enabling signals, reading signals and the like), and the bus interface mainly bears the external communication and control functions of the circuit module.
In the prior art, for testing and maintaining the SRU, the SRU is generally installed in the LRU, the LRU is electrified and detected by using detection equipment (ATE), and signals such as voltage, current, resistance and the like on the SRU are detected by using general instruments such as an oscilloscope, a universal meter and the like in the detection process, so as to judge and position a fault device of the SRU. This technique has the following disadvantages:
(1) expensive test equipment (ATE) is required;
(2) are requiring expensive LRUs;
(3) the manual positioning failure efficiency is low;
(4) the maintenance cost is high.
In order to solve the problems, a universal test platform can be developed, and the dynamic test and the fault quick repair of the SRU can be realized without the support of ATE and LRU. The premise of developing the universal test platform of the SRU is to master the control logic of the SRU interface bus, and the control logic is usually described in languages such as VHDL, HDL and the like and is burned in programmable logic chips such as GAL, CPLD and the like. For an SRU including a (programmable) logic control circuit, it is difficult to control the input and output of module functions through a circuit module bus interface by means of external devices without mastering the internal control logic (i.e., the bus interface truth table) of the programmable logic circuit.
Disclosure of Invention
Aiming at the defects of the prior art, the invention provides a circuit module interface bus control logic enumeration technology, and solves the problems in the background technology.
In order to achieve the purpose, the invention is realized by the following technical scheme: the circuit module interface bus control logic enumeration technology comprises enumeration software, a general computer platform, a digital IO module, a circuit module debugging tool and a programmable logic control circuit;
the general computer platform is used for providing an electrical connection interface of the digital IO module and providing an enumeration software operation platform;
the digital IO module is used for executing digital signal input and output under the control of enumeration software;
the circuit module debugging tool is used for the work of connector adaptation, signal transfer, level conversion, circuit module power supply and the like;
the programmable logic control circuit is used for analyzing and combing the input signal and the output signal of the programmable logic control circuit to perform function abstraction.
Optionally, a plurality of logic functions are arranged in the programmable logic control circuit.
Optionally, the signal input by the programmable logic control circuit is set as an input signal, the input signal is defined as I [0 … N ], the signal output by the programmable logic control circuit is set as an output signal, and the output signal is defined as O [0 … M ].
Optionally, the digital IO module provided by the general computer platform is electrically connected to an interface, such as PCI, PXI, PXIe, or the like.
Optionally, the programmable logic control circuit analyzes and combs out input signals of the input signals and output signals of the programmable logic control circuit, wherein the input signals are input signals of a control bus, an address bus and the like.
Optionally, the programmable logic control circuit analyzes and combs out an output signal of the input signal and the output signal as a chip selection signal, a control signal, and the like.
The invention provides a circuit module interface bus control logic enumeration technology, which has the following beneficial effects:
the circuit module interface bus control logic enumeration technology enables a programmable logic control circuit to be abstracted into a black box according to needs, an enumeration system is constructed by enumeration software, a general computer platform, a digital IO module, a circuit module debugging tool and the programmable logic control circuit, so that a circuit module interface bus truth table is obtained through the enumeration system, secondary development circuit module testing tools and equipment can be carried out by means of the truth table, circuit module function detection and repair are realized, the fault location efficiency of a circuit module can be improved, the maintenance cost is reduced, and the SRU testing maintenance depth is improved.
Drawings
FIG. 1 is a schematic block diagram of a circuit module interface according to the present invention;
FIG. 2 is a diagram of an enumeration system of the present invention;
FIG. 3 is a schematic diagram of a "black box" abstraction of the programmable logic control circuit of the present invention.
In the figure: 1. enumerating software; 2. a general purpose computer platform; 3. a digital IO module; 4. debugging tooling of the circuit module; 5. a programmable logic control circuit; 6. a logic function.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments.
Examples
Referring to fig. 1 to 3, the present invention provides a technical solution: the circuit module interface bus control logic enumeration technology comprises enumeration software 1, a general computer platform 2, a digital IO module 3, a circuit module debugging tool 4 and a programmable logic control circuit 5;
the general computer platform 2 is used for providing an electrical connection interface of the digital IO module 3 and providing an operation platform of the enumeration software 1;
the digital IO module 3 is used for executing digital signal input and output under the control of the enumeration software 1;
the circuit module debugging tool 4 is used for the work of connector adaptation, signal transfer, level conversion, circuit module power supply and the like;
and the programmable logic control circuit 5 is used for analyzing and combing the input signals and the output signals of the programmable logic control circuit to perform function abstraction.
Those skilled in the art can recognize that the circuit module interface bus control logic enumeration technology provided in this embodiment abstracts the programmable logic control circuit 5 into a "black box" by the logic control unit of the SRU, and analyzes and combs out the input signal I [0.. N ] and the output signal O [0.. M ] of the programmable logic control circuit 5. The IO pins in the digital IO module 3 are connected one by one with the input signals I0. N and the output signals O0. M of the programmable logic control circuit 5 by means of the circuit module debugging tool 4. And then, controlling the digital IO module 3 to rapidly traverse the address space represented by I [0.. N ] by using the general computer platform 2 and the enumeration software 1, wherein the address space range is as follows: the power of N from 0 to 2, after each time of outputting enumeration address, recording O0 … M input result, and identifying O k (where 0< k < M) is valid according to the two-dimensional matrix between I0 … N and O0 … M recorded by the enumeration software 1, where the value range of corresponding I is the address space, which is also called the truth table of the circuit module interface bus. Based on the truth table, the automatic test technology of the circuit module can be developed for the second time, so that the aims of detecting and repairing the functions of the circuit module can be fulfilled without expensive detection equipment and expensive LRU, the fault location efficiency of the circuit module can be obviously improved, the maintenance cost is reduced, and the test and maintenance depth of the circuit module is improved.
Optionally, a plurality of logic functions 6 are arranged inside the programmable logic control circuit 5.
Those skilled in the art can appreciate that a logic function 6 can be added inside the programmable logic control circuit 5 according to needs, so that the programmable logic control circuit 5 can completely simulate or express the interface bus function of the circuit module.
Optionally, the signal input by the programmable logic control circuit 5 is set as an input signal, the input signal is defined as I [0 … N ], the signal output by the programmable logic control circuit 5 is set as an output signal, and the output signal is defined as O [0 … M ].
It can be considered by those skilled in the art that the enumeration software 1 can control the digital IO module 3 to quickly traverse the address space represented by I [0.. N ], after outputting an enumeration address, record an O [0 … M ] input result, thereby obtaining a two-dimensional matrix between I [0 … N ] and O [0 … M ], and when identifying O [ k ] (where 0< k < M) is valid, a value range corresponding to I, that is, the address space, is also called the circuit module interface bus truth table.
Optionally, the digital IO module 3 provided by the general computer platform 2 is electrically connected to an interface, such as PCI, PXI, PXIe, or the like.
Those skilled in the art can think that the IO pins in the digital IO module 3 can be connected to the input signal I [0.. N ] and the output signal O [0.. M ] of the programmable logic control circuit 5 one by one, and further, the address space of the circuit module can be obtained by enumerating the software 1, so as to obtain the truth table of the interface bus of the circuit module.
Optionally, the programmable logic control circuit 5 analyzes and combs out the input signal of the input signal and the output signal of the programmable logic control circuit, which is the input signal of the control bus, the address bus, and the like.
Those skilled in the art can recognize that the enumeration software 1 controls the digital IO module 3 to rapidly traverse the address space represented by I [0.. N ], so as to obtain the input result of record O [0 … M ], and further obtain the truth table of the circuit module interface bus.
Optionally, the programmable logic control circuit 5 analyzes and combs out an output signal of the input signal and the output signal as a chip selection signal, a control signal, and the like.
Those skilled in the art can recognize that the address space and the control signal set obtained by the present technology are the truth table of the interface bus of the circuit module, and the test technology or test equipment of the circuit module developed secondarily according to the truth table is applied to the repair operation of the SRU, which is helpful to reduce the repair cost of the SRU and improve the test and repair depth of the SRU.
The above description is only for the preferred embodiment of the present invention, but the scope of the present invention is not limited thereto, and any person skilled in the art should be considered to be within the technical scope of the present invention, and the technical solutions and the inventive concepts thereof according to the present invention should be equivalent or changed within the scope of the present invention.

Claims (6)

1. The circuit module interface bus control logic enumeration technology is characterized in that: the system comprises enumeration software (1), a general computer platform (2), a digital IO module (3), a circuit module debugging tool (4) and a programmable logic control circuit (5);
the general computer platform (2) is used for providing an electrical connection interface of the digital IO module (3) and providing an enumeration software (1) operation platform;
the digital IO module (3) is used for performing digital signal input and output under the control of the enumeration software (1);
the circuit module debugging tool (4) is used for the work of connector adaptation, signal transfer, level conversion, circuit module power supply and the like;
and the programmable logic control circuit (5) is used for analyzing and combing the input signal and the output signal of the programmable logic control circuit to perform function abstraction.
2. The circuit module interface bus control logic enumeration technique of claim 1, wherein: the programmable logic control circuit (5) is internally provided with a plurality of logic functions (6).
3. The circuit module interface bus control logic enumeration technique of claim 1, wherein: the signal input by the programmable logic control circuit (5) is set as an input signal, the input signal is defined as I [0 … N ], the signal output by the programmable logic control circuit (5) is set as an output signal, and the output signal is defined as O [0 … M ].
4. The circuit module interface bus control logic enumeration technique of claim 1, wherein: the digital IO module (3) provided by the general computer platform (2) is electrically connected with interfaces, such as PCI, PXI, PXIe and the like.
5. The circuit module interface bus control logic enumeration technique of claim 1, wherein: the programmable logic control circuit (5) analyzes and combs out input signals and output signals of the programmable logic control circuit, wherein the input signals are input signals of a control bus, an address bus and the like.
6. The circuit module interface bus control logic enumeration technique of claim 1, wherein: the programmable logic control circuit (5) analyzes and combs out signals of which the output signals are chip selection signals, control signals and the like.
CN202111294497.9A 2021-11-03 2021-11-03 Circuit module interface bus control logic enumeration technique Withdrawn CN114047430A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111294497.9A CN114047430A (en) 2021-11-03 2021-11-03 Circuit module interface bus control logic enumeration technique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111294497.9A CN114047430A (en) 2021-11-03 2021-11-03 Circuit module interface bus control logic enumeration technique

Publications (1)

Publication Number Publication Date
CN114047430A true CN114047430A (en) 2022-02-15

Family

ID=80207001

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111294497.9A Withdrawn CN114047430A (en) 2021-11-03 2021-11-03 Circuit module interface bus control logic enumeration technique

Country Status (1)

Country Link
CN (1) CN114047430A (en)

Similar Documents

Publication Publication Date Title
CN101788945B (en) Diagnostic test system and method for electronic system with multiple circuit boards or multiple modules
CN102565563B (en) For robotization integrated test system and the method for automotive electronics electric system
CN105353755B (en) Multi-functional fault injection device based on PXI buses
JPS6244618B2 (en)
CN113759200B (en) Digital plug-in general automatic test system based on image processing
CN113341230A (en) Automatic testing system and method for multi-port cable of spacecraft
CN103149539A (en) Multifunctional power source test system
CN112485699A (en) Server power supply test system
CN111707966A (en) CPLD electric leakage detection method and device
CN106200623B (en) The semi-physical simulation test device of reactor core measuring system logic module
CN114047430A (en) Circuit module interface bus control logic enumeration technique
CN104484305B (en) Server debugging analysis interface device
CN113160875B (en) Chip test system and test method
CN212965857U (en) CAN bus turn-off fault detection device
CN114720740A (en) Device power supply unit of ATE
CN209132718U (en) A kind of power supply jig of standard PCIE subcard and OCP subcard
CN203338347U (en) Interface circuit for computer main board failure detection device
CN113204225A (en) Automobile load simulation device and test method
Li et al. Hot-swap and redundancy technology for CPCI measurement and control systems
CN110907857A (en) FPGA-based connector automatic detection method
CN221303439U (en) Portable multichannel test equipment for automobile electrical property test
CN110647431A (en) Test box for board card and complete machine diagnosis test
CN205353225U (en) Multiple electronic parts automatic test equipment
CN205247195U (en) Windscreen and pitot tube control assembly testboard of heating
CN112964954B (en) Multi-interval protection batch test method based on hardware serial number replacement

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
WW01 Invention patent application withdrawn after publication

Application publication date: 20220215

WW01 Invention patent application withdrawn after publication