CN114039622B - Method for realizing switching of synchronous surface between network ports on radio frequency unit - Google Patents
Method for realizing switching of synchronous surface between network ports on radio frequency unit Download PDFInfo
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- CN114039622B CN114039622B CN202111309602.1A CN202111309602A CN114039622B CN 114039622 B CN114039622 B CN 114039622B CN 202111309602 A CN202111309602 A CN 202111309602A CN 114039622 B CN114039622 B CN 114039622B
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- H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
- H04B1/38—Transceivers, i.e. devices in which transmitter and receiver form a structural unit and in which at least one part is used for functions of transmitting and receiving
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Abstract
The invention provides a method for realizing the switching of a synchronous surface between network ports on a radio frequency unit, and relates to the technical field of communication interfaces. The distribution unit and the radio frequency unit are connected by using an SFP interface through an optical fiber; setting a processor to monitor the Ethernet main body module; reading and writing a switch register; inquiring the locking state of the network port when the SFP interface interruption is monitored; setting a first data stream selection switch and a second data stream selection switch; if only one network port is locked, a configuration switch register sends a control signal to a data stream selection switch, and a data path of the 1588 functional module is switched to the network port for adaptation; if a plurality of network ports are monitored to be locked, the processor configures the switch register to select and send control signals to the data stream, and the data path of the 1588 functional module is switched to the network port with the smallest network port number. The method can avoid the loss of connection of a single network port on a transmission synchronization surface and keep the whole communication equipment to work normally.
Description
Technical Field
The invention relates to the technical field of communication interfaces, in particular to a method for realizing that a synchronous surface is switchable between network interfaces on a radio frequency unit.
Background
In 4G (LTE) communication technology, CPRI is generally used as a forwarding interface, but as the 5G and OPEN RAN architectures mature, enhanced CPRI (ECPRI/common public radio interface) has replaced CPRI as a new forwarding interface. Since the ECPRI protocol underlying layer is based on ethernet (MAC layer or TCP/IP layer), versatility and flexibility are greatly improved. In addition, user plane, control plane, management plane and synchronous plane protocols on ECPRI protocol are standardized, and architecture guarantee is provided for interconnection and interworking of radio frequency units (RU) and Distribution Units (DU) of different manufacturers. The synchronous PLANE (S-PLANE) adopts IEEE1588 (PTP) protocol, which makes it possible for the synchronous PLANE (S-PLANE) to switch between different network ports. Meanwhile, a radio frequency unit (RU) based on MASSIVE MIMO technology often needs multiple ports to support a scenario with a large bandwidth, and if a single port transmitting a synchronization PLANE (S-PLANE) is not connected, the whole device cannot work normally, so a method for implementing switching of the synchronization PLANE between the ports on the radio frequency unit is urgently needed.
Disclosure of Invention
The invention aims to provide a method for realizing the switching of a synchronous surface between network ports on a radio frequency unit, which can avoid the loss of connection of a single network port transmitting the synchronous surface and keep the normal operation of the whole communication equipment.
Embodiments of the present invention are implemented as follows:
in a first aspect, an embodiment of the present application provides a method for implementing that a synchronization plane is switchable between network ports on a radio frequency unit, where the method includes connecting a distribution unit and the radio frequency unit by using an SFP interface through an optical fiber; setting a processor to monitor the Ethernet main body module; the processor reads and writes the switch register through an AXI bus; inquiring the locking state of the SFP interface corresponding to the network port when the processor monitors the interruption of the SFP interface; setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and time stamp data; if only one network port is locked, the processor configures the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module to the network port for adaptation; if a plurality of network ports are monitored to be locked, the processor configures the opening Guan Jicun device to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data paths of the 1588 function module to the network port with the smallest network port number, wherein the 1588 function module is an embedded IEEE1588 module.
In some embodiments of the present invention, the step of setting the processor to monitor the ethernet main body module includes: the processor reads the values of the status registers of the network ports of the Ethernet main body module.
In some embodiments of the present invention, the step of switching the data path of the 1588 function module to the network port for adaptation by the first data flow selection switch and the second data flow selection switch includes: the data flow selection switch sends the converted signals to the 1588 function module, and the 1588 function module outputs the sending timer data and the receiving timer data to the network port; the network port respectively marks a receiving time stamp and a sending time stamp based on the sending timer data and the receiving timer data; the network port sends a receiving time stamp, a sending time stamp and a 1588 protocol packet matched with the 1588 function module to the processor; after the processor receives the receiving time stamp, the sending time stamp and the 1588 protocol packet, the processor calculates the network delay, and realizes the time synchronization of the distribution unit and the radio frequency unit, namely the network clock synchronization.
In some embodiments of the invention, further comprising: when a receiving data path of the asynchronous surface network port is connected with a first data stream selection switch; setting a receiving buffer area; the first data stream selection switch transmits data to the second data stream selection switch through the receive buffer.
In some embodiments of the invention, further comprising: the radio frequency unit manually designates the network port through configuration management data or a preset command sent by the distribution unit.
In some embodiments of the invention, the radio frequency unit is a radio frequency unit based on a multi-core heterogeneous SOC architecture.
In some embodiments of the invention, the first data stream selection switch and the second data stream selection switch each employ a multiplexed data selector.
In a second aspect, an embodiment of the present application provides a system for implementing that a synchronization plane is switchable between network ports on a radio frequency unit, including: the front-end module is used for connecting the distribution unit and the radio frequency unit through an SFP interface by using an optical fiber; the monitoring module is used for setting the processor to monitor the Ethernet main body module; the processor reads and writes the switch register through an AXI bus; the inquiry module is used for inquiring the locking state of the network port corresponding to the SFP interface when the processor monitors the interruption of the SFP interface; the device comprises a preset module, a first data stream selection switch and a second data stream selection switch, wherein the preset module is used for selecting a received data stream, a transmitted data stream and time stamp data; the processing module is used for configuring the switch register to send control signals to the first data stream selection switch and the second data stream selection switch if only one network port is locked, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module to the network port for adaptation; if a plurality of network ports are monitored to be locked, the processor configures the opening Guan Jicun device to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data paths of the 1588 function module to the network port with the smallest network port number.
In a third aspect, embodiments of the present application provide an electronic device comprising a processor, 1588 function module, memory, and multiplexed data selector; the processor is respectively connected with the 1588 functional module, the memory and the multiplexing data selector; the 1588 functional module is connected with the multiplexing data selector; the memory stores program instructions executable by the processor, which invokes the program instructions to perform the method described above.
In a fourth aspect, embodiments of the present application provide a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method described above.
Compared with the prior art, the embodiment of the invention has at least the following advantages or beneficial effects:
a radio frequency unit (RU) based on a MASSIVE MIMO technology needs a plurality of network ports to support a scene of large bandwidth, and the design utilizes the switching of automatic network ports to avoid the loss of connection of a single network port on a transmission synchronization surface and keep the whole communication equipment to work normally.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are needed in the embodiments will be briefly described below, it being understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and other related drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a method for implementing synchronization plane switching between network ports on a radio frequency unit according to the present invention;
FIG. 2 is a schematic diagram of a fiber optic connection of a Distribution Unit (DU) and a radio frequency unit (RU) in accordance with the present invention;
FIG. 3 is a schematic diagram of a flow of automatically configuring a synchronization PLANE (S-PLANE) portal in the present invention;
FIG. 4 is a schematic diagram of an Ethernet module according to the invention;
FIG. 5 is a cross-linking diagram of a 1588 clock control module and a portal in the present invention;
FIG. 6 is a block diagram of a 1588 datapath module according to the invention;
FIG. 7 is a schematic diagram showing the connection of a first data stream selection switch and a second data stream selection switch according to the present invention;
FIG. 8 is a schematic diagram of a first data flow switch and a time stamp data path according to the present invention;
FIG. 9 is a schematic diagram of a system for implementing synchronization plane switching between ports on a radio frequency unit according to the present invention;
fig. 10 is a schematic structural diagram of an electronic device according to the present invention.
Icon: 1. a front module; 2. a monitoring module; 3. a query module; 4. a preset module; 5. a processing module; 6. a processor; 61. a memory; 62. an SFP interface; 63. a first data stream switch; 64. 1588 functional module; 65. and a second data stream switch.
Description of the embodiments
For the purposes of making the objects, technical solutions and advantages of the embodiments of the present application more clear, the technical solutions of the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, which are generally described and illustrated in the figures herein, may be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, as provided in the accompanying drawings, is not intended to limit the scope of the application, as claimed, but is merely representative of selected embodiments of the application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
It should be noted that: like reference numerals and letters denote like items in the following figures, and thus once an item is defined in one figure, no further definition or explanation thereof is necessary in the following figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only to distinguish the description, and are not to be construed as indicating or implying relative importance.
It is noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
In the description of the present application, it should be noted that, the terms "upper," "lower," "inner," "outer," and the like indicate an orientation or a positional relationship based on the orientation or the positional relationship shown in the drawings, or an orientation or a positional relationship conventionally put in use of the product of the application, merely for convenience of description and simplification of the description, and do not indicate or imply that the apparatus or element to be referred to must have a specific orientation, be configured and operated in a specific orientation, and therefore should not be construed as limiting the present application.
In the description of the present application, it should also be noted that, unless explicitly specified and limited otherwise, the terms "disposed," "connected," and "connected" are to be construed broadly, and may be, for example, fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communication between two elements. The specific meaning of the terms in this application will be understood by those of ordinary skill in the art in a specific context.
Some embodiments of the present application are described in detail below with reference to the accompanying drawings. The various embodiments and features of the embodiments described below may be combined with one another without conflict.
Example 1
Referring to fig. 1, fig. 2, and fig. 3, in order to provide a method for implementing synchronization plane switching between network ports on a radio frequency unit according to an embodiment of the present application, a radio frequency unit (RU) based on MASSIVE MIMO technology needs multiple network ports to support a scenario with a large bandwidth. The specific implementation mode comprises the following steps:
s1: the distribution unit and the radio frequency unit are connected by using an SFP interface 62 through optical fibers;
the SFP interface 62 is an interface device for converting gigabit electrical signals into optical signals, and a Distribution Unit (DU) and a radio frequency unit (RU) are connected by optical fibers through the SFP interface 62 to complete data interaction. When in connection, one or more optical fibers can be connected according to the requirements of application scenes.
S2: the processor 6 is arranged to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through an AXI bus;
in a radio frequency unit (RU) with a multi-core heterogeneous SOC as a framework, a processor 6 (ZYNQ PS) monitors an ethernet main body module (eth_block) through an AXI bus, mainly reads a status register value of each network port therein, and the processor 6 can also read and write a switch register through the AXI bus, thereby realizing switching of a synchronization plane (S-plane) between network ports.
S3: when the processor 6 monitors that the SFP interface 62 is interrupted, inquiring the locking state of the SFP interface 62 corresponding to the network port;
when the optical fiber is inserted into the radio frequency unit (RU), the SFP interface 62 generates a signal for inserting an interrupt, and after the processor 6 (PS) side detects the interrupt, the locked state of the network port is queried through the AXI bus.
S4: setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and time stamp data;
the multiplexed data selector is provided as a first data stream selection switch and a second data stream selection switch.
S5: if only one network port is locked, the processor 6 configures a switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module 64 to the network port for adaptation;
if a plurality of network ports are monitored to be locked, the processor 6 configures the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data paths of the 1588 function module 64 to the network port with the smallest network port number, wherein the 1588 function module is an embedded IEEE1588 module.
Taking a 4-port scheme as an example, when only one port lock is detected, the processor 6 configures a switch register through the AXI bus to control the first data stream selection switch and the second data stream selection switch, so that the data path of the 1588 function module 64 is switched to the port, and the port supports a synchronization PLANE (S-PLANE). If a plurality of network port locks are detected, the processor 6 controls the first data stream selection switch and the second data stream selection switch to switch the 1588 function module 64 to the network port with the smallest network port number (the network port numbers are 1, 2, 3 and 4 respectively). The 1588 function module 64 includes a 1588 clock control module (1588_timer) and a 1588 data path module (1588_datapath)
In some embodiments of the present invention, the step of setting the processor 6 to monitor the ethernet main module includes: the processor 6 reads the values of the status registers of the individual ports of the ethernet main body module.
In some embodiments of the present invention, the main way for the network port monitoring by the processor 6 is that after the SFP interface 62 generates the insertion interrupt, the value corresponding to the state of the SFP interface 62 is stored in the register, so that the state value in the state register is directly monitored, and then the signal identification can be directly performed.
Referring to fig. 4 and 5, in some embodiments of the present invention, the step of switching the data path of the 1588 function module 64 to the network port for adaptation by the first data flow selection switch and the second data flow selection switch includes:
the data flow selection switch sends the converted signals to the 1588 function module 64, and the 1588 function module 64 outputs the sending timer data and the receiving timer data to the network port; the network port respectively marks a receiving time stamp and a sending time stamp based on the sending timer data and the receiving timer data; the network port sends a receiving time stamp, a sending time stamp and 1588 protocol packets matched with the 1588 function module 64 to the processor 6; after the processor 6 receives the receiving time stamp, the sending time stamp and the 1588 protocol packet, the processor 6 calculates the network delay, so as to realize time synchronization of the distribution unit and the radio frequency unit, namely network clock synchronization.
The 1588 clock control module (1588_timer) outputs a transmitting timer signal (tx_timer) and a receiving timer signal (rx_timer) respectively, and the two timers are simultaneously transmitted to the network port. When the network port receives and transmits the 1588 protocol packet, a receiving timestamp (rx_stamp) and a transmitting timestamp (tx_stamp) are respectively stamped based on the timer signal, and the processor 6 calculates network delay after receiving the 1588 protocol packet and the timestamp, thereby realizing the network clock synchronization relationship of the Distribution Unit (DU) and the radio frequency unit (RU). The data of the timer signal and the time stamp are collectively abbreviated as ts in fig. 4.
Referring to fig. 4, in some embodiments of the present invention, the method further includes: when a receiving data path of the asynchronous surface network port is connected with a first data stream selection switch; setting a receiving buffer area; the first data stream selection switch transmits data to the second data stream selection switch through the receive buffer.
In some embodiments of the present invention, other asynchronous surface interfaces (e.g., ETH 2, ETH 3, and ETH 4) do not receive the timer provided by 1588 function 64, and therefore do not provide a receive and transmit timestamp. The data path of the asynchronous interface is from the interface to the first data flow switch 63, and the asynchronous interface is synchronized across the clock domain through the receiving buffer (rx_fifo), and then sent to the subsequent logic unit through the second data flow switch 65. The transmission data path of the asynchronous interface port is from the subsequent logic unit to the first data flow switch 63 through the second data flow switch 65, and finally through the network port.
In some embodiments of the present invention, as shown in FIG. 6, the 1588 datapath module (1588 datapath) functions to encapsulate 1588 protocol related datapaths. Wherein the receive path is synchronized across clock domains by a receive buffer (rx_fifo) and passes the data to a subsequent logic functional unit. The DATA in the transmit path comes from two directions, one from the subsequent logical unit DATA (tx_data) and the other from the sync plane message (S-plane_tx_data) sent by the processor 6. Wherein fig. 5 is a block diagram illustration of a 1588 datapath module.
In some embodiments of the invention, further comprising: the radio frequency unit manually designates the network port through configuration management data or a preset command sent by the distribution unit.
In some embodiments of the present invention, the distribution unit is used for manual conversion, so as to avoid the failure of repairing when the automatic conversion has a problem.
In some embodiments of the invention, the radio frequency unit is a radio frequency unit based on a multi-core heterogeneous SOC architecture.
In some embodiments of the invention, the first data stream selection switch and the second data stream selection switch each employ a multiplexed data selector.
In some embodiments of the present invention, as shown in fig. 7 and 8, a schematic diagram of a data stream selection switch is provided. Essentially the data flow control switch implemented by ZYNQ PL is made up of a set of multiplexed data Selectors (MUXs). The select terminal (SEL) of the multiplexed data selector controls from which input the output data comes. The processor 6 (ZYNQ PS) configures the switching register (switch_sel) via the AXI bus, thereby implementing the configuration of the selection terminal of each multiplexer, and finally the switching of the whole data stream is completed cooperatively.
For example, when the radio frequency unit (RU) detects that the network port needs to be switched, the processor 6 (ZYNQ PS) configures registers of the first data flow switch 63 and the second data flow switch 65, so as to complete switching of the data link of the 1588 function module 64. Assuming that the synchronization plane (S-plane) is switched to the second network port, the first data flow switch 63 switches the data path and the timestamp path of the 1588 module to the second network port, and the second data flow switch 65 performs corresponding path matching. The other paths remain straight through without going through 1588 function module 64. And similarly, the synchronous plane (S-plane) can be switched to the third network port and the fourth network port. The number of the net openings can be set according to the requirements.
Example 2
Referring to fig. 9, a system for implementing synchronization plane switching between network ports on a radio frequency unit according to an embodiment of the present application includes a front-end module 1, configured to connect a distribution unit and a radio frequency unit by using an SFP interface 62 through an optical fiber; the monitoring module 2 is used for setting the processor 6 to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through an AXI bus; the query module 3 is configured to query a locking state of the SFP interface 62 corresponding to the network port when the processor 6 monitors that the SFP interface 62 is interrupted; a preset module 4, which is provided with a first data stream selection switch and a second data stream selection switch for selecting the received data stream, the transmitted data stream and the time stamp data; the processing module 5 is configured to, if only one network port is locked, configure the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, where the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module 64 to the network port for adaptation; if a plurality of network ports are monitored to be locked, the processor 6 configures the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module 64 to the network port with the smallest network port number.
Example 3
Referring to fig. 10, an electronic device provided in an embodiment of the present application includes a processor 6, a 1588 function module 64, a memory 61 and a multiplexing data selector; the processor 6 is respectively connected with the 1588 functional module 64, the memory 61 and the multiplexing data selector; the 1588 functional module 64 is connected with the multiplexing data selector; the memory 61 stores program instructions executable by the processor 6, which are called by the processor 6 to perform a method of implementing synchronization plane switching between ports on the radio frequency unit. For example, implementation:
the distribution unit and the radio frequency unit are connected by using an SFP interface 62 through optical fibers; the processor 6 is arranged to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through an AXI bus; when the processor 6 monitors that the SFP interface 62 is interrupted, inquiring the locking state of the SFP interface 62 corresponding to the network port; setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and time stamp data; if only one network port is locked, the processor 6 configures a switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module 64 to the network port for adaptation; if a plurality of network ports are monitored to be locked, the processor 6 configures the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module 64 to the network port with the smallest network port number.
Example 4
In some embodiments of the invention, a computer readable storage medium has stored thereon a computer program which, when executed by the processor 6, implements a method of implementing synchronization plane switching between portals on a radio frequency unit. For example, implementation:
in some embodiments of the present invention, the distribution unit and the radio frequency unit are connected by an optical fiber using an SFP interface 62; the processor 6 is arranged to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through an AXI bus; when the processor 6 monitors that the SFP interface 62 is interrupted, inquiring the locking state of the SFP interface 62 corresponding to the network port; setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and time stamp data; if only one network port is locked, the processor 6 configures a switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module 64 to the network port for adaptation; if a plurality of network ports are monitored to be locked, the processor 6 configures the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module 64 to the network port with the smallest network port number.
The MEMORY 61 may be, but is not limited to, a RANDOM ACCESS MEMORY 61 (RAM), a read-ONLY MEMORY 6READ ONLY MEMORY,ROM, a programmable read-ONLY MEMORY (PROGRAMMABLE READ-ONLY MEMORY, PROM), a erasable read-ONLY MEMORY (ERASABLE PROGRAMMABLE READ-ONLY MEMORY, EPROM), an electrically erasable read-ONLY MEMORY (ELECTRIC ERASABLE PROGRAMMABLE READ-ONLY MEMORY, EEPROM), etc.
The processor 6 may be an integrated circuit chip with signal processing capabilities. The PROCESSOR 6 may be a general-purpose PROCESSOR including a central processing unit 6CENTRAL PROCESSING UNIT,CPU), a NETWORK PROCESSOR (NP), etc.; it may also be a digital signal processor (Digital signal processing, DSP), APPLICATION SPECIFIC INTEGRATED Cirsium (ASIC), FIELD-PROGRAMMABLE gate array (FIELD-PROGRAMMABLE logic GATE ARRAY, FPGA) or other PROGRAMMABLE logic device, discrete gate or transistor logic device, discrete hardware components.
It will be appreciated that the configuration shown in fig. 1 is merely illustrative, and that it may also include more or fewer components than shown in fig. 1, or have a different configuration than shown in fig. 1. The components shown in fig. 1 may be implemented in hardware, software, or a combination thereof.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other manners as well. The apparatus embodiments described above are merely illustrative, for example, flow diagrams and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be embodied essentially or in a part contributing to the prior art or in a part of the technical solution, in the form of a software product stored in a storage medium, including several instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the embodiments of the present application. And the aforementioned storage medium includes: a usb disk, a removable hard disk, a READ-ONLY MEMORY (ROM), a RANDOM ACCESS MEMORY (RAM), a magnetic disk or an optical disk, or other various media capable of storing program codes.
The foregoing description is only of the preferred embodiments of the present application and is not intended to limit the same, but rather, various modifications and variations may be made by those skilled in the art. Any modification, equivalent replacement, improvement, etc. made within the spirit and principles of the present application should be included in the protection scope of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The present embodiments are, therefore, to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (10)
1. A method for implementing synchronization plane switching between network ports on a radio frequency unit, comprising:
the distribution unit and the radio frequency unit are connected by using an SFP interface through an optical fiber;
setting a processor to monitor the Ethernet main body module; the processor reads and writes a switch register through an AXI bus;
when the processor monitors the interruption of the SFP interface, inquiring the locking state of the SFP interface corresponding to the network port;
setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and time stamp data;
if only one network port is locked, the processor configures a switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module to the network port for adaptation;
if a plurality of network ports are monitored to be locked, the processor configures a switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module to the network port with the minimum network port number.
2. The method for implementing synchronization plane switching between ports on a radio frequency unit as recited in claim 1, wherein the step of configuring the processor to monitor the ethernet body module comprises: and the processor reads the values of the status registers of all the network ports of the Ethernet main body module.
3. The method of implementing synchronization plane switching between network ports on a radio frequency unit as claimed in claim 1, wherein the step of switching the data path of the 1588 function module to the network port by the first data flow selection switch and the second data flow selection switch for adaptation comprises:
the data flow selection switch sends the converted signals to the 1588 functional module, and the 1588 functional module outputs sending timer data and receiving timer data to the network port;
the network port marks a receiving time stamp and a sending time stamp respectively based on the sending timer data and the receiving timer data;
the network port sends the receiving time stamp, the sending time stamp and the 1588 protocol packet adapted to the 1588 function module to the processor;
after the processor receives the receiving time stamp, the sending time stamp and the 1588 protocol packet, the processor calculates network time delay to realize time synchronization of the distribution unit and the radio frequency unit.
4. The method for implementing synchronization plane switching between network ports on a radio frequency unit according to claim 1, further comprising:
when a receiving data path of the asynchronous surface network port is connected with the first data stream selection switch;
setting a receiving buffer area;
the first data stream selection switch transmits data to a second data stream selection switch through the receive buffer.
5. The method for implementing synchronization plane switching between network ports on a radio frequency unit according to claim 1, further comprising:
the radio frequency unit manually designates the network port through configuration management data or a preset command sent by the distribution unit.
6. The method for implementing synchronization plane switching between network ports on a radio frequency unit according to claim 1, wherein the radio frequency unit is a radio frequency unit based on a multi-core heterogeneous SOC architecture.
7. The method of implementing synchronization plane switching between ports on a radio frequency unit of claim 1, wherein the first data stream selection switch and the second data stream selection switch each employ a multiplexed data selector.
8. A system for implementing synchronization plane switching between network ports on a radio frequency unit, comprising:
the front-end module is used for connecting the distribution unit and the radio frequency unit through an SFP interface by using an optical fiber;
the monitoring module is used for setting the processor to monitor the Ethernet main body module; the processor reads and writes a switch register through an AXI bus;
the inquiry module is used for inquiring the locking state of the network port corresponding to the SFP interface when the processor monitors the interruption of the SFP interface;
the device comprises a preset module, a first data stream selection switch and a second data stream selection switch, wherein the preset module is used for selecting a received data stream, a transmitted data stream and time stamp data;
the processing module is used for configuring a switch register to send control signals to the first data stream selection switch and the second data stream selection switch by the processor if only one network port is locked, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module to the network port for adaptation; if a plurality of network ports are monitored to be locked, the processor configures a switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 function module to the network port with the minimum network port number.
9. An electronic device comprising a processor, 1588 function module, memory, and multiplexed data selector; the processor is respectively connected with the 1588 functional module, the memory and the multiplexing data selector; the 1588 functional module is connected with the multiplexing data selector; the memory stores program instructions executable by the processor, the processor invoking the program instructions to perform the method of any of claims 1-7.
10. A computer readable storage medium, on which a computer program is stored, which computer program, when being executed by a processor, implements the method according to any of claims 1-7.
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