CN114039622A - Method for realizing switching of synchronization plane between network ports on radio frequency unit - Google Patents
Method for realizing switching of synchronization plane between network ports on radio frequency unit Download PDFInfo
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Abstract
The invention provides a method for realizing switching of a synchronization plane between network ports on a radio frequency unit, and relates to the technical field of communication interfaces. Connecting the distribution unit and the radio frequency unit by an SFP interface through an optical fiber; setting a processor to monitor the Ethernet main body module; a read-write switch register; when monitoring that the SFP interface is interrupted, inquiring the locking state of the network port; setting a first data stream selection switch and a second data stream selection switch; if only one network port is locked, a switch register is configured to send a control signal to a data stream selection switch, and a data path of the 1588 functional module is switched to the network port for adaptation; and if the locking of a plurality of network ports is monitored, the processor configures a switch register to selectively send a control signal to the data stream, and the data path of the 1588 functional module is switched to the network port with the minimum network port number. The method can avoid the loss of connection of a single network port on the transmission synchronous surface and keep the normal work of the whole communication equipment.
Description
Technical Field
The invention relates to the technical field of communication interfaces, in particular to a method for realizing switching of a synchronous plane between network ports on a radio frequency unit.
Background
In 4G (lte) communication technology, CPRI is generally used as a forward interface, but as the 5G and OPEN RAN architectures mature, enhanced CPRI (ECPRI/common public radio interface) has replaced CPRI as a new forward interface. Because the bottom layer of the ECPRI protocol is based on the Ethernet (MAC layer or TCP/IP layer), the universality and the flexibility are greatly improved. In addition, user plane, control plane, management plane and synchronous plane protocols on the ECPRI protocol are standardized, and architectural guarantee is provided for interconnection and intercommunication of radio frequency units (RU) and Distribution Units (DU) of different manufacturers. The synchronization PLANE (S-PLANE) adopts IEEE 1588(PTP) protocol, which makes it possible to switch between different network ports. Meanwhile, a radio frequency unit (RU) based on massize MIMO technology often needs a plurality of network ports to support a large bandwidth scene, and if a single network port of a transmission synchronization PLANE (S-plan) is disconnected, the whole device cannot work normally, so that a method for realizing that the synchronization PLANE can be switched between the network ports on the radio frequency unit is urgently needed.
Disclosure of Invention
The invention aims to provide a method for realizing the switching of a synchronous surface between network ports on a radio frequency unit, which can avoid the loss of connection of a single network port on a transmission synchronous surface and keep the normal work of the whole communication equipment.
The embodiment of the invention is realized by the following steps:
in a first aspect, an embodiment of the present application provides a method for implementing synchronous plane switchability between network ports on a radio frequency unit, including connecting a distribution unit and the radio frequency unit by an SFP interface through an optical fiber; setting a processor to monitor the Ethernet main body module; the processor reads and writes the switch register through the AXI bus; when the processor monitors that the SFP interface is interrupted, the locking state of the network port corresponding to the SFP interface is inquired; setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and timestamp data; if only one network port is locked, the processor configures the switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module to the network port for adaptation; and if the plurality of network ports are monitored to be locked, the processor configures the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module to the network port with the minimum network port number.
In some embodiments of the present invention, the step of configuring the processor to monitor the ethernet body module comprises: the processor reads the values of the status registers of the respective ports of the ethernet main body module.
In some embodiments of the present invention, the step of switching the data path of the 1588 function module to the network port for adaptation by the first data stream selection switch and the second data stream selection switch includes: the data flow selection switch sends the converted signals to the 1588 functional module, and the 1588 functional module outputs sending timer data and receiving timer data to the network port; the network port respectively stamps a receiving time stamp and a sending time stamp based on the sending timer data and the receiving timer data; the network port sends a receiving time stamp, a sending time stamp and a 1588 protocol packet matched with the 1588 functional module to the processor; after the processor receives the receiving time stamp, the sending time stamp and the 1588 protocol packet, the processor calculates the network time delay and realizes the time synchronization of the distribution unit and the radio frequency unit, namely the network clock synchronization.
In some embodiments of the invention, further comprising: when the receiving data path of the asynchronous interface network port is connected with the first data flow selection switch; setting a receiving buffer area; the first data stream selection switch transmits data to the second data selection switch through the receive buffer.
In some embodiments of the invention, further comprising: the radio frequency unit manually appoints the network port through configuration management data or a preset command sent by the distribution unit.
In some embodiments of the present invention, the radio frequency unit is a radio frequency unit based on a multi-core heterogeneous SOC architecture.
In some embodiments of the invention, the first data stream selection switch and the second data stream selection switch each employ a multiplexed data selector.
In a second aspect, an embodiment of the present application provides a system for implementing synchronization plane switching between network ports on a radio frequency unit, including: the front-end module is used for connecting the distribution unit and the radio frequency unit through an optical fiber by utilizing an SFP interface; the monitoring module is used for setting the processor to monitor the Ethernet main body module; the processor reads and writes the switch register through the AXI bus; the query module is used for querying the locking state of the network port corresponding to the SFP interface when the processor monitors that the SFP interface is interrupted; the system comprises a presetting module, a data processing module and a data processing module, wherein the presetting module is provided with a first data stream selection switch and a second data stream selection switch which are used for selecting a received data stream, a sent data stream and timestamp data; the processing module is used for sending a control signal to the first data stream selection switch and the second data stream selection switch by the processor configuration switch register if only one network port is locked, and switching the data path of the 1588 functional module to the network port for adaptation by the first data stream selection switch and the second data stream selection switch; and if the plurality of network ports are monitored to be locked, the processor configures the switch register to send control signals to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module to the network port with the minimum network port number.
In a third aspect, an embodiment of the present application provides an electronic device, including a processor, a 1588 functional module, a memory, and a multiplexed data selector; the processor is respectively connected with the 1588 functional module, the memory and the multiplex data selector; 1588 the function module is connected with the multiplex data selector; the memory stores program instructions executable by the processor, which invokes the program instructions to perform the methods described above.
In a fourth aspect, the present application provides a computer-readable storage medium, on which a computer program is stored, and the computer program, when executed by a processor, implements the method described above.
Compared with the prior art, the embodiment of the invention has at least the following advantages or beneficial effects:
a radio frequency unit (RU) based on the MASSIVE MIMO technology needs a plurality of network ports to support a scene with large bandwidth, and the design utilizes the switching of automatic network ports to avoid the loss of connection of a single network port on the transmission synchronous surface and keep the normal work of the whole communication equipment.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
Fig. 1 is a flowchart of a method for implementing switching between network ports of a synchronization plane on a radio frequency unit according to the present invention;
FIG. 2 is a schematic diagram of the fiber connection of a Distribution Unit (DU) and a radio frequency unit (RU) in the present invention;
FIG. 3 is a schematic diagram illustrating a process for automatically configuring a synchronous PLANE (S-PLANE) network interface according to the present invention;
FIG. 4 is a schematic structural diagram of an Ethernet module according to the present invention;
FIG. 5 is a cross-linked diagram of a 1588 clock control module and a network port of the present invention;
FIG. 6 is a block diagram of a 1588 datapath module of the present invention;
FIG. 7 is a schematic diagram of the connection of a first data stream selection switch and a second data stream selection switch according to the present invention;
FIG. 8 is a schematic diagram of a first data flow switch and a timestamp data path according to the present invention;
fig. 9 is a schematic diagram of a system for implementing switching of a synchronization plane between network ports on a radio frequency unit according to the present invention;
fig. 10 is a schematic structural diagram of an electronic device according to the present invention.
Icon: 1. a front module; 2. a monitoring module; 3. a query module; 4. presetting a module; 5. a processing module; 6. a processor; 61. a memory; 62. an SFP interface; 63. a first data flow switch; 64. 1588 function module; 65. a second dataflow switch.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
Thus, the following detailed description of the embodiments of the present application, presented in the accompanying drawings, is not intended to limit the scope of the claimed application, but is merely representative of selected embodiments of the application. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Meanwhile, in the description of the present application, the terms "first", "second", and the like are used only for distinguishing the description, and are not to be construed as indicating or implying relative importance.
It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
In the description of the present application, it should be noted that the terms "upper", "lower", "inner", "outer", and the like indicate orientations or positional relationships based on orientations or positional relationships shown in the drawings or orientations or positional relationships conventionally found in use of products of the application, and are used only for convenience in describing the present application and for simplification of description, but do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed in a specific orientation, and be operated, and thus should not be construed as limiting the present application.
In the description of the present application, it is also to be noted that, unless otherwise explicitly specified or limited, the terms "disposed" and "connected" are to be interpreted broadly, e.g., as being either fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art.
Some embodiments of the present application will be described in detail below with reference to the accompanying drawings. The embodiments described below and the individual features of the embodiments can be combined with one another without conflict.
Example 1
Referring to fig. 1, fig. 2 and fig. 3, in order to provide a method for implementing the switchable between the network ports of the synchronization plane on the radio frequency unit according to the embodiment of the present application, a radio frequency unit (RU) based on masive MIMO technology needs a plurality of network ports to support a large bandwidth scenario. The specific implementation mode comprises the following steps:
s1: the distribution unit and the radio frequency unit are connected by an optical fiber by using an SFP interface 62;
the SFP interface 62 is an interface device for converting gigabit electrical signals into optical signals, and the Distribution Unit (DU) and the radio frequency unit (RU) are connected by optical fibers through the SFP interface 62 to complete data interaction. One or more optical fibers can be connected according to the requirements of application scenes during connection.
S2: the processor 6 is arranged to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through the AXI bus;
in a radio frequency unit (RU) using a multi-core heterogeneous SOC as a framework, a processor 6(ZYNQ PS) monitors an ethernet main block (ETH _ block) through an AXI bus, mainly reads a state register value of each network port, and the processor 6 may also read and write a switch register through the AXI bus, thereby realizing switching of a synchronization plane (S-plane) between the network ports.
S3: when monitoring that the SFP interface 62 is interrupted, the processor 6 queries the locking state of the network port corresponding to the SFP interface 62;
when an optical fiber is inserted into a radio frequency unit (RU), the SFP interface 62 generates a signal for inserting an interrupt, and after the processor 6(PS) side detects the interrupt, the processor queries the lock state of the network port through the AXI bus.
S4: setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and timestamp data;
a multiplexed data selector is provided as the first data stream selection switch and the second data stream selection switch.
S5: if only one network port is locked, the processor 6 configures a switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module 64 to the network port for adaptation;
if it is monitored that a plurality of network ports are locked, the processor 6 configures the switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module 64 to the network port with the smallest network port number.
Taking the scheme of 4 network ports as an example, when it is monitored that only one network port is locked, the processor 6 configures a switch register through an AXI bus to realize control over a first data stream selection switch and a second data stream selection switch, so as to switch a data path of the 1588 function module 64 to the network port, and enable the network port to support a synchronous PLANE (S-PLANE). If a plurality of network ports are monitored to be locked, the processor 6 controls the first data stream selection switch and the second data stream selection switch to switch the 1588 function module 64 to the network port with the smallest network port number (the network port numbers are 1, 2, 3 and 4 respectively). The 1588 function module 64 comprises a 1588 clock control module (1588_ timer) and a 1588 data path module (1588_ datapath)
In some embodiments of the present invention, the step of configuring the processor 6 to monitor the ethernet body module comprises: the processor 6 reads the values of the status registers of the respective ports of the ethernet body module.
In some embodiments of the present invention, the main way for the processor 6 to monitor the network port is that when the SFP interface 62 generates an insertion interrupt, a value corresponding to the state of the SFP interface 62 is stored in a register, so that the state value in the state register is directly monitored, and signal identification can be directly performed.
Referring to fig. 4 and 5, in some embodiments of the present invention, the step of switching the data path of the 1588 function module 64 to the internet access for adaptation by the first data stream selection switch and the second data stream selection switch includes:
the data flow selection switch sends the converted signal to the 1588 function module 64, and the 1588 function module 64 outputs sending timer data and receiving timer data to the network port; the network port respectively stamps a receiving time stamp and a sending time stamp based on the sending timer data and the receiving timer data; the network port sends a receiving time stamp, a sending time stamp and a 1588 protocol packet matched with the 1588 functional module 64 to the processor 6; after the processor 6 receives the receiving timestamp, the sending timestamp and the 1588 protocol packet, the processor 6 calculates the network delay, and realizes time synchronization of the distribution unit and the radio frequency unit, namely network clock synchronization.
The 1588 clock control module (1588_ timer) respectively outputs a sending timer signal (tx _ timer) and a receiving timer signal (rx _ timer), and the two timers are simultaneously transmitted to the network port. When the network port receives and transmits the 1588 protocol packet, a receiving timestamp (rx _ stamp) and a transmitting timestamp (tx _ stamp) are respectively marked on the basis of a timer signal, and the processor 6 calculates network delay after receiving the 1588 protocol packet and the timestamp, so that a network clock synchronization relationship between a Distribution Unit (DU) and a radio frequency unit (RU) is realized. In fig. 4, ts is a common abbreviation for the timer signal and the timestamp data.
Referring to fig. 4, in some embodiments of the present invention, the method further includes: when the receiving data path of the asynchronous interface network port is connected with the first data flow selection switch; setting a receiving buffer area; the first data stream selection switch transmits data to the second data selection switch through the receive buffer.
In some embodiments of the invention, other non-synchronized plane interfaces (e.g., ETH 2, ETH 3, and ETH4) do not receive the timer provided by the 1588 function 64 and therefore do not provide receive and transmit timestamps. The receiving data path of the asynchronous plane network port is from the network port to the first data stream switch 63, through the receiving buffer (rx _ fifo) to complete the synchronization across clock domains, and through the second data stream switch 65 to the subsequent logic unit. The transmission data path of the non-synchronous plane network port passes through the second data flow switch 65 from the subsequent logic unit, then passes through the first data flow switch 63, and finally passes through the network port.
In some embodiments of the invention, as shown in fig. 6, the 1588 datapath module (1588 datapath) functions to encapsulate 1588 protocol-dependent datapaths. Wherein the receiving path completes the clock domain crossing synchronization of the received data by the receiving buffer (rx _ fifo) and passes the data to the subsequent logical function unit. The DATA in the transmit path comes from both directions, one from the subsequent logical unit DATA (TX _ DATA) and the other from the synchronization plane message (S-plane _ TX _ DATA) sent from the processor 6. Wherein figure 5 is a block diagram illustration of a 1588 datapath module.
In some embodiments of the invention, further comprising: the radio frequency unit manually appoints the network port through configuration management data or a preset command sent by the distribution unit.
In some embodiments of the invention, the distribution unit is used for manual conversion, so that the problem that the automatic conversion cannot be repaired when the automatic conversion is in problem is avoided.
In some embodiments of the present invention, the radio frequency unit is a radio frequency unit based on a multi-core heterogeneous SOC architecture.
In some embodiments of the invention, the first data stream selection switch and the second data stream selection switch each employ a multiplexed data selector.
In some embodiments of the present invention, as shown in fig. 7 and 8, a schematic diagram of a data stream selection switch is shown. The data flow control switch, which is essentially a ZYNQ PL implementation, is made up of a set of multiplexed data Selectors (MUXs). The select terminal (SEL) of the multiplexer data selector controls from which input the data at the output comes. The processor 6(ZYNQ PS) configures the switch register (switch _ sel) through the AXI bus, thereby configuring the selection end of each multiplexer, and finally completing the switching of the whole data stream in a coordinated manner.
For example, when the radio frequency unit (RU) detects that the network port needs to be switched, the processor 6(ZYNQ PS) configures registers of the first dataflow switch 63 and the second dataflow switch 65 to complete the switching of the data link of the 1588 function block 64. Assuming that the synchronization plane (S-plane) is switched to the second network port, the first dataflow switch 63 switches the data path and the timestamp path of the 1588 module to the second network port, and the second dataflow switch 65 performs corresponding path matching. The other paths remain straight through and do not pass through the 1588 function block 64. And similarly, the synchronous plane (S-plane) can be switched to the third port and the fourth port. The number of the net ports can be set according to the requirement.
Example 2
Referring to fig. 9, a system for implementing synchronous plane switching between network ports on a radio frequency unit according to an embodiment of the present application includes a front module 1, configured to connect a distribution unit and the radio frequency unit through an optical fiber by using an SFP interface 62; the monitoring module 2 is used for setting the processor 6 to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through the AXI bus; the query module 3 is configured to query a locking state of the SFP interface 62 corresponding to the network port when the processor 6 monitors that the SFP interface 62 is interrupted; the preset module 4 is provided with a first data stream selection switch and a second data stream selection switch which are used for selecting the received data stream, the sent data stream and the timestamp data; the processing module 5 is configured to, if only one network port is locked, configure the switch register to send a control signal to the first data stream selection switch and the second data stream selection switch by the processor 6, and switch the data path of the 1588 function module 64 to the network port for adaptation by the first data stream selection switch and the second data stream selection switch; if it is monitored that a plurality of network ports are locked, the processor 6 configures the switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module 64 to the network port with the smallest network port number.
Example 3
Referring to fig. 10, an electronic device provided in the embodiment of the present application includes a processor 6, a 1588 function module 64, a memory 61, and a multiplexing data selector; the processor 6 is respectively connected with the 1588 functional module 64, the memory 61 and the multiplex data selector; 1588 the function module 64 is connected to the multiplexer data selector; the memory 61 stores program instructions executable by the processor 6, and the processor 6 calls the program instructions to execute a method for implementing switching of the synchronization plane between the network ports on the radio unit. For example, the following steps are realized:
the distribution unit and the radio frequency unit are connected by an optical fiber by using an SFP interface 62; the processor 6 is arranged to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through the AXI bus; when monitoring that the SFP interface 62 is interrupted, the processor 6 queries the locking state of the network port corresponding to the SFP interface 62; setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and timestamp data; if only one network port is locked, the processor 6 configures a switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module 64 to the network port for adaptation; if it is monitored that a plurality of network ports are locked, the processor 6 configures the switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module 64 to the network port with the smallest network port number.
Example 4
In some embodiments of the invention, a computer readable storage medium has stored thereon a computer program which, when executed by a processor 6, implements a method of implementing synchronization plane inter-portal switchability on a radio unit. For example, the following steps are realized:
in some embodiments of the invention, the distribution unit and the radio frequency unit are connected by optical fibers using SFP interfaces 62; the processor 6 is arranged to monitor the Ethernet main body module; the processor 6 reads and writes the switch register through the AXI bus; when monitoring that the SFP interface 62 is interrupted, the processor 6 queries the locking state of the network port corresponding to the SFP interface 62; setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and timestamp data; if only one network port is locked, the processor 6 configures a switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module 64 to the network port for adaptation; if it is monitored that a plurality of network ports are locked, the processor 6 configures the switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module 64 to the network port with the smallest network port number.
The MEMORY 61 may be, but is not limited to, a RANDOM ACCESS MEMORY 61 (RAM), a READ ONLY MEMORY 6READ ONLY MEMORY (ROM), a PROGRAMMABLE READ ONLY MEMORY (PROM), an ERASABLE READ ONLY MEMORY (EPROM), an electrically ERASABLE READ ONLY MEMORY (EEPROM), and the like.
The processor 6 may be an integrated circuit chip having signal processing capabilities. The PROCESSOR 6 may be a general-purpose PROCESSOR including a CENTRAL PROCESSING UNIT 6CENTRAL PROCESSING UNIT (CPU), a NETWORK PROCESSOR (NP), etc.; but also a Digital Signal Processor (DSP), an APPLICATION Specific Integrated CIRCUIT (ASIC), a FIELD PROGRAMMABLE gate array (FIELD-PROGRAMMABLE gate array GATE ARRAY, FPGA) or other PROGRAMMABLE logic device, discrete gate or transistor logic device, discrete hardware component.
It will be appreciated that the configuration shown in fig. 1 is merely illustrative, and may include more or fewer components than shown in fig. 1, or have a different configuration than shown in fig. 1. The components shown in fig. 1 may be implemented in hardware, software, or a combination thereof.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. The apparatus embodiments described above are merely illustrative, and for example, the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of apparatus, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U disk, a removable hard disk, a READ-ONLY MEMORY (ROM), a RANDOM ACCESS MEMORY (RAM), a magnetic disk or an optical disk, and various media capable of storing program codes.
The above description is only a preferred embodiment of the present application and is not intended to limit the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application.
It will be evident to those skilled in the art that the present application is not limited to the details of the foregoing illustrative embodiments, and that the present application may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the application being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein. Any reference sign in a claim should not be construed as limiting the claim concerned.
Claims (10)
1. A method for realizing switching between network ports of a synchronization plane on a radio frequency unit is characterized by comprising the following steps:
connecting the distribution unit and the radio frequency unit by an SFP interface through an optical fiber;
setting a processor to monitor the Ethernet main body module; the processor reads and writes the switch register through the AXI bus;
when the processor monitors that the SFP interface is interrupted, inquiring the locking state of the network port corresponding to the SFP interface;
setting a first data stream selection switch and a second data stream selection switch for selecting a received data stream, a transmitted data stream and timestamp data;
if only one network port is locked, the processor configuration switch register sends a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch the data path of the 1588 functional module to the network port for adaptation;
if a plurality of network ports are monitored to be locked, the processor configures a switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch a data path of the 1588 functional module to the network port with the minimum network port number.
2. The method of claim 1, wherein the step of configuring the processor to monitor the ethernet body module comprises: and the processor reads the value of the status register of each network port of the Ethernet main body module.
3. The method as claimed in claim 1, wherein the step of adapting by switching the data path of 1588 function module to the network interface through the first data stream selection switch and the second data stream selection switch comprises:
the data flow selection switch sends the converted signal to the 1588 functional module, and the 1588 functional module outputs sending timer data and receiving timer data to the network port;
the network port respectively stamps a receiving time stamp and a sending time stamp based on the sending timer data and the receiving timer data;
the network port sends the receiving time stamp, the sending time stamp and a 1588 protocol packet which is adaptive to the 1588 functional module to the processor;
after the processor receives the receiving timestamp, the sending timestamp and the 1588 protocol packet, the processor calculates network delay to realize time synchronization of the distribution unit and the radio frequency unit.
4. The method of claim 1, wherein the method for implementing the switching between the mesh ports of the synchronization plane on the radio frequency unit further comprises:
when the receiving data path of the asynchronous interface network port is connected with the first data flow selection switch;
setting a receiving buffer area;
the first data stream selection switch transmits data to the second data selection switch through the receive buffer.
5. The method of claim 1, wherein the method for implementing the switching between the mesh ports of the synchronization plane on the radio frequency unit further comprises:
and the radio frequency unit manually appoints the network port through configuration management data or a preset command sent by the distribution unit.
6. The method of claim 1, wherein the radio frequency unit is based on a multi-core heterogeneous SOC architecture.
7. The method of claim 1, wherein the first stream selector and the second stream selector each use a multiplexer data selector.
8. A system for implementing synchronous plane inter-portal switching at a radio unit, comprising:
the front-end module is used for connecting the distribution unit and the radio frequency unit through an optical fiber by utilizing an SFP interface;
the monitoring module is used for setting the processor to monitor the Ethernet main body module; the processor reads and writes the switch register through the AXI bus;
the query module is used for querying the locking state of the network port corresponding to the SFP interface when the processor monitors that the SFP interface is interrupted;
the system comprises a presetting module, a data processing module and a data processing module, wherein the presetting module is provided with a first data stream selection switch and a second data stream selection switch which are used for selecting a received data stream, a sent data stream and timestamp data;
the processing module is configured to, if only one network port is locked, send a control signal to the first data stream selection switch and the second data stream selection switch by using the processor configuration switch register, and switch a data path of the 1588 function module to the network port for adaptation by using the first data stream selection switch and the second data stream selection switch; if a plurality of network ports are monitored to be locked, the processor configures a switch register to send a control signal to the first data stream selection switch and the second data stream selection switch, and the first data stream selection switch and the second data stream selection switch a data path of the 1588 functional module to the network port with the minimum network port number.
9. An electronic device comprising a processor, a 1588 functional module, a memory, and a multiplexed data selector; the processor is respectively connected with the 1588 functional module, the memory and the multiplex data selector; the 1588 functional module is connected with the multiplex data selector; the memory stores program instructions executable by the processor, the processor calling the program instructions to perform the method of any of claims 1-7.
10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-7.
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