CN114018930A - Method for detecting primary defects of silicon crystal - Google Patents

Method for detecting primary defects of silicon crystal Download PDF

Info

Publication number
CN114018930A
CN114018930A CN202111249604.6A CN202111249604A CN114018930A CN 114018930 A CN114018930 A CN 114018930A CN 202111249604 A CN202111249604 A CN 202111249604A CN 114018930 A CN114018930 A CN 114018930A
Authority
CN
China
Prior art keywords
epitaxial
defects
defect
grown
silicon crystal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202111249604.6A
Other languages
Chinese (zh)
Inventor
薛忠营
刘赟
魏星
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Institute of Microsystem and Information Technology of CAS
Zing Semiconductor Corp
Original Assignee
Shanghai Institute of Microsystem and Information Technology of CAS
Zing Semiconductor Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Institute of Microsystem and Information Technology of CAS, Zing Semiconductor Corp filed Critical Shanghai Institute of Microsystem and Information Technology of CAS
Priority to CN202111249604.6A priority Critical patent/CN114018930A/en
Publication of CN114018930A publication Critical patent/CN114018930A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/8851Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/95Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/9501Semiconductor wafers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps
    • H01L22/24Optical enhancement of defects or not directly visible states, e.g. selective electrolytic deposition, bubbles in liquids, light emission, colour change
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01NINVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84Systems specially adapted for particular applications
    • G01N21/88Investigating the presence of flaws or contamination
    • G01N21/8851Scan or image signal processing specially adapted therefor, e.g. for scan signal adjustment, for detecting different kinds of defects, for compensating for structures, markings, edges
    • G01N2021/8854Grading and classifying of flaws

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Computer Vision & Pattern Recognition (AREA)
  • Signal Processing (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

The invention discloses a method for detecting primary defects of silicon crystals, which comprises the following steps: providing a silicon crystal having grown-in defects; growing an epitaxial layer on the silicon crystal, the epitaxial layer including epitaxial defects formed based on the grown-in defects; performing light scattering scanning on the surface of the epitaxial layer to obtain a narrow channel defect result and a wide channel defect result; determining an epitaxial defect type based on the narrow channel defect result and the wide channel defect result; determining a type of the grown-in defects based on the epitaxial defect type. According to the method for detecting the silicon crystal primary defects, the primary defects which cannot be detected on the surface of the silicon crystal are extended to the surface of the epitaxial layer by epitaxial growth, light scattering scanning is carried out on the surface of the epitaxial layer, the types of the epitaxial defects are determined based on the obtained narrow-channel defect result and the obtained wide-channel defect result, and then the types of the primary defects are determined.

Description

Method for detecting primary defects of silicon crystal
Technical Field
The invention relates to the field of crystal defects, in particular to a method for detecting primary defects of silicon crystals.
Background
Single crystal silicon is the most important substrate material for integrated circuit devices, and grown-in defects generated during the growth and cooling of silicon crystals can greatly affect device performance. Characterization of defects is of great significance to study defect formation in single crystal silicon and to control growth of defect-free single crystal silicon.
Some of the grown-in defects on the single crystal silicon substrate propagate into the epitaxial layer during epitaxy by creating dislocations or stacking faults, which are generally indistinguishable from surface light scattering techniques prior to epitaxy, and which also tend to degrade device performance.
Therefore, there is a need to provide a new method for detecting silicon crystal grown-in defects to solve the above problems.
Disclosure of Invention
In this summary, concepts in a simplified form are introduced that are further described in the detailed description. This summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
The invention provides a method for detecting primary defects of silicon crystals, which comprises the following steps:
providing a silicon crystal having grown-in defects;
growing an epitaxial layer on the silicon crystal, the epitaxial layer including epitaxial defects formed based on the grown-in defects;
performing light scattering scanning on the surface of the epitaxial layer to obtain a narrow channel defect result and a wide channel defect result;
determining a type of the epitaxial defect based on the narrow channel defect result and the wide channel defect result;
determining a type of the grown-in defects based on the epitaxial defect type.
Further, determining a defect interval of the grown-in defect based on a light scattering scan of the surface of the epitaxial layer.
Furthermore, the narrow channel is a small-angle scattering light collecting channel and is used for collecting scattering light with a scattering angle range of 6-25 degrees.
Furthermore, the wide channel is a large-angle scattered light collecting channel and is used for collecting scattered light with an angle ranging from 30 degrees to 75 degrees.
Further, the narrow channel defect result includes the number of defects acquired by the narrow channel and the defect size, and the wide channel defect result includes the number of defects acquired by the wide channel and the defect size.
Further, the thickness of an epitaxial layer grown on the silicon crystal is 1-5 μm, the epitaxial temperature is 900-1200 ℃, and the epitaxial time is 20-1000 s.
Further, the types of the grown-in defects include holes, oxygen precipitates, and grown-in dislocation defects.
Further, the defect region includes a vacancy gathering region, an oxidation induced stacking fault region, a clean vacancy region, a clean self-interstitial region, and a native dislocation region.
Further, the epitaxial defect type determined based on the narrow channel defect result includes epitaxial dislocations and/or epitaxial stacking faults, and the epitaxial defect type determined based on the wide channel defect result includes epitaxial stacking faults.
Further, determining the type of the grown-in defect based on the epitaxial defect type comprises: determining the type of grown-in defects based on the epitaxial dislocations includes grown-in dislocations, and determining the type of grown-in defects based on the epitaxial stacking faults includes oxygen precipitation.
According to the method for detecting the silicon crystal primary defects, the primary defects which cannot be detected on the surface of the silicon crystal are extended to the surface of the epitaxial layer by epitaxial growth, light scattering scanning is carried out on the surface of the epitaxial layer, the types of the epitaxial defects are determined based on the obtained narrow-channel defect result and the obtained wide-channel defect result, and then the types of the primary defects are determined.
Drawings
The following drawings of the invention are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
In the drawings:
FIG. 1 is a schematic flow chart of a method for detecting silicon crystal grown-in defects according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a structure of a native defect type according to an embodiment of the present invention;
FIG. 3A is a schematic view of a light scattering particle scan before epitaxy of a silicon crystal according to one embodiment of the invention;
FIG. 3B is a schematic view of a light scattering particle scan of a narrow channel after silicon crystal epitaxy according to an embodiment of the invention;
FIG. 3C is a schematic view of a light scattering particle scan of a wide channel after silicon crystal epitaxy according to an embodiment of the invention;
FIG. 3D is an SEM image of a localized area of FIG. 3B, in accordance with one embodiment of the present invention;
FIG. 3E is a statistical chart of narrow channel defect results according to an embodiment of the invention;
FIG. 4A is a schematic view of a light scattering particle scan before epitaxy of a silicon crystal according to another embodiment of the invention;
FIG. 4B is a schematic view of a light scattering particle scan of a narrow channel after silicon wafer epitaxy according to another embodiment of the invention;
FIG. 4C is a schematic view of a light scattering particle scan of a wide channel after silicon wafer epitaxy according to another embodiment of the invention;
FIG. 4D is an SEM image of a localized area of FIG. 4B, according to another embodiment of the invention;
FIGS. 4E and 4F are SEM images of the local area of FIG. 4C, respectively, according to another embodiment of the present invention;
FIG. 4G is a statistical chart of narrow channel defect results according to another embodiment of the present invention;
FIG. 4H is a statistical chart of the wide channel defect results according to another embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating a principle of native defect detection according to an embodiment of the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art, that the present application may be practiced without one or more of these specific details. In other instances, well-known features of the art have not been described in order to avoid obscuring the present application.
It is to be understood that the present application is capable of implementation in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.
It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.
Spatial relational terms such as "under," "below," "under," "above," "over," and the like may be used herein for convenience in describing the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.
Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the present application. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the present application should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present application.
The invention provides a method for detecting silicon crystal primary defects, as shown in FIG. 1, comprising the following steps:
s101: providing a silicon crystal having grown-in defects;
s102: growing an epitaxial layer on the silicon crystal, the epitaxial layer including epitaxial defects formed based on the grown-in defects;
s103: performing light scattering scanning on the surface of the epitaxial layer to obtain a narrow channel defect result and a wide channel defect result;
s104: determining a type of the epitaxial defect based on the narrow channel defect result and the wide channel defect result;
s105: determining a type of the grown-in defects based on the epitaxial defect type.
According to the method for detecting the silicon crystal primary defects, the primary defects which cannot be detected on the surface of the silicon crystal are extended to the surface of the epitaxial layer by epitaxial growth, light scattering scanning is carried out on the surface of the epitaxial layer, the types of the epitaxial defects are determined based on the obtained narrow-channel defect result and the obtained wide-channel defect result, and then the types of the primary defects are determined.
The method of the present application is described in detail below with reference to FIGS. 1-4G.
First, step S101 is performed: a silicon crystal is provided, the silicon crystal having grown-in defects.
The defect characterization method described in this application is directed to a semiconductor material, which may be silicon, germanium, a silicon-germanium alloy, gallium arsenide, indium phosphide, or other semiconductor materials that can be etched by gas-phase hydrogen chloride at a high temperature, and is not limited to a specific one.
The silicon crystal may be a silicon single crystal produced by the czochralski method (hereinafter, referred to as CZ method), and may be produced by other methods, which are not described herein.
The type of defect is described in detail below with reference to fig. 2. Fig. 2 is a schematic view showing a growth rate and a defect distribution of a crystal, and before explaining these defects, first, determinants of the concentration of a Vacancy type point defect called Vacancy (Vacancy) and a lattice Interstitial type silicon point defect called self-Interstitial-silicon (Interstitial-Si) in single crystal silicon are explained in a common sense.
In the silicon single crystal, the V region is a region where vacancies, that is, recesses, pores, and the like caused by silicon atom deficiency are aggregated, the I region is a region where dislocations are generated or excess silicon atom groups are aggregated due to the presence of excess silicon atoms, and a Neutral (hereinafter, abbreviated as N) region where no atom deficiency or excess atoms exist exists between the V region and the I region.
The concentrations of these two defects are determined by the relationship between the crystal growth rate and the temperature gradient G in the vicinity of the solid solution interface during the crystal, and it has been confirmed that defects called OISF (Oxidation Induced Stacking Fault) are present in the region critical periphery of the V region and the I region and are distributed in a ring shape when viewed from a cross section perpendicular to the crystal growth axis (hereinafter referred to as "OISF ring").
When the CZ Czochralski furnace having a furnace structure in which the temperature gradient near the solid-liquid interface is large during the crystal growth is used for the defects caused by the crystal growth, the defect distribution diagram shown in FIG. 2 is obtained when the growth rate is changed from a high rate to a low rate along the crystal axis direction.
When the crystal growth-induced defects are classified, for example, when the growth rate is high, grown defects are present in all regions in the crystal diameter direction at a high density due to concentration of hole-type point defects, and the regions in which these defects are present are called vacancy-concentrated regions (V-rich regions), as shown in fig. 2. And, when the growth rate is decreased, an oxidation induced stacking fault region (OISF ring) is generated at the periphery of the crystal with the decrease of the growth rate, the diameter of the ring is decreased if the growth rate is further decreased, a pure dislocation region Pv is generated at the outer side of the ring, a V/I boundary region is generated when the growth rate and the crystal growth are completely matched with each other with the decrease of the growth rate, the crystal of the boundary region has a perfect crystal form without any defect, becomes a grown-in dislocation (I-rich) region with the further decrease of the growth rate, and a pure self-interstitial region (pure interstitial) and a self-interstitial aggregation region (B-band, B-defect) are further formed between the V/I boundary region and the I-rich region.
The method can represent all the defect types, and is wider in applicability.
Next, step S102 is performed: growing an epitaxial layer on the silicon crystal, the epitaxial layer including epitaxial defects formed based on the grown-in defects.
In one embodiment, as shown in FIG. 5, an epitaxial layer 510 is grown on a silicon crystal 500, the epitaxial defects including epitaxial dislocations 520 and epitaxial stacking faults 530.
Illustratively, growing the epitaxial layer may employ one of Low Pressure Chemical Vapor Deposition (LPCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), ultra-high vacuum chemical vapor deposition (UHVCVD), Rapid Thermal Chemical Vapor Deposition (RTCVD), and Molecular Beam Epitaxy (MBE).
In one embodiment, the silicon source for growing the epitaxial layer comprises silane, disilane, dichlorosilane, etc., the germanium source comprises germane, etc., and the boron source comprises diborane, etc. The growth of the epitaxial layer can be carried out in a UHV/CVD reaction chamber, and the epitaxial layer with the thickness of 1-5 mu m is generated under the process conditions that the epitaxial temperature is 900-1200 ℃ and the epitaxial time is 20-1000 s.
Illustratively, after an epitaxial layer is grown on the silicon crystal, the surface of the epitaxial layer is subjected to light scattering scanning to determine a defect interval of the grown-in defects. It should be noted that oxygen precipitates and dislocations in the silicon crystal cannot be observed by light scattering scanning before epitaxy, and epitaxial defects formed based on grown-in defects can be observed by light scattering scanning after the epitaxial layer is grown on the silicon crystal.
Next, step S103 is performed: and carrying out light scattering scanning on the surface of the epitaxial layer to obtain a narrow channel defect result and a wide channel defect result.
Illustratively, the narrow channel is a small-angle scattering light collecting channel for collecting scattering light with a scattering angle range of 6-25 degrees; the wide channel is a large-angle scattered light collecting channel and is used for collecting scattered light with an angle range of 30-75 degrees.
In one embodiment, as shown in fig. 5, incident light is incident normal to the surface of epitaxial layer 510, forming scattered light at epitaxial dislocations 520 that can be collected by narrow channels, scattered light at epitaxial dislocations 530 that can be collected by narrow channels, and scattered light that can be collected by wide channels.
In one embodiment, referring to FIGS. 3A-3E, FIG. 3A shows a light scattering scan image of a silicon crystal sample before epitaxy, FIG. 3B shows a light scattering scan image of a silicon crystal sample after epitaxy for a narrow channel, FIG. 3C shows a light scattering scan image of a silicon crystal sample after epitaxy for a wide channel, and FIG. 3D shows a Scanning Electron Microscope (SEM) image of a localized area of the silicon crystal sample of FIG. 3B; FIG. 3E shows a statistical view of the narrow channel defect results of the first silicon crystal sample, including the number of defects acquired by the narrow channel and the size of the defects.
In one embodiment, referring to FIGS. 4A-4H, FIG. 4A shows a light scattering scan image of a silicon crystal sample before epitaxy, FIG. 4B shows a light scattering scan image of a silicon crystal sample after epitaxy in a narrow channel, FIG. 4C shows a light scattering scan image of a silicon crystal sample after epitaxy in a wide channel, and FIG. 4D shows a Scanning Electron Microscope (SEM) image of a two-part region of the silicon crystal sample of FIG. 4B; FIGS. 4E and 4F each show Scanning Electron Microscope (SEM) images of two different localized areas of the silicon crystal sample of FIG. 4C; fig. 4G shows a statistical diagram of a narrow channel defect result of the second silicon crystal sample, and fig. 4H shows a statistical diagram of a wide channel defect result of the second silicon crystal sample, where the narrow channel defect result includes the number of defects acquired by the narrow channel and the defect size, and the wide channel defect result includes the number of defects acquired by the wide channel and the defect size.
Next, step S104 is performed: determining a type of the epitaxial defect based on the narrow channel defect result and the wide channel defect result.
Illustratively, the epitaxial defect type determined based on the narrow channel defect result includes epitaxial dislocations and/or epitaxial stacking faults, and the epitaxial defect type determined based on the wide channel defect result includes epitaxial stacking faults.
In one embodiment, epitaxial dislocations can only be detected in narrow channels, while epitaxial stacking faults can be detected in both narrow and wide channels.
In one embodiment, according to fig. 3B and 3C, or according to fig. 3D, or according to fig. 3E, the silicon crystal sample one after epitaxy has only epitaxial defects observed in the narrow channel, while no epitaxial defects are found in the wide channel, so that the type of epitaxial defects after epitaxy of the silicon crystal sample one can be determined to be epitaxial dislocations.
In one embodiment, according to fig. 4B and 4C, or according to fig. 4D and 4E, 4F, or according to fig. 4G and 4H, the silicon crystal sample two has both epitaxial defects observed in the narrow channel and epitaxial defects observed in the wide channel after epitaxy, and thus the epitaxial defect type after epitaxy of the silicon crystal sample can be determined to be an epitaxial stacking fault.
Next, step S105 is performed: determining a type of the grown-in defects based on the epitaxial defect type.
Illustratively, the defect interval of the grown-in defects is determined based on a light scattering scan of the surface of the epitaxial layer.
In one embodiment, it can be found by analyzing the size of the narrow channel that the OISF ring has a larger size than the I region, and the defect in this portion of size is an epitaxial stacking fault corresponding to a defect detected by the wide channel, so that it can be determined whether the defect region is the I region or the OISF ring only by the scanning result after the epitaxy.
Illustratively, determining the type of the grown-in defect based on the epitaxial defect type includes: determining the type of grown-in defects based on the epitaxial dislocations includes grown-in dislocations, and determining the type of grown-in defects based on the epitaxial stacking faults includes oxygen precipitation.
In one embodiment, the epitaxial dislocations are formed based on the grown-in dislocations, and the type of the epitaxial defect after the epitaxy of the silicon crystal sample is the epitaxial dislocation, so that it can be determined that the defect region of the grown-in defect before the epitaxy of the silicon crystal sample is the I-region (I-region), and the type of the grown-in defect before the epitaxy of the silicon crystal sample is the grown-in dislocation.
In one embodiment, the epitaxial stacking faults are formed based on oxygen precipitation, the type of the epitaxial defects after the epitaxy of the silicon crystal sample is the epitaxial stacking faults, so that the defect interval of the grown-in defects can be determined as an oxidation induced stacking fault region (OISF ring), and the type of the grown-in defects before the double epitaxy of the silicon crystal sample is the oxygen precipitation.
According to the method for detecting the silicon crystal primary defects, the primary defects which cannot be detected on the surface of the silicon crystal are extended to the surface of the epitaxial layer by epitaxial growth, light scattering scanning is carried out on the surface of the epitaxial layer, the types of the epitaxial defects are determined based on the obtained narrow-channel defect result and the obtained wide-channel defect result, and then the types of the primary defects are determined.
Although the example embodiments have been described herein with reference to the accompanying drawings, it is to be understood that the above-described example embodiments are merely illustrative and are not intended to limit the scope of the present application thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present application. All such changes and modifications are intended to be included within the scope of the present application as claimed in the appended claims.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.
In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, and for example, the division of the units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another device, or some features may be omitted, or not executed.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.
Similarly, it should be appreciated that in the description of exemplary embodiments of the present application, various features of the present application are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the application and aiding in the understanding of one or more of the various inventive aspects. However, the method of the present application should not be construed to reflect the intent: this application is intended to cover such departures from the present disclosure as come within known or customary practice in the art to which this invention pertains. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this application.
It will be understood by those skilled in the art that all of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where such features are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.
Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features included in other embodiments, rather than other features, combinations of features of different embodiments are meant to be within the scope of the application and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.
It should be noted that the above-mentioned embodiments illustrate rather than limit the application, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The application may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.

Claims (10)

1. A method for detecting silicon crystal primary defects, comprising:
providing a silicon crystal having grown-in defects;
growing an epitaxial layer on the silicon crystal, the epitaxial layer including epitaxial defects formed based on the grown-in defects;
performing light scattering scanning on the surface of the epitaxial layer to obtain a narrow channel defect result and a wide channel defect result;
determining a type of the epitaxial defect based on the narrow channel defect result and the wide channel defect result;
determining a type of the grown-in defects based on the epitaxial defect type.
2. The inspection method of claim 1, wherein the defect regions of the grown-in defects are determined based on light scattering scanning of the epitaxial layer surface.
3. The detection method of claim 1, wherein the narrow channel is a small angle scattered light collection channel for collecting scattered light having a scattering angle in the range of 6 ° to 25 °.
4. The detection method of claim 3, wherein the wide channel is a large angle scattered light collection channel for collecting scattered light in an angle range of 30 ° to 75 °.
5. The inspection method of claim 1, wherein the narrow channel defect results include a number of defects acquired by the narrow channel and a defect size, and the wide channel defect results include a number of defects acquired by the wide channel and a defect size.
6. The detection method according to claim 1, wherein the thickness of the epitaxial layer grown on the silicon crystal is 1 μm to 5 μm, the epitaxial temperature is 900 ℃ to 1200 ℃, and the epitaxial time is 20s to 1000 s.
7. The inspection method of claim 1, wherein the types of grown-in defects include holes, oxygen precipitates, grown-in dislocation defects.
8. The method of claim 2, wherein the defect regions include vacancy-agglomerated regions, oxidation-induced stacking fault regions, clean vacancy regions, clean self-interstitial regions, and native dislocation regions.
9. The inspection method of claim 1, wherein the epitaxial defect type determined based on the narrow channel defect results comprises epitaxial dislocations and/or epitaxial stacking faults and the epitaxial defect type determined based on the wide channel defect results comprises epitaxial stacking faults.
10. The inspection method of claim 9, wherein determining the type of grown-in defects based on the epitaxial defect type comprises: determining the type of grown-in defects based on the epitaxial dislocations includes grown-in dislocations, and determining the type of grown-in defects based on the epitaxial stacking faults includes oxygen precipitation.
CN202111249604.6A 2021-10-26 2021-10-26 Method for detecting primary defects of silicon crystal Pending CN114018930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202111249604.6A CN114018930A (en) 2021-10-26 2021-10-26 Method for detecting primary defects of silicon crystal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202111249604.6A CN114018930A (en) 2021-10-26 2021-10-26 Method for detecting primary defects of silicon crystal

Publications (1)

Publication Number Publication Date
CN114018930A true CN114018930A (en) 2022-02-08

Family

ID=80057614

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202111249604.6A Pending CN114018930A (en) 2021-10-26 2021-10-26 Method for detecting primary defects of silicon crystal

Country Status (1)

Country Link
CN (1) CN114018930A (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1632919A (en) * 2003-12-25 2005-06-29 北京有色金属研究总院 Method for eliminating primary pit defects of silicon monocrystal device making area
JP2006108151A (en) * 2004-09-30 2006-04-20 Shin Etsu Handotai Co Ltd Method of manufacturing silicon epitaxial wafer
JP2007036055A (en) * 2005-07-28 2007-02-08 Shin Etsu Handotai Co Ltd Evaluation method of silicon wafer
KR100712721B1 (en) * 2005-12-29 2007-05-04 주식회사 실트론 Method of in-situ evaluating defects of a semiconductor epitaxial layer
US20090040512A1 (en) * 2004-04-13 2009-02-12 Komatsu Electronic Metals Co., Ltd. Semiconductor wafer inspection device and method
CN101762595A (en) * 2009-12-29 2010-06-30 上海亨通光电科技有限公司 Laser scanning scattering detection and classification system for silicon slice surface defects
CN108333202A (en) * 2017-08-31 2018-07-27 长江存储科技有限责任公司 A kind of detection method that metal is stained
CN113109363A (en) * 2021-03-10 2021-07-13 中国科学院上海微系统与信息技术研究所 Method for representing defects in silicon crystal

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1632919A (en) * 2003-12-25 2005-06-29 北京有色金属研究总院 Method for eliminating primary pit defects of silicon monocrystal device making area
US20090040512A1 (en) * 2004-04-13 2009-02-12 Komatsu Electronic Metals Co., Ltd. Semiconductor wafer inspection device and method
JP2006108151A (en) * 2004-09-30 2006-04-20 Shin Etsu Handotai Co Ltd Method of manufacturing silicon epitaxial wafer
JP2007036055A (en) * 2005-07-28 2007-02-08 Shin Etsu Handotai Co Ltd Evaluation method of silicon wafer
KR100712721B1 (en) * 2005-12-29 2007-05-04 주식회사 실트론 Method of in-situ evaluating defects of a semiconductor epitaxial layer
CN101762595A (en) * 2009-12-29 2010-06-30 上海亨通光电科技有限公司 Laser scanning scattering detection and classification system for silicon slice surface defects
CN108333202A (en) * 2017-08-31 2018-07-27 长江存储科技有限责任公司 A kind of detection method that metal is stained
CN113109363A (en) * 2021-03-10 2021-07-13 中国科学院上海微系统与信息技术研究所 Method for representing defects in silicon crystal

Similar Documents

Publication Publication Date Title
TWI657171B (en) SiC EPITAXIAL WAFER, METHOD FOR PRODUCING THEREOF, METHOD FOR DETECTING LARGE-PIT DEFECTS, AND METHOD FOR IDENTIFYING DEFECTS
CN103635615B (en) Single-crystal silicon carbide, silicon carbide wafer and semiconductor device
Carnevale et al. Applications of electron channeling contrast imaging for the rapid characterization of extended defects in III–V/Si heterostructures
CN113109363B (en) Method for representing defects in silicon crystal
Ha et al. Dislocation nucleation in 4H silicon carbide epitaxy
Ueda et al. Structural characterization of defects in EFG-and HVPE-grown β-Ga2O3 crystals
Van Nguyen et al. High quality relaxed germanium layers grown on (110) and (111) silicon substrates with reduced stacking fault formation
Tsoutsouva et al. Interfacial atomic structure and electrical activity of nano-facetted CSL grain boundaries in high-performance multi-crystalline silicon
Baierhofer et al. Defect reduction in SiC epilayers by different substrate cleaning methods
Cooke et al. Sympetalous defects in metalorganic vapor phase epitaxy (MOVPE)-grown homoepitaxial β-Ga2O3 films
Stockmeier et al. Dislocation formation in heavily As‐doped Czochralski grown silicon
CN114018930A (en) Method for detecting primary defects of silicon crystal
Lantreibecq et al. Subgrains, micro-twins and dislocations characterization in monolike Si using TEM and in-situ TEM
JP4984561B2 (en) Semiconductor substrate defect detection method
Neumann et al. Structure investigations of nonpolar GaN layers
CN103650125A (en) Method for evaluating wafer defects
Rossi et al. Defect density reduction in epitaxial silicon
US9984941B2 (en) Non-destructive, wafer scale method to evaluate defect density in heterogeneous epitaxial layers
CN114023667A (en) Method for detecting primary defects of silicon crystal
Dasilva et al. Atomic-scale structural characterization of grain boundaries in epitaxial Ge/Si microcrystals by HAADF-STEM
Su et al. The effect of low-angle off-axis GaN substrate orientation on the surface morphology of Mg-doped GaN epilayers
Kissinger et al. IR-LTS a powerful non-invasive tool to observe crystal defects in as-grown silicon, after device processing, and in heteroepitaxial layers
Hao et al. The effects of annealing on non-polar (1 1 2 0) a-plane GaN films
Kessel et al. Residual strain in free-standing CdTe nanowires overgrown with HgTe
Ikeda et al. Noncontact characterization for grown‐in defects in Czochralski silicon wafers with a laser/microwave photoconductance method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination