CN114023667A

CN114023667A - Method for detecting primary defects of silicon crystal

Info

Publication number: CN114023667A
Application number: CN202111247647.0A
Authority: CN
Inventors: 薛忠营; 刘赟; 魏星
Original assignee: Shanghai Institute of Microsystem and Information Technology of CAS; Zing Semiconductor Corp
Current assignee: Shanghai Institute of Microsystem and Information Technology of CAS; Zing Semiconductor Corp
Priority date: 2021-10-26
Filing date: 2021-10-26
Publication date: 2022-02-08

Abstract

The invention discloses a method for detecting primary defects of silicon crystals, which comprises the following steps: providing a silicon crystal having grown-in defects; growing an epitaxial layer on the silicon crystal, the epitaxial layer including first-order epitaxial defects formed based on the grown-in defects; etching the surface of the epitaxial layer to amplify the primary epitaxial defect to form a secondary epitaxial defect; the secondary epitaxial defects were characterized by microscopy. According to the method for detecting the silicon crystal primary defects, the primary defects which cannot be detected on the surface of the silicon crystal are extended to the surface of the epitaxial layer by epitaxial growth, and the surface of the epitaxial layer is etched to amplify the epitaxial defects, so that the primary defects are positioned, and the types and the defect ranges of the primary defects are determined.

Description

Method for detecting primary defects of silicon crystal

Technical Field

The invention relates to the field of silicon crystal defects, in particular to a method for detecting primary defects of a silicon crystal.

Background

Single crystal silicon is the most important substrate material for integrated circuit devices, and grown-in defects generated during the growth and cooling of silicon crystals can greatly affect device performance. Characterization of defects is of great significance to study defect formation in single crystal silicon and to control growth of defect-free single crystal silicon.

Some of the grown-in defects on the single crystal silicon substrate propagate into the epitaxial layer during epitaxy by creating dislocations or stacking faults, which are generally indistinguishable from surface light scattering techniques prior to epitaxy, and which also tend to degrade device performance.

Therefore, there is a need to provide a new method for detecting silicon crystal grown-in defects to solve the above problems.

Disclosure of Invention

In this summary, concepts in a simplified form are introduced that are further described in the detailed description. This summary of the invention is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.

The invention provides a method for detecting primary defects of silicon crystals, which comprises the following steps:

providing a silicon crystal having grown-in defects;

growing an epitaxial layer on the silicon crystal, the epitaxial layer including first-order epitaxial defects formed based on the grown-in defects;

etching the surface of the epitaxial layer to amplify the primary epitaxial defect to form a secondary epitaxial defect;

and characterizing the secondary epitaxial defect through a microscope, and determining the type of the primary defect based on the characterization result of the secondary epitaxial defect.

Further, the characterizing the secondary epitaxial defect by microscopy comprises: the location of the secondary epitaxial defect is characterized by an optical microscope or a scanning electron microscope.

Further, the characterizing the secondary epitaxial defect by microscopy further comprises:

carrying out focused ion beam sample cutting on the secondary epitaxial defect;

and characterizing the section morphology of the secondary epitaxial defect by a transmission electron microscope.

Further, determining the type of the grown-in defect based on the characterization result of the secondary epitaxial defect comprises: determining the type of the primary defect based on the tangent plane morphology of the secondary epitaxial defect.

Further, after growing an epitaxial layer on the silicon crystal, the method further comprises the following steps: and performing light scattering scanning on the surface of the epitaxial layer to determine the defect interval of the grown-in defects.

Further, the thickness of an epitaxial layer grown on the silicon crystal is 1-5 μm, the epitaxial temperature is 900-1200 ℃, and the epitaxial time is 20-1000 s.

Further, the etching of the surface of the epitaxial layer comprises gas phase etching, wherein the etching gas is a seven-family hydride, the etching temperature is 800-1200 ℃, and the etching time is 10-30 min.

Further, the types of the grown-in defects include holes, oxygen precipitates, and grown-in dislocation defects.

Further, the defect region includes a vacancy gathering region, an oxidation induced stacking fault region, a clean vacancy region, a clean self-interstitial region, and a native dislocation region.

According to the method for detecting the silicon crystal primary defects, the primary defects which cannot be detected on the surface of the silicon crystal are extended to the surface of the epitaxial layer by epitaxial growth, and the surface of the epitaxial layer is etched to amplify the epitaxial defects, so that the primary defects are positioned, and the types and the defect ranges of the primary defects are determined.

Drawings

The following drawings of the invention are included to provide a further understanding of the invention. The drawings illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.

In the drawings:

FIG. 1 is a schematic flow chart of a method for detecting silicon crystal grown-in defects according to an embodiment of the present invention;

FIG. 2 is a diagram illustrating a structure of a native defect type according to an embodiment of the present invention;

FIG. 3A is a schematic view of a light scattering particle scan before epitaxy of a silicon crystal according to one embodiment of the invention;

FIG. 3B is a schematic view of scanning light scattering particles before epitaxial layer etching according to an embodiment of the present invention;

FIG. 3C is a schematic view of a light scattering particle scan after epitaxial layer etching according to an embodiment of the invention;

FIG. 3D is a SEM image of area a in FIG. 3B;

FIG. 3E is an optical microscope image of region a of FIG. 3C;

FIG. 3F is a SEM image of area a of FIG. 3C and a FIB cut of the defect in area a;

FIG. 3G is a TEM image of a defect section in the region a;

FIG. 3H is an SEM image of area B in FIG. 3B;

FIG. 3I is an optical microscope image of region b of FIG. 3C;

FIG. 3J is a SEM image of area b of FIG. 3C and a FIB cropping of the defect in area b;

FIG. 3K is a TEM image of a defect section in the b region;

FIG. 4A is a schematic view of a light scattering particle scan before epitaxy of a silicon crystal according to another embodiment of the invention;

FIG. 4B is a schematic view of scanning light scattering particles before epitaxial layer etching according to another embodiment of the present invention;

FIG. 4C is a schematic view of a light scattering particle scan after epitaxial layer etching according to another embodiment of the present invention;

FIG. 4D is an SEM image of area c of FIG. 4B;

FIG. 4E is an optical microscope image of region C of FIG. 4C;

FIG. 4F is an SEM image of area C of FIG. 4C and a FIB cut of the defect in area C;

fig. 4G is a TEM image of a defect slice in the c region.

Detailed Description

In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art, that the present application may be practiced without one or more of these specific details. In other instances, well-known features of the art have not been described in order to avoid obscuring the present application.

It is to be understood that the present application is capable of implementation in various forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the application to those skilled in the art. In the drawings, the size and relative sizes of layers and regions may be exaggerated for clarity. Like reference numerals refer to like elements throughout.

It will be understood that, although the terms first, second, third, etc. may be used to describe various elements, components, regions, layers and/or sections, these elements, components, regions, layers and/or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.

Spatial relational terms such as "under," "below," "under," "above," "over," and the like may be used herein for convenience in describing the relationship of one element or feature to another element or feature as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and/or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. As used herein, the term "and/or" includes any and all combinations of the associated listed items.

Embodiments of the invention are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the present application. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, embodiments of the present application should not be limited to the particular shapes of regions illustrated herein but are to include deviations in shapes that result, for example, from manufacturing. Thus, the regions illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the present application.

The invention provides a method for detecting silicon crystal primary defects, as shown in FIG. 1, comprising the following steps:

s101: providing a silicon crystal having grown-in defects;

s102: growing an epitaxial layer on the silicon crystal, the epitaxial layer including first-order epitaxial defects formed based on the grown-in defects;

s103: etching the surface of the epitaxial layer to amplify the primary epitaxial defect to form a secondary epitaxial defect;

s104: and characterizing the secondary epitaxial defect through a microscope, and determining the type of the primary defect based on the characterization result of the secondary epitaxial defect.

The method of the present application is described in detail below with reference to FIGS. 1-4G.

First, step S101 is performed: a silicon crystal is provided, the silicon crystal having grown-in defects.

The defect characterization method described in this application is directed to a semiconductor material, which may be silicon, germanium, a silicon-germanium alloy, gallium arsenide, indium phosphide, or other semiconductor materials that can be etched by gas-phase hydrogen chloride at a high temperature, and is not limited to a specific one.

The silicon crystal may be a silicon single crystal produced by the czochralski method (hereinafter, referred to as CZ method), and may be produced by other methods, which are not described herein.

The type of defect is described in detail below with reference to fig. 2. Fig. 2 is a schematic view showing a growth rate and a defect distribution of a crystal, and before explaining these defects, first, determinants of the concentration of a Vacancy type point defect called Vacancy (Vacancy) and a lattice Interstitial type silicon point defect called self-Interstitial-silicon (Interstitial-Si) in single crystal silicon are explained in a common sense.

In the silicon single crystal, the V region is a region where vacancies, that is, recesses, pores, and the like caused by silicon atom deficiency are aggregated, the I region is a region where dislocations are generated or excess silicon atom groups are aggregated due to the presence of excess silicon atoms, and a Neutral (hereinafter, abbreviated as N) region where no atom deficiency or excess atoms exist exists between the V region and the I region.

The concentrations of these two defects are determined by the relationship between the crystal growth rate and the temperature gradient G in the vicinity of the solid solution interface during the crystal, and it has been confirmed that defects called OISF (Oxidation Induced Stacking Fault) are present in the region critical periphery of the V region and the I region and are distributed in a ring shape when viewed from a cross section perpendicular to the crystal growth axis (hereinafter referred to as "OISF ring").

When the CZ Czochralski furnace having a furnace structure in which the temperature gradient near the solid-liquid interface is large during the crystal growth is used for the defects caused by the crystal growth, the defect distribution diagram shown in FIG. 2 is obtained when the growth rate is changed from a high rate to a low rate along the crystal axis direction.

When the crystal growth-induced defects are classified, for example, when the growth rate is high, grown defects are present in all regions in the crystal diameter direction at a high density due to concentration of hole-type point defects, and the regions in which these defects are present are called vacancy-concentrated regions (V-rich regions), as shown in fig. 2. And, when the growth rate is decreased, an oxidation induced stacking fault region (OISF ring) is generated at the periphery of the crystal with the decrease of the growth rate, the diameter of the ring is decreased if the growth rate is further decreased, a pure dislocation region Pv is generated at the outer side of the ring, a V/I boundary region is generated when the growth rate and the crystal growth are completely matched with each other with the decrease of the growth rate, the crystal of the boundary region has a perfect crystal form without any defect, becomes a grown-in dislocation (I-rich) region with the further decrease of the growth rate, and a pure self-interstitial region (pure interstitial) and a self-interstitial aggregation region (B-band, B-defect) are further formed between the V/I boundary region and the I-rich region.

The method can represent all the defect types, and is wider in applicability.

Next, step S102 is performed: growing an epitaxial layer on the silicon crystal, the epitaxial layer including first-order epitaxial defects formed based on the grown-in defects.

Illustratively, growing the epitaxial layer may employ one of Low Pressure Chemical Vapor Deposition (LPCVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), ultra-high vacuum chemical vapor deposition (UHVCVD), Rapid Thermal Chemical Vapor Deposition (RTCVD), and Molecular Beam Epitaxy (MBE).

In one embodiment, the silicon source for growing the epitaxial layer comprises silane, disilane, dichlorosilane, etc., the germanium source comprises germane, etc., and the boron source comprises diborane, etc. The growth of the epitaxial layer can be carried out in a UHV/CVD reaction chamber, and the epitaxial layer with the thickness of 1-5 mu m is generated under the process conditions that the epitaxial temperature is 900-1200 ℃ and the epitaxial time is 20-1000 s.

Illustratively, after an epitaxial layer is grown on the silicon crystal, the surface of the epitaxial layer is subjected to light scattering scanning to determine a defect interval of the grown-in defects. It should be noted that oxygen precipitates and dislocations in the silicon crystal cannot be observed by light scattering scanning before epitaxy, and primary epitaxial defects formed based on grown-in defects can be observed by light scattering scanning after the epitaxial layer is grown on the silicon crystal.

In one embodiment, referring to FIGS. 3A-3B, FIG. 3A shows a light scattering scan image of a silicon crystal sample before epitaxy, FIG. 3B shows a light scattering scan image of a silicon crystal sample after epitaxy, and the defect regions of the grown-in defects can be determined as oxidation induced stacking fault regions (OISF rings) according to FIG. 3B. Fig. 3D and 3H show Scanning Electron Microscope (SEM) images of the region a and the region B in fig. 3B, respectively.

In one embodiment, referring to fig. 4A-4B, fig. 4A shows a light scattering scan image of a silicon crystal sample before epitaxy, fig. 4B shows a light scattering scan image of a silicon crystal sample after epitaxy, and the defect region of the grown-in defect can be determined as I-region (I-region) according to fig. 4B. Fig. 4D shows Scanning Electron Microscope (SEM) images of the regions c in fig. 4B, respectively.

Next, step S103 is performed: and etching the surface of the epitaxial layer to amplify the primary epitaxial defect to form a secondary epitaxial defect.

The etching of the surface of the epitaxial layer may be performed by gas phase etching. Illustratively, the dry etching process includes, but is not limited to: reactive Ion Etching (RIE), ion beam etching, plasma etching, laser ablation, or any combination of these methods. A single etching method may also be used, or more than one etching method may also be used.

In one embodiment, the dry etching gas is hydrogen (H) in the range of 20slm to 80slm₂) The atmosphere is charged with 0.1% to 10% of a hydride of group seven, such as HF, HCl, HBr, HI, etc., preferably HCl. The etching temperature is 800-1200 deg.C, preferably 900 deg.C. The etching time is 10 min-30 min.

After epitaxy, vapor phase etching is carried out, and the number of epitaxial defects after vapor phase etching is obviously increased, because the scattering signals of the epitaxial defects are weak and cannot be completely detected. Therefore, the vapor phase etching can also improve the detection precision of epitaxial defects.

Next, step S104 is performed: and characterizing the secondary epitaxial defect through a microscope, and determining the type of the primary defect based on the characterization result of the secondary epitaxial defect.

Illustratively, the characterizing the secondary epitaxial defect by microscopy includes: the location of the secondary epitaxial defect is characterized by an optical microscope or a scanning electron microscope.

In one embodiment, fig. 3C shows a light scattering scanning image of a silicon crystal sample after etching an epitaxial layer, fig. 3E and 3I show optical microscope images of a region a and a region b, respectively, and fig. 3F and 3J show SEM images of a region a and a region b, respectively, based on which the localization of secondary epitaxial defects in the region a and the region b can be achieved.

In one embodiment, fig. 4C shows a light scattering scanning image of a silicon crystal sample after epitaxial layer etching, fig. 4E shows an optical microscope image of region C, and fig. 4F shows an SEM image of region C, based on which the localization of secondary epitaxial defects in region C can be achieved.

As can be seen from the results of SEM images, the epitaxial defects after vapor phase etching are greatly enlarged, so that the epitaxial defects can be observed under an optical microscope to locate the crack. Meanwhile, the gas phase etching can further help to position the central point of the epitaxial defect, and is beneficial to finding a defect source during subsequent Focused Ion Beam (FIB) sample cutting.

Illustratively, the characterizing the secondary epitaxial defect by microscopy further comprises:

carrying out focused ion beam sample cutting on the secondary epitaxial defect;

Further, the type of the grown-in defects is determined based on the profile morphology of the secondary epitaxial defects.

The Focused Ion Beam (FIB) technology is a micro-cutting technology that focuses an ion beam into a very small size using an electrostatic lens, and a particle beam of a currently commercially available FIB system is extracted from a liquid metal ion source. An electric field (supressor) is applied to the top end of an ion column to enable liquid metal or alloy to form a fine tip, a negative electric field (Extractor) is added to pull the metal or alloy at the tip, ion beams are led out, then the ion beams are focused through an electrostatic lens, the size of the ion beams can be determined through a series of Variable Aperture (AVA), then an E x B mass analyzer is used for screening out required ion types, finally the ion beams are focused on a sample through an octupole deflection device and an objective lens and scanned, the ion beams bombard the sample, and generated secondary electrons and ions are collected and imaged or are cut or ground through physical collision.

In one embodiment, FIGS. 3F and 3J also show schematic FIB-cropping of the epitaxial defect in the a-region and b-region, respectively, TEM images of the defect slices in the a-region and b-region after FIB-cropping, respectively, as shown in FIGS. 3G and 3K. Based on the observation of fig. 3G and 3K, it can be determined that the grown-in defect of the OISF ring generating the stacking fault and dislocation is oxygen precipitation.

In one embodiment, FIG. 4F also shows a schematic of FIB-milling the epitaxial defect in the c-region, and a TEM image of the defect slice in the c-region after FIB-milling is shown in FIG. 4G. Based on the observation of the image 4G, it can be determined that the grown-in defects generating epitaxial dislocations observed in the I region are grown-in dislocations.

Although the example embodiments have been described herein with reference to the accompanying drawings, it is to be understood that the above-described example embodiments are merely illustrative and are not intended to limit the scope of the present application thereto. Various changes and modifications may be effected therein by one of ordinary skill in the pertinent art without departing from the scope or spirit of the present application. All such changes and modifications are intended to be included within the scope of the present application as claimed in the appended claims.

Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application.

In the several embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described device embodiments are merely illustrative, and for example, the division of the units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another device, or some features may be omitted, or not executed.

In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments of the application may be practiced without these specific details. In some instances, well-known methods, structures and techniques have not been shown in detail in order not to obscure an understanding of this description.

Similarly, it should be appreciated that in the description of exemplary embodiments of the present application, various features of the present application are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the application and aiding in the understanding of one or more of the various inventive aspects. However, the method of the present application should not be construed to reflect the intent: this application is intended to cover such departures from the present disclosure as come within known or customary practice in the art to which this invention pertains. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment of this application.

It will be understood by those skilled in the art that all of the features disclosed in this specification (including any accompanying claims, abstract and drawings), and all of the processes or elements of any method or apparatus so disclosed, may be combined in any combination, except combinations where such features are mutually exclusive. Each feature disclosed in this specification (including any accompanying claims, abstract and drawings) may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise.

Furthermore, those skilled in the art will appreciate that while some embodiments described herein include some features included in other embodiments, rather than other features, combinations of features of different embodiments are meant to be within the scope of the application and form different embodiments. For example, in the claims, any of the claimed embodiments may be used in any combination.

It should be noted that the above-mentioned embodiments illustrate rather than limit the application, and that those skilled in the art will be able to design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as limiting the claim. The application may be implemented by means of hardware comprising several distinct elements, and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by one and the same item of hardware. The usage of the words first, second and third, etcetera do not indicate any ordering. These words may be interpreted as names.

Claims

1. A method for detecting silicon crystal primary defects, comprising:

providing a silicon crystal having grown-in defects;

2. The inspection method of claim 1, wherein said characterizing said secondary epitaxial defect by microscopy comprises:

the location of the secondary epitaxial defect is characterized by an optical microscope or a scanning electron microscope.

3. The inspection method of claim 2, wherein said characterizing said secondary epitaxial defect by microscopy further comprises:

carrying out focused ion beam sample cutting on the secondary epitaxial defect;

4. The inspection method of claim 3, wherein determining the type of the grown-in defects based on the characterization results of the secondary epitaxial defects comprises:

determining the type of the primary defect based on the tangent plane morphology of the secondary epitaxial defect.

5. The method of claim 1, further comprising, after growing an epitaxial layer on the silicon crystal:

and performing light scattering scanning on the surface of the epitaxial layer to determine the defect interval of the grown-in defects.

6. The detection method according to claim 1, wherein the thickness of the epitaxial layer grown on the silicon crystal is 1 μm to 5 μm, the epitaxial temperature is 900 ℃ to 1200 ℃, and the epitaxial time is 20s to 1000 s.

7. The detection method according to claim 1, wherein etching the surface of the epitaxial layer comprises vapor phase etching, wherein the etching gas is a hydride of seven groups, the etching temperature is 800 ℃ to 1200 ℃, and the etching time is 10min to 30 min.

8. The inspection method according to claim 4, wherein the types of the grown-in defects include holes, oxygen precipitates, and grown-in dislocation defects.

9. The method of claim 5, wherein the defect regions include vacancy-agglomerated regions, oxidation-induced stacking fault regions, clean vacancy regions, clean self-interstitial regions, and native dislocation regions.